Link delay test method of flexible direct-current valve control system and related device

Abstract

The invention discloses a link delay test method of a flexible direct-current valve control system and a related device, and the method comprises the steps: determining a link delay type according to a starting point and an end point of a link through which a signal passes; according to the link delay type, determining the type of a test signal for testing the link delay, a test starting point for sending the test signal, a link through which the test signal passes, and a test tool for capturing the test signal after the test signal passes through the link; when the test tool captures the level change of the test signal, recording the moment of the level change; and calculating the link delay of the flexible direct-current valve control system according to the moment of the level change. According to the method, comprehensive and accurate testing of the link delay of the flexible direct valve control system is realized, so that the problem that a special testing method for the link delay of the flexible direct valve control system does not exist in the prior art is solved.

Description

Technical Field

[0001] The present invention relates to the technical field of flexible DC valve control systems, and in particular to a link delay testing method and related devices for a flexible DC valve control system. Background Art

[0002] Flexible DC transmission is a DC transmission technology that uses voltage source converters based on fully controlled devices and pulse width modulation technology for DC transmission, and the flexible DC valve control system is a key technology for flexible DC transmission. However, there will be link delays in the flexible DC valve control system, and the delays of different links will bring various risks to the flexible DC valve control system. However, there is currently no test method specifically for the link delay of the flexible DC valve control system in the industry. Therefore, it is urgent to design a link delay test method for the flexible DC valve control system. Summary of the invention

[0003] The present invention provides a link delay test method and related device for a flexible DC valve control system, which are used to solve the problem that there is no special test method for link delay of a flexible DC valve control system in the prior art.

[0004] In view of this, the first aspect of the present application provides a link delay test method for a flexible DC valve control system, the method comprising:

[0005] Determine the link delay type based on the starting point and end point of the link through which the signal passes;

[0006] Determining, according to the link delay type, the type of test signal used to test the link delay, the test starting point for sending the test signal, the link through which the test signal passes, and the test tool used to capture the test signal after the test signal passes through the link;

[0007] When the test tool captures the level change of the test signal, recording the moment of the level change;

[0008] According to the time when the level changes, the link delay of the flexible DC valve control system is calculated.

[0009] Optionally, when the link delay type is a valve-controlled downlink control link delay, the link delay test method includes:

[0010] The type of the test signal is set as a test modulated wave signal, the test starting point is set at the communication terminal of the pole controller that sends the test modulated wave signal, the test tool is set as an operation terminal oscilloscope, and a splitter is set;

[0011] After the test modulated wave signal is sent out from the communication terminal, the test modulated wave signal is divided into a first measured signal and a first accompanying test signal through the optical splitter, so that the first measured signal passes through the measured link of the valve-controlled downlink control link, and the first accompanying test signal passes through the accompanying test link of the valve-controlled downlink control link, and is connected to the operation terminal oscilloscope;

[0012] When the operation terminal oscilloscope captures the level changes of the first measured signal and the first accompanying measured signal respectively, the time of the level change is recorded, and the delay of the downlink control link of the valve control is calculated according to the time of the level change;

[0013] Among them, the tested link of the valve control downlink control link is: a link composed of the valve control main control board, the bridge arm operation board, the switching board, the pulse distribution board, the power module control board, and the IGBT driver board in sequence;

[0014] The accompanying test link of the valve-controlled downlink control link is: an optical / electrical signal conversion board.

[0015] Optionally, calculating the delay of the valve-controlled downlink control link according to the time of level change includes:

[0016] ;

[0017] In the formula, is the delay of the downlink control link of the valve control, is the level step time of the first measured signal, is the level step time of the first accompanying measurement signal, is the time required for the first accompanying test signal to be converted into an electrical signal in the optical / electrical signal conversion board, is the turn-on / off time of the IGBT device.

[0018] Optionally, when the link delay type is a module voltage uplink delay, the link delay test method includes:

[0019] The type of the test signal is set to a test voltage signal, the test starting point is set to the sampling loop input port of the module control board, the test tool is set to an online logic analyzer, and two parallel output circuits are set;

[0020] After the test voltage signal is sent out from the sampling loop input port of the module control board, the test voltage signal is divided into a second measured signal and a second accompanying measurement signal through the two parallel output circuits, so that the second measured signal passes through the measured link of the module voltage uplink, and the second accompanying measurement signal passes through the accompanying measurement link of the module voltage uplink, and is connected to the online logic analyzer;

[0021] When the online logic analyzer captures the level changes of the second measured signal and the second accompanying measured signal respectively, the moment of the level change is recorded, and the delay of the uplink of the module voltage is calculated according to the moment of the level change;

[0022] Among them, the tested link of the module voltage uplink link is: a link composed of a power module control board sampling circuit, a power module control board chip, a pulse distribution board, a switching board, a bridge arm operation board, and a valve control main control board in sequence;

[0023] The accompanying test link of the module voltage uplink is: through the optical / electrical signal conversion board.

[0024] Optionally, calculating the delay of the uplink of the module voltage according to the time of level change includes:

[0025] ;

[0026] In the formula, is the delay of the module voltage uplink, is the level step time of the second measured signal, is the level step time of the second accompanying measurement signal, It is the time required for the second companion test signal to be converted into an optical signal in the optical / electrical signal conversion board.

[0027] Optionally, when the link delay type is a valve-controlled fast protection link delay, the link delay test method includes:

[0028] The type of the test signal is set as a test bridge arm current signal, the test starting point is set at the bridge arm current output port of the merging unit, the test tool is set as an operation terminal oscilloscope, and a spectrometer is set;

[0029] After the test bridge arm current signal is sent out at the bridge arm current output port, the test bridge arm current signal is divided into a third measured signal and a third accompanying measurement signal by the optical splitter, so that the third measured signal passes through the measured link of the valve-controlled fast protection link, and the third accompanying measurement signal passes through the accompanying measurement link of the valve-controlled fast protection link, and is connected to the operation terminal oscilloscope;

[0030] When the operation terminal oscilloscope captures the level changes of the third measured signal and the third accompanying measured signal respectively, the moment of the level change is recorded, and the delay of the valve-controlled fast protection link is calculated according to the moment of the level change;

[0031] Among them, the tested link of the valve-controlled fast protection link is: a link composed of a valve-controlled fast protection board, a three-out-of-two export board, a bridge arm operation board, a switching board, a pulse distribution board, a power module control board, and an IGBT driver board in sequence;

[0032] The valve-controlled fast protection link is: an optical / electrical signal conversion board.

[0033] Optionally, calculating the delay of the valve-controlled fast protection link according to the time of level change includes:

[0034] ;

[0035] In the formula, is the delay of the valve-controlled fast protection link, is the level step time of the third measured signal, is the level step time of the third accompanying measurement signal, is the time required for the third test signal to be converted into an electrical signal in the optical / electrical signal conversion board, is the turn-off time of the IGBT device.

[0036] A second aspect of the present application provides a link delay test system for a flexible DC valve control system, the system comprising:

[0037] An analysis unit, used to determine the link delay type according to the starting point and the end point of the link through which the signal passes;

[0038] A setting unit, used to determine, according to the link delay type, a type of test signal used to test the link delay, a test starting point for sending the test signal, a link through which the test signal passes, and a test tool for capturing the test signal after the test signal passes through the link;

[0039] an acquisition unit, configured to record a moment of level change when the test tool captures a level change of the test signal;

[0040] The calculation unit is used to calculate the link delay of the flexible DC valve control system according to the time when the level changes.

[0041] A third aspect of the present invention provides a link delay test device for a flexible DC valve control system, the device comprising a processor and a memory:

[0042] The memory is used to store program codes and transmit the program codes to the processor;

[0043] The processor is used to execute the steps of the link delay testing method of the flexible DC valve control system as described in the first aspect according to the instructions in the program code.

[0044] A fourth aspect of the present invention provides a computer-readable storage medium, wherein the computer-readable storage medium is used to store program codes, and the program codes are used to execute the link delay test method of the flexible DC valve control system described in the first aspect.

[0045] It can be seen from the above technical solutions that the present invention has the following advantages:

[0046] The present invention provides a link delay test method for a flexible DC valve control system, comprising: determining the link delay type according to the starting point and the end point of the link through which the signal passes; determining the type of test signal used to test the link delay, the test starting point for sending the test signal, the link through which the test signal passes, and a test tool for capturing the test signal after the test signal passes through the link according to the link delay type; when the test tool captures the level change of the test signal, recording the moment of the level change; and calculating the link delay of the flexible DC valve control system according to the moment of the level change. The method realizes a comprehensive and accurate test of the link delay of the flexible DC valve control system, thereby solving the problem that there is no test method specifically for the link delay of the flexible DC valve control system in the prior art. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0048] Figure 1 A schematic flow chart of a link delay test method for a flexible DC valve control system provided by an embodiment of the present invention;

[0049] Figure 2 A schematic diagram of a valve-controlled downlink control link delay test principle provided by an embodiment of the present invention;

[0050] Figure 3 A schematic diagram of the uplink delay test principle of the module voltage provided by an embodiment of the present invention;

[0051] Figure 4 A schematic diagram of the valve-controlled fast protection link delay test principle provided by an embodiment of the present invention;

[0052] Figure 5 A structural schematic diagram of a link delay test system for a flexible DC valve control system provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0053] In order to make the purpose, features and advantages of the present invention more obvious and easy to understand, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the embodiments described below are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0054] Embodiment 1:

[0055] See also Figure 1 , a link delay test method for a flexible DC valve control system provided in an embodiment of the present invention comprises:

[0056] Step 101: Determine the link delay type according to the starting point and the end point of the link through which the signal passes.

[0057] Step 102: Determine, according to the link delay type, the type of test signal used to test the link delay, the test starting point for sending the test signal, the link through which the test signal passes, and the test tool used to capture the test signal after the test signal passes through the link.

[0058] Step 103: When the test tool captures the level change of the test signal, the moment of the level change is recorded.

[0059] Step 104: Calculate the link delay of the flexible DC valve control system according to the time when the level changes.

[0060] Example 2, please refer to Figure 3 :

[0061] When the link delay type is a valve-controlled downlink control link delay, the link delay test method of the flexible DC valve-controlled system of the present invention includes:

[0062] Set the test signal type to the test modulation wave signal, set the test starting point to the communication terminal where the pole controller sends the test modulation wave signal, set the test tool to the operation terminal oscilloscope, and set the optical splitter;

[0063] After the test modulated wave signal is sent out from the communication terminal, the test modulated wave signal is divided into a first measured signal and a first accompanying test signal through an optical splitter, so that the first measured signal passes through the measured link of the valve-controlled downlink control link, and the first accompanying test signal passes through the accompanying test link of the valve-controlled downlink control link, and is connected to the operation terminal oscilloscope;

[0064] When the oscilloscope of the operation terminal captures the level changes of the first measured signal and the first accompanying measured signal respectively, the time of the level change is recorded, and the delay of the downlink control link of the valve control is calculated according to the time of the level change. The expression is:

[0065] ;

[0066] In the formula, is the delay of the valve control downlink control link, is the level step moment of the first measured signal, is the level step moment of the first accompanying measurement signal, is the time required for the first test signal to be converted into an electrical signal in the optical / electrical signal conversion board, is the turn-on / off time of the IGBT device.

[0067] Among them, the tested link of the valve control downlink control link is: a link composed of the valve control main control board, the bridge arm operation board, the switching board, the pulse distribution board, the power module control board, and the IGBT driver board in sequence;

[0068] The accompanying test link of the valve control's downlink control link is: optical / electrical signal conversion board.

[0069] The principle of Example 2 is described as follows:

[0070] It should be noted that the valve control downlink control link delay It refers to the time from when the pole control sends the modulation wave to the flexible direct current valve control system, to when the valve control system generates and sends the IGBT trigger command Ton / Toff of each power module, to when the power module IGBT device actually executes the trigger command. However, the delay of the downlink control link directly affects the control response speed and resonance risk of the flexible direct current valve control system. The longer the delay, the slower the control response speed of the flexible direct current valve control system, which in turn increases the risk of resonance with the system. Therefore, it is necessary to conduct a comprehensive and accurate test on the delay of the downlink control link of the valve control.

[0071] In this regard, the present invention provides a method for testing the delay of a valve-controlled downlink control link, specifically:

[0072] like Figure 2As shown, the test starting point is at the communication terminal where the pole control sends out the test modulation wave signal. During the test, the pole control first sends out the test modulation wave signal (the signal is a periodic optical signal with a period of T1, 50% of the time in one period is a high-level output signal with a fixed value, and the remaining 50% of the time is a zero-level output signal). The signal first passes through the optical splitter and is divided into two completely identical optical signals (one is called the measured signal (the first measured signal), and the other is called the accompanying test signal (the first accompanying test signal)). Among them, the measured signal passes through the valve control main control board, the bridge arm operation board, the switching board, the pulse distribution board, the power module control board, and the IGBT driver board in sequence, and is finally output from the IGBT driver board in the form of a driving electrical signal and connected to the terminal oscilloscope; the accompanying test signal is directly output in the form of an electrical signal through the optical / electrical signal conversion board and is also connected to the terminal oscilloscope. The terminal oscilloscope is operated to find the moment when the measured signal instantly steps from the negative level to the positive level (or from the positive level to the negative level) and the accompanying test signal instantly steps from the zero level to the high level (or from the high level to the zero level). , , then the valve control downlink control link delay is:

[0073] ;

[0074] In the formula, is the delay of the valve control downlink control link, is the level step moment of the first measured signal, is the level step moment of the first accompanying measurement signal, The time required for the first test signal to be converted into an electrical signal in the optical / electrical signal conversion board (determined by the board design, usually about 0.5us). It is the turn-on / off time of the IGBT device (usually about 10us).

[0075] Example 3, please refer to Figure 4 :

[0076] When the link delay type is the module voltage uplink delay, the link delay test method of the flexible DC valve control system of the present invention includes:

[0077] Set the test signal type to the test voltage signal, set the test starting point to the module control board sampling loop input port, set the test tool to the online logic analyzer, and set two parallel output circuits;

[0078] After the test voltage signal is sent out from the sampling loop input port of the module control board, the test voltage signal is divided into a second measured signal and a second accompanying test signal through two parallel output circuits, so that the second measured signal passes through the measured link of the module voltage uplink, and the second accompanying test signal passes through the accompanying test link of the module voltage uplink, and is connected to the online logic analyzer;

[0079] When the online logic analyzer captures the level changes of the second measured signal and the second accompanying measured signal respectively, the time of the level change is recorded, and the delay of the module voltage uplink is calculated according to the time of the level change. The expression is:

[0080] ;

[0081] In the formula, is the delay of the module voltage uplink. is the level step moment of the second measured signal, is the level step moment of the second accompanying measurement signal, It is the time required for the second test signal to be converted into an optical signal in the optical / electrical signal conversion board.

[0082] Among them, the tested link of the module voltage uplink link is: a link composed of the power module control board sampling circuit, the power module control board chip, the pulse distribution board, the switching board, the bridge arm operation board, and the valve control main control board in sequence;

[0083] The accompanying test link of the module voltage uplink is: through the optical / electrical signal conversion board.

[0084] The principle of Example 3 is described as follows:

[0085] It should be noted that the module voltage uplink delay Tup refers to the time from when the sampling circuit of the flexible DC power module control board samples the power module voltage value Uc, to when it is processed by the flexible DC power module control board and sent to the flexible DC valve control system, to when the flexible DC valve control system completes the processing and sends it to the upper control and protection system. However, the module voltage uplink delay directly affects the response speed of the overall overvoltage protection action of the flexible DC valve control system. The longer the delay, the slower the response speed of the overall overvoltage protection action of the flexible DC valve control system, which in turn increases the risk of overvoltage of the flexible DC valve. Therefore, it is necessary to conduct a comprehensive and accurate test of the module voltage uplink delay.

[0086] In this regard, the present invention provides a method for testing the uplink delay of the module voltage, specifically:

[0087] like Figure 3As shown in the figure, the test starting point is at the sampling loop input port of the module control board. During the test, the controllable voltage source first sends out a test voltage signal (the voltage signal is a periodic electrical signal with a period of T2. In one period, 50% of the time is a high-level output signal with a fixed value, and the remaining 50% of the time is a zero-level output signal). The test voltage signal is divided into two completely identical voltage signals through two parallel output circuits (one is called the measured signal (the second measured signal), and the other is called the accompanying test signal (the second accompanying test signal)). The measured voltage signal passes through the power supply in turn. The module control board sampling circuit (the measured voltage signal is converted into an optical signal), the power module control board chip, the pulse distribution board, the switching board, the bridge arm operation board, the valve control main control board, and finally the output from the valve control main control board in the form of an optical signal is connected to the terminal test board; the accompanying voltage signal is directly output in the form of an optical signal through the optical / electrical signal conversion board and is also connected to the terminal test board; the online logic analyzer is used to find the moments when the measured optical signal and the accompanying optical signal are instantly stepped from zero level to high level (or from high level to zero level) from the terminal test board. , , then the module voltage uplink delay is: ;

[0088] In the formula, is the delay of the module voltage uplink. is the level step moment of the second measured signal, is the level step moment of the second accompanying measurement signal, It is the time required for the second test signal to be converted into an optical signal in the optical / electrical signal conversion board (determined by the board design, usually about 0.5us).

[0089] Example 4, please refer to Figure 5 :

[0090] When the link delay type is a valve-controlled fast protection link delay, the link delay test method of the flexible DC valve-controlled system of the present invention includes:

[0091] Set the test signal type to the test bridge arm current signal, set the test starting point to the bridge arm current output port of the merging unit, set the test tool to the operation terminal oscilloscope, and set the optical splitter;

[0092] After the test bridge arm current signal is sent out from the bridge arm current output port, the test bridge arm current signal is divided into a third measured signal and a third accompanying measurement signal through an optical splitter, so that the third measured signal passes through the measured link of the valve-controlled fast protection link, and the third accompanying measurement signal passes through the accompanying measurement link of the valve-controlled fast protection link, and is connected to the operation terminal oscilloscope;

[0093] When the oscilloscope of the operation terminal captures the level changes of the third measured signal and the third accompanying measured signal respectively, the time of the level change is recorded, and the delay of the valve-controlled fast protection link is calculated according to the time of the level change. The expression is:

[0094] ;

[0095] In the formula, Delay of the fast protection link for valve control, is the level step moment of the third measured signal, is the level step moment of the third accompanying measurement signal, is the time required for the third test signal to be converted into an electrical signal in the optical / electrical signal conversion board, is the turn-off time of the IGBT device.

[0096] Among them, the tested link of the valve-controlled fast protection link is: a link composed of the valve-controlled fast protection board, the three-out-of-two export board, the bridge arm operation board, the switching board, the pulse distribution board, the power module control board, and the IGBT driver board in sequence;

[0097] The fast protection link of valve control is: optical / electrical signal conversion board.

[0098] The principle of Example 4 is described as follows:

[0099] It should be noted that the valve-controlled fast protection link delay It refers to the time from when the merging unit (MU) sends the bridge arm current Iarm sampling value to the fast protection board of the flexible direct current valve control system, to when the IGBT shutdown command of each power module is generated and sent by the flexible direct current valve control system, to when the IGBT device of the power module actually executes the shutdown command. The delay of the fast protection link of the valve control directly affects the response speed of the fast protection action of the flexible direct current valve control system. The longer the delay, the slower the response speed of the fast protection action of the flexible direct current valve control system, which in turn increases the risk of overcurrent damage to the flexible direct current valve. Therefore, it is necessary to conduct a comprehensive and accurate test on the delay of the fast protection link of the valve control.

[0100] In this regard, the present invention provides a method for testing the fast protection link delay of a flexible DC valve control, specifically:

[0101] like Figure 4As shown, the test starting point is at the bridge arm current output port of the merging unit (MU). During the test, the merging unit (MU) first sends out a test bridge arm current signal (the signal is a periodic optical signal with a period of T3, 50% of the time in one period is a high-level output signal with a fixed value, and the remaining 50% of the time is a zero-level output signal). The signal first passes through the optical splitter and is divided into two completely identical optical signals (one is called the measured signal (the third measured signal), and the other is called the accompanying test signal (the third accompanying test signal)). The measured optical signal passes through the valve-controlled fast protection board, the three-out-of-two export board, the bridge arm operation board, the switching board, the pulse distribution board, the power module control board, and the IGBT driver board in turn, and is finally output from the IGBT driver board in the form of a driving electrical signal and connected to the terminal oscilloscope; the accompanying test optical signal is directly output in the form of an electrical signal through the optical / electrical signal conversion board and is also connected to the terminal oscilloscope; the terminal oscilloscope is operated to find the moment when the measured driving electrical signal instantly steps from the positive level to the negative level and the accompanying test electrical signal instantly steps from the zero level to the high level. , , then the valve-controlled fast protection link delay is:

[0102] ;

[0103] In the formula, Delay of the fast protection link for valve control, is the level step moment of the third measured signal, is the level step moment of the third accompanying measurement signal, The time required for the third test signal to be converted into an electrical signal in the optical / electrical signal conversion board (determined by the board design, usually about 0.5us). is the turn-off time of the IGBT device (usually about 10us).

[0104] In summary, the embodiment of the present invention provides a method for testing three types of link delays of a flexible DC valve control system, thereby achieving a comprehensive and accurate test of three types of link delays of a flexible DC valve control system.

[0105] The above is a link delay test method for a flexible DC valve control system provided in an embodiment of the present invention. The following is a link delay test system for a flexible DC valve control system provided in an embodiment of the present invention.

[0106] See also Figure 5 , a link delay test system of a flexible DC valve control system provided in an embodiment of the present invention comprises:

[0107] The analyzing unit 201 is used to determine the link delay type according to the starting point and the end point of the link through which the signal passes.

[0108] The setting unit 202 is used to determine the type of test signal used to test the link delay, the test starting point for sending the test signal, the link through which the test signal passes, and the test tool used to capture the test signal after the test signal passes through the link according to the link delay type.

[0109] The acquisition unit 203 is used to record the moment of level change when the test tool captures the level change of the test signal.

[0110] The calculation unit 204 is used to calculate the link delay of the flexible DC valve control system according to the time when the level changes.

[0111] Furthermore, an embodiment of the present invention also provides a link delay test device for a flexible DC valve control system, the device comprising a processor and a memory:

[0112] The memory is used to store program codes and transmit the program codes to the processor;

[0113] The processor is used to execute the steps of the link delay testing method of the flexible DC valve control system as described in the above method embodiment according to the instructions in the program code.

[0114] Furthermore, an embodiment of the present invention also provides a computer-readable storage medium, wherein the computer-readable storage medium is used to store program codes, and the program codes are used to execute the method described in the above method embodiment.

[0115] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0116] In the several embodiments provided by the present invention, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic, for example, the division of units is only a logical function division, and there may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or units, which can be electrical, mechanical or other forms.

[0117] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0118] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0119] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions for a computer device (which can be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods of each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, etc. Various media that can store program codes.

[0120] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A link delay test method for a flexible DC valve control system, characterized in that: include: Determine the link delay type based on the starting point and end point of the link through which the signal passes; Determining, according to the link delay type, the type of test signal used to test the link delay, the test starting point for sending the test signal, the link through which the test signal passes, and the test tool used to capture the test signal after the test signal passes through the link; When the test tool captures the level change of the test signal, recording the moment of the level change; According to the time when the level changes, the link delay of the flexible DC valve control system is calculated.

2. The link delay test method of the flexible DC valve control system according to claim 1 is characterized in that: When the link delay type is a valve-controlled downlink control link delay, the link delay test method includes: The type of the test signal is set as a test modulated wave signal, the test starting point is set at the communication terminal of the pole controller that sends the test modulated wave signal, the test tool is set as an operation terminal oscilloscope, and a splitter is set; After the test modulated wave signal is sent out from the communication terminal, the test modulated wave signal is divided into a first measured signal and a first accompanying test signal through the optical splitter, so that the first measured signal passes through the measured link of the valve-controlled downlink control link, and the first accompanying test signal passes through the accompanying test link of the valve-controlled downlink control link, and is connected to the operation terminal oscilloscope; When the operation terminal oscilloscope captures the level changes of the first measured signal and the first accompanying measured signal respectively, the time of the level change is recorded, and the delay of the downlink control link of the valve control is calculated according to the time of the level change; Among them, the tested link of the valve control downlink control link is: a link composed of the valve control main control board, the bridge arm operation board, the switching board, the pulse distribution board, the power module control board, and the IGBT driver board in sequence; The accompanying test link of the valve-controlled downlink control link is: an optical / electrical signal conversion board.

3. The link delay test method of the flexible DC valve control system according to claim 2 is characterized in that: The step of calculating the delay of the valve-controlled downlink control link according to the time of level change includes: ； In the formula, is the delay of the downlink control link of the valve control, is the level step time of the first measured signal, is the level step time of the first accompanying measurement signal, is the time required for the first accompanying test signal to be converted into an electrical signal in the optical / electrical signal conversion board, is the turn-on / off time of the IGBT device.

4. The link delay test method of the flexible DC valve control system according to claim 1 is characterized in that: When the link delay type is the uplink delay of the module voltage, the link delay test method includes: The type of the test signal is set to a test voltage signal, the test starting point is set to the sampling loop input port of the module control board, the test tool is set to an online logic analyzer, and two parallel output circuits are set; After the test voltage signal is sent out from the sampling loop input port of the module control board, the test voltage signal is divided into a second measured signal and a second accompanying measurement signal through the two parallel output circuits, so that the second measured signal passes through the measured link of the module voltage uplink, and the second accompanying measurement signal passes through the accompanying measurement link of the module voltage uplink, and is connected to the online logic analyzer; When the online logic analyzer captures the level changes of the second measured signal and the second accompanying measured signal respectively, the moment of the level change is recorded, and the delay of the uplink of the module voltage is calculated according to the moment of the level change; Among them, the tested link of the module voltage uplink link is: a link composed of a power module control board sampling circuit, a power module control board chip, a pulse distribution board, a switching board, a bridge arm operation board, and a valve control main control board in sequence; The accompanying test link of the module voltage uplink is: through the optical / electrical signal conversion board.

5. The link delay test method of the flexible DC valve control system according to claim 4 is characterized in that: The step of calculating the delay of the uplink of the module voltage according to the time of level change includes: ； In the formula, is the delay of the module voltage uplink, is the level step time of the second measured signal, is the level step time of the second accompanying measurement signal, It is the time required for the second companion test signal to be converted into an optical signal in the optical / electrical signal conversion board.

6. The link delay test method of the flexible DC valve control system according to claim 1 is characterized in that: When the link delay type is a valve-controlled fast protection link delay, the link delay test method includes: The type of the test signal is set as a test bridge arm current signal, the test starting point is set at the bridge arm current output port of the merging unit, the test tool is set as an operation terminal oscilloscope, and a spectrometer is set; After the test bridge arm current signal is sent out at the bridge arm current output port, the test bridge arm current signal is divided into a third measured signal and a third accompanying measurement signal by the optical splitter, so that the third measured signal passes through the measured link of the valve-controlled fast protection link, and the third accompanying measurement signal passes through the accompanying measurement link of the valve-controlled fast protection link, and is connected to the operation terminal oscilloscope; When the operation terminal oscilloscope captures the level changes of the third measured signal and the third accompanying measured signal respectively, the moment of the level change is recorded, and the delay of the valve-controlled fast protection link is calculated according to the moment of the level change; Among them, the tested link of the valve-controlled fast protection link is: a link composed of a valve-controlled fast protection board, a three-out-of-two export board, a bridge arm operation board, a switching board, a pulse distribution board, a power module control board, and an IGBT driver board in sequence; The valve-controlled fast protection link is: an optical / electrical signal conversion board.

7. The link delay test method of the flexible DC valve control system according to claim 6 is characterized in that: The step of calculating the delay of the valve-controlled fast protection link according to the time of level change includes: ； In the formula, is the delay of the valve-controlled fast protection link, is the level step time of the third measured signal, is the level step time of the third accompanying measurement signal, is the time required for the third test signal to be converted into an electrical signal in the optical / electrical signal conversion board, is the turn-off time of the IGBT device.

8. A link delay test system for a flexible DC valve control system, characterized in that: include: An analysis unit, used to determine the link delay type according to the starting point and the end point of the link through which the signal passes; A setting unit, used to determine, according to the link delay type, a type of test signal used to test the link delay, a test starting point for sending the test signal, a link through which the test signal passes, and a test tool for capturing the test signal after the test signal passes through the link; an acquisition unit, configured to record a moment of level change when the test tool captures a level change of the test signal; The calculation unit is used to calculate the link delay of the flexible DC valve control system according to the time when the level changes.

9. A link delay test device for a flexible DC valve control system, characterized in that: The device comprises a processor and a memory: The memory is used to store program code and transmit the program code to the processor; The processor is used to execute the link delay testing method of the flexible DC valve control system according to any one of claims 1 to 7 according to the instructions in the program code.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium is used to store program codes, and the program codes are used to execute the link delay testing method for the flexible DC valve control system according to any one of claims 1 to 7.

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