Side wall structure of storage unit and manufacturing method thereof

Abstract

The invention relates to the technical field of semiconductor integrated circuit manufacturing, in particular to a side wall structure of a storage unit and a manufacturing method of the side wall structure. The method comprises the following steps: providing a semiconductor structure on which a plurality of memory cells are formed, wherein every two adjacent memory cells are spaced; carrying out blanket deposition to form a first oxide layer; carrying out blanket deposition to form a first silicon nitride layer; etching the first silicon nitride layer in a self-alignment manner, etching to remove the first silicon nitride layer covering the front surface, etching and thinning the first oxide layer covering the spacing surface between the adjacent storage units to form a second oxide layer, and retaining the first silicon nitride layer covering the side surface of the storage unit to form a first silicon nitride side wall; a second silicon nitride layer is formed through blanket type deposition; and carrying out self-alignment etching on the second silicon nitride layer, etching to remove the second silicon nitride layer covering the front surface, and reserving the second silicon nitride covering the side surface of the storage unit to form a second silicon nitride side wall.

Description

Technical Field

[0001] The present application relates to the technical field of semiconductor integrated circuit manufacturing, and in particular to a sidewall structure of a storage unit and a manufacturing method thereof. Background Art

[0002] Ion implantation is usually required in the substrate between two adjacent memory cells to form a doped region. By reducing the concentration of the doped region, the problem of lifting of the memory cell substrate due to excessively high doping concentration can be avoided.

[0003] However, after reducing the concentration of the doped area, the hydrofluoric acid in the subsequent wet etching process will corrode the silicon oxide on the sidewall of the storage unit, causing the sidewall silicon oxide to be undercut to form a gap. The silicon nitride of the interlayer dielectric layer drills back into the gap to cause defects. This defect can easily lead to the problem of bridging between adjacent tungsten contact holes during the filling process, which is not conducive to the reliability of the device. Summary of the invention

[0004] The present application provides a sidewall structure of a storage unit and a manufacturing method thereof, which can solve the problem in the related art that sidewall silicon oxide is easily corroded and undercut.

[0005] In order to solve the technical problem in the background technology, the first aspect of the present application provides a method for manufacturing a sidewall structure of a storage unit, and the method for manufacturing a sidewall structure of a storage unit comprises the following steps:

[0006] Providing a semiconductor structure having a plurality of memory cells, wherein two adjacent memory cells are spaced apart;

[0007] Blanket deposition forms a first oxide layer, wherein the first oxide layer covers a surface of the memory cell and a spacer surface between adjacent memory cells;

[0008] Blanket deposition forms a first silicon nitride layer, wherein the first silicon nitride layer covers the surface of the oxide layer;

[0009] Self-aligned etching of the first silicon nitride layer to remove the first silicon nitride layer covering the front surface, etching and thinning the first oxide layer covering the spacer surface between adjacent memory cells to form a second oxide layer, and retaining the first silicon nitride layer covering the side surface of the memory cell to form a first silicon nitride sidewall;

[0010] Blanket deposition forms a second silicon nitride layer, wherein the second silicon nitride layer covers the surface of the first silicon nitride sidewall spacer and the surface of the second oxide layer;

[0011] The second silicon nitride layer is self-alignedly etched to remove the second silicon nitride layer covering the front side, and the second silicon nitride layer covering the side of the storage unit is retained to form a second silicon nitride side wall; a step is formed at the junction between the second oxide layer under the second silicon nitride side wall and the first oxide layer under the first silicon nitride side wall.

[0012] Optionally, the step of forming a first silicon nitride layer by blanket deposition, wherein the first silicon nitride layer covers the surface of the oxide layer, comprises:

[0013] A first silicon nitride layer with a thickness of 200 Å to 300 Å is formed by blanket deposition, wherein the first silicon nitride layer covers the surface of the oxide layer.

[0014] Optionally, the step of forming a second silicon nitride layer by blanket deposition, wherein the second silicon nitride layer covers the surface of the first silicon nitride sidewall spacer and the surface of the second oxide layer, comprises:

[0015] A second silicon nitride layer with a thickness of 200 Å to 300 Å is formed by blanket deposition, wherein the second silicon nitride layer covers the surface of the first silicon nitride spacer and the surface of the second oxide layer.

[0016] Optionally, the step of forming a first oxide layer by blanket deposition, wherein the first oxide layer covers the surface of the memory cell and the spacer surface between adjacent memory cells, comprises:

[0017] A first oxide layer having a thickness of 70 Å to 130 Å is formed by blanket deposition, wherein the first oxide layer covers the surface of the memory cell and the spacer surface between adjacent memory cells.

[0018] Optionally, the step of self-aligning and etching the first silicon nitride layer, removing the first silicon nitride layer covering the front surface, etching and thinning the first oxide layer covering the spacer surface between adjacent memory cells to form a second oxide layer, and retaining the first silicon nitride layer covering the side surface of the memory cell to form a first silicon nitride sidewall includes:

[0019] The first silicon nitride layer is self-alignedly etched to remove the first silicon nitride layer covering the front side, and the first oxide layer covering the spacer surface between adjacent memory cells is etched and thinned to form a second oxide layer with a thickness of 35A to 65A, and the first silicon nitride layer covering the side of the memory cell is retained to form a first silicon nitride side wall.

[0020] In order to solve the technical problem in the background technology, the second aspect of the present application provides a sidewall structure of a storage unit, and the sidewall structure of the storage unit includes:

[0021] A semiconductor structure is formed with a plurality of memory cells, wherein two adjacent memory cells are spaced apart from each other;

[0022] A first oxide layer, wherein the first oxide layer is deposited on the periphery of the memory cell;

[0023] A first silicon nitride sidewall, wherein the first silicon nitride sidewall covers the first oxide layer on the side of the memory cell, and the first oxide layer under the first silicon nitride sidewall extends to both sides to form a first oxide layer extension portion;

[0024] a second oxide layer, the second oxide layer extending from the first oxide layer extension portion to both sides; the thickness of the second oxide layer is less than the thickness of the first oxide layer;

[0025] A second silicon nitride sidewall is provided, wherein the second silicon nitride sidewall covers the first silicon nitride sidewall on the side of the storage unit, and the second oxide layer is located under the second silicon nitride sidewall.

[0026] Optionally, a step is formed at a position where the second oxide layer meets the first oxide layer.

[0027] The technical solution of the present application includes at least the following advantages: the present application forms silicon nitride side walls by two depositions and etchings, so that a step is formed at the junction of the first oxide layer and the second oxide layer, thereby reducing the thickness of the first oxide layer near the ion implantation area, reducing the risk of side digging caused by wet cleaning, and at the same time, the thickness of the second oxide layer near the storage unit remains unchanged, which has no effect on the reliability of data retention in the storage unit. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the specific implementation methods of the present application or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0029] Figure 1 A flow chart of a method for manufacturing a sidewall structure of a storage unit provided by an embodiment of the present application is shown;

[0030] Figure 2 A schematic diagram of the cross-sectional structure of the device after step S2 is completed is shown;

[0031] Figure 3 A schematic diagram of the cross-sectional structure of the device after step S3 is completed is shown;

[0032] Figure 4 A schematic diagram of the cross-sectional structure of the device after step S4 is completed is shown;

[0033] Figure 5 A schematic diagram of the cross-sectional structure of the device after step S5 is completed is shown;

[0034] Figure 6 FIG. 4 shows a schematic diagram of a cross-sectional structure of the device after step S6 is completed. DETAILED DESCRIPTION

[0035] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in this application. Obviously, the described embodiments are part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0036] In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present application. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.

[0037] In the description of this application, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, it can also be the internal connection of two components, it can be a wireless connection, or it can be a wired connection. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0038] In addition, the technical features involved in the different embodiments of the present application described below can be combined with each other as long as they do not conflict with each other.

[0039] Figure 1 A flow chart of a method for manufacturing a sidewall structure of a storage unit provided by an embodiment of the present application is shown. Figure 1 As can be seen from the figure, the manufacturing method of the sidewall structure of the storage unit includes the following steps:

[0040] Step S1: providing a semiconductor structure having a plurality of memory cells, wherein two adjacent memory cells are spaced apart from each other.

[0041] Step S2: forming a first oxide layer by blanket deposition, wherein the first oxide layer covers the surface of the memory cell and the spacer surface between adjacent memory cells.

[0042] The first oxide layer covers the surface of the semiconductor structure according to the morphology of the semiconductor structure.

[0043] Figure 2 The schematic diagram of the cross-sectional structure of the device after step S2 is completed is shown. Figure 2 As can be seen in FIG. 1 , the first oxide layer 110 covers the surface of the memory cell 100 and the spacer surface between adjacent memory cells 100 according to the morphology of the semiconductor structure. That is, the first oxide layer 110 covers the upper surface, the left side surface and the right side surface of the memory cell 100, and the spacer surface between adjacent memory cells 100.

[0044] Exemplarily, the thickness of the first oxide layer 110 may be 70 Å to 130 Å. Preferably, the thickness of the first oxide layer 110 is 100 Å.

[0045] Step S3: blanket deposition forms a first silicon nitride layer, wherein the first silicon nitride layer covers the surface of the oxide layer.

[0046] Figure 3 FIG. 4 shows a schematic diagram of the cross-sectional structure of the device after step S3 is completed. Figure 3 As can be seen from the figure, the first silicon nitride layer 210 is Figure 2 The surface morphology of covers the first oxide layer 110.

[0047] Exemplarily, when the first silicon nitride layer is formed by blanket deposition, the first silicon nitride layer is formed by blanket deposition with a thickness of 200 Å to 300 Å, and the first silicon nitride layer covers the surface of the oxide layer.

[0048] Step S4: self-aligningly etching the first silicon nitride layer, etching away the first silicon nitride layer covering the front surface, etching and thinning the first oxide layer covering the spacer surface between adjacent memory cells to form a second oxide layer, and retaining the first silicon nitride layer covering the side surface of the memory cell to form a first silicon nitride sidewall.

[0049] Figure 4 The schematic diagram of the cross-sectional structure of the device after step S4 is completed is shown. Figure 4 It can be seen from the figure that the first oxide layer 110 located on the spacer surface between adjacent memory cells 100 is thinned to form a second oxide layer 120 , and a step is formed at the junction of the second oxide layer 120 and the first oxide layer 110 .

[0050] Exemplarily, the thickness of the second oxide layer 120 may be 35 Å to 65 Å. Preferably, the thickness of the second oxide layer 120 may be 50 Å.

[0051] During the self-aligned etching of the first silicon nitride layer 210 in step S4, the etching rate of the first silicon nitride layer 210 covering the front side is greater than the etching rate of the first silicon nitride layer 210 covering the side, so that after step S4, the first silicon nitride layer 210 covering the front side is completely etched away, and the first silicon nitride layer 210 covering the side of the storage unit 210 remains to form a first silicon nitride sidewall 211, and below the first silicon nitride sidewall 211 is an extension of the first oxide layer 110, and the extension of the first oxide layer 110 extends from the lower end of the first oxide layer 110 to both sides.

[0052] Step S5: blanket deposition forms a second silicon nitride layer, wherein the second silicon nitride layer covers the surface of the first silicon nitride sidewall spacer and the surface of the second oxide layer.

[0053] Figure 5 The schematic diagram of the cross-sectional structure of the device after step S5 is completed is shown. Figure 5 As can be seen in FIG. 1 , the deposited second silicon nitride layer 220 covers Figure 4 The surface of the device structure shown, that is, the second silicon nitride layer 220 covers the surface of the first silicon nitride sidewall 221 and the exposed surface of the first oxide layer 110 and the exposed surface of the second oxide layer 120 .

[0054] Step S6: self-aligningly etching the second silicon nitride layer, etching away the second silicon nitride layer covering the front side, retaining the second silicon nitride on the side covering the side of the storage unit to form a second silicon nitride side wall; forming a thickness step between the second oxide layer under the second silicon nitride side wall and the first oxide layer under the first silicon nitride side wall.

[0055] In this embodiment, silicon nitride side walls are formed by two depositions and etchings, so that a step is formed at the junction of the first oxide layer and the second oxide layer, thereby reducing the thickness of the first oxide layer near the ion implantation area, reducing the risk of side digging due to wet cleaning, and at the same time, the thickness of the second oxide layer near the storage unit remains unchanged, which has no effect on the reliability of data retention in the storage unit.

[0056] Figure 6 The schematic diagram of the cross-sectional structure of the device after step S6 is completed is shown. Figure 6It can be seen that during step S6, the etching rate of the second oxide layer 220 covering the front surface is greater than the etching rate of the second silicon nitride layer 220 covering the side of the first silicon nitride side wall 221, so that after step S6, the second silicon nitride layer 220 covering the front surface is completely etched away, and the second silicon nitride layer 220 covering the side of the first silicon nitride side wall 221 remains to form a second silicon nitride side wall 221, and the second oxide layer 120 is under the second silicon nitride side wall 221.

[0057] A step is formed at a junction between the second oxide layer 120 and the first oxide layer 110 .

[0058] Figure 6 The sidewall structure of the storage unit provided by an embodiment of the present application is shown. Figure 6 , the side wall structure comprises:

[0059] A semiconductor structure having a plurality of memory cells 100 is formed, and two adjacent memory cells 100 are spaced apart from each other.

[0060] A first oxide layer 110 is deposited on the periphery of the memory cell 100 .

[0061] The first silicon nitride sidewall 211 covers the first oxide layer 110 on the side of the memory cell 100 . The first oxide layer 110 under the first silicon nitride sidewall 211 extends to both sides to form a first oxide layer extension portion.

[0062] The second oxide layer 120 extends from the extension portion of the first oxide layer 110 to both sides; the thickness of the second oxide layer 120 is less than the thickness of the first oxide layer 110 .

[0063] The second silicon nitride sidewall 220 covers the first silicon nitride sidewall 211 on the side of the memory cell 110 , and the second oxide layer 120 is located under the second silicon nitride sidewall 221 .

[0064] A step is formed at a junction between the second oxide layer 120 and the first oxide layer 110 .

[0065] In this embodiment, silicon nitride side walls are formed by two depositions and etchings, so that a step is formed at the junction of the first oxide layer and the second oxide layer, thereby reducing the thickness of the first oxide layer near the ion implantation area, reducing the risk of side digging due to wet cleaning, and at the same time, the thickness of the second oxide layer near the storage unit remains unchanged, which has no effect on the reliability of data retention in the storage unit.

[0066] Obviously, the above embodiments are merely examples for the purpose of clear explanation, and are not intended to limit the implementation methods. For those skilled in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the implementation methods here. The obvious changes or modifications derived therefrom are still within the scope of protection created by this application.

Claims

1. A method for manufacturing a sidewall structure of a storage unit, characterized in that: The manufacturing method of the sidewall structure of the storage unit comprises the following steps: Providing a semiconductor structure having a plurality of memory cells, wherein two adjacent memory cells are spaced apart; Blanket deposition forms a first oxide layer, wherein the first oxide layer covers a surface of the memory cell and a spacer surface between adjacent memory cells; Blanket deposition forms a first silicon nitride layer, wherein the first silicon nitride layer covers the surface of the oxide layer; Self-aligned etching of the first silicon nitride layer to remove the first silicon nitride layer covering the front surface, etching and thinning the first oxide layer covering the spacer surface between adjacent memory cells to form a second oxide layer, and retaining the first silicon nitride layer covering the side surface of the memory cell to form a first silicon nitride sidewall; Blanket deposition forms a second silicon nitride layer, wherein the second silicon nitride layer covers the surface of the first silicon nitride sidewall spacer and the surface of the second oxide layer; The second silicon nitride layer is self-alignedly etched to remove the second silicon nitride layer covering the front side, and the second silicon nitride layer covering the side of the storage unit is retained to form a second silicon nitride side wall; a step is formed at the junction between the second oxide layer under the second silicon nitride side wall and the first oxide layer under the first silicon nitride side wall.

2. The method for manufacturing the sidewall structure of the storage unit according to claim 1, characterized in that: The step of blanket depositing to form a first silicon nitride layer, wherein the first silicon nitride layer covers the surface of the oxide layer, comprises: A first silicon nitride layer with a thickness of 70 Å to 300 Å is formed by blanket deposition, wherein the first silicon nitride layer covers the surface of the oxide layer.

3. The method for manufacturing the sidewall structure of the storage unit according to claim 1, characterized in that: The step of blanket depositing to form a second silicon nitride layer, wherein the second silicon nitride layer covers the surface of the first silicon nitride sidewall and the surface of the second oxide layer, comprises: A second silicon nitride layer with a thickness of 200 Å to 300 Å is formed by blanket deposition, wherein the second silicon nitride layer covers the surface of the first silicon nitride spacer and the surface of the second oxide layer.

4. The method for manufacturing the sidewall structure of the storage unit according to claim 1, characterized in that: The step of blanket depositing to form a first oxide layer, wherein the first oxide layer covers the surface of the memory cell and the spacer surface between adjacent memory cells, comprises: A first oxide layer having a thickness of 70 Å to 130 Å is formed by blanket deposition, wherein the first oxide layer covers the surface of the memory cell and the spacer surface between adjacent memory cells.

5. The method for manufacturing the sidewall structure of the storage unit according to claim 1, characterized in that: The step of self-aligning and etching the first silicon nitride layer, etching and removing the first silicon nitride layer covering the front surface, etching and thinning the first oxide layer covering the spacer surface between adjacent storage cells to form a second oxide layer, and retaining the first silicon nitride layer covering the side surface of the storage cell to form a first silicon nitride sidewall comprises: The first silicon nitride layer is self-alignedly etched to remove the first silicon nitride layer covering the front side, and the first oxide layer covering the spacer surface between adjacent memory cells is etched and thinned to form a second oxide layer with a thickness of 35A to 65A, and the first silicon nitride layer covering the side of the memory cell is retained to form a first silicon nitride side wall.

6. A side wall structure of a storage unit, characterized in that: The side wall structure of the storage unit includes: A semiconductor structure is formed with a plurality of memory cells, wherein two adjacent memory cells are spaced apart from each other; A first oxide layer, wherein the first oxide layer is deposited on the periphery of the memory cell; A first silicon nitride sidewall, wherein the first silicon nitride sidewall covers the first oxide layer on the side of the memory cell, and the first oxide layer under the first silicon nitride sidewall extends to both sides to form a first oxide layer extension portion; a second oxide layer, the second oxide layer extending from the first oxide layer extension portion to both sides; the thickness of the second oxide layer is less than the thickness of the first oxide layer; A second silicon nitride sidewall is provided, wherein the second silicon nitride sidewall covers the first silicon nitride sidewall on the side of the storage unit, and the second oxide layer is located under the second silicon nitride sidewall.

7. The side wall structure of the storage unit according to claim 6, characterized in that: A step is formed at a position where the second oxide layer and the first oxide layer meet.

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