Photon counting circuit, method and device

Abstract

The invention discloses a photon counting circuit, method and device. The circuit comprises SPAD pixels, a shaping circuit, a logic circuit and a counting unit. Wherein the SPAD pixel is used for sensing photons and generating a sensing pulse signal; the shaping circuit is connected with the SPAD pixel and is used for shaping the induction pulse signal and outputting a shaped signal; the logic circuit comprises a first input end and a second input end, the first input end is connected with the output end of the shaping circuit and used for receiving the shaping signal, and the second input end is connected with a clock signal; the logic circuit integrates the shaping signal and the clock signal and outputs a counting signal; and the counting unit is connected with the output end of the logic circuit and is used for determining the counting quantity of photons according to the counting signal.

Description

Technical Field

[0001] The present invention relates to the field of circuit design, and in particular to a photon counting circuit, method and device. Background Art

[0002] In the related art, when a single photon avalanche diode (SPAD) is used to perform time of flight (ToF) ranging or photon counting imaging (PCI) on a target object, when the return light intensity is large, a large number of photons will arrive at the same SPAD pixel in a very short time and generate a large number of close extreme-point pulses. The discriminator recognizes these extreme-point pulses as a pulse signal and outputs a digital signal to the counter. The counter generates a count, resulting in a large number of induced photons generating only one photon count, and the photon count is greatly reduced, affecting the ranging or imaging effect. Summary of the invention

[0003] Embodiments of the present application provide a photon counting circuit, method, and device.

[0004] The technical solution of the embodiment of the present application is implemented as follows:

[0005] A photon counting circuit, comprising: a SPAD pixel, a shaping circuit, a logic circuit and a counting unit; wherein:

[0006] The SPAD pixel is used to sense photons and generate sensing pulse signals;

[0007] The shaping circuit is connected to the SPAD pixel and is used to shape the sensing pulse signal and output a shaped signal;

[0008] The logic circuit comprises a first input terminal and a second input terminal, wherein the first input terminal is connected to the output terminal of the shaping circuit and is used to receive the shaped signal, and the second input terminal is connected to the clock signal; the logic circuit integrates the shaped signal with the clock signal and outputs a counting signal;

[0009] The counting unit is connected to the output end of the logic circuit and is used to determine the counted amount of photons according to the counting signal.

[0010] In the above scheme, the counting amount includes a counting rate; and the counting unit is used to determine the photon counting rate according to a high-level duty cycle or a low-level duty cycle in the counting signal.

[0011] In the above scheme, the counting unit includes a clock frequency circuit, which is used to measure the high-level duty cycle or the low-level duty cycle in the counting signal and output the photon counting rate related to the high-level duty cycle or the low-level duty cycle.

[0012] In the above scheme, the counting unit includes an analog-to-digital converter, which is used to determine the high-level duty cycle or the low-level duty cycle in the counting signal and output the photon counting rate related to the high-level duty cycle or the low-level duty cycle.

[0013] In the above solution, the counting amount includes a counting value, and the counting unit includes a counter, and the counter is used to determine the number of rising edges or the number of falling edges in the counting signal and output the counting value of photons.

[0014] In the above solution, the signal pulse width of the induction pulse signal is greater than the signal pulse width of the clock signal in one clock cycle.

[0015] In the above solution, the signal pulse width of the induction pulse signal is greater than half the clock period of the clock signal.

[0016] In the above solution, the difference between the signal pulse width of the clock signal in one clock cycle and the SPAD pixel is smaller than a preset threshold.

[0017] A photon counting method, applied to any of the photon counting circuits described above, characterized in that the method comprises:

[0018] Obtaining the sensing pulse signal generated by the SPAD pixel sensing photons;

[0019] The induction pulse signal is shaped by a shaping circuit and a shaped signal is output;

[0020] Integrate the clock signal with the shaping signal through a logic circuit and output a counting signal;

[0021] The counting signal is calculated and analyzed by a counting unit to determine the counted amount of photons.

[0022] A photon counting device, characterized by comprising any one of the photon counting circuits described above.

[0023] A storage medium stores a computer program, wherein the computer program implements the steps of any of the above methods when executed by a processor.

[0024] The embodiments of the present application provide a photon counting circuit, method and device; the circuit includes: SPAD pixels, a shaping circuit, a logic circuit and a counting unit; wherein the SPAD pixels are used to sense photons and generate sensing pulse signals; the shaping circuit is connected to the SPAD pixels, and is used to shape the sensing pulse signals and output the shaped signals; the logic circuit includes a first input terminal and a second input terminal, the first input terminal is connected to the output terminal of the shaping circuit, and is used to receive the shaped signal, and the second input terminal is connected to a clock signal; the logic circuit integrates the shaped signal with the clock signal, and outputs a counting signal; the counting unit is connected to the output terminal of the logic circuit, and is used to determine the counted number of photons according to the counting signal. That is to say, the embodiment of the present application receives the clock signal and the shaped signal output by the shaping circuit through the logic circuit, and outputs the counting signal to the counting unit, so that when a large number of photons arrive at a SPAD pixel in a very short time, the clock signal can be used to divide the shaped signal output by the shaping circuit and determine the counted number of photons, thereby solving the problem of SPAD pixel saturation leading to a large reduction in the number of photons in the related technology and improving the accuracy of photon counting. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 A photonic technology circuit based on SPAD pixels in the related art;

[0026] Figure 2 A schematic diagram of the relationship between the photon count value and the return light intensity when the SPAD pixel is saturated in the related art;

[0027] Figure 3 A schematic diagram of a photon counting circuit provided in an embodiment of the present application;

[0028] Figure 4 A schematic diagram of a photon pulse signal provided in an embodiment of the present application;

[0029] Figure 5 A schematic diagram of the relationship between a photon count value and a return light intensity provided in an embodiment of the present application;

[0030] Figure 6 A schematic diagram of a photon counting array provided in an embodiment of the present application;

[0031] Figure 7 A schematic flow chart of a photon counting method provided in an embodiment of the present application. DETAILED DESCRIPTION

[0032] In order to make the purpose, technical solutions and advantages of the present application clearer, the technical solutions of the present application are further elaborated in detail below in conjunction with the drawings and embodiments. The described embodiments should not be regarded as limiting the present application. All other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0033] In the following description, reference is made to “some embodiments”, which describe a subset of all possible embodiments, but it will be understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.

[0034] The terms "first / second / third" involved in the present application are merely used to distinguish similar objects and do not represent a specific ordering of the objects. It can be understood that "first / second / third" can be interchanged with a specific order or sequence where permitted, so that the embodiments of the present application described herein can be implemented in an order other than that illustrated or described herein.

[0035] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein are only for the purpose of describing the embodiments of this application and are not intended to limit this application.

[0036] SPAD is a photoelectric device with single-photon sensitivity. Under the action of reverse bias voltage, it will generate a very sharp pulse after receiving a photon. This pulse is recognized by the discriminator and outputs a digital pulse to the counter. The counter will count the digital pulse once, thereby realizing TOF ranging and PCI functions. When the intensity of the return light received by SPAD is very high, for example, when the surface reflectivity of the target object is very high, the ambient light (sunlight) is strong, or the target object is too close to the SPAD, a large number of photons will arrive at the same SPAD in a very concentrated time, generating a large number of close very sharp pulses. Because these very sharp pulses are very close in time, the reference Figure 1 As shown in the figure, the discriminator will identify these extreme-point pulses as a pulse signal according to its threshold and output a digital signal to the counter. The counter only counts once, resulting in some photons being missed. This phenomenon can be called "SPAD counting saturation". The photon missed detection in the "SPAD counting saturation" phenomenon will lead to a decrease in the statistical sampling of photon flight events, resulting in a decrease in signal strength and poor ranging or imaging effects.

[0037] refer to Figure 2As shown in the figure, due to the existence of SPAD count saturation phenomenon, in the "count value-return light intensity" curve of the SPAD pixel, the count value first increases with the increase of the return light intensity, and then decreases with the increase of the return light intensity after reaching a certain maximum value. That is, the count value decreases at high return light intensity, and one count value corresponds to two different return light intensities, resulting in an error in the return light intensity determined according to the count value, which in turn makes the judgment of the light intensity information for ranging or imaging of the target object inaccurate, and the ranging or imaging effect is poor.

[0038] In order to solve the above technical problems, the embodiment of the present application provides a photon counting circuit, referring to Figure 3 As shown, the circuit includes: SPAD pixels, shaping circuits, logic circuits and counting units; wherein,

[0039] SPAD pixels, used to sense photons and generate sensing pulse signals;

[0040] A shaping circuit, connected to the SPAD pixel, for shaping the sensing pulse signal and outputting a shaped signal;

[0041] The logic circuit comprises a first input terminal and a second input terminal, wherein the first input terminal is connected to the output terminal of the shaping circuit and is used to receive the shaping signal, and the second input terminal is connected to the clock signal; the logic circuit integrates the shaping signal with the clock signal and outputs a counting signal;

[0042] The counting unit is connected to the output end of the logic circuit and is used to determine the counted amount of photons according to the counting signal.

[0043] In this application, the SPAD pixel generates a sensing pulse signal after receiving a photon, referring to Figure 4 As shown, the sensing pulse signal output by the SPAD pixel is shaped by the shaping circuit, and the shaped signal (Bspad) is output. Exemplarily, the shaping circuit may include but is not limited to a discriminator. When a large number of photons arrive at a SPAD pixel in a very short time, a large number of very close extreme tip pulses will be generated. The discriminator identifies these very close extreme tip pulses as a continuous signal and outputs a continuous and wide pulse width shaped signal Bspad. Then, after the logic circuit performs a logical operation on the shaped signal (Bspad) and the clock signal (CLK), the counting signal (Ecnt) is output to the counting unit (counter), and the counting unit (counter) outputs the counted number of photons according to the counting signal (Ecnt). Among them, the shaping signal (Bspad) and the clock signal (CLK) perform a logical operation, which can be understood as the clock signal (CLK) dividing the shaped signal (Bspad) so that the shaped signal (Bspad) is divided into a periodic signal with multiple periodic pulses, and the periodic signal is consistent with the period and frequency of the clock signal (CLK).

[0044] In the present application, the logic circuit can be any one of AND gate logic, OR gate logic, NOT gate logic, NAND gate logic, NOR gate logic, etc., and the specific logic gate can be selected according to the polarity of the sensing pulse signal output by the SPAD pixel and the polarity requirement of the counting signal output by the logic circuit, as long as the clock signal (CLK) can realize the segmentation function of the shaped signal (Bspad).

[0045] The embodiment of the present application is explained by taking the example that the logic circuit is AND gate logic, the polarity of the sensing pulse signal output by the SPAD pixel is positive voltage, and the counter is triggered at a high level. Other logic gates can be inferred by analogy, and this application will not elaborate on them.

[0046] In this embodiment, the logic circuit is an AND gate logic. When the SPAD does not respond to photons, its output is a low level, that is, when Bspad is a low level, no matter whether CLK is a high level or a low level, the counting signal Ecnt output by the AND gate logic is low, and the counter is not triggered; when Bspad is a high level and CLK is also a high level, the AND gate logic output Ecnt is high, triggering the counter. When the SPAD pixel is in a counting saturation state, the Bspad output by the discriminator is a continuous high level, and Ecnt follows the high and low level changes of CLK. The AND gate logic continuously outputs Ecnt with the same period and frequency as the CLK, triggering the counter multiple times to avoid the counting unit generating only one count after the SPAD count is saturated, so that the photon count is positively correlated with the return light intensity and changes monotonically (the photon count increases monotonically with the increase of the return light intensity and remains stable after reaching the maximum value), refer to Figure 5 As shown, the accuracy of photon counting in reflecting the intensity of the returned light is improved. As can be seen from the above content, the embodiment of the present application shapes the induction pulse signal generated by the SPAD pixel through the shaping circuit to obtain a shaped signal, and the logic circuit receives the shaped signal and the clock signal, and outputs the counting signal to the counting unit, so that when a large number of photons arrive at a SPAD pixel in a very short time, multiple pulse signals can be output and the counted number of photons can be determined, which solves the problem in the related art that the saturation of the SPAD pixel count leads to a reduction in the photon count, making the count value of the SPAD pixel and the intensity of the returned light not uniquely corresponding, and improves the accuracy of photon counting in reflecting the intensity of the returned light.

[0047] In some embodiments of the present application, the counting amount includes a counting rate; and the counting unit is used to determine the counting rate of photons according to a high-level duty cycle or a low-level duty cycle in the counting signal.

[0048] In practical applications, the counting unit can determine the counting rate by sampling the duty cycle. Specifically, after CLK divides Bspad, it outputs a counting signal Ecnt with multiple periodic pulses, where each high-level pulse or low-level pulse can be regarded as a "grid". The counter can determine whether the grid in Ecnt is high or low one by one, and then count the number of high-level or low-level clock cycles in a period of time. Taking the high-level duty cycle to determine the counting rate as an example, the high-level duty cycle = the number of high-level cycles / total number of cycles = (the number of high-level cycles * cycle) / (the total number of cycles * cycle) = high-level time / total time, that is, the duty cycle information is counted to determine the counting rate of photons.

[0049] The counting rate reflects the intensity of the returned light. The greater the counting rate, the greater the intensity of the returned light; and vice versa. Determining the photon counting rate based on the high-level duty cycle of the counting signal can make the counting rate-return light intensity curve a monotonically rising curve. The counting rate and the return light intensity have a unique corresponding relationship, making the light intensity information determined based on the counting rate more accurate.

[0050] In some embodiments of the present application, the counting unit includes a clock frequency circuit, which is used to measure the high-level duty cycle or the low-level duty cycle in the counting signal and output the photon counting rate related to the high-level duty cycle or the low-level duty cycle.

[0051] In practical applications, after CLK divides Bspad, counter can determine whether the grids in the count signal Ecnt are high or low one by one, and the clock frequency circuit counts the number of high or low clock cycles in Ecnt. The clock frequency circuit in this application is a conventional circuit in the prior art, and this application will not be repeated here.

[0052] In some embodiments of the present application, the counting unit includes an analog-to-digital converter, which is used to determine a high-level duty cycle or a low-level duty cycle in a counting signal and output a photon counting rate related to the high-level duty cycle or the low-level duty cycle.

[0053] In practical applications, after CLK divides Bspad, the counter can determine whether the grids in Ecnt are high or low one by one, and the analog-to-digital converter converts the high level or low level into a digital signal to count the number of high or low level clock cycles in a period of time. The analog-to-digital converter in this application is a conventional device in the prior art, and this application does not elaborate on the analog-to-digital converter.

[0054] In some embodiments of the present application, the counting amount includes a counting value, and the counting unit includes a counter, which is used to determine the number of rising edges or the number of falling edges in the counting signal and output the counting value of photons.

[0055] In practical applications, the counting unit can calculate the count value through edge sampling, that is, the rising edge or falling edge triggers the count. Each time a rising edge or falling edge appears, a count is triggered (the register in the counter is flipped by the rising edge or falling edge). This counting method is a non-continuous discrete count (the number of times the rising edge or falling edge appears is a discrete number), and the count value is the same as the number of rising / falling edges. In this counting method, the count value is directly determined according to the number of rising edges or falling edges in Ecnt, and is a discrete point value.

[0056] Taking the rising edge as an example, in the prior art, when the Bspad signal is always kept at a high level, there is only one rising edge, and the counter only counts once. In the embodiment of the present application, after CLK divides Bspad, the counter can determine the number of rising edges or falling edges according to the grid in Ecnt, and then output the photon count value.

[0057] The larger the count value, the greater the intensity of the returned light. Determining the photon count value based on the number of rising edges or falling edges in the count signal can make the count value-return light intensity curve a monotonically rising curve. The count value and the return light intensity have a unique corresponding relationship, making the light intensity information determined based on the count value more accurate.

[0058] In some embodiments of the present application, the signal pulse width of the sensing pulse signal is greater than the signal pulse width of the clock signal in one clock cycle.

[0059] In practical applications, the pulse width of a clock signal within a clock cycle can be understood as the duration of a high level, or as the duration of a low level. Whether the pulse width represents the duration of a high level or a low level depends on whether the count rate is determined by a high level duty cycle or a low level duty cycle. Specifically, if the count rate is determined by a high level duty cycle, the pulse width represents the duration of the high level; if the count rate is determined by a low level duty cycle, the pulse width represents the duration of the low level. Figure 4As shown, taking the use of a high-level duty cycle to determine the counting rate as an example, the signal pulse width of the sensing pulse signal is greater than the signal pulse width of the clock signal within one clock cycle. This is because if the signal pulse width of the clock signal (CLK) within one clock cycle is greater than the signal pulse width of the sensing pulse signal (Pulse), then when the clock signal (CLK) divides the shaped signal (Bspad) with a larger signal pulse width, the signal pulse width of the counting signal (Ecnt) formed by the division is wider than the original signal pulse width of the sensing pulse signal (Pulse) generated by the SPAD pixel sensing a single photon. Then, when dividing the shaped signal (Bspad) with a larger signal pulse width, the number of divisions becomes smaller, resulting in a reduction in the high-level duty cycle or the low-level duty cycle or the number of rising edges / falling edges, resulting in a reduction in the number of photon counts, which is not conducive to better restoration of the return light intensity information.

[0060] In some embodiments of the present application, the pulse width of the sensing pulse signal is greater than half a clock period of the clock signal.

[0061] In practical applications, the pulse width of the sensing pulse signal (Pulse) is greater than half the clock cycle of the clock signal (CLK), so that the shaped signal of the non-continuous single-photon sensing pulse signal output by the SPAD pixel can also be segmented by CLK, ensuring that the segmented single-photon sensing pulse signal can have both high and low levels, or at least one rising edge or falling edge, so that it can participate in the calculation of the count rate sampled with a high-level duty cycle or a low-level duty cycle, or can participate in the calculation of the count value sampled with a rising edge or a falling edge, further improving the accuracy of the count amount reflecting the intensity of the return light. Preferably, the pulse width of the sensing pulse signal can also be greater than the clock cycle of a clock signal, so that CLK can fully segment the non-continuous single-photon sensing pulse signal, ensuring that the calculated count rate or count value after segmentation will not be lower than the count rate or count value of the original single-photon sensing pulse signal, further reducing the loss of the count amount.

[0062] In some embodiments of the present application, the difference between the signal pulse width of the clock signal within one clock cycle and the dead time of the SPAD pixel is less than a preset threshold.

[0063] Preferably, the signal pulse width of the clock signal within one clock cycle is the same as the dead time of the SPAD pixel. After the SPAD detects a single photon, its spontaneous avalanche process needs to be terminated in time to avoid damage to the device by continuous high current. This process is called "quenching". Then the reverse bias voltage on the SPAD will rise and return the SPAD to the standby state again. This process is called "charging". The duration of the quenching and charging process is the dead time of the SPAD, during which the SPAD cannot detect photons.

[0064] The dead time of SPAD pixels includes quenching time, reset time, hold-off time and detection delay time to ensure time accuracy.

[0065] In the embodiment of the present application, when the intensity of the return light is large, the SPAD pixel senses multiple photons in a very short time and generates multiple extreme sharp pulses (i.e., sensing pulse signals). After the multiple extreme sharp pulses are shaped by the discriminator, they become a shaped signal (Bspad) with a large pulse width. After the shaped signal (Bspad) is divided by the clock signal (CLK), it becomes a counting signal (Ecnt) with multiple periodic pulses. Then the counting unit (counter) samples and counts any one of the high-level duty cycle, low-level duty cycle, and pulse number (rising edge number or falling edge number) in the counting signal (Ecnt). In order to reduce the pulse loss at the junction of two adjacent counting signals (Ecnt), the pulse time interval between the two adjacent counting signals (Ecnt) (i.e., the time interval between the last pulse of the previous Ecnt and the first pulse of the next Ecnt) must not be less than the dead time of the SPAD pixel. Therefore, in the embodiment of the present application, the clock period of the clock signal (CLK) can be set to half the clock period of the clock signal (CLK) greater than or equal to the dead time of the SPAD pixel.

[0066] Normally, the duty cycle of the high level and the low level of the clock signal (CLK) in one clock cycle is the same, both of which are 50%, so half a clock cycle of the clock signal (CLK) can also be understood as the signal pulse width of the clock signal (CLK) in one clock cycle. That is, in the embodiment of the present application, the signal pulse width of the clock signal (CLK) in one clock cycle is greater than or equal to the dead time of the SPAD pixel.

[0067] Furthermore, in order to avoid the problem of excessive power consumption and device structure damage caused by too frequent avalanche of SPAD pixels, it is necessary to take into account that the dead time of the SPAD pixel is less than or equal to the signal pulse width of the clock signal (CLK). In an embodiment of the present application, preferably, the dead time of the SPAD pixel can be the same as the signal pulse width of the clock signal (CLK). Taking into account factors such as transmission delays in circuit design, there may be some slight differences between the dead time of the SPAD pixel and the signal pulse width of the clock signal (CLK), that is, the difference between the signal pulse width of the clock signal (CLK) within one clock cycle and the dead time of the SPAD pixel is less than a preset threshold. In a feasible scenario, refer to Figure 6 As shown, for the SPAD array, CLK can be a global clock source, and all SPAD pixels can be connected to a common global clock source.

[0068] Based on the same inventive concept as above, an embodiment of the present invention provides a photon counting method, which is applied to any of the above photon counting circuits, referring to Figure 7 As shown, the method comprises the following steps:

[0069] Step S701: Acquire a sensing pulse signal generated by a SPAD pixel sensing photons.

[0070] In practical applications, SPAD pixels generate an induction pulse signal after receiving photons. Figure 4 As shown, the sensing pulse signal output by the SPAD pixel is shaped by the shaping circuit to output a shaped signal (Bspad).

[0071] Step S702: shaping the induction pulse signal through a shaping circuit and outputting a shaped signal.

[0072] In practical applications, when a large number of photons arrive at a SPAD pixel in a very short time, a large number of very close extreme-cusp pulses will be generated. The discriminator recognizes these very close extreme-cusp pulses as a continuous signal and outputs a continuous and wide-pulse-width shaped signal Bspad.

[0073] Step S703: Integrate the clock signal and the shaped signal through a logic circuit and output a counting signal.

[0074] In practical applications, after the logic circuit performs a logic operation on the shaping signal (Bspad) and the clock signal (CLK), the counting signal (Ecnt) is output to the counting unit (counter), and the counting unit (counter) outputs the counted number of photons according to the counting signal (Ecnt). Among them, the shaping signal (Bspad) and the clock signal (CLK) perform a logic operation, which can be understood as the clock signal (CLK) dividing the shaping signal (Bspad) so that the shaping signal (Bspad) is divided into a periodic signal with multiple periodic pulses, and the period and frequency of the periodic signal are consistent with the clock signal (CLK). The logic circuit can refer to the aforementioned circuit, and this application will not be repeated here.

[0075] Step S704: The counting unit calculates and analyzes the counting signal to determine the counted number of photons.

[0076] In this embodiment, the logic circuit is an AND gate logic. When the SPAD does not respond to photons, its output is a low level, that is, when Bspad is a low level, no matter whether CLK is a high level or a low level, the counting signal Ecnt output by the AND gate logic is low, and the counter is not triggered; when Bspad is a high level and CLK is also a high level, the AND gate logic output Ecnt is high, triggering the counter. When the SPAD pixel is in a counting saturation state, the Bspad output by the discriminator is a continuous high level, and Ecnt follows the high and low level changes of CLK. The AND gate logic continuously outputs Ecnt with the same period and frequency as the CLK, triggering the counter multiple times to avoid the counting unit generating only one count after the SPAD count is saturated, so that the photon count is positively correlated with the return light intensity and changes monotonically (the photon count increases monotonically with the increase of the return light intensity and remains stable after reaching the maximum value), refer to Figure 5 As shown, the accuracy of photon counting in reflecting the intensity of the returned light is improved. As can be seen from the above content, the embodiment of the present application shapes the induction pulse signal generated by the SPAD pixel through the shaping circuit to obtain a shaped signal, and the logic circuit receives the shaped signal and the clock signal, and outputs the counting signal to the counting unit, so that when a large number of photons arrive at a SPAD pixel in a very short time, multiple pulse signals can be output and the counted number of photons can be determined, which solves the problem in the related art that the saturation of the SPAD pixel count leads to a reduction in the photon count, making the count value of the SPAD pixel and the intensity of the returned light not uniquely corresponding, and improves the accuracy of photon counting in reflecting the intensity of the returned light.

[0077] In some embodiments of the present application, the count amount includes a count rate; and the method further includes:

[0078] The counting rate of photons is determined by calculating the high level duty cycle or the low level duty cycle in the counting signal through the counting unit.

[0079] In practical applications, the counting unit can determine the counting rate by sampling the duty cycle. Specifically, after CLK divides Bspad, it outputs a counting signal Ecnt with multiple periodic pulses, where each high-level pulse or low-level pulse can be regarded as a "grid". The counter can determine whether the grid in Ecnt is high or low one by one, and then count the number of high-level or low-level clock cycles in a period of time. Taking the high-level duty cycle to determine the counting rate as an example, the high-level duty cycle = the number of high-level cycles / total number of cycles = (the number of high-level cycles * cycle) / (the total number of cycles * cycle) = high-level time / total time, that is, the duty cycle information is counted to determine the counting rate of photons.

[0080] In some embodiments of the present application, the counting unit includes a clock frequency circuit, and the method further includes:

[0081] The high-level duty ratio or the low-level duty ratio in the counting signal is measured by a clock frequency circuit, and the counting rate of photons related to the high-level duty ratio or the low-level duty ratio is output.

[0082] In practical applications, after CLK divides Bspad, counter can determine whether the grids in the count signal Ecnt are high or low one by one, and the clock frequency circuit counts the number of high or low clock cycles in Ecnt. The clock frequency circuit in this application is a conventional circuit in the prior art, and this application will not be repeated here.

[0083] In some embodiments of the present application, the counting unit includes an analog-to-digital converter, and the method further includes:

[0084] The high-level duty cycle or the low-level duty cycle in the counting signal is determined by an analog-to-digital converter, and a photon counting rate associated with the high-level duty cycle or the low-level duty cycle is output.

[0085] In practical applications, after CLK divides Bspad, the counter can determine whether the grids in Ecnt are high or low one by one, and the analog-to-digital converter converts the high level or low level into a digital signal to count the number of high or low level clock cycles in a period of time. The analog-to-digital converter in this application is a conventional device in the prior art, and this application does not elaborate on the analog-to-digital converter.

[0086] In some embodiments of the present application, the count amount includes a count value, the counting unit includes a counter, and the method further includes:

[0087] The counter determines the number of rising edges or falling edges in the count signal and outputs the count value of the photons.

[0088] In practical applications, the counting unit can calculate the count value through edge sampling, that is, the rising edge or falling edge triggers the count. Each time a rising edge or falling edge appears, a count is triggered (the register in the counter is flipped by the rising edge or falling edge). This counting method is a non-continuous discrete count (the number of times the rising edge or falling edge appears is a discrete number), and the count value is the same as the number of rising / falling edges. In this counting method, the count value is directly determined according to the number of rising edges or falling edges in Ecnt, and is a discrete point value.

[0089] In some embodiments of the present application, the signal pulse width of the sensing pulse signal is greater than the signal pulse width of the clock signal in one clock cycle.

[0090] In practical applications, the embodiments of the present application may refer to the aforementioned photon counting circuit, and the present application will not elaborate on it here.

[0091] In some embodiments of the present application, the pulse width of the sensing pulse signal is greater than half a clock period of the clock signal.

[0092] In practical applications, the embodiments of the present application may refer to the aforementioned photon counting circuit, and the present application will not elaborate on it here.

[0093] Based on the aforementioned embodiments, an embodiment of the present application further provides a photon counting device, including the photon counting circuit in the aforementioned embodiments, and the photon counting device can be used for ranging or imaging.

[0094] Based on the above embodiments, the embodiments of the present application further provide a storage medium, wherein the storage medium stores computer executable instructions, and the computer executable instructions are configured to execute Figure 7 The corresponding embodiments provide a photon counting method.

[0095] It should be noted that the above-mentioned computer storage medium can be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), a magnetic random access memory (FRAM), a flash memory, a magnetic surface memory, an optical disk, or a CD-ROM and other memories; it can also be various electronic devices including one or any combination of the above-mentioned memories, such as mobile phones, computers, tablet devices, personal digital assistants, etc.

[0096] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.

[0097] The serial numbers of the above-mentioned embodiments of the present application are for description only and do not represent the advantages or disadvantages of the embodiments.

[0098] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus a necessary general hardware platform, and of course, by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, a magnetic disk, or an optical disk), and includes a number of instructions for a terminal device (which can be a mobile phone, a computer, a server, an air conditioner, or a network device, etc.) to execute the methods described in each embodiment of the present application.

[0099] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0100] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0101] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0102] The above are only preferred embodiments of the present application, and are not intended to limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A photon counting circuit, characterized in that: The circuit comprises: a SPAD pixel, a shaping circuit, a logic circuit and a counting unit; wherein, The SPAD pixel is used to sense photons and generate sensing pulse signals; The shaping circuit is connected to the SPAD pixel and is used to shape the sensing pulse signal and output a shaped signal; The logic circuit comprises a first input terminal and a second input terminal, wherein the first input terminal is connected to the output terminal of the shaping circuit and is used to receive the shaped signal, and the second input terminal is connected to the clock signal; the logic circuit integrates the shaped signal with the clock signal and outputs a counting signal; The counting unit is connected to the output end of the logic circuit and is used to determine the counted amount of photons according to the counting signal.

2. The circuit according to claim 1, wherein the counting amount includes a counting rate; and the counting unit is used to determine the counting rate of photons according to a high-level duty cycle or a low-level duty cycle in the counting signal.

3. The circuit according to claim 2, characterized in that The counting unit comprises a clock frequency circuit, which is used to measure a high level duty cycle or a low level duty cycle in the counting signal and output a photon counting rate related to the high level duty cycle or the low level duty cycle.

4. The circuit according to claim 2, characterized in that The counting unit comprises an analog-to-digital converter, which is used to determine a high-level duty cycle or a low-level duty cycle in the counting signal and output a photon counting rate associated with the high-level duty cycle or the low-level duty cycle.

5. The circuit according to claim 1, characterized in that The counting amount includes a counting value, and the counting unit includes a counter, which is used to determine the number of rising edges or the number of falling edges in the counting signal and output the counting value of photons.

6. The circuit according to claim 1, characterized in that The signal pulse width of the induction pulse signal is greater than the signal pulse width of the clock signal in one clock cycle.

7. The circuit according to claim 6, characterized in that The signal pulse width of the induction pulse signal is greater than half a clock period of the clock signal.

8. The circuit according to claim 1, characterized in that The difference between the signal pulse width of the clock signal within one clock cycle and the dead time of the SPAD pixel is smaller than a preset threshold.

9. A photon counting method, applied to the photon counting circuit according to any one of claims 1 to 8, characterized in that: The method comprises: Obtaining the sensing pulse signal generated by the SPAD pixel sensing photons; The induction pulse signal is shaped by a shaping circuit and a shaped signal is output; Integrate the clock signal with the shaping signal through a logic circuit and output a counting signal; The counting signal is calculated and analyzed by a counting unit to determine the counted amount of photons.

10. A photon counting device, characterized in that: Comprising a photon counting circuit as claimed in any one of claims 1 to 8.

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