Enhanced HEMT device and preparation method thereof

Abstract

The invention discloses an enhanced HEMT (High Electron Mobility Transistor) device and a preparation method thereof, and belongs to the technical field of reliability reinforcement of nitride power semiconductor devices. In the structure of the enhanced HEMT device provided by the invention, the p-type GaN cap layer has a memory effect, Mg can be gathered near metal contact, and the influence can be effectively relieved by adding the InGaN layer and the UID-GaN, so that the reliability of the grid electrode is improved. The UID-GaN layer and the InGaN layer are non-deliberately doped, so that a p + n junction structure is simply formed, a depletion region near the grid electrode and metal is enlarged, higher voltage can be borne, the electric leakage of the grid electrode is reduced, and the reliability of the grid electrode is improved. Besides, the forbidden band width of InGaN is lower than that of GaN, so that an energy level recess can be formed on an energy band, tunneling of electrons and holes is more difficult to occur, gate electric leakage is reduced, and gate reliability is improved.

Description

Technical Field

[0001] The present invention belongs to the technical field of reliability reinforcement of nitride power semiconductor devices, and in particular relates to an enhanced HEMT device and a preparation method thereof. Background Art

[0002] In order to control power conversion and energy consumption in power electronic systems and improve energy utilization efficiency, enhanced power switching transistors with higher energy transmission efficiency have come into the public eye. Wide bandgap materials have greater advantages in electrical properties, thermal properties and energy utilization efficiency than low bandgap materials (traditional silicon materials, etc.). In recent years, research institutions in various countries have begun to study compound wide bandgap semiconductor materials. Among them, GaN materials have attracted much attention due to their advantages of higher mobility carriers and large breakdown electric field.

[0003] Schottky-type p-GaN gate high electron mobility transistor (HEMT) shows extremely high commercial prospects compared with other enhancement-mode device structures. The p-type cap layer structure above the gate barrier layer raises the conduction band of the heterojunction below the gate to above the Fermi level, depleting the electrons below the gate and causing the threshold to shift positively. In order to reduce the leakage of the device and increase the gate swing, the use of Schottky contact instead of ohmic contact can improve the gate reliability, but its gate reliability is still a key issue for p-GaN gate HEMT. There is a large voltage drop and electric field in the Schottky-type p-GaN gate structure, which will show time-dependent degradation, resulting in a strong increase in gate leakage. The safe gate bias voltage is generally around 6V. Most people believe that the cause of gate breakdown may be Schottky tunneling, leakage of the passivation layer, and trap-assisted tunneling in the barrier layer. The same gate geometry and changes in the defect mechanism of the p-type cap layer will also lead to reduced reliability. How to improve the reliability of the gate is a technical problem that needs to be solved in this field. Summary of the invention

[0004] In order to solve the above problems, the present invention provides an enhanced HEMT device and a method for preparing the same.

[0005] To achieve the above object, the present invention provides the following technical solutions:

[0006] One of the technical solutions of the present invention is to provide an enhanced HEMT device, the structure of which includes: a substrate layer, a nucleation layer, a buffer layer, a channel layer, a barrier layer, a p-type GaN cap layer, an InGaN layer, a UID-GaN layer and a gate metal layer, and a gate field plate extending from the gate metal layer, a source on the channel layer and the barrier layer, and a drain on the channel layer and the barrier layer; the source and the drain are respectively on both sides of the p-type GaN cap layer, the InGaN layer, the UID-GaN layer, the gate metal layer and the gate field plate and separated by a dielectric layer;

[0007] The material of the p-type GaN cap layer is Mg-doped GaN.

[0008] Preferably, the material of the substrate layer includes but is not limited to silicon, sapphire or silicon carbide; the material of the nucleation layer is AlN; the material of the buffer layer is Al-doped GaN; the material of the channel layer is GaN; the material of the barrier layer is Al-doped GaN; the material of the InGaN layer is In-doped GaN; the material of the gate metal layer includes but is not limited to one or more of Au, Ni and Pd; the material of the gate field plate includes but is not limited to Al; the material of the source includes but is not limited to one or more of Ti, Al, Ni and Au; the material of the drain includes but is not limited to one or more of Ti, Al, Ni and Au; the material of the dielectric layer includes but is not limited to Si3N4 or SiO2.

[0009] More preferably, the proportion of Al in the buffer layer is 0-5wt.%, the proportion of Al in the barrier layer is 15-23wt.%, and the doping concentration of Mg in the p-type GaN cap layer is 1e19cm -3 ~3e19cm -3 ; The proportion of In in the InGaN layer is 5 to 40 wt.%.

[0010] Preferably, the thickness of the nucleation layer is 10 to 50 nm; the thickness of the buffer layer is 2000 to 4000 nm; the thickness of the channel layer is 200 to 400 nm; the thickness of the barrier layer is 12 to 20 nm; the thickness of the p-type GaN cap layer is 70 to 100 nm; the thickness of the InGaN layer is 4 to 10 nm; and the thickness of the UID-GaN layer is 20 to 26 nm.

[0011] More preferably, the total thickness of the InGaN layer and the UID-GaN layer is 30 nm.

[0012] The second technical solution of the present invention is to provide a method for preparing the above-mentioned enhanced HEMT device, the steps comprising:

[0013] The nucleation layer, the buffer layer, the channel layer, the barrier layer and the dielectric layer are sequentially deposited on the substrate layer; a gate window exposing the barrier layer is etched on the dielectric layer, and a groove exposing the channel layer is etched on both sides of the dielectric layer and the symmetrical barrier layer; the p-type GaN cap layer, the InGaN layer, the UID-GaN layer and the gate metal layer are sequentially deposited in the gate window, and the extended gate field plate is deposited on the gate metal layer; the source electrode and the drain electrode are respectively deposited in the groove to obtain the enhanced HEMT device.

[0014] The method for preparing each structure of the enhanced HEMT device described in the present invention is a commonly used method in the art. Exemplarily, the method for depositing the nucleation layer, the buffer layer, the channel layer and the barrier layer is metal organic chemical vapor deposition (MOCVD); the method for depositing the dielectric layer is plasma enhanced chemical vapor deposition (PECVD); the method for etching on the deposited layer is inductively coupled plasma etching; the method for etching on the barrier layer is a digital etching process of low-damage oxidation HCl immersion; the method for depositing the p-type GaN cap layer, the InGaN layer and the UID-GaN layer is MOCVD; the method for depositing the gate metal layer and the gate field plate is low pressure chemical vapor deposition (LPCVD); the method for depositing the source and the drain is electron beam evaporation.

[0015] Preferably, after all components are deposited, an annealing step is also included.

[0016] More preferably, the annealing is performed in an inert atmosphere at a temperature of 890° C. for 30 seconds.

[0017] The beneficial technical effects of the present invention are as follows:

[0018] In the structure of the enhanced HEMT device provided by the present invention, the p-type GaN cap layer has a memory effect, and Mg will gather near the metal contact. The present invention can effectively alleviate this effect by adding an InGaN layer and a UID-GaN, thereby improving the reliability of the gate. Since the UID-GaN layer and the InGaN layer are not intentionally doped, a p+n junction structure is simply formed, which increases the depletion region near the gate and the metal, and can withstand higher voltages, thereby reducing gate leakage and improving gate reliability. In addition, since the bandgap width of InGaN is lower than that of GaN, an energy level depression can be formed on the energy band, making it more difficult for electrons and holes to tunnel, thereby reducing gate leakage and improving gate reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 Schematic diagram of the structure of a traditional enhancement-mode HEMT device.

[0020] Figure 2 This is a schematic diagram of the structure of an enhanced HEMT device prepared in Example 1 of the present invention.

[0021] Figure 3 This is a schematic diagram of the structure of the device prepared in step 1 of Example 1 of the present invention.

[0022] Figure 4 This is a schematic diagram of the structure of the device prepared in step 2 of Example 1 of the present invention.

[0023] Figure 5 This is a schematic diagram of the structure of the device prepared in step 3 of Example 1 of the present invention.

[0024] Figure 6 This is a schematic diagram of the structure of the device prepared in step 4 of Example 1 of the present invention.

[0025] Figure 7 This is a schematic diagram of the structure of the device prepared in step 5 of Example 1 of the present invention.

[0026] Figure 8 This is a comparison diagram of gate leakage between a conventional enhancement mode HEMT device and an enhancement mode HEMT device prepared in Example 1 of the present invention.

[0027] Fig. 9 It is a vertical comparison diagram of the energy bands at the gate of a conventional enhancement mode HEMT device and an enhancement mode HEMT device prepared in Example 1 of the present invention.

[0028] Among them, 101 is a substrate layer, 102 is a nucleation layer, 103 is a buffer layer, 104 is a channel layer, 105 is a barrier layer, 106 is a p-type GaN cap layer, 107 is an InGaN layer, 108 is a UID-GaN layer, 109 is a gate metal layer, 110 is a gate field plate, 111 is a drain layer, 112 is a source layer, and 113 is a dielectric layer. DETAILED DESCRIPTION

[0029] Now, various exemplary embodiments of the present invention are described in detail, and this detailed description should not be considered as a limitation of the present invention, but should be understood as a more detailed description of certain aspects, characteristics and embodiments of the present invention. It should be understood that the terms described in the present invention are only for describing specific embodiments and are not used to limit the present invention.

[0030] In addition, for the numerical range in the present invention, it is understood that each intermediate value between the upper and lower limits of the range is also specifically disclosed. The intermediate value in any stated value or stated range, and each smaller range between any other stated value or intermediate value in the range is also included in the present invention. The upper and lower limits of these smaller ranges can be independently included or excluded in the scope.

[0031] Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which the invention pertains. Although only preferred methods and materials are described herein, any methods and materials similar or equivalent to those described herein may also be used in the practice or testing of the present invention.

[0032] The words “include,” “including,” “have,” “contain,” etc. used in this document are open-ended terms, meaning including but not limited to.

[0033] Figure 1 Schematic diagram of the structure of a traditional enhancement-mode HEMT device.

[0034] Figure 2 This is a schematic diagram of the structure of an enhanced HEMT device prepared in Example 1 of the present invention.

[0035] Among them, 101 is a substrate layer, 102 is a nucleation layer, 103 is a buffer layer, 104 is a channel layer, 105 is a barrier layer, 106 is a p-type GaN cap layer, 107 is an InGaN layer, 108 is a UID-GaN layer, 109 is a gate metal layer, 110 is a gate field plate, 111 is a drain layer, 112 is a source layer, and 113 is a dielectric layer.

[0036] Example 1

[0037] Preparation of enhanced HEMT devices:

[0038] Step 1: MOCVD is used to add C impurities to epitaxially grow an AlN nucleation layer 102 (thickness 50nm) and an AlGaN buffer layer 103 (Al content is 5wt.%, thickness 4000nm) in the silicon substrate 101 region; then, an epitaxial non-intentionally doped GaN channel layer 104 (thickness 200nm) and a non-intentionally doped AlGaN barrier layer 105 (Al content is 23wt.%, thickness 15nm) are grown by MOCVD, and a SiO2 dielectric layer 113 (thickness 200nm) is deposited on the AlGaN barrier layer 105 by PECVD; the structural schematic diagram of the prepared device is shown in FIG. Figure 3 ;

[0039] Step 2: Open a gate window (1300 nm in width) in the middle of the dielectric layer 113 to expose the barrier layer 105 and etch grooves (500 nm in width) symmetrically on both sides of the dielectric layer 113 to expose the barrier layer 105 by inductively coupled plasma etching, and then further etch in the grooves on both sides by digital etching process of low-damage oxidation HCl immersion to expose the channel layer 104; the structural schematic diagram of the prepared device is shown in FIG. Figure 4 ;

[0040] Step 3: Using MOCVD in the gate window, using Mg as a P-type impurity, epitaxially grow a p-type GaN cap layer 106 (Mg doping concentration is 2e19 cm -3 , thickness is 90nm); then use MOCVD to grow an epitaxial non-intentionally doped InGaN layer 107 (In accounts for 15wt.%, thickness is 6nm) and a UID-GaN layer 108 (thickness is 24nm); the structural schematic diagram of the prepared device is shown in Figure 5 ;

[0041] Step 4: Ni / Au are sequentially deposited on the UID-GaN layer 108 by LPCVD to form a gate metal layer 109 (thickness is 20 / 300nm), and aluminum metal is deposited on the gate metal layer 109 as a gate field plate 110 (width is 1800nm); the structural schematic diagram of the prepared device is shown in Figure 6 ;

[0042] Step 5: Prepare the source and drain electrodes by electron beam evaporation. The metal stacking sequence is Ti / Al / Ni / Au (thicknesses are 20 / 130 / 50 / 150 nm, respectively) to form the drain electrode 111 and the source electrode 112. See the schematic diagram of the structure of the prepared device. Figure 7 .

[0043] Comparative Example 1

[0044] Preparation of traditional enhanced HEMT devices:

[0045] Compared with Example 1, the only difference is that in step 3, the thickness of the p-type GaN cap layer 106 is 120 nm, and the preparation of the InGaN layer 107 and the UID-GaN layer 108 is omitted.

[0046] Sentaurus TCAD simulation verification method is used to compare and discuss the enhanced HEMT devices of Example 1 and Comparative Example 1.

[0047] Figure 8 This is a comparison diagram of gate leakage between a conventional enhancement mode HEMT device and an enhancement mode HEMT device prepared in Example 1 of the present invention.

[0048] according to Figure 8 The simulation conclusion shown is that when the source-drain voltage is biased to 0V, when a forward gate voltage bias is applied to the gate, the depletion layer inside the p-type GaN cap layer 106 structure slows down and the electric field is relieved, making it able to withstand higher voltages. Compared with the breakdown voltage of 10.98V for the traditional structure, the new structure can achieve a gate breakdown of 14.56V (with a gate leakage of 0.01A / mm breakdown).

[0049] Fig. 9It is a vertical comparison diagram of the energy bands at the gate of a conventional enhancement mode HEMT device and an enhancement mode HEMT device prepared in Example 1 of the present invention.

[0050] according to Fig. 9 From the simulation conclusions shown, it can be seen that the energy band at the gate has an energy level depression due to the presence of InGaN, which makes it easier for electrons and holes to gather at the energy band depression and more difficult to tunnel to the p-type GaN cap layer 106 area, thereby reducing gate leakage and improving gate reliability.

[0051] The embodiments described above are only descriptions of the preferred modes of the present invention, and are not intended to limit the scope of the present invention. Without departing from the design spirit of the present invention, various modifications and improvements made to the technical solutions of the present invention by ordinary technicians in this field should all fall within the protection scope determined by the claims of the present invention.

Claims

1. An enhanced HEMT device, characterized in that: The structure includes: A substrate layer, a nucleation layer, a buffer layer, a channel layer, a barrier layer, a p-type GaN cap layer, an InGaN layer, a UID-GaN layer and a gate metal layer are sequentially provided, as well as a gate field plate extending from the gate metal layer, a source electrode on the channel layer and the barrier layer, and a drain electrode on the channel layer and the barrier layer; the source electrode and the drain electrode are respectively on both sides of the p-type GaN cap layer, the InGaN layer, the UID-GaN layer, the gate metal layer and the gate field plate and separated by a dielectric layer; The material of the p-type GaN cap layer is Mg-doped GaN.

2. The enhanced HEMT device according to claim 1, characterized in that: The material of the substrate layer includes silicon, sapphire or silicon carbide; the material of the nucleation layer is AlN; the material of the buffer layer is Al-doped GaN; the material of the channel layer is GaN; the material of the barrier layer is Al-doped GaN; the material of the InGaN layer is In-doped GaN; the material of the gate metal layer includes one or more of Au, Ni and Pd; the material of the gate field plate includes Al; the material of the source includes one or more of Ti, Al, Ni and Au; the material of the drain includes one or more of Ti, Al, Ni and Au; the material of the dielectric layer includes Si3N4 or SiO2.

3. The enhanced HEMT device according to claim 2, characterized in that: The proportion of Al in the buffer layer is 0-5wt.%; the proportion of Al in the barrier layer is 15-23wt.%; the doping concentration of Mg in the p-type GaN cap layer is 1e19cm -3 ~3e19cm -3 ; The proportion of In in the InGaN layer is 5 to 40 wt.%.

4. The enhanced HEMT device according to claim 1, characterized in that: The thickness of the nucleation layer is 10 to 50 nm; the thickness of the buffer layer is 2000 to 4000 nm; the thickness of the channel layer is 200 to 400 nm; the thickness of the barrier layer is 12 to 20 nm; the thickness of the p-type GaN cap layer is 70 to 100 nm; the thickness of the InGaN layer is 4 to 10 nm; and the thickness of the UID-GaN layer is 20 to 26 nm.

5. The enhanced HEMT device according to claim 4, characterized in that: The total thickness of the InGaN layer and the UID-GaN layer is 30 nm.

6. A method for preparing an enhanced HEMT device according to any one of claims 1 to 5, characterized in that the steps include: Depositing the nucleation layer, the buffer layer, the channel layer, the barrier layer and the dielectric layer in sequence on the substrate layer; Etching a gate window on the dielectric layer to expose the barrier layer, and etching grooves on both sides of the dielectric layer and the symmetrical barrier layer to expose the channel layer; The p-type GaN cap layer, the InGaN layer, the UID-GaN layer and the gate metal layer are sequentially deposited in the gate window, and the extended gate field plate is deposited on the gate metal layer; the source and the drain are respectively deposited in the groove to obtain the enhanced HEMT device.

7. The method for preparing an enhanced HEMT device according to claim 6, characterized in that: After all parts have been deposited, an annealing step is also included.

8. The method for preparing an enhanced HEMT device according to claim 7, characterized in that: The annealing is performed in an inert atmosphere at a temperature of 890° C. for 30 seconds.

Images