Array substrate and preparation method thereof, display panel and display device

Abstract

The invention relates to an array substrate and a preparation method thereof, a display panel and a display device.The array substrate comprises a substrate and an array layer, the array layer comprises a plurality of transistors, and each transistor comprises a first electrode, a second electrode and a device layer; the device layer comprises a first function part and a second function part which are stacked and a buffer layer arranged between the first function part and the second function part, the first function part is arranged on the substrate, and the second function part is arranged on the side, away from the first function part, of the buffer layer; wherein the first function part comprises a first control end and a first active layer, the second function part comprises a second control end and a second active layer, the first electrode and the second electrode extend in the thickness direction and penetrate through the second active layer to be connected with the first active layer, and the absolute value of the difference value of the mobility of the first active layer and the mobility of the second active layer is larger than zero. According to the invention, the mobility and the subthreshold swing of the transistor device can be improved at the same time, and the transistor device has better potential stability on the basis of meeting the highlight display requirement.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to an array substrate and a preparation method thereof, a display panel and a display device. Background Art

[0002] In recent years, with the continuous development of display technology, the technology development of using oxides such as indium gallium zinc oxide (IGZO), indium zinc oxide (IZO), and indium gallium oxide (IGO) as semiconductor materials for thin film transistors has gradually matured and has better driving effects.

[0003] However, it is difficult to take into account both the mobility and subthreshold swing when using the above-mentioned semiconductor materials in thin film transistors. For the above-mentioned high-mobility materials, their subthreshold swing is often small, which makes it difficult to meet the requirements of low grayscale display; for low-mobility materials, it is difficult to meet the high-brightness display requirements of products. Therefore, how to achieve a device structure with both high mobility and high subthreshold swing in transistors has become a hot topic and difficulty in the industry. Summary of the invention

[0004] The embodiments of the present invention provide an array substrate and a method for manufacturing the same, a display panel and a display device, which can simultaneously improve the mobility and subthreshold swing of transistor devices, and have better potential stability while meeting high-brightness display requirements.

[0005] In the first aspect, an array substrate is proposed according to an embodiment of the present invention, comprising a substrate and an array layer, wherein the array layer is arranged on one side of the substrate, the array layer comprises a plurality of transistors, each transistor comprises a first electrode, a second electrode and a device layer, the device layer comprises a first functional portion and a second functional portion stacked along its own thickness direction and a buffer layer arranged therebetween, the first functional portion is arranged on the substrate and the second functional portion is arranged on a side of the buffer layer away from the first functional portion; wherein the first functional portion comprises a first control terminal and a first active layer, the second functional portion comprises a second control terminal and a second active layer, the first electrode and the second electrode respectively extend along the thickness direction and pass through the second active layer to be connected to the first active layer respectively, and the absolute value of the difference between the mobility of the first active layer and the mobility of the second active layer is greater than zero.

[0006] According to one aspect of the embodiments of the present invention, the mobility of the first active layer is smaller than the mobility of the second active layer, and the subthreshold swing of the first functional portion is larger than the subthreshold swing of the second functional portion;

[0007] Preferably, the first active layer includes an indium gallium zinc oxide layer, and the second active layer includes an indium zinc oxide layer or an indium gallium oxide layer.

[0008] According to one aspect of the embodiment of the present invention, the first functional part includes a first insulating layer disposed between the first control terminal and the first active layer, the second functional part includes a second insulating layer disposed between the second control terminal and the second active layer, and the maximum thickness of the first insulating layer is greater than the maximum thickness of the second insulating layer;

[0009] Preferably, the first control end is located on a side of the first insulating layer close to the substrate, and the first insulating layer covers the first control end;

[0010] Preferably, the second control end is located on a side of the second insulating layer away from the buffer layer, and the second insulating layer carries the second control end.

[0011] According to one aspect of the embodiment of the present invention, the orthographic projection of the first control terminal on the substrate exceeds the orthographic projection of the second control terminal on the substrate at least along a first direction, and the first direction intersects with the thickness direction;

[0012] Preferably, the orthographic projection of the second control terminal on the substrate is located within the orthographic projection of the first control terminal on the substrate.

[0013] According to one aspect of an embodiment of the present invention, the first functional unit includes a first insulating layer arranged between a first control end and a first active layer, the second functional unit includes a second insulating layer arranged between a second control end and a second active layer, the first control end is located on a side of the first insulating layer close to the substrate, and the second control end is located on a side of the second insulating layer away from the buffer layer.

[0014] According to one aspect of an embodiment of the present invention, the buffer layer includes a first layer and a second layer stacked, the device layer further includes a shielding portion, the shielding portion is arranged between the first layer and the second layer, and the orthographic projection of the shielding portion in the thickness direction covers at least a portion of the first active layer and the second active layer respectively;

[0015] Preferably, the orthographic projection of the shielding portion on the substrate completely covers the orthographic projections of the first active layer and the second active layer on the substrate;

[0016] Preferably, the orthographic projection of the shielding portion on the substrate covers a portion of the orthographic projections of the first active layer and the second active layer on the substrate, and one of the first layer and the second layer covers the shielding portion on the other.

[0017] According to one aspect of the embodiments of the present invention, the first pole passes through the shielding portion in a thickness direction, and the shielding portion is connected to the first pole.

[0018] In a second aspect, a method for preparing an array substrate is provided according to an embodiment of the present invention, comprising:

[0019] Providing a substrate, and forming a first functional portion on the substrate, wherein the first functional portion includes a first control terminal and a first active layer;

[0020] forming a buffer layer on a side of the first functional portion facing away from the substrate;

[0021] forming a second functional portion on a side of the buffer layer away from the first functional portion, wherein the second functional portion includes a second control terminal and a second active layer;

[0022] The second functional portion, the buffer layer, and the first functional portion are sequentially etched to form a first via hole and a second via hole spaced apart from each other;

[0023] A first electrode is formed in the first via hole and a second electrode is formed in the second via hole. The first electrode and the second electrode respectively pass through the second active layer and are connected to the first active layer.

[0024] In a third aspect, a display panel is provided according to an embodiment of the present invention, comprising an array substrate as described in any one of the above items.

[0025] In a fourth aspect, a display device is provided according to an embodiment of the present invention, comprising the display panel as described above.

[0026] The embodiments of the present invention provide an array substrate and a preparation method thereof, a display panel and a display device. By setting a first functional part and a second functional part in the device layer of the transistor of the array layer, after the two are superimposed and set, the mobility of the first active layer of the first functional part and the second active layer in the second functional part are different, so that the transistor as a whole can be driven by the active layer with high mobility, thereby improving the display brightness. At the same time, the functional part with high subthreshold swing amplitude is used to improve the stability of the potential and ensure the grayscale expansion under low brightness. The two functional parts are comprehensively utilized, which can achieve the improvement of both the mobility of the material and the subthreshold swing amplitude of the transistor as a whole. On the basis of ensuring the improvement of the overall display brightness, the stability of the potential is simultaneously improved, thereby overcoming the disadvantages of a single material and having a better driving effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Features, advantages, and technical effects of exemplary embodiments of the present invention will be described below with reference to the accompanying drawings.

[0028] Figure 1 is a structural schematic diagram of an array substrate according to an embodiment of the present invention;

[0029] Figure 2 is a structural schematic diagram of another array substrate according to an embodiment of the present invention;

[0030] Figure 3 is a structural schematic diagram of another array substrate according to an embodiment of the present invention;

[0031] Figure 4 is a structural schematic diagram of another array substrate according to an embodiment of the present invention;

[0032] Figure 5 is a structural schematic diagram of another array substrate according to an embodiment of the present invention;

[0033] Figure 6 is a structural schematic diagram of another array substrate according to an embodiment of the present invention;

[0034] Figure 7 is a preparation flow chart of an array substrate according to an embodiment of the present invention;

[0035] Figure 8 is a structural diagram of a preparation process of an array substrate according to an embodiment of the present invention;

[0036] Fig. 9 is a structural diagram of a preparation process of an array substrate according to an embodiment of the present invention;

[0037] Fig.10 is a structural diagram of a preparation process of an array substrate according to an embodiment of the present invention;

[0038] Fig.11 is a structural diagram of a preparation process of an array substrate according to an embodiment of the present invention;

[0039] Fig.12 It is a structural diagram of a preparation process of an array substrate according to an embodiment of the present invention.

[0040] Reference numerals:

[0041] 100-array substrate; 10-substrate; 20-transistor; 21-first electrode; 22-second electrode; 23-device layer; 23a-first functional part; 23b-second functional part; 23c-buffer layer; 30-shielding part; 40-first via hole; 50-second via hole;

[0042] 1-first control end; 2-first active layer; 3-first insulating layer; 4-second control end; 5-second active layer; 6-second insulating layer; 7-first layer; 8-second layer.

[0043] In the drawings, the same reference numerals are used for the same components. The drawings are not drawn to scale. DETAILED DESCRIPTION

[0044] The features and exemplary embodiments of various aspects of the present invention will be described in detail below. In the detailed description below, many specific details are proposed in order to provide a comprehensive understanding of the present invention. However, it is obvious to those skilled in the art that the present invention can be implemented without some of these specific details. The following description of the embodiments is only to provide a better understanding of the present invention by illustrating examples of the present invention. In the drawings and the following description, at least part of the known structures and technologies are not shown in order to avoid unnecessary ambiguity of the present invention; and, for clarity, the size of some structures may be exaggerated. In addition, the features, structures or characteristics described below may be combined in one or more embodiments in any suitable manner.

[0045] The directional words appearing in the following description are all directions shown in the figures, and do not limit the array substrate and its preparation method, display panel and display device of the present invention. In the description of the present invention, it should also be noted that, unless otherwise clearly specified and limited, the terms "installation" and "connection" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be directly connected or indirectly connected. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to the specific circumstances.

[0046] In order to better understand the present invention, Figures 1 to 12 An array substrate and a manufacturing method thereof, a display panel and a display device according to embodiments of the present invention are described in detail.

[0047] See also Figure 1 and Figure 2 According to an embodiment of the present invention, an array substrate 100 is proposed, comprising a substrate 10 and an array layer, the array layer being arranged on one side of the substrate 10, the array layer comprising a plurality of transistors 20, each transistor 20 comprising a first electrode 21, a second electrode 22 and a device layer 23, the device layer 23 comprising a first functional portion 23a and a second functional portion 23b stacked along its own thickness direction and a buffer layer 23c arranged therebetween, the first functional portion 23a being arranged on the substrate 10 and the second functional portion 23b being arranged on a side of the buffer layer 23c away from the first functional portion 23a; wherein the first functional portion 23a comprises a first control terminal 1 and a first active layer 2, the second functional portion 23b comprises a second control terminal 4 and a second active layer 5, the first electrode 21 and the second electrode 22 respectively extend along the thickness direction and pass through the second active layer 5 to be connected to the first active layer 2, and the absolute value of the difference between the mobility of the first active layer 2 and the mobility of the second active layer 5 is greater than zero.

[0048] Optionally, the substrate 10 in this embodiment may be a flexible substrate, such as a polyimide (PI) substrate, or a rigid substrate, such as a glass substrate, etc. The present application does not specifically limit the specific material of the substrate 10.

[0049] The array layer has a plurality of transistors 20, and optionally, the transistor 20 may be a thin film transistor (TFT) device, the first electrode 21 on each thin film transistor may be a source electrode, and the second electrode 22 may be a drain electrode, and the device layer 23 in this embodiment is provided with a first functional portion 23a and a second functional portion 23b, and the two functional portions play different roles.

[0050] The first functional part 23a is located at the bottom of the second functional part 23b. The first control terminal 1 in the first functional part 23a can be a first gate, and the second control terminal 4 in the second functional part 23b can be a second gate. Both function as switches and have the same potential.

[0051] A buffer layer 23c is provided between the first functional part 23a and the second functional part 23b to isolate the two and prevent signal crosstalk during operation. Optionally, the buffer layer 23c may be an organic layer. An insulating layer needs to be provided between the control end and the active layer in each functional part. The present application does not impose any special limitation on the positional relationship between the control end and the active layer. As shown in the figure, the first functional part 23a may be provided as a bottom gate structure, and the second functional part 23b may be provided as a top gate structure. The structure may also be adjusted according to different actual needs.

[0052] The first electrode 21 and the second electrode 22 of the transistor 20 are connected to the first active layer 2 and the second active layer 5 at the same time. The first electrode 21 and the second electrode 22 need to pass through the middle second active layer 5 and then be connected to the first active layer 2, which can be understood as a parallel structure, so that the first functional part 23a and the second functional part 23b share the first electrode 21 and the second electrode 22 to form an integral structure.

[0053] Among them, in this embodiment, the mobility of the first active layer 2 and the second active layer 5 is set to be different, so that the active layer with relatively low mobility can use the active layer with higher mobility to achieve conduction, and thus the overall display has higher brightness; at the same time, the functional part with a lower subthreshold swing can use the functional part with a higher subthreshold swing to achieve improved potential stability and ensure grayscale expansion at low brightness.

[0054] It can be seen that in this embodiment, two functional parts with different functions are set up, one of which is used to achieve an improvement in mobility, and the other functional part is used to achieve an improvement in subthreshold swing, thereby completing the simultaneous improvement of the two parameters in the transistor 20, overcoming the problem in the prior art that the two parameters cannot be taken into account at the same time.

[0055] The embodiment of the present invention provides an array substrate 100, by setting a first functional part 23a and a second functional part 23b in the device layer 23 of the transistor 20 of the array layer, and superimposing the two, the mobility of the first active layer 2 of the first functional part 23a and the second active layer 5 in the second functional part 23b are different, so that the transistor 20 as a whole can be driven by the active layer with high mobility, thereby improving the display brightness, and at the same time, the functional part with high subthreshold swing amplitude is used to improve the stability of the potential, and the grayscale expansion under low brightness can be guaranteed. The two functional parts are comprehensively utilized, and it is achieved that both the mobility of the material and the subthreshold swing amplitude of the transistor 20 as a whole can be improved. On the basis of ensuring the improvement of the overall display brightness, the stability of the potential is simultaneously improved, thereby overcoming the disadvantages of a single material and having a better driving effect.

[0056] As an optional embodiment, the mobility of the first active layer 2 is smaller than the mobility of the second active layer 5 , and the subthreshold swing of the first functional portion 23 a is larger than the subthreshold swing of the second functional portion 23 b .

[0057] Optionally, the first active layer 2 may be an indium gallium zinc oxide (IGZO) layer, and the second active layer 5 may be an indium zinc oxide (IZO) layer or an indium gallium oxide (IGO) layer, the mobility of the indium gallium zinc oxide (IGZO) layer is lower than that of the indium zinc oxide (IZO) layer or the indium gallium oxide (IGO) layer, but it has a higher subthreshold swing.

[0058] Thus, the first functional portion 23a in the transistor 20 can increase mobility and improve display brightness with the help of the second functional portion 23b. Meanwhile, the second functional portion 23b can also improve potential stability with the help of the higher subthreshold swing of the first functional portion 23a.

[0059] An embodiment of the present invention provides an array substrate 100, which makes the mobility of the first functional part 23a at the bottom smaller and the subthreshold swing larger, thereby facilitating further improvement and adjustment of the subthreshold swing of the first functional part 23a, facilitating the control of the film thickness and the control end length in the molding process, and better meeting the process molding conditions.

[0060] As an alternative embodiment, see Figure 2 The first functional part 23a includes a first insulating layer 3 arranged between the first control terminal 1 and the first active layer 2, the second functional part 23b includes a second insulating layer 6 arranged between the second control terminal 4 and the second active layer 5, and the maximum thickness of the first insulating layer 3 is greater than the maximum thickness of the second insulating layer 6.

[0061] Considering that the size of the subthreshold swing is related to the thickness of the insulating layer between the control end and the active layer, when the thickness of the insulating layer is increased, the subthreshold swing of the functional part can be further increased. Therefore, in this embodiment, the thickness of the first insulating layer 3 in the first functional part 23a is set to be greater than the thickness of the second insulating layer 6 in the second functional part 23b.

[0062] When the subthreshold swing needs to be increased in any functional part, it can be achieved by increasing the thickness of the corresponding insulating layer. In this embodiment, it is mainly considered that the first functional part 23a is located at the bottom of the second functional part 23b. Therefore, the first insulating layer 3 at the bottom is thickened to meet the actual process requirements and conform to the center of gravity characteristics of the structure, which facilitates the completion of the thickening molding process.

[0063] Optionally, the first control end 1 is located on a side of the first insulating layer 3 close to the substrate 10, and a portion of the first insulating layer 3 is coated on the first control end 1. What is provided here is a bottom gate structure of the first functional part 23a. While increasing the thickness of the first insulating layer 3, it is coated on the first control end 1 to achieve insulation from the first active layer 2.

[0064] Optionally, the second control terminal 4 is located on a side of the second insulating layer 6 away from the buffer layer 23 c , and the second insulating layer 6 supports the second control terminal 4 . Here, a top gate structure of the second functional portion 23 b is provided, so that the second insulating layer 6 supports the second control terminal 4 .

[0065] An embodiment of the present invention provides an array substrate 100, which further improves the subthreshold swing of the first functional part 23a by setting the thickness of the first insulating layer 3 to be greater than the thickness of the second insulating layer 6, thereby having better potential stability. At the same time, the first insulating layer 3 is located at the bottom compared to the second insulating layer 6, which can better realize the thickening treatment of the first insulating layer 3, facilitate the completion of the molding process, and meet the thickness requirements of the film layer.

[0066] As an alternative embodiment, see Figure 3 The orthographic projection of the first control end 1 in the thickness direction exceeds the orthographic projection of the second control end 4 at least along the first direction, and the first direction intersects with the thickness direction.

[0067] In this embodiment, another parameter affecting the subthreshold swing is mainly considered, that is, the length requirement of the first control terminal 1. By increasing the length of the first control terminal 1 to make it larger than the length of the second control terminal 4, the subthreshold swing of the first functional part 23a is increased.

[0068] Optionally, the first direction can be a length direction or a width direction. In order to further increase the subthreshold swing of the first functional part 23a, the length of the first control end 1 in the first direction can be greater than the length of the second control end 4. This application does not specifically limit the specific length value.

[0069] Optionally, the orthographic projection of the second control terminal 4 in the thickness direction is located within the orthographic projection of the first control terminal 1, that is, the length and width of the first control terminal 1 are both larger than the corresponding length and width of the second control terminal 4, so that its overall area is larger than the area of ​​the second control terminal 4, thereby fully increasing the size of the first control terminal 1, and then increasing the subthreshold swing of the first functional part 23a.

[0070] The embodiment of the present invention provides an array substrate 100, which can also adjust the subthreshold swing of the first functional portion 23a by extending the length of the first control terminal 1 to make it longer than the length of the second control terminal 4, thereby further improving the subthreshold swing and facilitating process molding.

[0071] As an optional embodiment, the first functional part 23a includes a first insulating layer 3 arranged between the first control terminal 1 and the first active layer 2, the second functional part 23b includes a second insulating layer 6 arranged between the second control terminal 4 and the second active layer 5, the first control terminal 1 is located on the side of the first insulating layer 3 close to the substrate 10, and the second control terminal 4 is located on the side of the second insulating layer 6 away from the buffer layer 23c.

[0072] In this embodiment, the first control terminal 1 is arranged at the bottom of the first insulating layer 3, so that the first functional part 23a forms a bottom gate structure, and the second control terminal 4 is arranged at the top of the second insulating layer 6, so that the second functional part 23b forms a top gate structure.

[0073] An embodiment of the present invention provides an array substrate 100, which sets the first functional part 23a as a bottom gate structure and the second functional part 23b as a top gate structure, so that the two control ends have a larger spacing distance. On the basis of jointly improving the mobility and the subthreshold swing, the interference between the first functional part 23a and the second functional part 23b is reduced, providing reliable guarantee for stable operation.

[0074] As an alternative embodiment, see Figure 4 The buffer layer 23c includes a first layer 7 and a second layer 8 stacked together, and the device layer 23 also includes a shielding portion 30, which is arranged between the first layer 7 and the second layer 8, and the orthographic projection of the shielding portion 30 in the thickness direction covers at least a portion of the first active layer 2 and the second active layer 5 respectively.

[0075] Considering that there may be signal interference between the first functional part 23a and the second functional part 23b during operation, in this embodiment, a shielding part 30 is provided between the two for isolation, thereby blocking the interference between the two.

[0076] Optionally, the shielding part 30 can be made of a metal layer so that the shielding part 30 is stacked between the first active layer 2 and the second active layer 5. At this time, the shielding part 30 needs to be connected to a fixed potential and at least cover part of the active layer to isolate the crosstalk effect of the electric fields of the upper and lower active layers.

[0077] Taking into account that the shielding part 30 is made of metal, in order to avoid the overall influence of the shielding part 30 on the first functional part 23a and the second functional part 23b, in this embodiment, it is arranged between the first layer 7 and the second layer 8 of the buffer layer 23c, and the insulating first layer 7 and the second layer 8 are used to cover the middle shielding part 30, so as to prevent the conductive influence of the shielding part 30 itself while achieving the shielding effect.

[0078] Optionally, see Figure 6 The orthographic projection of the shielding part 30 in the thickness direction completely covers the first active layer 2 and the second active layer 5, so that the shielding part 30 forms a more sufficient shielding effect on the two active layers and completely isolates the crosstalk between the two electric fields.

[0079] Optionally, the orthographic projection of the shielding portion 30 in the thickness direction covers a portion of the first active layer 2 and the second active layer 5 , and one of the first layer 7 and the second layer 8 covers the shielding portion 30 on the other.

[0080] An embodiment of the present invention provides an array substrate 100, which provides a shielding portion 30 between the first layer 7 and the second layer 8 of the buffer layer 23c. When the shielding portion 30 is used to block the electric field between adjacent active layers, the conductive influence of the shielding portion 30 itself is also avoided, so that the overall structure has better safety performance and the product yield is further improved.

[0081] As an alternative embodiment, see Figure 5 The first pole 21 passes through the shielding portion 30 along the thickness direction, and the shielding portion 30 is connected to the first pole 21 .

[0082] When the shielding part 30 is of sufficient length, the first pole 21 can be connected to the shielding part 30. Optionally, the first pole 21 can be a source. Since the shielding part 30 adopts a metal layer, potential conduction can be achieved by applying a potential to the shielding part 30 using the first pole 21.

[0083] At the same time, the first control terminal 1 at the bottom needs to be lengthened to correspond to the connection position between the first pole 21 and the shielding part 30, which is conducive to signal conduction, thereby also being able to increase the subthreshold swing of the first functional part 23a by lengthening the first control terminal 1.

[0084] An embodiment of the present invention provides an array substrate 100, which connects the shielding part 30 with the first pole 21. On the basis of realizing electric field blocking by utilizing the shielding part 30, signal conduction can also be realized by applying a potential thereto. This not only saves the winding connecting the first pole 21 and the shielding part 30, but also further increases the length of the first control terminal 1, thereby further increasing the subthreshold swing of the first functional part 23a.

[0085] See also Figure 7 According to an embodiment of the present invention, a method for preparing an array substrate 100 is provided, comprising:

[0086] S1, providing a substrate 10, and forming a first functional portion 23a on the substrate 10, wherein the first functional portion 23a includes a first control terminal 1 and a first active layer 2;

[0087] S2, forming a buffer layer 23c on a side of the first functional portion 23a away from the substrate 10;

[0088] S3, forming a second functional portion 23b on a side of the buffer layer 23c away from the first functional portion 23a, wherein the second functional portion 23b includes a second control terminal 4 and a second active layer 5;

[0089] S4, etching the second functional portion 23b, the buffer layer 23c and the first functional portion 23a in sequence to form a first via hole 40 and a second via hole 50 spaced apart from each other;

[0090] S5 . Form a first electrode 21 in the first via hole 40 and form a second electrode 22 in the second via hole 50 . The first electrode 21 and the second electrode 22 respectively pass through the second active layer 5 and are connected to the first active layer 2 .

[0091] In step S1, a first functional portion 23a may be formed on the substrate 10 by ion implantation. The first control terminal 1 in the first functional portion 23a is located at the bottom of the first active layer 2. A first insulating layer 3 is deposited between the first control terminal 1 and the first active layer 2, so that the first functional portion 23a forms a bottom gate structure. Figure 8 shown.

[0092] In the subsequent step S2, a buffer layer 23c needs to be formed on the top of the first active layer 2 by chemical vapor deposition. The buffer layer 23c can be made of insulating materials such as silicon nitride or silicon oxide, thereby providing a basis for the formation of the second functional part 23b. Fig. 9 shown.

[0093] Optionally, in order to prevent electric field interference between the first functional part 23a and the second functional part 23b, a shielding part 30 can be formed on the buffer layer 23c by a physical vapor deposition process. The shielding part 30 can be a metal layer to isolate the first functional part 23a and the second functional part 23b.

[0094] Similarly, if Fig.10 As shown, in step S3, a second functional portion 23b is formed on the formed buffer layer 23c by ion implantation, and the second control terminal 4 in the second functional portion 23b is located on the top of the second active layer 5, and a second insulating layer 6 is formed therebetween, so that the second functional portion 23b forms a top gate structure.

[0095] Since the first functional portion 23a and the second functional portion 23b are stacked to form an integral structure, the entire structure needs to be etched in step S4 to provide space for the connection of the first electrode 21 and the second electrode 22. After the etching process, the entire structure forms a first via hole 40 and a second via hole 50 that penetrate the first functional portion 23a and the second functional portion 23b, as shown in FIG. Fig.11 shown.

[0096] In the subsequent step S5, see Fig.12 , respectively, a first electrode 21 is deposited at the first via hole 40 to form a first electrode 21, and a second electrode 22 is deposited at the second via hole 50 to form a second electrode 22. The first electrode 21 passes through the middle second active layer 5 at the first via hole 40 to connect with the bottom first active layer 2 to achieve parallel connection. Similarly, the second electrode 22 forms the same connection at the second via hole 50, thereby obtaining a complete transistor 20 structure. After forming multiple of the above transistor 20 structures, an array substrate 100 is formed.

[0097] According to an embodiment of the present invention, a display panel is provided, comprising the array substrate 100 as described in any one of the above items.

[0098] According to an embodiment of the present invention, a display device is provided, comprising the display panel as described above. Optionally, the display device can be any product involving OLED display, such as lighting, car lights, mobile phones, televisions, tablets, car displays, etc. The present application does not specifically limit the specific type of the display device.

[0099] The embodiments of the present invention provide an array substrate and a preparation method thereof, a display panel and a display device. By setting a first functional part and a second functional part in the device layer of the transistor of the array layer, after the two are superimposed and set, the mobility of the first active layer of the first functional part and the second active layer in the second functional part are different, so that the transistor as a whole can be driven by the active layer with high mobility, thereby improving the display brightness. At the same time, the functional part with high subthreshold swing amplitude is used to improve the stability of the potential and ensure the grayscale expansion under low brightness. The two functional parts are comprehensively utilized, which can achieve the improvement of both the mobility of the material and the subthreshold swing amplitude of the transistor as a whole. On the basis of ensuring the improvement of the overall display brightness, the stability of the potential is simultaneously improved, thereby overcoming the disadvantages of a single material and having a better driving effect.

[0100] Although the present invention has been described with reference to preferred embodiments, various modifications may be made thereto and parts thereof may be replaced by equivalents without departing from the scope of the present invention. In particular, the various technical features mentioned in the various embodiments may be combined in any manner as long as there are no structural conflicts. The present invention is not limited to the specific embodiments disclosed herein, but includes all technical solutions falling within the scope of the claims.

Claims

1. An array substrate, characterized in that: include: substrate; an array layer, arranged on one side of the substrate, the array layer comprising a plurality of transistors, each of the transistors comprising a first electrode, a second electrode and a device layer, the device layer comprising a first functional portion and a second functional portion stacked along its thickness direction and a buffer layer arranged therebetween, the first functional portion being arranged on the substrate and the second functional portion being arranged on a side of the buffer layer away from the first functional portion; Among them, the first functional part includes a first control terminal and a first active layer, the second functional part includes a second control terminal and a second active layer, the first pole and the second pole extend along the thickness direction and pass through the second active layer to be connected to the first active layer respectively, and the absolute value of the difference between the mobility of the first active layer and the mobility of the second active layer is greater than zero.

2. The array substrate according to claim 1, characterized in that: The mobility of the first active layer is smaller than the mobility of the second active layer, and the subthreshold swing of the first functional portion is larger than the subthreshold swing of the second functional portion; Preferably, the first active layer includes an indium gallium zinc oxide layer, and the second active layer includes an indium zinc oxide layer or an indium gallium oxide layer.

3. The array substrate according to claim 2, characterized in that: The first functional part includes a first insulating layer disposed between the first control terminal and the first active layer, the second functional part includes a second insulating layer disposed between the second control terminal and the second active layer, and the maximum thickness of the first insulating layer is greater than the maximum thickness of the second insulating layer; Preferably, the first control end is located on a side of the first insulating layer close to the substrate, and the first insulating layer covers the first control end; Preferably, the second control end is located on a side of the second insulating layer away from the buffer layer, and the second insulating layer carries the second control end.

4. The array substrate according to claim 2, characterized in that: The orthographic projection of the first control end on the substrate exceeds the orthographic projection of the second control end on the substrate at least along a first direction, and the first direction intersects the thickness direction; Preferably, the orthographic projection of the second control terminal on the substrate is located within the orthographic projection of the first control terminal on the substrate.

5. The array substrate according to claim 1, characterized in that: The first functional part includes a first insulating layer arranged between the first control end and the first active layer, the second functional part includes a second insulating layer arranged between the second control end and the second active layer, the first control end is located on a side of the first insulating layer close to the substrate, and the second control end is located on a side of the second insulating layer away from the buffer layer.

6. The array substrate according to claim 1, characterized in that: The buffer layer includes a first layer and a second layer stacked together, the device layer further includes a shielding portion, the shielding portion is arranged between the first layer and the second layer, and the orthographic projection of the shielding portion in the thickness direction covers at least a portion of the first active layer and the second active layer respectively; Preferably, the orthographic projection of the shielding portion on the substrate completely covers the orthographic projections of the first active layer and the second active layer on the substrate; Preferably, the orthographic projection of the shielding portion on the substrate covers a portion of the orthographic projections of the first active layer and the second active layer on the substrate, and one of the first layer and the second layer covers the shielding portion on the other.

7. The array substrate according to claim 6, characterized in that: The first pole passes through the shielding portion along the thickness direction, and the shielding portion is connected to the first pole.

8. A method for preparing an array substrate, characterized in that: include: Providing a substrate, forming a first functional portion on the substrate, wherein the first functional portion includes a first control terminal and a first active layer; forming a buffer layer on a side of the first functional portion facing away from the substrate; forming a second functional portion on a side of the buffer layer away from the first functional portion, the second functional portion comprising a second control terminal and a second active layer; Sequentially etching the second functional portion, the buffer layer, and the first functional portion to form a first via hole and a second via hole spaced apart from each other; A first electrode is formed in the first via hole and a second electrode is formed in the second via hole, and the first electrode and the second electrode respectively pass through the second active layer and are connected to the first active layer.

9. A display panel, characterized in that: It comprises the array substrate as claimed in any one of claims 1 to 7.

10. A display device, characterized in that: Comprising the display panel as claimed in claim 9.

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