LED epitaxial structure, bonding method of LED epitaxial structure, LED assembly and manufacturing method of LED assembly

Abstract

The invention relates to an LED epitaxial structure, a bonding method of the LED epitaxial structure, an LED assembly and a manufacturing method of the LED assembly. The LED epitaxial structure bonding method comprises the following steps: providing a conductive substrate; wherein a first insulating layer and a first bonding layer are arranged on the conductive substrate, the first insulating layer is arranged in a grid shape, and grids are filled with the first bonding layer; providing an epitaxial structure; wherein the epitaxial structure comprises a substrate, an epitaxial layer, a second insulating layer and a second bonding layer which are sequentially stacked, the second insulating layer is arranged in a grid shape, and grids are filled with the second bonding layer; aligning and bonding the conductive substrate and the epitaxial structure; wherein the projection of the first insulating layer and the projection of the second insulating layer which are bonded on the conductive substrate coincide, and the projection of the first bonding layer and the projection of the second bonding layer on the conductive substrate coincide; and removing the substrate. By adopting the bonding method, metal back adhesion caused by etching the metal bonding layer can be avoided.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to an LED epitaxial structure and a bonding method thereof, an LED component and a manufacturing method thereof. Background Art

[0002] In the process of manufacturing a vertical chip substrate, the display backplane and the epitaxial structure are usually bonded by metal bonding, and then the epitaxial structure is etched. In this process, the bonded epitaxial structure is usually etched first to form multiple separated epitaxial layers, and the metal layer is divided by ion beam dry etching (IBE) to obtain multiple P electrodes. However, the bonding metal etching process is difficult and the etching equipment is demanding. The sputtered metal debris may also accumulate along the epitaxial layer and form a metal film layer attached to the side of the epitaxial layer, and the accumulated metal film layer cannot be effectively removed by the degumming process.

[0003] Due to the existence of the above defects, when the display backplane is coated in the later stage, it will cause the location where the accumulated metal film layer exists to be difficult to be coated with a protective layer, or the coated protective layer is very easy to break here, or the sputtered metal and the epitaxial top P-type layer form a current channel, which ultimately causes the current to not pass through the quantum well layer, and ultimately causes the chip to fail to light up or have low brightness, short circuit and other abnormalities. Summary of the invention

[0004] In view of the above-mentioned deficiencies in the prior art, the purpose of the present application is to provide an LED epitaxial structure and a bonding method thereof, an LED component and a manufacturing method thereof, aiming to solve the technical problem of metal re-sticking caused by the above-mentioned metal etching.

[0005] A method for bonding an LED epitaxial structure, comprising:

[0006] A conductive substrate is provided; wherein a first insulating layer and a first bonding layer are provided on the conductive substrate, the first insulating layer is arranged in a grid shape, and the first bonding layer is filled in the grid;

[0007] An epitaxial structure is provided; wherein the epitaxial structure comprises a substrate, an epitaxial layer, a second insulating layer and a second bonding layer which are stacked in sequence, the second insulating layer is arranged in a grid shape, and the second bonding layer is filled in the grid;

[0008] Aligning and bonding the conductive substrate and the epitaxial structure; wherein after the bonding is completed, the projections of the first insulating layer and the second insulating layer on the conductive substrate overlap, and the projections of the first bonding layer and the second bonding layer on the conductive substrate overlap; and

[0009] The substrate is removed.

[0010] The above-mentioned LED epitaxial structure bonding method can avoid the traditional etching process of bonding metal by pre-patterning the insulating layer on the conductive substrate and the epitaxial structure, and then vapor-depositing the bonding metal in the pattern of the insulating layer. By aligning and bonding the insulating layer and the metal layer on the conductive substrate and the epitaxial structure, the problems of incomplete metal etching, metal splashing and residual metal particles can be effectively avoided, thereby greatly improving the overall performance and yield of the device.

[0011] Optionally, it also includes:

[0012] Based on the arrangement of the second insulating layer, the epitaxial layer is patterned through a mask corresponding to the second insulating layer to expose the second insulating layer.

[0013] Optionally, the method for manufacturing the conductive substrate includes:

[0014] providing a conductive substrate;

[0015] Coating an insulating adhesive layer on the surface of the conductive substrate;

[0016] Performing patterning on the insulating adhesive layer to form the first insulating layer arranged in a grid shape;

[0017] The first bonding layer is evaporated in the grid defined by the first insulating layer.

[0018] Optionally, the method for manufacturing the epitaxial structure includes:

[0019] Providing the epitaxial layer including the substrate;

[0020] Coating an insulating adhesive layer on a side of the epitaxial layer away from the substrate;

[0021] Performing patterning on the insulating adhesive layer to form the second insulating layer arranged in a grid shape;

[0022] The second bonding layer is evaporated in the grid defined by the second insulating layer.

[0023] Optionally, the first insulating layer and the second insulating layer include any one of silicon dioxide, benzocyclobutene, and polyimide, and the first insulating layer and the second insulating layer are made of the same material.

[0024] Optionally, the first bonding layer and the second bonding layer include any one of gold, tin, and copper, and the first bonding layer and the second bonding layer are made of the same material.

[0025] Based on the same inventive concept, the present application also provides an LED epitaxial structure, and the LED epitaxial structure is obtained by using the aforementioned LED epitaxial structure bonding method.

[0026] Since the LED epitaxial structure is obtained by the aforementioned LED epitaxial structure bonding method, no metal film layer will be accumulated on the side of the epitaxial layer, thereby ensuring the stability of the LED epitaxial structure.

[0027] Based on the same inventive concept, the present application also provides a method for manufacturing an LED component, comprising:

[0028] Providing an LED epitaxial structure obtained by using the LED epitaxial structure bonding method described above; and

[0029] Based on the arrangement of the second insulating layer, patterning the epitaxial layer through a mask corresponding to the second insulating layer to expose the second insulating layer;

[0030] A metal electrode is fabricated on the surface of the patterned epitaxial layer.

[0031] The above-mentioned LED component manufacturing method is obtained on the basis of the aforementioned LED epitaxial structure bonding method, and the aforementioned bonding method avoids the traditional etching process of the bonding metal, effectively avoiding the problems of incomplete metal etching, metal splashing and residual metal particles, thereby greatly improving the overall performance and yield of the LED component.

[0032] Optionally, before the step of manufacturing a metal electrode on the surface of the patterned epitaxial layer, the method further comprises:

[0033] Depositing a protective layer on the surface of the epitaxial layer after patterning;

[0034] The protective layer is patterned so that a portion of the epitaxial layer facing away from the conductive substrate is exposed.

[0035] Based on the same inventive concept, the present application also provides an LED component, which is manufactured using the aforementioned LED component manufacturing method. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 is a schematic flow chart of a method for bonding an LED epitaxial structure in an embodiment;

[0037] Figure 2 is a schematic flow chart of a method for manufacturing an LED component in an embodiment;

[0038] Figure 3-Figure 5 For the corresponding Figure 1 A schematic diagram of the structure of the LED epitaxial structure bonding method;

[0039] Figure 6-Figure 8 is a structural schematic diagram of a method for bonding an LED epitaxial structure in another embodiment;

[0040] Fig. 9 for Figure 1 Schematic diagram of the sub-steps of step S100;

[0041] Fig.10 For Fig. 9 The corresponding structural diagram;

[0042] Fig.11 for Figure 1 Schematic diagram of the sub-step flow chart of step S200;

[0043] Fig.12 For Fig.11 The corresponding structural diagram;

[0044] Figure 13-Figure 15 For the corresponding Figure 2 Schematic diagram of the structure of the LED component manufacturing method.

[0045] Description of reference numerals:

[0046] 1-conductive substrate; 11-first insulating layer; 110-insulating adhesive layer; 12-first bonding layer; 21-substrate; 22-epitaxial layer; 23-second insulating layer; 230-insulating adhesive layer; 24-second bonding layer; S0-photoresist; E1-first epitaxial layer; E2-second epitaxial layer; E3-third epitaxial layer; 32-protective layer; H-hole; M-metal electrode. DETAILED DESCRIPTION

[0047] In order to facilitate the understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present application are given in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thoroughly and comprehensively understood.

[0048] The following descriptions of the embodiments are with reference to the attached diagrams to illustrate specific embodiments that the present application can be used to implement. The serial numbers for the components herein, such as "first", "second", etc., are only used to distinguish the objects described and do not have any order or technical meaning. The "connection" and "coupling" mentioned in the present application, unless otherwise specified, include direct and indirect connections (couplings). The directional terms mentioned in the present application, such as "upper", "lower", "front", "back", "left", "right", "inside", "outside", "side", etc., are only with reference to the directions of the attached drawings. Therefore, the directional terms used are for better and clearer explanation and understanding of the present application, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation to the present application.

[0049] In the description of this application, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be fixedly connected, detachably connected, or integrally connected; it can be mechanically connected; it can be directly connected, or indirectly connected through an intermediate medium, or it can be the internal communication of two elements. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances. It should be noted that the terms "first", "second", etc. in the specification and claims of this application and the drawings are used to distinguish different objects, rather than to describe a specific order. In addition, the terms "including", "may include", "include", or "may include" used in this application indicate the existence of the corresponding functions, operations, elements, etc. disclosed, and do not limit one or more other functions, operations, elements, etc. In addition, the terms "including" or "include" indicate the existence of the corresponding features, numbers, steps, operations, elements, components, or combinations thereof disclosed in the specification, and do not exclude the existence or addition of one or more other features, numbers, steps, operations, elements, components, or combinations thereof, and are intended to cover non-exclusive inclusions.

[0050] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0051] As described in the background technology section of this application, in the current process of manufacturing a chip substrate with a vertical structure, the display backplane and the epitaxial structure are usually bonded by metal bonding, and then the epitaxial structure is etched. In this process, the bonded epitaxial structure is usually etched first to form a plurality of mutually separated epitaxial layers, and the metal layer is divided by ion beam dry etching technology (IBE) to obtain a plurality of P electrodes. However, the bonding metal etching process is difficult, and the etching equipment has strict requirements. The sputtered metal debris may also accumulate along the epitaxial layer and form a metal film layer attached to the side of the epitaxial layer, and the accumulated metal film layer cannot be effectively removed by the degumming process.

[0052] Due to the existence of the above defects, when the display backplane is coated in the later stage, it will cause the location where the accumulated metal film layer exists to be difficult to be coated with a protective layer, or the coated protective layer is very easy to break here, or the sputtered metal and the epitaxial top P-type layer form a current channel, which ultimately causes the current to not pass through the quantum well layer, and ultimately causes the chip to fail to light up or have low brightness, short circuit and other abnormalities.

[0053] Based on this, the present application hopes to provide a solution that can solve the above-mentioned technical problems, the details of which will be described in the subsequent embodiments.

[0054] See also Figure 1 , while auxiliary reference Figure 3-Figure 5 The present application provides a method for bonding an LED epitaxial structure, which may include steps: S100-S400.

[0055] Step S100, providing a conductive substrate; wherein a first insulating layer and a first bonding layer are provided on the conductive substrate, the first insulating layer is arranged in a grid shape, and the first bonding layer is filled in the grid;

[0056] Step S200, providing an epitaxial structure; wherein the epitaxial structure comprises a substrate, an epitaxial layer, a second insulating layer and a second bonding layer stacked in sequence, the second insulating layer is arranged in a grid shape, and the second bonding layer is filled in the grid;

[0057] Step S300, aligning and bonding the conductive substrate and the epitaxial structure; wherein after the bonding is completed, the projections of the first insulating layer and the second insulating layer on the conductive substrate overlap, and the projections of the first bonding layer and the second bonding layer on the conductive substrate overlap; and

[0058] Step S400, removing the substrate.

[0059] The above-mentioned LED epitaxial structure bonding method can avoid the traditional etching process of bonding metal by pre-patterning the insulating layer on the conductive substrate and the epitaxial structure, and then vapor-depositing the bonding metal in the pattern of the insulating layer. By aligning and bonding the insulating layer and the metal layer on the conductive substrate and the epitaxial structure, the problems of incomplete metal etching, metal splashing and residual metal particles can be effectively avoided, thereby greatly improving the overall performance and yield of the device.

[0060] Specifically, please refer to Fig. 9 , Fig.10 The method for manufacturing the conductive substrate including the first insulating layer 11 and the first bonding layer 12 may include steps: S110-S140.

[0061] Step S110, providing a conductive substrate;

[0062] Step S120, coating a layer of insulating adhesive on the surface of the conductive substrate;

[0063] Step S130, patterning the insulating adhesive layer to form a first insulating layer arranged in a grid shape;

[0064] Step S140: vapor-depositing the first bonding layer in the grid defined by the first insulating layer.

[0065] In this embodiment, the first insulating layer 11 and the first bonding layer 12 are arranged on the conductive substrate 1, and the first insulating layer 11 is arranged in a grid shape, and the first bonding layer 12 is filled in the grid. The first insulating layer 11 can be any one of silicon dioxide, benzocyclobutene, and polyimide, and the first bonding layer 12 is a metal, specifically any one of gold, tin, and copper. The first bonding layer 12 can also be an alloy. The first bonding layer 12 can be formed in the grid formed by the first insulating layer 11 by evaporation.

[0066] Specifically, the conductive substrate 1 can be a CMOS substrate, a PCB substrate, or a glass substrate. It should be determined that no matter it is a CMOS substrate, a PCB substrate, or a glass substrate, a driving circuit is provided thereon to realize the driving function of the LED chip. In order to increase the heat dissipation and conductivity of the conductive substrate 1, the substrate of the conductive substrate 1 can be, but is not limited to, any one of silicon (Si), germanium (Ge), and copper (Cu). Since silicon, germanium, and copper have the characteristics of high thermal conductivity, by setting the substrate of the conductive substrate 1 to include at least one of silicon, germanium, and copper, the heat dissipation efficiency and heat dissipation effect of the conductive substrate 1 can be improved, thereby improving the working performance and working life of the subsequent device.

[0067] Similar to the method of making the conductive substrate, you can refer to Fig.11 , Fig.12 The method for manufacturing the epitaxial structure may include the following steps: S210-S240.

[0068] Step S210, providing the epitaxial layer including the substrate;

[0069] Step S220, coating an insulating adhesive layer on a side of the epitaxial layer away from the substrate;

[0070] Step S230, patterning the insulating adhesive layer to form a second insulating layer arranged in a grid shape;

[0071] Step S240: vapor-depositing the second bonding layer in the grid defined by the second insulating layer.

[0072] The substrate 21 may include any one of a sapphire substrate, a silicon substrate, and a gallium arsenide substrate. The epitaxial layer 22 may be a blue-green light epitaxial layer (corresponding to a gallium nitride semiconductor material), and the epitaxial layer 22 may also be a red light epitaxial layer (corresponding to a gallium arsenide semiconductor material). Specifically, the epitaxial layer 22 may include an active layer (not shown), an N-type semiconductor layer (not shown) and a P-type semiconductor layer (not shown). The N-type semiconductor layer or the P-type semiconductor layer may be a III-V compound semiconductor material such as GaN, AlGaN, InGaN, AlInP, GaInP, AlGaInP, etc. The active layer may be a multiple quantum well structure (Multiple Quantum Well, MQW). Specifically, the quantum well or quantum layer can be InGaN, AlGaN, InN, InAlN, AlInGaN, etc., and the quantum barrier alternately stacked with the quantum well layer can be GaN, AlN, AlGaN, AlInGaN, InAlN, etc.; the multiple quantum well structure can include one or two or three or four or five or six or six or seven or eight quantum wells (or at least one quantum hole); the wavelength emitted by the above-mentioned active layer can be the wavelength of the blue light band, the wavelength of the green light band or the wavelength of the red light band, which is not specifically limited in the embodiments of the present application.

[0073] The second insulating layer 23 can be any one of silicon dioxide, benzocyclobutene, and polyimide, and the second bonding layer 24 is a metal, specifically any one of gold, tin, and copper. The second bonding layer 24 can also be an alloy. The second bonding layer 24 can be formed in the grid formed by the second insulating layer 23 by evaporation. It should be understood that in order to ensure the bonding firmness during bonding, the first insulating layer 11 and the second insulating layer 23 of the present application are made of the same material, and the first bonding layer 12 and the second bonding layer 24 are made of the same material. That is to say, when the first insulating layer 11 is made of silicon dioxide, the second insulating layer 23 is also made of silicon dioxide; when the first bonding layer 12 is made of gold, the second bonding layer 24 is also made of gold.

[0074] When the conductive substrate 1 and the epitaxial structure are aligned, the first insulating layer 11 and the second insulating layer 23 and the first bonding layer 12 and the second bonding layer 24 can be bonded by applying a certain pressure and a certain temperature through the action of van der Waals force, molecular force or even atomic force.

[0075] In one embodiment, the LED epitaxial structure bonding method of the present application may further include the step of: based on the arrangement of the second insulating layer, patterning the epitaxial layer through a mask corresponding to the second insulating layer to expose the second insulating layer.

[0076] Specifically, you can refer to Figure 6-Figure 8. A photoresist S0 can be firstly spin-coated on the epitaxial layer 22, and the photoresist is patterned through a mask (not shown). The mask is based on the arrangement of the second insulating layer 23, that is, the light-transmitting area of ​​the mask corresponds to the grid-like part of the second insulating layer 23, and the light-impermeable part of the mask corresponds to the hollow part of the second insulating layer 23. In this way, the pattern of the mask can be transferred to the photoresist S0, so that the gap of the patterned photoresist S0 just corresponds to the grid-like part of the second insulating layer 23; then, the photoresist S0 is used as a mask to perform an etching process on the epitaxial layer 22 until the epitaxial layer 22 is etched into a plurality of independent first epitaxial layers E1, second epitaxial layers E2, and third epitaxial layers E3. In this way, the epitaxial layer 22 can be split and the original bonding layer can be avoided from being etched again. When performing the etching process on the epitaxial layer 22, dry etching and / or wet etching process can be used. When dry etching and wet etching are combined, dry etching can be used at the beginning, and then when the etching of the epitaxial layer is about to be completed, wet etching can be used. In this way, clean etching can be ensured and over-etching of the underlying insulating layer can be avoided.

[0077] Based on the same inventive concept, the present application also provides an LED epitaxial structure, and the LED epitaxial structure is obtained by using the aforementioned LED epitaxial structure bonding method.

[0078] Specifically, the LED epitaxial structure may correspond to Figure 5 The epitaxial structure in Figure 8 The epitaxial structure in .

[0079] Since the LED epitaxial structure is obtained by the aforementioned LED epitaxial structure bonding method, no metal film layer will be accumulated on the side of the epitaxial layer, thereby ensuring the stability of the LED epitaxial structure.

[0080] Based on the same inventive concept, please refer to the attached Figure 2 and attached Figure 13-Figure 15 The present application also provides a method for manufacturing an LED component, which may include steps: S10-S60. Among them, steps S10-S40 may refer to the aforementioned LED epitaxial structure bonding method.

[0081] Providing an LED epitaxial structure obtained by using the LED epitaxial structure bonding method described above;

[0082] Step S50, based on the arrangement of the second insulating layer, patterning the epitaxial layer through a mask corresponding to the second insulating layer to expose the second insulating layer;

[0083] Step S60, manufacturing a metal electrode on the surface of the epitaxial layer after the patterning process.

[0084] The above-mentioned LED component manufacturing method is obtained on the basis of the aforementioned LED epitaxial structure bonding method, and the aforementioned bonding method avoids the traditional etching process of the bonding metal, effectively avoiding the problems of incomplete metal etching, metal splashing and residual metal particles, thereby greatly improving the overall performance and yield of the LED component.

[0085] Specifically, you can refer to Figure 6-Figure 8 . A photoresist S0 can be firstly spin-coated on the epitaxial layer 22, and the photoresist is patterned through a mask (not shown). The mask is based on the arrangement of the second insulating layer 23, that is, the light-transmitting area of ​​the mask corresponds to the grid-like part of the second insulating layer 23, and the light-impermeable part of the mask corresponds to the hollow part of the second insulating layer 23. In this way, the pattern of the mask can be transferred to the photoresist S0, so that the gap of the patterned photoresist S0 just corresponds to the grid-like part of the second insulating layer 23; then, the photoresist S0 is used as a mask to perform an etching process on the epitaxial layer 22 until the epitaxial layer 22 is etched into a plurality of independent first epitaxial layers E1, second epitaxial layers E2, and third epitaxial layers E3. In this way, the epitaxial layer 22 can be split and the original bonding layer can be avoided from being etched again. When performing the etching process on the epitaxial layer 22, dry etching and / or wet etching process can be used. When dry etching and wet etching are combined, dry etching can be used at the beginning, and then when the etching of the epitaxial layer is about to be completed, wet etching can be used. In this way, clean etching can be ensured and over-etching of the underlying insulating layer can be avoided.

[0086] Specifically, the epitaxial layer 22 can be a blue-green light epitaxial layer (corresponding to a gallium nitride semiconductor material), and the epitaxial layer 22 can also be a red light epitaxial layer (corresponding to a gallium arsenide semiconductor material). The protective layer 32 can be any one of silicon dioxide, aluminum oxide, and polyimide. Exemplarily, the epitaxial layer 22 in this specific embodiment may include an active layer (not shown), an N-type semiconductor layer (not shown) and a P-type semiconductor layer (not shown). The N-type semiconductor layer or the P-type semiconductor layer can be a III-V compound semiconductor material such as GaN, AlGaN, InGaN, AlInP, GaInP, AlGaInP, etc. The active layer can be a multiple quantum well structure (Multiple Quantum Well, MQW). Specifically, the quantum well or quantum layer can be InGaN, AlGaN, InN, InAlN, AlInGaN, etc., and the quantum barrier alternately stacked with the quantum well layer can be GaN, AlN, AlGaN, AlInGaN, InAlN, etc.; the multiple quantum well structure can include one or two or three or four or five or six or six or seven or eight quantum wells (or at least one quantum hole); the wavelength emitted by the above-mentioned active layer can be the wavelength of the blue light band, the wavelength of the green light band or the wavelength of the red light band, which is not specifically limited in the embodiments of the present application.

[0087] In one embodiment, it can be helpful to refer to Fig.13 , Fig.14 Before the step of making a metal electrode on the surface of the epitaxial layer after patterning in step S60, the step S60 may further include the following steps:

[0088] Depositing a protective layer on the surface of the epitaxial layer after patterning;

[0089] The protective layer is patterned so that a portion of the epitaxial layer facing away from the conductive substrate is exposed.

[0090] After the epitaxial structure 22 is patterned to form a plurality of first epitaxial layers E1, second epitaxial layers E2, and third epitaxial layers E3, a protective layer 32 may be deposited on the first epitaxial layer E1, the second epitaxial layer E2, and the third epitaxial layer E3. The protective layer 32 may be any one of silicon dioxide, aluminum oxide, and polyimide. The protective layer 32 may protect the first epitaxial layer E1, the second epitaxial layer E2, and the third epitaxial layer E3 from the influence of the environment (temperature, humidity, etc.), and improve the weather resistance of the first epitaxial layer E1, the second epitaxial layer E2, and the third epitaxial layer E3. After the deposition of the protective layer 32 is completed, the protective layer 32 may be patterned to expose the first epitaxial layer E1, the second epitaxial layer E2, and the third epitaxial layer E3 on a side away from the conductive substrate 1 to obtain a hole H. Subsequently, the hole H may be filled with metal to obtain a metal electrode M. The metal electrode M may be an alloy or a pure metal, for example, it may be a combination of one or more of Cr, Pt, Ti, Ni, Au, Sn, Ag, Cu, Cu, and Al. Considering the need to form an ohmic contact with the semiconductor layer, an ohmic contact layer (not shown) may be provided between the metal electrode M and the first epitaxial layer E1, the second epitaxial layer E2, and the third epitaxial layer E3, and the ohmic contact layer may be, for example, indium tin oxide.

[0091] Since the first bonding layer 12 and the second bonding layer 24 are both metals when the LED epitaxial structure is bonded, after the two are bonded, not only the substrate of the original epitaxial structure is replaced, but also the epitaxial structure is bonded to the conductive substrate, that is, the electrical connection between the conductive substrate and the epitaxial layer is achieved. At the same time, the first bonding layer 12 and the second bonding layer 24, which are bonding metals, can be used as an electrode after bonding, thereby forming the conductive part of the LED component together with the metal electrode M made last. The current can be introduced through these two metal electrodes, and the vertical structure LED component has good antistatic ability and good heat dissipation ability. In addition, by directly bonding the epitaxial structure to the conductive substrate, the problems caused by traditional mass transfer can also be avoided.

[0092] Based on the same inventive concept, the present application also provides an LED component, which is manufactured using the aforementioned LED component manufacturing method.

[0093] The above-mentioned LED component is obtained on the basis of the aforementioned LED component manufacturing method, and the aforementioned manufacturing method avoids the traditional etching process of the bonding metal, effectively avoiding the problems of incomplete metal etching, metal splashing and residual metal particles, thereby greatly improving the overall performance and yield of the LED component when manufacturing.

[0094] Specifically, the LED components obtained in the present application can be chips of different sizes such as LED, mini-LED, Micro-LED, etc. Furthermore, mini-LED can be used to make large outdoor display screens; Micro-LED can be used as a light source in technical fields such as VR (Virtual Reality), AR (Augmented Reality), and MR (Mixed Reality).

[0095] It should be understood that the application of the present invention is not limited to the above examples. For ordinary technicians in this field, improvements or changes can be made based on the above description. All these improvements and changes should fall within the scope of protection of the claims attached to the present invention.

Claims

1. A method for bonding an LED epitaxial structure, characterized in that: include: A conductive substrate is provided; wherein a first insulating layer and a first bonding layer are provided on the conductive substrate, the first insulating layer is arranged in a grid shape, and the first bonding layer is filled in the grid; An epitaxial structure is provided; wherein the epitaxial structure comprises a substrate, an epitaxial layer, a second insulating layer and a second bonding layer which are stacked in sequence, the second insulating layer is arranged in a grid shape, and the second bonding layer is filled in the grid; Aligning and bonding the conductive substrate and the epitaxial structure; wherein after the bonding is completed, the projections of the first insulating layer and the second insulating layer on the conductive substrate overlap, and the projections of the first bonding layer and the second bonding layer on the conductive substrate overlap; and The substrate is removed.

2. The LED epitaxial structure bonding method according to claim 1, characterized in that: Also includes: Based on the arrangement of the second insulating layer, the epitaxial layer is patterned through a mask corresponding to the second insulating layer to expose the second insulating layer.

3. The LED epitaxial structure bonding method according to claim 1, characterized in that: The method for manufacturing the conductive substrate comprises: providing a conductive substrate; Coating an insulating adhesive layer on the surface of the conductive substrate; Performing patterning on the insulating adhesive layer to form the first insulating layer arranged in a grid shape; The first bonding layer is evaporated in the grid defined by the first insulating layer.

4. The LED epitaxial structure bonding method according to claim 1, characterized in that: The method for manufacturing the epitaxial structure comprises: Providing the epitaxial layer including the substrate; Coating an insulating adhesive layer on a side of the epitaxial layer away from the substrate; Performing patterning on the insulating adhesive layer to form the second insulating layer arranged in a grid shape; The second bonding layer is evaporated in the grid defined by the second insulating layer.

5. The LED epitaxial structure bonding method according to any one of claims 1 to 4, characterized in that: The first insulating layer and the second insulating layer include any one of silicon dioxide, benzocyclobutene, and polyimide, and the first insulating layer and the second insulating layer are made of the same material.

6. The LED epitaxial structure bonding method according to any one of claims 1 to 4, characterized in that: The first bonding layer and the second bonding layer include any one of gold, tin, and copper, and the first bonding layer and the second bonding layer are made of the same material.

7. An LED epitaxial structure, characterized in that: The LED epitaxial structure is obtained by using the LED epitaxial structure bonding method according to any one of claims 1 to 6.

8. A method for manufacturing an LED component, characterized in that: include: Providing an LED epitaxial structure obtained by the LED epitaxial structure bonding method according to claim 1; Based on the arrangement of the second insulating layer, patterning the epitaxial layer through a mask corresponding to the second insulating layer to expose the second insulating layer; A metal electrode is fabricated on the surface of the patterned epitaxial layer.

9. The method for manufacturing an LED component according to claim 8, wherein: Before the step of making a metal electrode on the surface of the patterned epitaxial layer, the method further comprises: Depositing a protective layer on the surface of the epitaxial layer after patterning; The protective layer is patterned so that a portion of the epitaxial layer facing away from the conductive substrate is exposed.

10. An LED assembly, characterized in that: The LED component is manufactured using the LED component manufacturing method according to any one of claims 8 to 9.

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