Method for depositing insulating layer in TSV (Through Silicon Via) adapter plate hole

Abstract

The invention discloses a method for depositing an insulating layer in a TSV (Through Silicon Via) adapter plate, which is characterized in that ICPCVD (Inductively Coupled Plasma Chemical Vapor Deposition) equipment is utilized, nitrogen and silane are used as reaction gases, and an insulating layer is deposited in a TSV of the TSV adapter plate, and the method comprises the following steps of: setting lower chamber pressure, DC (Direct Current) power and higher radio frequency bias voltage for the ICPCVD equipment, and reacting the reaction gases on the inner side wall and the bottom of the TSV to generate silicon nitride; adhering to the surface of the silicon substrate; the method comprises the following steps: setting process cycles of required times, and gradually reducing bias power from high bias power to low bias power in each process cycle to deposit silicon nitride, so that reaction gas is gradually moved to the middle upper part of the TSV from the lower part of the TSV, and the coverage rate of a silicon nitride insulating layer in the TSV is increased. By preparing the silicon nitride insulating layer with high adhesion, good uniformity and high step coverage rate, the problems of poor side wall metal filling effect, long deposition process time, high process cost and the like caused by scallop-shaped bulges after silicon hole etching in the existing TSV adapter plate preparation process are solved.

Description

Technical Field

[0001] The invention belongs to the technical field of semiconductor devices, and in particular relates to a method for depositing an insulating layer in a TSV adapter plate hole. Background Art

[0002] TSV (Through Silicon Via) technology can realize electrical connection between chips in the vertical direction. Its high reliability and optimization have become research hotspots. Using this technology, systematic integration of microwave, digital, optical, and MEMS (Micro-Electro-Mechanical System) can be realized within a single packaging system, which will achieve the highest three-dimensional chip stacking integration density and short interlayer interconnection paths. Compared with the existing SIP (System in Package) based on flip-chip and wire bonding, it has been significantly improved in electrical performance, thermal / mechanical performance and external dimensions.

[0003] The key to the preparation of TSV adapters is how to obtain a reliable vertical conductive channel. This process requires the coordination of key processes such as a low-roughness deep silicon etching process, a high-uniformity insulating layer deposition process with good adhesion, and sidewall metallization with high step coverage and high-consistency electroplating filling. Due to the process principle of the first process, deep silicon etching, the "scallop" morphology of the silicon hole sidewall is inevitable. The scallop protrusions pose a considerable challenge to the subsequent continuous deposition of the metal film layer in the vertical direction of the silicon hole sidewall. Within the range of the TSV sidewall scallop structure, due to the presence of the protrusions, the coverage of the lower part of the scallop is significantly lower than that of the upper part of the scallop, and as the hole shape deepens, the overall coverage of the metal film layer at 3 / 4 of the bottom of the hole is poor. However, the continuity of the metal on the sidewall of the hole directly determines the effect of the electroplating filling of the silicon hole, which in turn affects the electrical performance of the TSV adapter in the vertical direction. Therefore, the preparation of the insulating layer in the hole of the TSV adapter board cannot be ignored as an important link between the previous and the next. How to improve the process method to obtain high adhesion, good uniformity, and strong resistance to electrical breakdown, while improving the "scallop" protrusions and providing good metal film layer growth conditions for subsequent processes, is the key to the preparation process.

[0004] At present, in the process of preparing TSV adapter plates, the insulating layer is generally deposited by thermal oxidation or PECVD (Plasma Enhanced Chemical Vapor Deposition) to deposit TEOS (Tetraethoxysilane) to generate silicon oxide. However, the problems with this technical route are: 1. The silicon oxide insulating layer prepared by thermal oxidation comes from the substrate itself, and a part of the substrate silicon is consumed during the growth process. Its reaction principle determines that the morphology of the grown silicon dioxide film maintains the original "scallop" protrusions to a certain extent, and cannot provide a good growth environment for subsequent sidewall metal deposition. 2. The thermal oxidation method is used to prepare the silicon oxide insulating layer, and the process time is long, which invisibly increases the process cost, and the growth thickness of the silicon oxide film prepared by this process method has a limit value, and it is not possible to flexibly prepare thick films according to process requirements. 3. Using the traditional PECVD method to deposit TEOS, on the one hand, the conformal coverage of this method will deteriorate as the aspect ratio of the silicon hole increases, making it difficult to obtain a uniform silicon oxide insulating layer in the hole. On the other hand, TEOS, as a deposition source, contains carbon atoms, which easily produces carbon impurities and introduces other pollution, affecting the performance and quality of the insulating layer. 4. Using the PECVD method to deposit TEOS involves high raw material and energy costs, as well as the cost of regular maintenance and cleaning of the equipment. Summary of the invention

[0005] The object of the present invention is to provide a method for depositing an insulating layer in a TSV adapter plate hole, which can increase the coverage of the insulating layer in the TSV adapter plate hole and improve the electrical performance of the TSV adapter plate in the vertical direction.

[0006] One aspect of the present invention provides a method for depositing an insulating layer in a TSV adapter plate hole, using an ICPCVD device, using nitrogen and silane as reaction gases, to deposit an insulating layer in a TSV hole of a TSV adapter plate, the method comprising:

[0007] Low-rate bottom-type overall deposition step: set a lower chamber pressure, DC power and higher RF bias voltage for the ICPCVD equipment, and the reaction gas reacts on the inner sidewall and bottom of the TSV hole to generate silicon nitride, which is attached to the surface of the silicon substrate. The chamber pressure is set to 30Pa-300Pa, the DC power is set to 300W-800W, the bias power is set to 800W-1200W, the silane gas flow rate is 30sccm-50sccm, and the nitrogen gas flow rate is 20sccm-35sccm;

[0008] Redistributed deposition step: set the required number of process cycles, and in each process cycle, gradually reduce the bias power from high bias power to low bias power to deposit silicon nitride, so that the reaction gas gradually moves from the lower part of the TSV hole to the middle and upper part of the TSV hole, thereby improving the coverage of the silicon nitride insulation layer in the TSV hole, wherein the starting high bias power is set to 1500W-2000W, the ending low bias power is set to 200W-500W, the chamber pressure is set to 30Pa-300Pa, and the DC power is set to 500W-1000W.

[0009] Preferably, in the low-rate bottom-type overall deposition step, the chamber temperature is set to 380° C. and the deposition time is set to 10 min-15 min.

[0010] Preferably, in the redistributed deposition step, the number of process cycles is determined by the desired total thickness of the insulating layer.

[0011] Preferably, the number of process cycles is 30-80 times.

[0012] Preferably, in the redistributed deposition step, within each process cycle, the allocation of deposition time is set according to the thickness of the insulating layer to be deposited at the target position.

[0013] Preferably, in the redistributed deposition step, the deposition time at high bias power is 30s-60s.

[0014] The method for depositing an insulating layer in a TSV adapter plate hole according to the above aspect of the present invention can increase the coverage of the insulating layer in the TSV adapter plate hole and improve the electrical performance of the TSV adapter plate in the vertical direction. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the technical solution of the present invention, the following briefly introduces the drawings used in the description of the embodiments of the present invention. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative work:

[0016] Figure 1 The present invention is a flowchart of a method for depositing an insulating layer in a TSV adapter plate hole according to an embodiment of the present invention. DETAILED DESCRIPTION

[0017] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0018] An embodiment of the present invention provides a method for depositing an insulating layer in a TSV adapter plate hole. The method of the embodiment of the present invention adopts an ICPCVD (Inductively Coupled Plasma Chemical Vapor Deposition) process, uses nitrogen and silane as reaction gas sources, and adopts a step-by-step deposition method to prepare a silicon nitride insulating layer. First, compared with silicon oxide film, the advantages of silicon nitride as an insulating layer are: good chemical stability and mechanical properties, excellent acid and alkali corrosion resistance, and stronger water vapor resistance, which helps to improve the stability and reliability of the film layer during subsequent process processing and maintain high adhesion to the silicon substrate in harsh environments; at the same time, silicon nitride has strong anti-masking ability, which can effectively prevent copper diffusion and leakage, and ensure electrical isolation. Secondly, the ICPCVD method is adopted, using nitrogen and silane as reaction gas sources. The high diffusivity of gas molecules under the action of the radio frequency electric field can be used to react in various places in the hole to generate a silicon nitride film layer, which covers the silicon sidewalls and the bottom of the hole, effectively improving the uniformity of the deposited film layer in the hole and improving the "scallop" protrusion phenomenon, thereby providing good metal film growth conditions for subsequent processes to improve the electrical properties in the vertical direction. At the same time, compared with TEOS, nitrogen and silane can effectively avoid the introduction of carbon pollution sources, which is more conducive to cleaning and cost savings. Finally, in the specific deposition process, a low-rate bottoming overall deposition step and a redistributed deposition step with step-by-step reduction of bias power are adopted. In the redistributed deposition process, the number of process cycles for depositing the insulating layer is set to 30-80 times. Each process cycle includes a high bias power deposition step and a low bias power deposition step, and the bias power is changed step by step within the cycle. The starting power is 1500W-2000w, and the ending power is 200W-500W, so that the reaction gas gradually moves from the lower part of the TSV hole to the middle and upper part of the TSV hole, so as to ensure the uniformity of the overall and local insulation layer coverage in the TSV hole.

[0019] Specifically, the method for depositing an insulating layer in a TSV adapter plate hole of an embodiment of the present invention uses an inductively coupled plasma chemical vapor deposition device (ICPCVD device) and uses silane and nitrogen as reaction gases to deposit an insulating layer in the silicon hole of the TSV adapter plate. Figure 1As shown, the method includes a low-rate bottoming overall deposition step S1 and a redistributed deposition step S2 of stepwise reduction of bias power. By setting a lower chamber pressure, DC power and a higher RF bias voltage for the ICPCVD device, a low-rate bottoming deposition in the TSV hole is first realized. In this low-rate deposition process, the reaction gas reacts on the inner sidewall and bottom of the TSV hole to generate silicon nitride, which adheres to the surface of the silicon substrate, which is conducive to the filling of the "scallop"-shaped protrusions. Secondly, a redistributed deposition process is carried out, the required number of process cycles is set, and the bias power is stepwise reduced from a higher bias power to a lower bias power deposition in each process cycle. The purpose of this process is to slowly move the redistributed deposition position from the lower position of the TSV hole to the middle and upper part, so as to improve the coverage of the local biased thin film layer in the hole. In the redistributed deposition process, the method of first high bias power deposition and then low bias power deposition is adopted, which can effectively avoid the problem of excessive thickness of the orifice film layer caused by the deposition process within a certain period of time, maintain a larger acceptance angle at the opening position, and facilitate the migration and deposition of gas molecules.

[0020] In a specific embodiment, the chamber temperature in the low-rate bottoming overall deposition step is set to 380°C, the chamber pressure range is set to 30Pa-300Pa, the DC power is selected between 300W-800W, the bias power is 800W-1200W, the silane gas flow rate is 30sccm-50sccm, and the nitrogen gas flow rate is 20sccm-35sccm. Under a lower chamber pressure environment, the film deposition rate is slower, and by applying a higher bias power, the traction force on the plasma active groups is strengthened, so that the insulating layer grows slowly everywhere in the TSV hole. The deposition step time is set to 10min-15min.

[0021] After the low-rate bottoming overall deposition step, a redistributed deposition step is performed. The chamber temperature and air pressure remain unchanged, the DC power is increased to 500W-1000W, the initial high bias power is set to 1500W-2000W, the deposition time of this process is 30s-60s, and the bias power is gradually reduced at a uniform rate, and the termination power is about 200W-500W, which is one cycle. In each cycle, the allocation of deposition time is mainly set according to the thickness requirement of the insulating layer to be deposited at the target position. For example, a higher bias power is more conducive to the deposition of the film layer in the lower part of the hole. With a lower bias power, the focal position of the redistribution of the film layer can be moved from the lower part of the hole to the middle and upper part of the hole. The process cycle can be implemented 30-80 times, and the final number of cycles is determined by the required total thickness of the insulating layer.

[0022] In summary, the insulating layer deposition method in the hole of the TSV adapter board of the embodiment of the present invention adopts the ICPCVD process, nitrogen and silane as gas sources, and the specific deposition process uses low-rate bottoming overall deposition and step-by-step redistribution deposition to reduce the bias power, so as to achieve the overall coverage of the insulating layer in the TSV hole, effectively improve the "scallop"-shaped protrusion caused by the etching process, and can deposit a certain thickness of insulating layer according to the target position needs, so as to achieve uniform coverage of the overall and local insulating layer in the TSV hole, provide good metal film layer growth conditions for subsequent sidewall metal filling, and achieve excellent electroplating plating function, thereby improving the electrical performance in the vertical direction during the preparation of the TSV adapter board. The process method is simple to operate and can be used in the research and development and mass production of silicon-based packaging structures. The insulating layer deposition method in the hole of the TSV adapter board of the embodiment of the present invention solves the problems of poor sidewall metal filling effect, long deposition process time, and high process cost caused by the "scallop"-shaped protrusion after silicon hole etching in the existing TSV adapter board preparation process by preparing a silicon nitride insulating layer with high adhesion, good uniformity, and high step coverage.

[0023] The above description is only by way of illustration of certain exemplary embodiments of the present invention. It is undoubted that those skilled in the art can modify the described embodiments in various ways without departing from the spirit and scope of the present invention. Therefore, the above drawings and descriptions are illustrative in nature and should not be construed as limiting the scope of protection of the claims of the present invention.

Claims

1. A method for depositing an insulating layer in a TSV adapter plate hole, characterized in that: Using ICPCVD equipment, using nitrogen and silane as reaction gases, an insulating layer is deposited in a TSV hole of a TSV adapter plate, the method comprising: Low-rate bottom-type overall deposition step: set a lower chamber pressure, DC power and higher RF bias voltage for the ICPCVD equipment, and the reaction gas reacts on the inner sidewall and bottom of the TSV hole to generate silicon nitride, which is attached to the surface of the silicon substrate. The chamber pressure is set to 30Pa-300Pa, the DC power is set to 300W-800W, the bias power is set to 800W-1200W, the silane gas flow rate is 30sccm-50sccm, and the nitrogen gas flow rate is 20sccm-35sccm; Redistributed deposition step: set the required number of process cycles, and in each process cycle, gradually reduce the bias power from high bias power to low bias power to deposit silicon nitride, so that the reaction gas gradually moves from the lower part of the TSV hole to the middle and upper part of the TSV hole, thereby improving the coverage of the silicon nitride insulation layer in the TSV hole, wherein the starting high bias power is set to 1500W-2000W, the ending low bias power is set to 200W-500W, the chamber pressure is set to 30Pa-300Pa, and the DC power is set to 500W-1000W.

2. The method according to claim 1, characterized in that In the low-rate bottom-type overall deposition step, the chamber temperature is set to 380° C. and the deposition time is set to 10 min-15 min.

3. The method according to claim 1 or 2, characterized in that In the redistributed deposition step, the number of process cycles is determined by the desired total thickness of the insulating layer.

4. The method according to claim 3, characterized in that The number of process cycles is 30-80 times.

5. The method according to claim 1 or 2, characterized in that: In the redistributed deposition step, within each process cycle, the allocation of deposition time is set according to the thickness of the insulating layer to be deposited at the target position.

6. The method according to claim 5, characterized in that In the redistributed deposition step, the deposition time at high bias power is 30s-60s.

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