Three-loop compensation low-noise high-dynamic response beat frequency phase-locked loop system and control method

Abstract

The invention relates to a three-loop compensation low-noise high-dynamic response beat frequency phase-locked loop system and a control method. The system is characterized in that a master laser and a slave laser output light to a photoelectric detector to generate beat frequency signals; the beat frequency signal and the local oscillator signal are transmitted to the phase discriminator after passing through the mixer and the filter in sequence; the phase discriminator compares the beat frequency signal phase with a DDS reference signal phase generated by the FPGA to obtain a phase discrimination signal, two paths of digital phase discrimination signals and one path of analog phase discrimination signal, and the three paths of phase discrimination signals are respectively transmitted to the three paths of loop compensators; compensation signals passing through the three loop compensators and the triangular wave scanning circuit are controlled by a programmed switch controlled by the FPGA to select an open-loop voltage scanning mode or a closed-loop phase locking mode. And finally, the beat frequency phase-locked loop realizes the output frequency and phase locking of the master-slave laser. According to the invention, a high-bandwidth and low-noise Raman laser system can be realized; the method can be widely applied to precision measurement fields such as laser cooling and atomic interferometers.

Description

Technical Field

[0001] The present invention belongs to the technical field of quantum precision measurement, and in particular relates to a three-loop compensation low-noise high-dynamic response beat frequency phase-locked loop system and a control method. Background Art

[0002] At present, atom interferometers have been widely used in high-precision measurements of basic physical quantities such as fine structure constant, gravitational constant, and medium refractive index. They can also be used as highly sensitive inertial sensors to measure physical quantities such as gravitational acceleration and angular velocity, thus having important applications in inertial navigation, earth exploration, and environmental monitoring. The performance of the optical system not only directly determines the accuracy of the atom interferometer, but also affects the stable operation of the atom interferometer. It is a complex and critical part of the atom interferometer.

[0003] Raman light is two pulsed lasers with a fixed frequency difference and phase lock. 87 In the atomic interferometer with Rb atoms as the interference medium, interference occurs 87 The frequency difference between the two ground state energy levels of the D2 line of the Rb atom is 6.834 GHz. The existing technology uses an optical phase-locked loop system to generate Raman light, which can achieve higher adjustment accuracy, introduce less phase noise, and obtain more ideal gravity measurement accuracy. However, the existing optical phase-locked loop has problems such as system instability and unsatisfactory long-term stability.

[0004] In addition, the loop filter in the beat frequency phase-locked system based on the optical phase-locked loop usually adopts a digital PID controller. However, due to the inherent delay characteristics of the digital system, it is insufficient in processing high-frequency error signals, and its control effect is not ideal. Moreover, due to the complexity of the system and poor scalability, it is difficult to add new features to the feedback loop. Therefore, these defects in the existing beat frequency phase-locked system based on the PID controller will greatly limit the commercialization of atom interferometers and their application in the future space field. Summary of the invention

[0005] In view of the problems existing in the beat frequency phase-locked loop system in the existing atomic interferometer, the present invention proposes a three-loop compensation low-noise high dynamic response beat frequency phase-locked loop system and a control method.

[0006] One of the above objects of the present invention is achieved by the following technical solution:

[0007] A three-loop compensation low-noise high-dynamic response beat frequency phase-locked loop system, characterized in that it includes: a master laser, a slave laser, a photodetector, a local oscillator signal source, a mixer, a filter, a phase detector and a three-way loop compensator; wherein the master laser and the slave laser output light to the photodetector to generate a beat frequency signal; the beat frequency signal and the local oscillator signal generated by the local oscillator signal source are successively transmitted to the phase detector through the mixer and the filter; the phase detector is used to compare the phase of the beat frequency signal with the phase of a DDS reference signal generated by an FPGA to obtain a phase detection signal, wherein two digital phase detection signals and one analog phase detection signal, and the three phase detection signals are respectively transmitted to the three-way loop compensator; the three-way loop compensator is used to obtain three-way compensation signals after compensating and filtering the phase detection signals, and the compensation signals are compared with the triangle The wave scanning circuit is controlled by a programmable switch controlled by FPGA to select an open-loop voltage scanning mode or a closed-loop phase locking mode; the open-loop voltage scanning mode is used to find the optimal initial operating frequency of the slave laser at the initial stage of system power-on, and the initial frequency signal of the slave laser is fed back to the slave laser by adjusting the DC bias voltage to obtain the optimal initial operating frequency of the slave laser; the closed-loop phase locking mode is that after the open-loop voltage scanning mode is completed, the programmable switches controlled by FPGA are closed in sequence to connect the three-way loop compensator to the feedback port of the slave laser, and the phase-locked signal after compensation filtering is fed back to the slave laser. The output of the three-way loop compensator adjusts the injection voltage and current of the slave laser to realize the function of adjusting the output frequency of the slave laser. Finally, the beat frequency phase-locked loop realizes the output frequency and phase locking of the master-slave laser.

[0008] Moreover, the phase detector adopts two types: a digital phase detector and an analog phase detector.

[0009] Moreover, the DDS signal, triangle wave circuit and DC bias voltage are all generated by an FPGA controller.

[0010] Moreover, the beat frequency phase-locked loop system is equivalent to a first-order system. The first compensator, the second compensator and the third compensator of the three-way loop compensator all adopt a TYPE II compensator combined with an amplifier. The transfer function of the TYPE II compensator is:

[0011]

[0012] The TYPE II compensator has two poles and one zero, where the pole ω p0 Position fixed, pole ω p1 and zero point ω z1 Locations available.

[0013] Moreover, the transfer function H of the beat frequency phase-locked loop system including the three-way loop compensator is oThe amplitude penetration frequency of (s) ranges from 0.1 to 0.5 times of the loop bandwidth. The phase margin variation trend of the three-loop compensation low-noise high-dynamic response beat frequency phase-locked loop system near the amplitude penetration frequency is first increased and then decreased. p0 Ensure that the phase margin is at its maximum value.

[0014] Moreover, the first compensator is a PZT loop feedback loop. Assuming the PZT loop feedback bandwidth is f1, the compensation loop pole ω p1 and zero point ω z1 The frequencies are set to: p1 =2πf p1 =0.1*2πf1,ω z1 =2πf z1 =0.5*2πf1.

[0015] Moreover, the second compensator is a DC loop feedback loop. Assuming the DC loop feedback bandwidth is f2, the compensation loop pole ω p1 and zero point ω z1 The frequencies are set to: p1 =2πf p1 =0.1*2πf2,ω z1 =2πf z1 =0.5*2πf2.

[0016] Moreover, the third compensator is an AC loop feedback loop. Assuming the AC loop feedback bandwidth is f3, the pole of the compensation loop is ω p1 and zero point ω z1 The frequencies are set to: p1 =2πf p1 =0.1*2πf3,ω z1 =2πf z1 =0.5*2πf3.

[0017] The second object of the present invention is achieved by the following technical solutions:

[0018] The control method of the three-loop compensation low-noise high-dynamic-response beat-frequency phase-locked loop system comprises the following steps:

[0019] Step 1, the master laser and the slave laser output light to a photodetector to generate a beat frequency signal;

[0020] Step 2: The beat frequency signal is mixed with the local oscillator signal generated by the local oscillator signal source and then transmitted to the phase detector after passing through a filter;

[0021] Step 3: The phase detector compares the phase of the beat frequency signal with the phase of the reference signal generated by the DDS to obtain three phase detection signals, including two digital phase detection signals and one analog phase detection signal.

[0022] Step 4, the three-way phase-locked signals are transmitted to the three-way loop compensators respectively, and the three-way loop compensators compensate and filter the phase-locked signals to obtain three-way compensation signals;

[0023] Step 5, FPGA outputs a full-scale triangle wave and detects whether the phase detector has a characteristic peak signal output. If there is a characteristic peak signal output, the program-controlled switch controlled by FPGA selects the open-loop voltage scanning mode and enters step a;

[0024] a) FPGA outputs a full voltage range triangle wave to drive PZT. The peak-to-peak value of the triangle wave is large, and the frequency of the laser in the corresponding frequency domain also changes periodically with the triangle wave voltage, forming a frequency scanning area; FPGA detects whether there is a characteristic peak of periodic change in the frequency discrimination signal. If no characteristic peak appears, it goes to step b. If there is a characteristic peak, it goes to step c;

[0025] b) Start changing the triangular wave bias voltage value in the positive voltage direction. When the bias voltage reaches the maximum value and the characteristic peak is still not found, continue changing the bias in the opposite direction until the characteristic peak appears in the frequency discrimination signal, and then proceed to step c);

[0026] c) reducing the peak-to-peak voltage of the triangle wave and changing the bias of the triangle wave, so that the target voltage is always kept within the sweep voltage range of the triangle wave by maintaining the existence of the characteristic peak; when the peak-to-peak voltage of the triangle wave is reduced to within 20mV, proceed to step six;

[0027] Step 6, the program-controlled switch controlled by the FPGA switches the triangular wave signal to the first compensator, so that the triangular wave bias voltage and the phase-locked signal are compensated by the first compensator and added together to drive the PZT;

[0028] Step 7: The program-controlled switch controlled by the FPGA closes the second compensator loop switch, and the second compensator loop is connected to the DC feedback port;

[0029] Step eight, the programmable switch controlled by the FPGA closes the third compensator loop switch, and the third compensator loop is connected to the AC feedback port; finally, the output frequency of the slave laser is locked through a three-loop low-noise and high-dynamic response beat frequency phase-locked loop system.

[0030] The advantages and positive effects of the present invention are:

[0031] 1. The present invention adopts a master laser and a slave laser to generate a beat frequency signal through a photodetector; the phase detector adopts a digital phase detector and an analog phase detector, the digital phase detector has low noise but narrow bandwidth, and the analog phase detector has relatively high noise but wide bandwidth. The digital phase detector and the analog phase detector are combined to meet the system's demand for high dynamic characteristics; FPGA control is used to respectively generate DDS signals, triangular wave signals and DC voltage bias signals, and automatically complete the switching of open-loop voltage scanning and closed-loop phase locking modes without manual operation; the output light frequency of the master laser is used as a reference to accurately lock the output light frequency of the slave laser, and the frequency difference of the output light of the two lasers can be adjusted within a large range, thereby achieving high dynamic response and low noise control of the output light frequency of the slave laser.

[0032] 2. The present invention solves the problem of insufficient processing capability of high-frequency error signals by digital PID controllers in existing beat frequency phase-locked systems. It can realize automatic, fast and high-precision laser frequency locking without manual operation. The method of the present invention can be widely used in basic research and precision measurement technology fields such as laser cooling, atomic frequency standards and atomic interferometers. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 It is a schematic structural diagram of the overall design scheme of the loop compensation low-noise high-dynamic response beat frequency phase-locked loop system of the present invention;

[0034] Figure 2 It is a detailed schematic diagram of the compensation scheme of the three-loop compensation low-noise high-dynamic response beat frequency phase-locked loop system of the present invention;

[0035] Figure 3 It is a schematic diagram of the structure of the beat frequency phase-locked compensation loop system of the present invention;

[0036] Figure 4 This is a schematic diagram of the TYPE II compensator structure.

[0037] Figure 5 The Bode diagram of the designed compensator is shown in Figure 1. The frequency at which the phase margin reaches the maximum is the loop bandwidth f. o 0.1 times;

[0038] Figure 6 This is the Bode diagram of the beat frequency phase-locked compensation loop system after adding the designed compensator. The amplitude penetration frequency in the figure is 0.1 times the loop bandwidth, and the phase margin reaches the maximum at the amplitude penetration frequency. DETAILED DESCRIPTION

[0039] The structure of the present invention is further described below with reference to the accompanying drawings and by way of examples. It should be noted that the present examples are descriptive rather than restrictive.

[0040] A three-loop compensation low noise high dynamic response beat frequency phase-locked loop system, see Figure 1-Figure 6 , the invention point is: including a master laser, a slave laser, a photodetector, a local oscillator signal source, a mixer, a filter, a phase detector and a three-way loop compensator. Among them, the master laser and the slave laser output light to the photodetector to generate a beat frequency signal; the beat frequency signal and the local oscillator signal generated by the local oscillator signal source are first mixed by the mixer and then filtered by the filter and transmitted to the phase detector; the phase detector compares the phase of the beat frequency signal with the phase of the DDS reference signal generated by the FPGA to obtain a phase detection signal, wherein two digital phase detection signals and one analog phase detection signal, and the three phase detection signals are respectively transmitted to the three-way loop compensator; the three-way loop compensator compensates and filters the phase detection signal to obtain three compensation signals, and the compensation signal and the triangle wave scanning circuit are controlled by the programmable switch controlled by the FPGA to select the open-loop voltage scanning mode or the closed-loop phase detection mode. The open-loop voltage scanning mode is used to find the optimal initial operating frequency of the slave laser at the beginning of system power-on. By adjusting the DC bias voltage, the initial frequency signal of the slave laser is fed back to the slave laser to obtain the optimal initial operating frequency of the slave laser; the closed-loop phase locking mode is that after the open-loop voltage scanning mode is completed, the programmable switches controlled by the FPGA are closed in sequence to connect the three-way loop compensators to the feedback port of the slave laser, and the phase-locked signal after compensation filtering is fed back to the slave laser; the output of the three-way loop compensator adjusts the injection voltage and current of the slave laser, thereby adjusting the output frequency of the slave laser, and finally the beat frequency phase-locked loop realizes the output frequency and phase locking of the master-slave laser.

[0041] The above-mentioned phase detector adopts two types: digital phase detector and analog phase detector. The digital phase detector has low noise but narrow bandwidth, while the analog phase detector has relatively high noise but wide bandwidth. The digital phase detector and the analog phase detector are combined to meet the system's demand for high dynamic characteristics.

[0042] The above-mentioned DDS signal, triangle wave circuit, and DC bias voltage are all generated by the FPGA controller.

[0043] The beat frequency phase-locked loop system of the present invention can be equivalent to a first-order system. The first to third compensator design schemes of the three-loop compensator all adopt the scheme of combining TYPE II compensator with amplifier. The transfer function of TYPE II compensator is:

[0044]

[0045] The TYPE II compensator has two poles and one zero, where the pole ω p0 Position fixed, pole ω p1 and zero point ω z1 The position can be selected to design the compensator to improve the system performance.

[0046] The amplifier transfer function is the gain k given by ω p0 The parameters are fixed, and the compensator transfer function can be moved up and down in the Bode plot by changing the gain k.

[0047] The design goal of the loop compensator is: after adding the compensator, the amplitude-crossover frequency range of the transfer function Ho(s) of the beat frequency phase-locked loop system containing the compensator is between 0.1 and 0.5 times the loop bandwidth, and the phase margin is maximized.

[0048] The first compensator is a PZT loop feedback loop. Assume that the PZT loop feedback bandwidth is f1. To achieve the optimal compensation performance, the compensation loop pole ω p1 and zero point ω z1 The frequencies are set to: p 1 =2πfp1=0.1*2πf1,ω z1 =2πfz1=0.5*2πf1, and design a gain suitable for the loop to ensure that the amplitude crossover frequency of Ho(s) is in the range of 0.1-0.5 times the bandwidth of this loop, and the phase margin reaches the maximum at the amplitude crossover frequency.

[0049] The second compensator is the DC loop feedback loop. The DC loop feedback loop bandwidth is much higher than the PZT loop. Assuming the DC loop feedback bandwidth is f2, in order to achieve the optimal compensation performance, the compensation loop pole ω p1 and zero point ω z1 The frequencies are set to: p1 =2πfp1=0.1*2πf2,ω z1 =2πfz1=0.5*2πf2, and is suitable for the gain of the loop, ensuring that the amplitude penetration frequency of Ho(s) is in the range of 0.1-0.5 times the bandwidth of this loop, and the phase margin reaches the maximum at the amplitude penetration frequency.

[0050] The third compensator is the AC loop feedback loop. The AC loop feedback loop bandwidth is much higher than the PZT loop. Assuming the AC loop feedback bandwidth is f3, in order to achieve the best compensation performance, the pole ω of this compensation loop is set to p1 and zero point ω z1 The frequencies are set to: p1 =2πfp1=0.1*2πf3,ω z1 =2πfz1=0.5*2πf3, and is suitable for the gain of the loop, ensuring that the amplitude penetration frequency of Ho(s) is in the range of 0.1-0.5 times the bandwidth of this loop, and the phase margin reaches the maximum at the amplitude penetration frequency.

[0051] The present invention is based on the control method of the three-loop compensation low-noise high-dynamic response beat frequency phase-locked loop system, comprising the following steps:

[0052] Step 1, the master laser and the slave laser output light to a photodetector to generate a beat frequency signal;

[0053] Step 2: The beat frequency signal is mixed with the local oscillator signal generated by the local oscillator signal source and then transmitted to the phase detector after passing through a filter;

[0054] Step 3: The phase detector compares the phase of the beat frequency signal with the phase of the reference signal generated by the DDS to obtain three phase detection signals, including two digital phase detection signals and one analog phase detection signal.

[0055] Step 4, the three-way phase-locked signals are transmitted to the three-way loop compensators respectively, and the three-way loop compensators compensate and filter the phase-locked signals to obtain three-way compensation signals;

[0056] Step 5, FPGA outputs a full-scale triangle wave and detects whether the phase detector has a characteristic peak signal output. If there is a characteristic peak signal output, the program-controlled switch controlled by FPGA selects the open-loop voltage scanning mode and enters step a;

[0057] a) FPGA outputs a full voltage range triangle wave to drive PZT. The peak-to-peak value of the triangle wave is large, and the frequency of the laser in the corresponding frequency domain also changes periodically with the triangle wave voltage, forming a frequency scanning area; FPGA detects whether there is a characteristic peak of periodic change in the frequency discrimination signal. If no characteristic peak appears, it goes to step b. If there is a characteristic peak, it goes to step c;

[0058] b) Start changing the triangular wave bias voltage value in the positive voltage direction. When the bias voltage reaches the maximum value and the characteristic peak is still not found, continue changing the bias in the opposite direction until the characteristic peak appears in the frequency discrimination signal, and then proceed to step c);

[0059] c) reducing the peak-to-peak voltage of the triangle wave and changing the bias of the triangle wave, so that the target voltage is always kept within the sweep voltage range of the triangle wave by maintaining the existence of the characteristic peak; when the peak-to-peak voltage of the triangle wave is reduced to within 20mV, proceed to step six;

[0060] Step 6, the program-controlled switch controlled by the FPGA switches the triangular wave signal to the first compensator, so that the triangular wave bias voltage and the phase-locked signal are compensated by the first compensator and added together to drive the PZT;

[0061] Step 7: The program-controlled switch controlled by the FPGA closes the second compensator loop switch, and the second compensator loop is connected to the DC feedback port;

[0062] Step eight, the programmable switch controlled by the FPGA closes the third compensator loop switch, and the third compensator loop is connected to the AC feedback port; finally, the output frequency of the slave laser is locked through a three-loop low-noise and high-dynamic response beat frequency phase-locked loop system.

[0063] In summary, the present invention mixes the beat signal obtained by the beat frequency of the master laser and the slave laser with the local oscillator signal generated by the local oscillator signal source, and the mixed signal is low-pass filtered and input into the phase detector together with the reference signal generated by DDS, and the phase detector outputs the phase detection signal, and after the phase detection signal passes through the three-way loop compensator, the three-way compensation signal is respectively fed back to the three-way feedback port (PZT port, DC port and AC port) of the slave laser to realize the control of the output frequency of the slave laser; the three-way compensation module configures the zero-pole position of the system so that the loop performance can achieve fast response within the required bandwidth while having the characteristics of low noise; FPGA control is adopted to realize the generation of DDS signal, triangle wave signal and DC voltage bias signal respectively, and the switching of open-loop voltage scanning and closed-loop phase locking mode is automatically completed; the present invention can realize a Raman laser system with high bandwidth and low noise; the method of the present invention can be widely used in precision measurement fields such as laser cooling and atom interferometer.

[0064] Although the embodiments and drawings of the present invention are disclosed for illustrative purposes, those skilled in the art will appreciate that various substitutions, changes and modifications are possible without departing from the spirit and scope of the present invention and the appended claims. Therefore, the scope of the present invention is not limited to the contents disclosed in the embodiments and drawings.

Claims

1. A three-loop compensation low noise high dynamic response beat frequency phase-locked loop system, characterized by: include: A master laser, a slave laser, a photodetector, a local oscillator signal source, a mixer, a filter, a phase detector and a three-way loop compensator; wherein the master laser and the slave laser output light to the photodetector to generate a beat frequency signal; the beat frequency signal and the local oscillator signal generated by the local oscillator signal source are successively transmitted to the phase detector through the mixer and the filter; the phase detector is used to compare the phase of the beat frequency signal with the phase of the DDS reference signal generated by the FPGA to obtain a phase detection signal, wherein two digital phase detection signals and one analog phase detection signal, and the three phase detection signals are respectively transmitted to the three-way loop compensator; the three-way loop compensator is used to obtain three compensation signals after compensating and filtering the phase detection signals, and the compensation signals and the triangular wave scanning circuit are controlled by the programmable switch controlled by the FPGA. The control selects open-loop voltage scanning mode or closed-loop phase locking mode; the open-loop voltage scanning mode is used to find the optimal initial operating frequency of the slave laser at the initial stage of system power-on. The initial frequency signal of the slave laser is fed back to the slave laser by adjusting the DC bias voltage to obtain the optimal initial operating frequency of the slave laser; the closed-loop phase locking mode is that after the open-loop voltage scanning mode is completed, the programmable switches controlled by the FPGA are closed in sequence to connect the three-way loop compensator to the feedback port of the slave laser, and the phase-locked signal after compensation filtering is fed back to the slave laser. The output of the three-way loop compensator adjusts the injection voltage and current of the slave laser to realize the function of adjusting the output frequency of the slave laser. Finally, the beat frequency phase-locked loop realizes the output frequency and phase locking of the master-slave laser.

2. The three-loop compensation low noise high dynamic response beat frequency phase-locked loop system according to claim 1, characterized in that: The phase detector adopts two types: digital phase detector and analog phase detector.

3. The three-loop compensation low noise high dynamic response beat frequency phase-locked loop system according to claim 1, characterized in that: The DDS signal, triangle wave circuit and DC bias voltage are all generated by an FPGA controller.

4. The three-loop compensation low noise high dynamic response beat frequency phase-locked loop system according to claim 1, characterized in that: The beat frequency phase-locked loop system is equivalent to a first-order system. The first compensator, the second compensator and the third compensator of the three-way loop compensator all adopt the combination of TYPE II compensator and amplifier. The transfer function of TYPE II compensator is: The TYPE II compensator has two poles and one zero, where the pole ω p0 Position fixed, pole ω p1 and zero point ω z1 Locations available.

5. The three-loop compensation low noise high dynamic response beat frequency phase-locked loop system according to claim 4, characterized in that: The transfer function H of the beat frequency phase-locked loop system including three loop compensators o The amplitude penetration frequency of (s) ranges from 0.1 to 0.5 times of the loop bandwidth. The phase margin variation trend of the three-loop compensation low-noise high-dynamic response beat frequency phase-locked loop system near the amplitude penetration frequency is first increased and then decreased. p0 Ensure that the phase margin is at its maximum value.

6. The three-loop compensation low noise high dynamic response beat frequency phase-locked loop system according to claim 4, characterized in that: The first compensator is a PZT loop feedback loop. Assuming the PZT loop feedback bandwidth is f1, the compensation loop pole ω p1 and zero point ω z1 The frequencies are set to: p1 =2πf p1 =0.1*2πf1,ω z1 =2πf z1 =0.5*2πf1.

7. The three-loop compensation low noise high dynamic response beat frequency phase-locked loop system according to claim 4, characterized in that: The second compensator is a DC loop feedback loop. Assuming the DC loop feedback bandwidth is f2, the compensation loop pole ω p1 and zero point ω z1 The frequencies are set to: p1 =2πf p1 =0.1*2πf2,ω z1 =2πf z1 =0.5*2πf2.

8. The three-loop compensation low noise high dynamic response beat frequency phase-locked loop system according to claim 4, characterized in that: The third compensator is the AC loop feedback loop. Assuming the AC loop feedback bandwidth is f3, the pole of the compensation loop is ω p1 and zero point ω z1 The frequencies are set to: p1 =2πf p1 =0.1*2πf3,ω z1 =2πf z1 =0.5*2πf3.

9. A control method for a three-loop compensation low-noise high-dynamic response beat frequency phase-locked loop system based on any one of claims 1-8, comprising the following steps: Step 1, the master laser and the slave laser output light to a photodetector to generate a beat frequency signal; Step 2: The beat frequency signal is mixed with the local oscillator signal generated by the local oscillator signal source and then transmitted to the phase detector after passing through a filter; Step 3: The phase detector compares the phase of the beat frequency signal with the phase of the reference signal generated by the DDS to obtain three phase detection signals, including two digital phase detection signals and one analog phase detection signal. Step 4, the three-way phase-locked signals are transmitted to the three-way loop compensators respectively, and the three-way loop compensators compensate and filter the phase-locked signals to obtain three-way compensation signals; Step 5, FPGA outputs a full-scale triangle wave and detects whether the phase detector has a characteristic peak signal output. If there is a characteristic peak signal output, the program-controlled switch controlled by FPGA selects the open-loop voltage scanning mode and enters step a; a) FPGA outputs a full voltage range triangle wave to drive PZT. The peak-to-peak value of the triangle wave is large, and the frequency of the laser in the corresponding frequency domain also changes periodically with the triangle wave voltage, forming a frequency scanning area; FPGA detects whether there is a characteristic peak of periodic change in the frequency discrimination signal. If no characteristic peak appears, it goes to step b. If there is a characteristic peak, it goes to step c; b) Start changing the triangular wave bias voltage value in the positive voltage direction. When the bias voltage reaches the maximum value and the characteristic peak is still not found, continue changing the bias in the opposite direction until the characteristic peak appears in the frequency discrimination signal, and then proceed to step c); c) reducing the peak-to-peak voltage of the triangle wave and changing the bias of the triangle wave, so that the target voltage is always kept within the sweep voltage range of the triangle wave by maintaining the existence of the characteristic peak; when the peak-to-peak voltage of the triangle wave is reduced to within 20mV, proceed to step six; Step 6, the program-controlled switch controlled by the FPGA switches the triangular wave signal to the first compensator, so that the triangular wave bias voltage and the phase-locked signal are compensated by the first compensator and added together to drive the PZT; Step 7: The program-controlled switch controlled by the FPGA closes the second compensator loop switch, and the second compensator loop is connected to the DC feedback port; Step eight, the programmable switch controlled by the FPGA closes the third compensator loop switch, and the third compensator loop is connected to the AC feedback port; finally, the output frequency of the slave laser is locked through a three-loop low-noise and high-dynamic response beat frequency phase-locked loop system.

Images