Artificial synaptic device based on Ti / TaOx memristor and preparation method of artificial synaptic device

Abstract

The invention discloses an artificial synaptic device of a Ti / TaOx-based memristor and a preparation method of the artificial synaptic device, and belongs to the field of memristors. The artificial synapse device sequentially comprises a bottom electrode layer, a resistive function layer and a top electrode layer from bottom to top, the bottom electrode is TIN, the resistive random function layer is TaOx, the top electrode is Au, and the Ti intercalation layer is prepared by covering Ti on the TaOx layer by adopting an evaporation coating process before plating the top electrode; the Ti intercalation layer is introduced to serve as a thin buffer layer between the functional layer and the top electrode, and flowing of oxygen ions / vacancies can be adjusted, so that formation of conductive filaments is guided, and the memristor has more excellent electrical performance, lower working voltage, lower energy consumption and better stability and durability.

Description

Technical Field

[0001] The present invention belongs to the field of memristors, and specifically relates to a memristor based on Ti / TaO x Artificial synaptic device of memristor and preparation method thereof. Background Art

[0002] In recent years, with the rapid development of big data, the Internet of Things, cloud computing, and artificial intelligence (AI), traditional von Neumann architecture computers have become a major bottleneck due to their high power consumption and the physical separation of processors and storage units, which has led to data transmission and can no longer fully meet the needs of the information explosion era. To overcome these problems, the use of systems that mimic the human brain represents a widely explored solution. Neuromorphic systems simulate the organizational and operational characteristics of biological brains, making information processing between neurons and synapses efficient. Since neuromorphic computing can process large amounts of data in parallel, these interconnected neurons and synapses facilitate rapid information transfer, making information processing more efficient.

[0003] In 1971, Professor Shao-Tang Tsai of the University of California, Berkeley, theoretically proposed the fourth basic component, the memristor, which has shown great application potential in recent years. It has the advantages of high-speed computing capability, low power consumption and easy integration, and is perfectly compatible with the existing CMOS process, and is regarded as a strong competitor for the next generation of NVM. Moreover, the working principle of the memristor is similar to that of the neural synapse, so the memristor can not only be used as a storage device, but also perform neuromorphic computing tasks, opening up a new path for future neuromorphic devices.

[0004] At present, various transition metal oxides (TMOs) such as HfO2, TaO x 、Ti02、AIO x 、NiO x and ZrO x As the resistive switching functional layer, oxides are explored for application in neuromorphic memristors. Among them, oxides as the resistive switching functional layer of memristors have the advantages of high-speed switching, low energy consumption, easy deposition, high chemical inertness and compatibility with CMOS processes, and are considered to be brain-like neural devices with great development potential.

[0005] However, despite the many advantages of oxide-based memristors, these devices still face some challenges in commercial applications. The durability and stability of the devices are particularly important. For example, memristors may experience performance degradation after long-term operation or in extreme environments, which may be caused by factors such as material aging and unstable expansion of the conductance channel. This greatly limits the application and development of memristors in the field of brain-like computing. Summary of the invention

[0006] In view of the shortcomings of the prior art, the present invention aims to provide a Ti / TaO x An artificial synaptic device based on a memristor and a preparation method thereof, a memristor with simple structure and high performance is prepared by magnetron sputtering technology and thermal evaporation coating process.

[0007] The purpose of the present invention can be achieved by the following technical solutions:

[0008] Based on Ti / TaO x The artificial synaptic device based on memristor includes, from bottom to top, a substrate electrode layer, a resistive switching functional layer, and a top electrode layer; the bottom electrode is TIN, and the functional layer is TaO x The top electrode is Au. We added a Ti intercalation layer between the top electrode and the functional layer. The Ti intercalation layer is prepared by covering the tantalum oxide layer with Ti using a vapor deposition process before plating the top electrode.

[0009] Preferably, the top electrode is a cylindrical Au electrode with a diameter of 100 to 300 nm and a thickness of 30 nm.

[0010] Preferably, the functional layer has a thickness of 30 to 50 nm.

[0011] Preferably, the bottom electrode has a thickness of 30-50 nm.

[0012] The above-mentioned Ti / TaO-based x A method for preparing an artificial synaptic device of a memristor comprises the following steps:

[0013] Step 1: depositing a bottom electrode on the substrate layer by a DC magnetron sputtering method to form a bottom electrode layer;

[0014] Step 2, fixing the substrate with the bottom electrode deposited on a substrate stage of magnetron sputtering, placing it in the equipment cavity, and depositing tantalum oxide on the bottom electrode layer by radio frequency magnetron sputtering to form a functional layer;

[0015] Step 3, attaching a mask with a circular hole to the tantalum oxide layer, fixing it on a thermal evaporation sample stage, placing it in an evaporation chamber, evacuating the chamber, and depositing a 10 nm thick Ti film and a 30 nm thick Au top electrode by evaporation coating;

[0016] Step 4: anneal the prepared device at 500° C. for 200 seconds in a vacuum environment.

[0017] Preferably, the magnetron sputtering equipment chamber in step 2 is evacuated to 5×10 -4 Pa, and then Ar2 was passed into the chamber at a flow rate of 60sccm and a sputtering power of 60W.

[0018] Preferably, the chamber of the evaporation coating equipment in step 3 is evacuated to below 5×10-4Pa, and the sample stage is kept rotating at a speed of 1 to 10 rpm during the evaporation process, and the current is adjusted to maintain the coating rate.

[0019] Beneficial effects of the present invention

[0020] 1. The Ti / TaO-based x An artificial synaptic device of a memristor and a preparation method thereof, wherein tantalum oxide is used as a functional layer, a Ti intercalation layer is inserted between the top electrode functional layer to form a four-layer artificial synaptic device with the top electrode and the bottom electrode. The device has a simple structure, is easy to prepare, is compatible with CMOS tubes, and is suitable for large-scale preparation.

[0021] 2. The present invention proposes a Ti / TaO x The artificial synaptic device of memristor can simulate the characteristics of neural synapses well and apply them to high-performance neuromorphic computing, promoting the research and development of highly integrated brain-like chips.

[0022] 3. Titanium (Ti) in the present invention is a metal with high affinity for oxygen and is naturally considered to be an ideal oxygen storage material. The introduction of Ti intercalation makes the device respond faster and consume less power.

[0023] 4. The present invention introduces Ti / TaO x The double-layer structure is used as the resistive switching functional layer of the memristor. It uses the unique characteristics of oxygen-affinity materials to absorb TaO x The oxygen in the functional layer increases the oxygen vacancies in the functional layer, making it easier for conductive filaments to form, thereby reducing the operating voltage of the memristor, lowering power consumption, and providing better durability and stability. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0025] Figure 1 This is a structural diagram of the artificial synapse device in the present invention.

[0026] Figure 2 It is a logarithmic graph of 100 cycles of the artificial synaptic device of the present invention under 0V~5V~-5V~0V cyclic voltage scanning;

[0027] Figure 3Graph showing the Paired-Pulse Facilitation (PPF) index of the artificial synaptic device of the present invention;

[0028] Figure 4 It is a characteristic diagram of the long-term potentiation (LTP) of the artificial synaptic device of the present invention under increasing pulses and the long-term depression (LTD) under decreasing pulses;

[0029] Figure 5 An exponential graph of the spiking-timing-dependent plasticity (STDP) simulated by the artificial synaptic device of the present invention.

[0030] Figure 6 It is the visualization result of 50 training cycles of MNIST handwritten digit recognition using an artificial neural network constructed using Pytorch based on the long-term characteristics of the present invention. DETAILED DESCRIPTION

[0031] The specific technical scheme of the present invention is described clearly and completely below in conjunction with the drawings in the examples of the present invention to help understand the present invention. The examples described are only some examples and do not constitute a limitation of the present invention. In the following experimental methods, unless otherwise specified, they are all conventional methods, and the experimental consumables used, unless otherwise specified, can be obtained through normal commercial channels.

[0032] Example 1

[0033] refer to Figure 1 , is a TaO prepared in this example x The base thin film memristor, from bottom to top, is the bottom electrode TIN set on the substrate, the functional layer TaO x , intercalation Ti, top electrode Au. The substrate is a silicon wafer coated with a layer of SiO2.

[0034] TaO x The method for preparing the artificial synaptic device is as follows:

[0035] (1) Preparation of bottom electrode:

[0036] Take out the magnetron sputtering substrate stage, fix a 2-inch silicon oxide wafer on the substrate stage, put the substrate stage into the working chamber, and evacuate the vacuum to a pressure of 6×10 -4Pa, DC magnetron sputtering was used, the target material was TIN target, and the working parameters were adjusted as follows: sputtering power was 120W, the gas pressure was 0.4pa after passing Ar2, the substrate table rotation rate was 15rpm, the target baffle was opened to expose the sample to the glow, and sputtering was performed for 900s to obtain a 30nm thick TIN bottom electrode.

[0037] (2) Take out the silicon wafer after the bottom electrode is plated, cut it into 1*1 cm size, tape an area to reserve the bottom electrode, and then fix it on the substrate stage of magnetron sputtering. Put the substrate stage with the substrate into the chamber, evacuate to 5×10-4Pa, use radio frequency magnetron sputtering, and use Ta2O5 target material. Adjust its working parameters as follows: sputtering power is 50W, gas pressure is 0.1Pa after passing Ar2, open the target baffle, make the sample contact with the glow, and sputter for 420s to obtain TaO5 with a thickness of about 35nm. x Functional layer.

[0038] (3) Preparation of intercalation layer: fix a metal mask with a 200 μm diameter circular hole on the substrate with the functional layer, then fix it on the sample stage of evaporation coating, put it into the evaporation coating chamber, and evacuate to 5×10 -4 Pa, set the sample speed to 5 rpm, adjust the current, and keep the evaporation rate at After the preparation of the Ti intercalation layer with a thickness of 10 nm is completed, the sample stage is not removed and a 30 nm thick Au top electrode is prepared by the same evaporation coating method. After completion, the sample stage is removed and the prepared sample is removed.

[0039] (4) Place the prepared sample in a rapid annealing furnace and set the annealing parameters: heating rate of 5°C / s, heating to 500°C, and holding for 200s. After annealing, the device Au / Ti / TaO x / TIN preparation.

[0040] Example 2

[0041] In this embodiment, the device prepared in Example 1 was subjected to electrical performance and pulse tests using a Keithley 1500 semiconductor analyzer. Figure 1 As shown, the top electrode and the bottom electrode of the device are connected through a semiconductor analyzer, and the IV characteristic curve is shown in Figure 2 As shown, the scanning voltage is 0V~5V~0V~-5V~0V for one cycle, and there are 100 scans in total. It can be seen that the device has stable performance and a stable on-off ratio.

[0042] Figure 3The double pulse facilitation (PPF) index diagram of the artificial synaptic device prepared in Example 1 is shown, wherein the PPF index is obtained by applying the low read pulse stimulation before and after the paired pulse and the calculation formula PPF = (G2-G1) / G1×100%, G2 is the conductance read by the low read pulse after, and G1 is the conductance read by the low read pulse before. △▲t is the time interval between the stimulation pulses.

[0043] Figure 4 The long-term potentiation (LTP) and long-term depression (LTD) characteristics of the artificial synaptic device prepared in Example 1 are shown. We applied 20 continuous pulses with a starting pulse amplitude of 0.1V, a time interval of 1ms, and a pulse with the latter pulse being 0.1V larger than the previous pulse to the device, and the conductance of the device gradually increased with the increase in the number of pulses. On the contrary, we applied 20 continuous pulses with a starting pulse amplitude of 2V, a time interval of 1ms, and a pulse with the latter pulse being 0.1V smaller than the previous pulse, and the conductance of the device increased and decreased with the increase and decrease in the number of pulses. The long-term characteristics of the synapse were successfully simulated.

[0044] Figure 5 The discharge time-dependent plasticity of the artificial synaptic device prepared in Example 1 is shown. A pulse is applied to the top electrode and the bottom electrode respectively, and there is a certain time interval between the two pulses. When the pulse of the top electrode is faster than the pulse of the bottom electrode, the conductance of the device increases, and when the pulse of the top electrode is slower than the pulse of the bottom electrode, the conductance of the device decreases. This is consistent with the antisymmetric Hebbian learning rule.

[0045] Figure 6 The figure shows the handwriting recognition accuracy of the artificial neural network built with Pytorch. The data set is the MNIST handwriting data set. It can be found that there is a fast convergence feature overall, that is, the accuracy reaches 90.36% after the 9th round of training, and the final accuracy reaches 96.5%.

[0046] It is worth noting that the application of the present application is not limited to the above examples. For ordinary technicians in this field, improvements or changes can be made based on the above description, and all these improvements or changes should fall within the scope of protection of the claims attached to this application.

Claims

1. Based on Ti / TaO x An artificial synaptic device based on a memristor, characterized in that From bottom to top, it includes: substrate electrode layer, resistive switching functional layer, top electrode layer; the bottom electrode is TIN, the functional layer is TaO x , the top electrode is Au; a Ti intercalation layer is set between the top electrode and the functional layer.

2. The Ti / TaO-based x An artificial synaptic device based on a memristor, characterized in that The top electrode is a cylindrical Au electrode with a diameter of 100 to 300 nm and a thickness of 30 nm.

3. The Ti / TaO based method according to claim 1 x An artificial synaptic device based on a memristor, characterized in that The Ti intercalation layer is prepared by covering the tantalum oxide layer with Ti using an evaporation process before plating the top electrode.

4. The Ti / TaO based method according to claim 1 x An artificial synaptic device based on a memristor, characterized in that The thickness of the functional layer is 30-50 nm.

5. The Ti / TaO based method according to claim 1 x An artificial synaptic device based on a memristor, characterized in that The bottom electrode has a thickness of 30 to 50 nm.

6. The Ti / TaO-based x A method for preparing an artificial synaptic device of a memristor, characterized in that: The following steps are involved: Step 1, depositing a bottom electrode on the substrate layer by a DC magnetron sputtering method to form a bottom electrode layer; Step 2, fixing the substrate on which the bottom electrode is deposited on a substrate stage of magnetron sputtering, and depositing tantalum oxide on the bottom electrode layer by radio frequency magnetron sputtering to form a functional layer; Step 3, attaching a mask plate with a circular hole on the tantalum oxide layer, and depositing a 10 nm thick Ti film and a 30 nm thick Au top electrode by evaporation coating in a vacuum environment; Step 4: annealing at 500° C. for 200 seconds in a vacuum environment.

7. The preparation method according to claim 6, characterized in that: The magnetron sputtering in step 2 specifically includes: evacuating the chamber of the equipment to a vacuum of 5×10 -4 Below Pa, Ar2 was then passed into the chamber with a flow rate of 60sccm and a sputtering power of 60W.

8. The preparation method according to claim 6, characterized in that: The vacuum environment in step 3 is specifically evacuated to below 5×10-4Pa. During the evaporation coating process, the sample stage is kept rotating at a speed of 1 to 10 rpm, and the coating rate is kept at

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