Linear continuous coating method for improving N-surface field passivation effect of heterojunction battery

Abstract

The invention relates to the technical field of SHJ battery microcrystal coating, in particular to a linear continuous coating method for improving the N-surface field passivation effect of a heterojunction battery, which comprises the following steps of: S1, presetting the temperature of a PECVD (Plasma Enhanced Chemical Vapor Deposition) cavity to 200-260 DEG C, and feeding an N-type monocrystalline silicon wafer into the PECVD cavity; s2, the phase angle of a pair of independent power supplies in the HPT power supply and the passivation power supply is set to be 0-180 degrees; s3, starting a first HPT power supply; s4, starting a first passivation power supply, and obtaining an N1 layer on the surface of the N-type monocrystalline silicon wafer; then repeating the steps to obtain an N2 layer and an N3 layer in sequence; step S9, the N-type monocrystalline silicon wafer with the passivated N layer is sent out of the PECVD cavity; according to the invention, an electromagnetic field is formed by using a power supply with a phase angle of 0-180 degrees, the deposition area is controlled while the coating rate is accelerated, and meanwhile, due to the fact that the deposition area is controlled by the electromagnetic field, the effect of N-layer gradient doping in a single cavity is realized.

Description

Technical Field

[0001] The invention relates to the technical field of SHJ cell microcrystalline coating, and in particular to a linear continuous coating method for improving the N-side field passivation effect of a heterojunction cell. Background Art

[0002] The traditional HJT cell structure first deposits a very thin intrinsic amorphous silicon film (ia-Si:H) and an N-type amorphous silicon film (na-Si:H) on the front of an N-type single crystal silicon wafer (c-Si), and then deposits a very thin intrinsic amorphous silicon film (ia-Si:H) and a P-type amorphous silicon film (pa-Si:H) on the back of the silicon wafer to form a back surface field; then a transparent oxide conductive film (TCO) is deposited on both sides of the cell, and finally a metal electrode is made on the TCO.

[0003] The current technical solution for the N side in the market is: after the carrier enters the chamber, the temperature is raised to about 200 degrees, H2 / SiH4 is introduced, and then a certain ratio of doping gas PH3 is introduced, and the appropriate power is turned on for deposition. The carrier is stationary during the coating process because N doping requires gradient doping. After N1 is deposited, the chamber gas is evacuated (to prevent the gas from entering the next chamber), the chamber valve is opened, and the carrier enters the next chamber to continue to deposit N2, N3, etc. in the same way. Because the N layer requires gradient doping, multiple chambers are required for the process, which increases equipment cost and coating time. The same chamber on the market cannot achieve the entire N layer gradient doping process.

[0004] Therefore, how to overcome the problem that the existing microcrystalline coating process cannot perform multi-layer gradient doping in a single cavity is a technical problem that urgently needs to be solved in this field. Summary of the invention

[0005] The present invention provides a linear continuous coating method for improving the field passivation effect of the N-side of a heterojunction battery, so as to solve the problem that the existing N-layer passivation process requires static deposition in multiple chambers.

[0006] In a first aspect, the embodiment of the present disclosure provides a linear continuous coating method for improving the field passivation effect of the N-side of a heterojunction battery, comprising the following steps: step S1, presetting the temperature of the PECVD chamber to 200-260°C, and feeding an N-type single crystal silicon wafer into the PECVD chamber; step S2, setting the phase angle of a pair of independent power supplies in the HPT power supply and the passivation power supply to 0°-180°; step S3, starting the first HPT power supply, passing 1000-3000sccm of H2, setting the power of the electromagnetic field to 100-500W, and the PEC The end pressure of the VD chamber is set to 60-90Pa; Step S4, start the first passivation power supply, pass 500-2000sccm of H2, 100-300sccm of SiH4 and 50-100sccm of PH3, the power of the electromagnetic field is set to 500-2000W, and the N1 layer is obtained on the surface of the N-type single crystal silicon wafer. The end pressure of the PECVD chamber is set to 60-90Pa; Step S5, start the second HPT power supply, pass 1000-3000sccm of H2, and the power of the electromagnetic field is set to 100 -500W, the terminal pressure of the PECVD chamber is set to 60-90Pa; step S6, start the second passivation power supply, pass 500-2000sccm of H2, 100-300sccm of SiH4 and 100-300sccm of PH3, the power of the electromagnetic field is set to 500-2000W, and an N2 layer is obtained on the surface of the N-type single crystal silicon wafer. The terminal pressure of the PECVD chamber is set to 60-90Pa; step S7, start the third HPT power supply, pass 1000-3000sccm of H2, the electromagnetic field The power of the field is set to 100-500W, and the end pressure of the PECVD chamber is set to 60-90Pa; step S8, start the third passivation power supply, pass 500-2000sccm of H2, 100-300sccm of SiH4 and 100-500sccm of PH3, the power of the electromagnetic field is set to 500-2000W, and an N3 layer is obtained on the surface of the N-type single crystal silicon wafer. The end pressure of the PECVD chamber is set to 60-90Pa; step S9, send the N-layer passivated N-type single crystal silicon wafer out of the PECVD chamber.

[0007] In an optional implementation, the method further includes: step S10, performing a minority carrier lifetime test to screen out N-layer passivated N-type single crystal silicon wafers with a minority carrier lifetime of less than 5000 us.

[0008] In an optional implementation, the thickness of the N1 layer is 0.5-5 nm.

[0009] In an optional embodiment, the thickness of the N2 layer is 0.5-5 nm.

[0010] In an optional embodiment, the thickness of the N3 layer is 4-15 nm.

[0011] In the second aspect, an embodiment of the present disclosure provides a linear continuous coating device, which is applied to the coating of heterojunction solar cells by a PECVD coating device using the linear continuous coating method as described above, the linear continuous coating device comprising: a coating module, arranged above the interior of a PECVD chamber, for performing PECVD deposition and electromagnetic field guidance simultaneously in accordance with the interval arrangement of an HPT power supply and a passivation power supply, wherein the HPT power supply and the passivation power supply are each provided with a pair of independent power supplies with a phase angle set to 0°-180°; a transmission module, arranged below the interior of the PECVD chamber, for transmitting a carrier loaded with an N-type single crystal silicon wafer through the PECVD chamber via a roller.

[0012] In an optional implementation, the number of the HPT power supplies and the passivation power supplies is no less than three.

[0013] In an optional implementation, the power of the HPT power supply is 100-500W; the power of the passivation power supply is 500-2000W.

[0014] In an optional embodiment, at least one process pump is provided at the end of the coating module.

[0015] In a third aspect, an embodiment of the present disclosure provides a linear continuous coating system, comprising a linear continuous coating device as described above, and a heterojunction cell, wherein the linear continuous coating device is used to deposit N layers of passivation film on the heterojunction cell.

[0016] The beneficial effect of the present invention is that the linear continuous coating method for improving the field passivation effect of the N-side of a heterojunction battery has the following advantages:

[0017] 1. Using a power supply with a phase angle of 0°-180° to form an electromagnetic field, the deposition area is controlled while the coating rate is accelerated. At the same time, because the deposition area is controlled by the electromagnetic field, the effect of N-layer gradient doping in a single chamber is achieved, which greatly improves the process efficiency and reduces the gas loss caused by N-type single crystal silicon wafers entering and leaving each chamber;

[0018] 2. The addition of HPT power source can not only increase the hydrogen atom injection but also etch away the unqualified surface film layer, thereby further improving the minority carrier lifetime.

[0019] Other features and advantages of the present invention will be described in the following description, and partly become apparent from the description, or understood by practicing the present invention. The purpose and other advantages of the present invention are realized and obtained by the structures particularly pointed out in the description and the drawings.

[0020] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, preferred embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0022] Figure 1 A schematic diagram of the structure of a heterojunction battery involved in an embodiment of the present disclosure;

[0023] Figure 2 It is a schematic structural diagram of the linear continuous coating device involved in the embodiment of the present disclosure.

[0024] In the figure:

[0025] 1. PECVD chamber; 21. First HPT power supply; 22. First passivation power supply; 23. Second HPT power supply; 24. Second passivation power supply; 25. Third HPT power supply; 26. Third passivation power supply; 31. First gas inlet; 32. Second gas inlet; 33. Third gas inlet; 34. Fourth gas inlet; 35. Fifth gas inlet; 36. Sixth gas inlet; 4. Roller; 5. Carrier; 6. Gate valve; 7. Process pump. DETAILED DESCRIPTION

[0026] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0027] HPT means

[0028] PECVD refers to plasma enhanced chemical vapor deposition.

[0029] like Figure 1As shown, the current technical solution for the N side in the market is: after the carrier enters the chamber, the temperature is raised to about 200 degrees, H2 / SiH4 is introduced, and then a certain ratio of doping gas PH3 is introduced, and the appropriate power is turned on for deposition. The carrier is stationary during the coating process because N doping requires gradient doping. After N1 is deposited, the chamber gas is evacuated (to prevent the gas from entering the next chamber), the chamber valve is opened, and the carrier enters the next chamber to continue to deposit N2, N3, etc. in the same way. Because the N layer requires gradient doping, multiple chambers are required for the process, which increases equipment cost and coating time. The same chamber on the market cannot achieve the entire N layer gradient doping process.

[0030] The defects existing in the above solutions are the results obtained by the inventor after practice and careful research. Therefore, the discovery process of the above problems and the solutions proposed by the present disclosure for the above problems below should be the contributions made by the inventor to the present disclosure during the disclosure process.

[0031] Based on the above research, the embodiment of the present disclosure provides a linear continuous coating method for improving the field passivation effect of the N-side of a heterojunction battery, comprising the following steps: step S1, presetting the temperature of the PECVD chamber to 200-260°C, and feeding an N-type single crystal silicon wafer into the PECVD chamber; step S2, setting the phase angle of a pair of independent power supplies in the HPT power supply and the passivation power supply to 0°-180°; step S3, starting the first HPT power supply, introducing 1000-3000sccm of H2, setting the power of the electromagnetic field to 100-500W, and the end pressure of the PECVD chamber to 100-180°; step S4, starting the first HPT power supply, and passing 1000-3000sccm of H2. The power of the electromagnetic field is set to 100-500W, and the end pressure of the PECVD chamber is set to 100-180°. The pressure at the end of the PECVD chamber is set to 60-90Pa; Step S4, start the first passivation power supply, pass 500-2000sccm of H2, 100-300sccm of SiH4 and 50-100sccm of PH3, set the power of the electromagnetic field to 500-2000W, obtain the N1 layer on the surface of the N-type single crystal silicon wafer, and set the end pressure of the PECVD chamber to 60-90Pa; Step S5, start the second HPT power supply, pass 1000-3000sccm of H2, set the power of the electromagnetic field to 100-500W, and set the end pressure of the PECVD chamber to is 60-90Pa; step S6, start the second passivation power supply, pass 500-2000sccm of H2, 100-300sccm of SiH4 and 100-300sccm of PH3, set the power of the electromagnetic field to 500-2000W, obtain an N2 layer on the surface of the N-type single crystal silicon wafer, and set the terminal pressure of the PECVD chamber to 60-90Pa; step S7, start the third HPT power supply, pass 1000-3000sccm of H2, set the power of the electromagnetic field to 100-500W, and set the terminal pressure of the PECVD chamber to 60-90Pa; Step S8, start the third passivation power supply, pass 500-2000sccm of H2, 100-300sccm of SiH4 and 100-500sccm of PH3, set the power of the electromagnetic field to 500-2000W, obtain an N3 layer on the surface of the N-type single crystal silicon wafer, and set the end pressure of the PECVD chamber to 60-90Pa; Step S9, send the N-layer passivated N-type single crystal silicon wafer out of the PECVD chamber; Step S10, perform a minority carrier lifetime test to screen out the N-layer passivated N-type single crystal silicon wafer with a minority carrier lifetime less than 5000us.

[0032] In the embodiment of the present disclosure, specifically, the thickness of the N1 layer is 0.5-5 nm, the thickness of the N2 layer is 0.5-5 nm, and the thickness of the N3 layer is 4-15 nm.

[0033] In the embodiments of the present disclosure, specifically, the power supply power, electromagnetic field and phase angle are adjusted respectively to obtain the parameters and performances of Example 1 and Comparative Examples 1-3, as shown in Tables 1 to 4 below, wherein Table 1 shows the first HPT power supply and the first passivation power supply parameters of Example 1 and Comparative Examples 1-3, Table 2 shows the second HPT power supply and the second passivation power supply parameters of Example 1 and Comparative Examples 1-3, Table 3 shows the third HPT power supply and the third passivation power supply parameters of Example 1 and Comparative Examples 1-3, and Table 4 shows the performance test results of Example 1 and Comparative Examples 1-3.

[0034] Table 1

[0035]

[0036] Table 2

[0037]

[0038] Table 3

[0039]

[0040] Table 4

[0041]

[0042] In the embodiments of the present disclosure, specifically, the unit of the gas introduction amount in Example 1 and Comparative Examples 1-3 is sccm.

[0043] In the embodiments disclosed herein, specifically, by comparing Example 1 with Comparative Example 1, it can be seen that the addition of the HPT process can effectively improve the minority carrier lifetime, but the electromagnetic field and phase angle are still the main influencing factors on the improvement of the minority carrier lifetime.

[0044] In the embodiments disclosed herein, specifically, by comparing Embodiment 1 with Comparative Examples 2 and 3, it can be seen that good gradient doping cannot be formed without a phase angle and an electromagnetic field, and without field passivation, the minority carrier lifetime will be severely reduced.

[0045] See also Figure 2 , Figure 2 A linear continuous coating device is shown, which is applied to the coating of heterojunction solar cells by PECVD coating equipment using the linear continuous coating method as described above, and the linear continuous coating device includes: a coating module, which is arranged above the inside of a PECVD chamber 1, and performs PECVD deposition and electromagnetic field guidance in sequence according to the interval arrangement of an HPT power supply and a passivation power supply, wherein the HPT power supply and the passivation power supply are each provided with a pair of independent power supplies with a phase angle set to 0°-180°; a transmission module, which is arranged below the inside of the PECVD chamber 1, and is used to transmit a carrier 5 loaded with an N-type single crystal silicon wafer through the PECVD chamber 1 via a roller 4.

[0046] In the embodiment of the present disclosure, specifically, the number of the HPT power supply and the passivation power supply is not less than three.

[0047] In the embodiment of the present disclosure, specifically, the power of the HPT power supply is 100-500W; the power of the passivation power supply is 500-2000W.

[0048] In the disclosed embodiment, specifically, at least one process pump 7 is provided at the end of the coating module. Since only one chamber is provided, only one process pump at the tail end is required to control the direction and pressure of the airflow, and no gate valve is required in the middle, so the equipment cost is greatly reduced.

[0049] In the embodiment of the present disclosure, specifically, the first gas inlet 31 is suitable for performing vapor deposition operations within the electromagnetic field range after the first HPT power supply 21 is started, the second gas inlet 32 ​​is suitable for performing vapor deposition operations within the electromagnetic field range after the first passivation power supply 22 is started, the third gas inlet 33 is suitable for performing vapor deposition operations within the electromagnetic field range after the second HPT power supply 23 is started, the fourth gas inlet 34 is suitable for performing vapor deposition operations within the electromagnetic field range after the second passivation power supply 24 is started, the fifth gas inlet 35 is suitable for performing vapor deposition operations within the electromagnetic field range after the third HPT power supply 25 is started, and the sixth gas inlet 36 is suitable for performing vapor deposition operations within the electromagnetic field range after the third passivation power supply 26 is started.

[0050] The disclosed embodiment also provides a linear continuous coating system, comprising the linear continuous coating device as described above, and a heterojunction cell, wherein the linear continuous coating device is used to deposit N layers of passivation film on the heterojunction cell.

[0051] In summary, the present invention utilizes a power supply with a phase angle of 0°-180° to form an electromagnetic field, which controls the deposition area while also accelerating the coating rate. At the same time, since the deposition area is controlled by the electromagnetic field, the effect of N-layer gradient doping is achieved in a single cavity, which greatly improves the process efficiency and reduces the gas loss caused by the N-type single crystal silicon wafer entering and exiting each chamber.

[0052] In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.

[0053] Based on the above ideal embodiments of the present invention, the relevant staff can make various changes and modifications without departing from the technical concept of the present invention through the above description. The technical scope of the present invention is not limited to the contents of the specification, and its technical scope must be determined according to the scope of the claims.

Claims

1. A linear continuous coating method for improving the field passivation effect of the N-side of a heterojunction battery, characterized in that: The steps include: Step S1, preset the temperature of the PECVD chamber to 200-260° C., and place an N-type single crystal silicon wafer into the PECVD chamber; Step S2, setting the phase angle of a pair of independent power supplies in the HPT power supply and the passivation power supply to 0°-180°; Step S3, start the first HPT power supply, introduce 1000-3000 sccm of H2, set the power of the electromagnetic field to 100-500 W, and set the end pressure of the PECVD chamber to 60-90 Pa; Step S4, start the first passivation power supply, introduce 500-2000 sccm of H2, 100-300 sccm of SiH4 and 50-100 sccm of PH3, set the power of the electromagnetic field to 500-2000 W, obtain an N1 layer on the surface of the N-type single crystal silicon wafer, and set the end pressure of the PECVD chamber to 60-90 Pa; Step S5, start the second HPT power supply, introduce 1000-3000 sccm of H2, set the power of the electromagnetic field to 100-500 W, and set the end pressure of the PECVD chamber to 60-90 Pa; Step S6, start the second passivation power supply, introduce 500-2000 sccm of H2, 100-300 sccm of SiH4 and 100-300 sccm of PH3, set the power of the electromagnetic field to 500-2000 W, obtain an N2 layer on the surface of the N-type single crystal silicon wafer, and set the terminal pressure of the PECVD chamber to 60-90 Pa; Step S7, start the third HPT power supply, introduce 1000-3000 sccm of H2, set the power of the electromagnetic field to 100-500 W, and set the end pressure of the PECVD chamber to 60-90 Pa; Step S8, start the third passivation power supply, introduce 500-2000 sccm of H2, 100-300 sccm of SiH4 and 100-500 sccm of PH3, set the power of the electromagnetic field to 500-2000 W, obtain an N3 layer on the surface of the N-type single crystal silicon wafer, and set the terminal pressure of the PECVD chamber to 60-90 Pa; Step S9, sending the N-type single crystal silicon wafer with N-layer passivation out of the PECVD chamber.

2. The linear continuous coating method for improving the field passivation effect of the N-side of a heterojunction battery according to claim 1, characterized in that: Also includes: Step S10, performing a minority carrier lifetime test to screen out N-layer passivated N-type single crystal silicon wafers with a minority carrier lifetime of less than 5000 us.

3. The linear continuous coating method for improving the field passivation effect of the N-side of a heterojunction battery according to claim 1, characterized in that: The thickness of the N1 layer is 0.5-5 nm.

4. The linear continuous coating method for improving the field passivation effect of the N-side of a heterojunction battery according to claim 1, characterized in that: The thickness of the N2 layer is 0.5-5 nm.

5. The linear continuous coating method for improving the field passivation effect of the N-side of a heterojunction battery according to claim 1, characterized in that: The thickness of the N3 layer is 4-15 nm.

6. A linear continuous coating device, characterized in that: Applicable to the coating of heterojunction solar cells by a PECVD coating device using the linear continuous coating method according to any one of claims 1 to 5, the linear continuous coating device comprising: The coating module is located above the inside of the PECVD chamber, and performs PECVD deposition and electromagnetic field guidance in accordance with the interval setting of the HPT power supply and the passivation power supply. The HPT power supply and the passivation power supply are both provided with a pair of independent power supplies with a phase angle set to 0°-180°; The transmission module is arranged at the lower part of the PECVD chamber and is used to transmit the carrier loaded with N-type single crystal silicon wafers through the PECVD chamber through rollers.

7. The linear continuous coating device according to claim 6, characterized in that: The number of the HPT power supplies and the passivation power supplies is no less than three.

8. The linear continuous coating device according to claim 6, characterized in that: The power of the HPT power supply is 100-500W; The power of the passivation power supply is 500-2000W.

9. The linear continuous coating device according to claim 6, characterized in that: At least one process pump is arranged at the end of the coating module.

10. A linear continuous coating system, characterized in that: It comprises the linear continuous coating device as described in claims 6-9, and a heterojunction battery cell, wherein the linear continuous coating device is used to deposit N layers of passivation film on the heterojunction battery cell.

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