Special implementation method for position-independent executable file
By mapping two sets of address spaces on the CPU hardware and adding address offset registers, the efficiency and space problems of traditional PIE during loading are solved, and the function of using position-dependent and position-independent addresses is realized, reducing memory costs.
Patent Information
- Application Number
- CN202311054628.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-08-21
- Publication Date
- 2025-02-21
AI Technical Summary
Traditional position-independent executable files (PIEs) require modification of the global offset table (GOT) when loading, resulting in an increase in loading time, an increase in file size, and the inability to use both position-dependent and position-independent addresses.
Address-independent executable file loading and execution is achieved by mapping two different sets of address spaces to the same memory space on the CPU hardware and adding a settable address offset register to the bus controller of one of the addresses.
This enables no need to deal with complex GOTs during executable loading, saves storage space, reduces memory costs, and allows the use of both location-dependent and location-independent addresses in one executable file.
Smart Images
Figure CN119493740A_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the field of computer technology, and particularly relates to a special implementation method of a position-independent executable file. Background Art
[0002] In the computer field, a position-independent executable (PIE) is a type of code that can be correctly executed at any location in the memory without being affected by its absolute address, so that the same code can be loaded into different address spaces and run correctly.
[0003] Since programs need to run in multiple different address spaces, code that can be loaded directly without relocation, i.e. position-independent code, has emerged. This is mainly because the distance between the data segment and the code segment always remains the same regardless of where the target program is loaded in memory. Therefore, the distance between any instruction in the code segment and any variable in the data segment is a constant at runtime, regardless of the absolute memory location where the code and data are loaded.
[0004] PIE does not use absolute addresses for jump and branch instructions in the code but uses GOT. PIE establishes a global offset table, namely GOT, in the data segment of the ELF executable image to store all global variable pointers. When an absolute address needs to be accessed, first use the relative address to find the GOT table, and then use the table entry content of the GOT table as the address for indirect addressing. GOT is a mapping table, and the content here is the address mapping of the absolute address referenced in this section of code, which needs to be rewritten after the code is loaded. For example, when a printf function is used, it is loaded to address 1000, then there will be an address 1000 here, like this:
[0005] .Got
[0006] Symbolic Address
[0007] printf 1000
[0008] Therefore, each time it is loaded to a different address, all the addresses corresponding to the symbols in the GOT need to be modified according to the currently loaded address.
[0009] However, the traditional method of using GOT has the following main problems:
[0010] 1. It is necessary to modify the content of GOT according to the different allocation addresses when the executable file is loaded, which is time-consuming and laborious;
[0011] 2. Inserting GOT into the executable file increases the size of the executable file and occupies more storage space;
[0012] 3. Position-dependent and position-independent addresses cannot be used simultaneously in an executable file.
[0013] In addition, common terms in the prior art include:
[0014] UNIX: An operating system that appeared in the early 1970s. In addition to being a network operating system, it can also be used as a stand-alone operating system. It is mainly used in engineering applications and scientific computing.
[0015] ELF: It is a public standard file format definition for executable files, object codes, shared libraries, and kernel exports, and is widely used in UNIX-like systems.
[0016] PIE: Position-independent executable. The so-called position-independent executable means that the code of the executable program can be loaded into any location of the memory, and the CPU obtains instructions and data through relative addresses. If it is not a position-independent executable, the code of the executable program must be placed in a specific location before it can be run.
[0017] GOT: Global Offset Table. It is a table that stores the addresses of data fields. It is used by executable programs to view the runtime addresses of global variables, whose addresses are unknown during the compilation phase. During the program loading phase, the GOT is updated.
[0018] MIPS: It is a very popular RISC processor in the world. MIPS means "a microprocessor without internal interlocked pipeline stages, whose mechanism is to use software methods to avoid data-related problems in the pipeline as much as possible. It was first developed by a research team led by Professor Hennessy of Stanford University in the early 1980s. MIPS is one of the earliest commercial RISC architecture chips. Summary of the invention
[0019] In order to solve the above problems, the purpose of this application is to propose an innovative method for loading and executing executable files, which can use both position-related addresses and position-independent addresses by combining software and hardware. This method can achieve:
[0020] 1. During the executable file loading process, there is no need to process the complex GOT;
[0021] 2. It does not occupy extra storage space in the executable file;
[0022] 3. In one executable file, position-dependent and position-independent addresses can be used at the same time.
[0023] The present invention mainly comprises:
[0024] 1. Map two different address spaces to the same memory space on the CPU hardware;
[0025] 2. During the CPU addressing process, a settable address offset register is added to the bus controller of one of the addresses, and the bus control machine adds the offset to the address each time the address is accessed.
[0026] Specifically, the present invention provides a special implementation method of a position-independent executable file, in which two sets of buses exist on CPU hardware, and two sets of different address spaces are mapped to the same space of a memory, that is, the two sets of different address spaces are respectively recorded as address A and address B, and address A and address B are pointed to the same address in the same memory, and an address offset register B_OFFSET is added to one of the buses of address B. Each time the CPU accesses through address B, the bus controller will add address B to the value in the address offset register B_OFFSET, and use the result of the addition as a new address to access the memory; when the CPU is started, the boot program inside the CPU loads the software program to be executed into the memory, and at this time, the boot program writes the offset of the current loading address into the B_OFFSET register through the CPU store instruction; therefore, address A is address-dependent, that is, the CPU needs to use address A when executing the program loaded into the memory with an absolute address; address B is address-independent, that is, the position where the current software to be executed is loaded into the memory can be ignored, and instructions and data in the memory are always accessed based on address 0.
[0027] The instruction segment of the software to be executed can use address A, so that the position of the instruction segment in the memory remains unchanged. The instruction segment of the software to be executed can also use address B, so that the instruction segment can be loaded to any position in the memory; the data referenced in the software to be executed can use address A, so that the position of the data in the memory remains unchanged. The data referenced in the software to be executed can also use address B, so that the data can be loaded to any position in the memory. When the addresses of the instruction segment and the data segment do not conflict, the usage of the instruction segment and the data can be freely combined.
[0028] The method is based on a specific implementation of a MIPS architecture CPU and includes the following steps:
[0029] S1, MIPS CPU divides the physical address into IO area and memory area, where the physical address 0x1000000~0x1fffffff, a total of 256MB, is used as the IO area, and the rest of the physical addresses are memory addresses and connected to the storage;
[0030] When the memory is larger than 256MB, a hole space appears because the address of 0x1000000~0x1fffffff cannot be received. This part of the space cannot be accessed and is wasted. Therefore, the memory address of the MIPS CPU is remapped when it is connected to the memory. The mapping rules are shown in Table 1. This method makes up for the memory area hole caused by the IO area. From area 1 and area 2 in Table 1, it can be found that the physical addresses 0x0000000~0x0fffffff and 0x20000000~0x2fffffff actually correspond to 0x0000000~0x0fffffff in the memory. Therefore, only in the lower 256MB area, the requirement of mapping two different sets of addresses to the same memory space is met; other areas are not satisfied.
[0031] Table 1
[0032]
[0033]
[0034] S2, adding an address offset register for storing the address offset to the controller on the bus that issues the physical address 0x00000000 to 0x0fffffff;
[0035] S3, each time the CPU sends an address request from the bus, the bus controller needs to add the value in the address offset register to the address; the program to be executed is loaded into the memory by the boot program solidified inside the CPU, and then the boot program writes the offset address loaded this time into the address offset register through the store instruction. Therefore, in the area 0x00000000~0x0fffffff, the CPU can always use the offset based on the 0 address to address; use the area 0x20000000~0x2fffffff to address in an absolute address manner. Access to the same memory area.
[0036] Therefore, the advantages of the present application are that position-dependent and position-independent addresses can be used simultaneously in one executable file, and GOT is not inserted into the executable file, thus saving storage space and reducing memory costs. BRIEF DESCRIPTION OF THE DRAWINGS
[0037] The drawings described herein are used to provide a further understanding of the present invention, constitute a part of this application, and do not constitute a limitation of the present invention.
[0038] Figure 1 It is a structural diagram of the system involved in the present application method.
[0039] Figure 2 This is a schematic diagram of the specific method of this application based on the MIPS architecture CPU. DETAILED DESCRIPTION
[0040] In order to more clearly understand the technical content and advantages of the present invention, the present invention is now further described in detail in conjunction with the accompanying drawings.
[0041] The specific embodiment of the present application is a special implementation method of an address-independent executable file, such as Figure 1 As shown, the method has two sets of buses on the CPU hardware, and maps two sets of different address spaces to the same space of the memory, that is, the two sets of different address spaces are respectively recorded as address A and address B, and address A and address B point to the same address in the same memory, and an address offset register B_OFFSET is added to the bus of one set of address B. Each time the CPU accesses through address B, the bus controller will add address B to the value in the address offset register B_OFFSET, and use the added result as a new address to access the memory; when the CPU is started, the boot program inside the CPU loads the software program to be executed into the memory, and at this time, the boot program writes the offset of the current loading address into the B_OFFSET register through the CPU store instruction; therefore, address A is address-dependent, that is, the CPU needs to use address A when executing the program loaded into the memory with an absolute address; address B is address-independent, that is, the location where the current software to be executed is loaded into the memory can be ignored, and instructions and data in the memory are always accessed based on address 0.
[0042] The instruction segment of the software to be executed may use address A, so that the position of the instruction segment in the memory remains unchanged, and the instruction segment of the software to be executed may also use address B, so that the instruction segment can be loaded into any position of the memory; the data referenced in the software to be executed may use address A, so that the position of the data in the memory remains unchanged, and the data referenced in the software to be executed may also use address B, so that the data can be loaded into any position of the memory. In the case where the addresses of the instruction segment and the data segment do not conflict, the usage of the instruction segment and the data can be freely combined.
[0043] like Figure 2 As shown, the method is based on a specific implementation of a MIPS architecture CPU and includes the following steps:
[0044] S1, MIPS CPU divides the physical address into IO area and memory area, where the physical address 0x1000000~0x1fffffff, a total of 256MB, is used as the IO area, and the rest of the physical addresses are memory addresses and connected to the storage;
[0045] When the memory is larger than 256MB, a hole space appears because the address of 0x1000000~0x1fffffff cannot be received. This part of the space cannot be accessed and is wasted. Therefore, the memory address of the MIPS CPU is remapped when it is connected to the memory. The mapping rules are shown in Table 1. This method makes up for the memory area hole caused by the IO area. From area 1 and area 2 in Table 1, it can be found that the physical addresses 0x0000000~0x0fffffff and 0x20000000~0x2fffffff actually correspond to 0x0000000~0x0fffffff in the memory. Therefore, only in the lower 256MB area, the requirement of mapping two different sets of addresses to the same memory space is met; other areas are not satisfied.
[0046] Table 1
[0047] area Physical Address Remapped physical address 1 0x00000000~0x0fffffff 0x00000000~0x0fffffff 2 0x20000000~0x2fffffff 0x00000000~0x0fffffff 3 0x30000000~0xffffffff 0x10000000~0xffffffff
[0048] S2, adding an address offset register for storing the address offset to the controller on the bus that issues the physical address 0x00000000 to 0x0fffffff;
[0049] S3, each time the CPU sends an address request from the bus, the bus controller needs to add the value in the address offset register to the address; the program to be executed is loaded into the memory by the boot program solidified inside the CPU, and then the boot program writes the offset address loaded this time into the address offset register through the store instruction. Therefore, in the area 0x00000000~0x0fffffff, the CPU can always use the offset based on the 0 address to address; use the area 0x20000000~0x2fffffff to address in an absolute address manner. Access to the same memory area.
[0050] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the embodiments of the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.
Claims
1. A special implementation method of a position-independent executable file, characterized in that: The method has two groups of buses on the CPU hardware, and maps the two groups of different address spaces to the same space of the memory, that is, the two groups of different address spaces are respectively recorded as address A and address B, and address A and address B point to the same address in the same memory, and an address offset register B_OFFSET is added to the bus of one group of address B. Each time the CPU accesses through address B, the bus controller will add address B to the value in the address offset register B_OFFSET, and use the added result as a new address to access the memory; when the CPU is started, the boot program inside the CPU loads the software program to be executed into the memory, and at this time, the boot program writes the offset of the current loading address into the B_OFFSET register through the CPU store instruction; therefore, address A is address-dependent, that is, the CPU needs to use address A when executing the program loaded into the memory with an absolute address; address B is address-independent, that is, the position where the current software to be executed is loaded into the memory can be ignored, and instructions and data in the memory are always accessed based on address 0.
2. A special implementation method of a position-independent executable file according to claim 1, characterized in that: The instruction segment of the software to be executed can use address A, so that the position of the instruction segment in the memory remains unchanged. The instruction segment of the software to be executed can also use address B, so that the instruction segment can be loaded to any position in the memory; the data referenced in the software to be executed can use address A, so that the position of the data in the memory remains unchanged. The data referenced in the software to be executed can also use address B, so that the data can be loaded to any position in the memory; when the addresses of the instruction segment and the data segment do not conflict, the usage of the instruction segment and the data can be freely combined.
3. The special implementation method of a position-independent executable file according to claim 1, characterized in that: The method is based on the specific implementation of MIPS architecture CPU. The following steps are involved: S1, MIPS CPU divides the physical address into IO area and memory area, where the physical address 0x1000000~0x1fffffff, a total of 256MB, is used as the IO area, and the rest of the physical addresses are memory addresses and connected to the storage; When the memory is larger than 256MB, a hole space appears because the address of 0x1000000~0x1fffffff cannot be received. This part of the space cannot be accessed and is wasted. Therefore, the memory address of the MIPS CPU is remapped when it is connected to the memory. The mapping rules are shown in Table 1. This method makes up for the memory area hole caused by the IO area. From area 1 and area 2 in Table 1, it can be found that the physical addresses 0x0000000~0x0fffffff and 0x20000000~0x2fffffff actually correspond to 0x0000000~0x0fffffff in the memory. Therefore, only in the lower 256MB area, the requirement of mapping two different sets of addresses to the same memory space is met; other areas are not satisfied. Table 1 S2, adding an address offset register for storing the address offset to the controller on the bus that issues the physical address 0x00000000 to 0x0fffffff; S3, each time the CPU sends an address request from the bus, the bus controller needs to add the value in the address offset register to the address; the program to be executed is loaded into the memory by the boot program solidified inside the CPU, and then the boot program writes the offset address loaded this time into the address offset register through the store instruction, so in the area 0x00000000~0x0fffffff, the CPU can always use the offset based on the 0 address for addressing; use the area 0x20000000~0x2fffffff to address in an absolute address manner; access the same memory area.