Method and device for establishing ferroelectric capacitance model in PDK, equipment and medium

Abstract

The invention discloses a method, device and equipment for establishing a ferroelectric capacitor model in a PDK and a medium. The method comprises the following steps: extracting a PDK specification definition table of a ferroelectric capacitor based on simulation influence; wherein the PDK specification definition table comprises specification indexes and formula definitions; defining a component description format parameter of the parameterized unit of the ferroelectric capacitor, and determining a callback function corresponding to the component description format parameter according to the specification index; determining a netlist function of the ferroelectric capacitor on a simulation information definition interface of the parameterization unit, and adding a structural layer of the ferroelectric capacitor in the PDK; and compiling and creating a plurality of parameterized units of the ferroelectric capacitor in a parameterized unit library of the PDK. According to the method, the ferroelectric capacitance model can be embedded into the parameterization unit in the PDK, so that the ferroelectric capacitance model can be stably and efficiently applied to an actual engineering project, and the practicability of the PDK can be improved. The circuit can be widely applied to the technical field of circuit design.

Description

Technical Field

[0001] The present application relates to the field of circuit design technology, and in particular to a method, device, equipment and medium for establishing a ferroelectric capacitor model in a PDK. Background Art

[0002] With the development of new materials and new devices and the demand for integrated circuit design, more and more people want to use the characteristics of ferroelectric materials to design integrated circuits. Ferroelectric material is a new material. Because its manufacturing process is compatible with the standard integrated circuit manufacturing process and its characteristics are suitable for making capacitors, ferroelectric materials mostly exist as capacitor devices in integrated circuit design.

[0003] Process Design Kit (PDK) is a commonly used toolkit in circuit design. It is a collection of files and data used for integrated circuit design under specific process technology. It is a key bridge between integrated circuit design and manufacturing, ensuring that the design can be efficiently and accurately transformed into actual products. However, the existing PDKs often do not include devices made of ferroelectric materials, making it difficult to apply related devices to integrated circuit design and having poor practicality.

[0004] Therefore, the problems existing in the prior art still need to be solved and optimized. Summary of the invention

[0005] The purpose of this application is to solve one of the technical problems existing in the related art to at least a certain extent.

[0006] To this end, an object of an embodiment of the present application is to provide a method, apparatus, device and medium for establishing a ferroelectric capacitor model in a PDK.

[0007] In order to achieve the above technical objectives, the technical solutions adopted by the embodiments of the present application include:

[0008] On the one hand, an embodiment of the present application provides a method for establishing a ferroelectric capacitor model in a PDK, the method comprising:

[0009] Extracting a PDK specification definition table of ferroelectric capacitors based on simulation impact; wherein the PDK specification definition table includes specification indicators and formula definitions;

[0010] Defining a component description format parameter of a parameterized unit of the ferroelectric capacitor, and determining a callback function corresponding to the component description format parameter according to the specification index;

[0011] Determine the netlist function of the ferroelectric capacitor in the simulation information definition interface of the parameterized unit, and add the structural layer of the ferroelectric capacitor in the PDK;

[0012] In the parameterized cell library of the PDK, multiple parameterized cells of the ferroelectric capacitor are compiled and created.

[0013] In addition, according to the method for establishing a ferroelectric capacitor model in a PDK according to the above embodiment of the present application, the following additional technical features may also be provided:

[0014] Further, in one embodiment of the present application, the PDK specification definition table for extracting ferroelectric capacitance based on simulation influence includes:

[0015] Establish a simulated ferroelectric capacitor model through Spice circuit;

[0016] According to the ferroelectric capacitor model, a PDK specification definition table corresponding to the ferroelectric capacitor is extracted.

[0017] Further, in one embodiment of the present application, the component description format parameters of the parameterization unit defining the ferroelectric capacitor include:

[0018] At least one of parameter name, parameter type, parameter default value, parameter editing control, parameter display control and parameter callback of the component description format parameter is obtained.

[0019] Further, in one embodiment of the present application, the structural layer of adding the ferroelectric capacitor in the PDK includes:

[0020] Modify the associated files in the PDK and add the structural layer of the ferroelectric capacitor;

[0021] Among them, the associated files include DRC, LVS, ERC, ANT, and PEX files.

[0022] Further, in one embodiment of the present application, the structural layers of the ferroelectric capacitor include a PV layer, a PP layer, a FECAP layer, a NP layer, a NV layer, a TM layer and a BM layer.

[0023] Furthermore, in one embodiment of the present application, the method further includes:

[0024] The drawing layout of the ferroelectric capacitor is determined according to the component description format parameters of the parameterization unit of the ferroelectric capacitor.

[0025] Further, in one embodiment of the present application, the compilation creates a plurality of parameterized units of the ferroelectric capacitor, including:

[0026] The symbol unit, simulation unit, layout unit and layout schematic comparison unit of the ferroelectric capacitor are compiled and created.

[0027] On the other hand, an embodiment of the present application provides a device for establishing a ferroelectric capacitor model in a PDK, the device comprising:

[0028] An extraction unit, used to extract a PDK specification definition table of a ferroelectric capacitor based on simulation influence; wherein the PDK specification definition table includes specification indicators and formula definitions;

[0029] A definition unit, used to define a component description format parameter of a parameterization unit of the ferroelectric capacitor, and determine a callback function corresponding to the component description format parameter according to the specification index;

[0030] An adding unit, used for determining a netlist function of a ferroelectric capacitor in a simulation information definition interface of the parameterized unit, and adding a structural layer of the ferroelectric capacitor in a PDK;

[0031] The processing unit is used to compile and create a plurality of parameterized units of the ferroelectric capacitor in the parameterized unit library of the PDK.

[0032] On the other hand, an embodiment of the present application provides a computer device, including:

[0033] at least one processor;

[0034] at least one memory for storing at least one program;

[0035] When the at least one program is executed by the at least one processor, the at least one processor implements the above-mentioned method of establishing a ferroelectric capacitor model in the PDK.

[0036] On the other hand, an embodiment of the present application further provides a computer-readable storage medium, which stores a program executable by a processor. When the program executable by the processor is executed by the processor, it is used to implement the above-mentioned method of establishing a ferroelectric capacitor model in the PDK.

[0037] The advantages and benefits of the present application will be partially given in the following description, and partially become apparent from the following description, or be understood through the practice of the present application:

[0038] The embodiment of the present application discloses a method for establishing a ferroelectric capacitor model in a PDK, extracting a PDK specification definition table of a ferroelectric capacitor based on simulation effects; wherein the PDK specification definition table includes specification indicators and formula definitions; defining component description format parameters of the parameterized unit of the ferroelectric capacitor, and determining the callback function corresponding to the component description format parameters according to the specification indicators; determining the netlist function of the ferroelectric capacitor in the simulation information definition interface of the parameterized unit, and adding the structural layer of the ferroelectric capacitor in the PDK; in the parameterized unit library of the PDK, compiling and creating multiple parameterized units of the ferroelectric capacitor. This method can embed the ferroelectric capacitor model into the parameterized unit in the PDK, thereby ensuring that the ferroelectric capacitor model can be stably and efficiently applied to actual engineering projects, and can improve the practicality of the PDK. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following introduction is made to the drawings of the embodiments of the present application or the related technical solutions in the prior art. It should be understood that the drawings introduced below are only for the convenience of clearly describing some embodiments of the technical solutions of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without paying any creative work.

[0040] Figure 1 A schematic diagram of a flow chart of a method for establishing a ferroelectric capacitor model in a PDK provided in an embodiment of the present application;

[0041] Figure 2 A schematic cross-sectional view of a ferroelectric capacitor process structure provided in an embodiment of the present application;

[0042] Figure 3 A schematic diagram of a ferroelectric capacitor compatible with a standard CMOS process provided in an embodiment of the present application;

[0043] Figure 4 A drawing layout of a ferroelectric capacitor provided in an embodiment of the present application;

[0044] Figure 5 A schematic diagram of the structure of a computer device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0045] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application is further described in detail below in conjunction with the accompanying drawings and examples. It should be understood that the specific embodiments described herein are only used to explain the present application and are not intended to limit the present application. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the embodiments of the present application. They are only examples of devices and methods consistent with some aspects of the embodiments of the present application as detailed in the attached claims.

[0046] It is understood that the terms "first", "second", etc. used in this application can be used to describe various concepts in this article, but unless otherwise specified, these concepts are not limited by these terms. These terms are only used to distinguish one concept from another concept. For example, without departing from the scope of the embodiment of the present application, the first information may also be referred to as the second information, and similarly, the second information may also be referred to as the first information. Depending on the context, the words "if" and "if" as used herein can be interpreted as "at the time of" or "when" or "in response to determination".

[0047] The terms "at least one", "multiple", "each", "any", etc. used in this application, at least one includes one, two or more, multiple includes two or more, each refers to each of the corresponding multiple, and any refers to any one of the multiple.

[0048] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein are only for the purpose of describing the embodiments of this application and are not intended to limit this application.

[0049] 1) Process Design Kit (PDK) is a toolkit commonly used in circuit design. It is a collection of files and data used to design integrated circuits under specific process technologies.

[0050] 2) CDF (Component Description Format) is a standardized format for describing the characteristics of electronic components. It is mainly used in the design and manufacturing of integrated circuits. CDF files provide a structured way to record and transmit key information about electronic components, including electrical characteristics, geometric dimensions, manufacturing process parameters, etc. CDF plays an important role in the modern integrated circuit design process, especially in PDK (Process Design Kit) management.

[0051] 3) PCell (Parameterized Cell), Parameterized Cell (PCell) is a technology widely used in integrated circuit design, which allows designers to automatically generate a specific circuit structure through a set of parameters. The concept of PCell is very important in modern EDA (electronic design automation) tools because it greatly improves design efficiency and flexibility.

[0052] With the development of new materials and new devices and the demand for integrated circuit design, more and more people want to use the characteristics of ferroelectric materials to design integrated circuits. Ferroelectric material is a new material. Because its manufacturing process is compatible with the standard integrated circuit manufacturing process and its characteristics are suitable for making capacitors, ferroelectric materials mostly exist as capacitor devices in integrated circuit design.

[0053] Process Design Kit (PDK) is a commonly used toolkit in circuit design. It is a collection of files and data used for integrated circuit design under specific process technology. It is a key bridge between integrated circuit design and manufacturing, ensuring that the design can be efficiently and accurately transformed into actual products. However, the existing PDKs often do not include devices made of ferroelectric materials, making it difficult to apply related devices to integrated circuit design and having poor practicality.

[0054] In view of this, a method for establishing a ferroelectric capacitor model in PDK is provided in an embodiment of the present application, and a PDK specification definition table based on simulation influence of the ferroelectric capacitor is extracted; wherein the PDK specification definition table includes specification indicators and formula definitions; the component description format parameters of the parameterized unit of the ferroelectric capacitor are defined, and the callback function corresponding to the component description format parameters is determined according to the specification indicators; the netlist function of the ferroelectric capacitor is determined in the simulation information definition interface of the parameterized unit, and the structural layer of the ferroelectric capacitor is added in the PDK; in the parameterized unit library of the PDK, multiple parameterized units of the ferroelectric capacitor are compiled and created. This method can embed the ferroelectric capacitor model into the parameterized unit in the PDK, thereby ensuring that the ferroelectric capacitor model can be stably and efficiently applied to actual engineering projects, and the practicality of the PDK can be improved.

[0055] Please refer to Figure 1 , Figure 1 is a flow chart of a method for establishing a ferroelectric capacitor model in a PDK provided in an embodiment of the present application, with reference to Figure 1 A method for establishing a ferroelectric capacitor model in a PDK provided in the present application includes but is not limited to:

[0056] Step 110, extracting a PDK specification definition table of ferroelectric capacitors based on simulation effects; wherein the PDK specification definition table includes specification indicators and formula definitions;

[0057] Step 120, defining a component description format parameter of a parameterized unit of the ferroelectric capacitor, and determining a callback function corresponding to the component description format parameter according to the specification index;

[0058] Step 130, determining a netlist function of a ferroelectric capacitor in a simulation information definition interface of the parameterized unit, and adding a structural layer of the ferroelectric capacitor in a PDK;

[0059] Step 140, determining a drawing layout of the ferroelectric capacitor according to a component description format parameter of a parameterization unit of the ferroelectric capacitor;

[0060] Step 150: In the parameterized cell library of the PDK, compile and create a plurality of parameterized cells of the ferroelectric capacitor.

[0061] In an embodiment of the present application, a method for establishing a ferroelectric capacitor model in a PDK is provided, and the method can embed a ferroelectric capacitor in the PDK, which can help IC circuit designers fully consider the impact of the ferroelectric capacitor in the overall circuit, thereby ensuring that the quality and performance of the final chip meet the requirements and have better practicality. The method provided in an embodiment of the present application relates to the implementation of a PDK parameterized unit, and is a design method for implementing a layout dependency of a parameterized unit, by developing a PDK that embeds a ferroelectric capacitor model into a parameterized unit, thereby ensuring that the ferroelectric capacitor model can be stably and efficiently applied to actual engineering projects.

[0062] In the embodiment of the present application, the PDK (Process Design Kit) specification definition table of the ferroelectric capacitor is extracted by a simulation tool, and based on the specification indicators and formula definitions in these specification definition tables, the corresponding parameterized units are generated. Specifically, when establishing a ferroelectric capacitor model, first, the PDK specification definition table based on the simulation of the ferroelectric capacitor can be extracted, and then the component description format parameters of the ferroelectric capacitor can be determined, and a callback function can be generated, as well as the netlist function of the ferroelectric capacitor, and the structural layer of the ferroelectric capacitor is added in the PDK, so as to draw the drawing layout of the ferroelectric capacitor, and compile and create multiple parameterized units of the ferroelectric capacitor in the parameterized unit library of the PDK.

[0063] Specifically, in step 110, various performance indicators and mathematical expressions of the ferroelectric capacitor can be obtained by using a simulation tool. The type of simulation tool here can be arbitrary and is not limited by this application. For example, in some embodiments, the PDK specification definition table for extracting the ferroelectric capacitor based on the simulation effect includes:

[0064] Establish a simulated ferroelectric capacitor model through Spice circuit;

[0065] According to the ferroelectric capacitor model, a PDK specification definition table corresponding to the ferroelectric capacitor is extracted.

[0066] In the embodiment of the present application, a simulated ferroelectric capacitor model can be established using a Spice circuit. Spice (Simulation Program with Integrated Circuit Emphasis) is a widely used circuit simulation program. In the embodiment of the present application, various characteristics of ferroelectric capacitors can be obtained through experiments, and then the basic equations of the Spice model can be constructed to obtain a simulated ferroelectric capacitor model. Then, a PDK specification definition table can be extracted from the simulated ferroelectric capacitor model, which can specifically include the specification indicators and formula definitions of the ferroelectric capacitor.

[0067] In the embodiment of the present application, the component description format parameters of the parameterized unit of the ferroelectric capacitor can be predefined, for example, they can include cdf name (CDF parameter name), data type (CDF parameter type), default value (CDF parameter default value), editable (CDF parameter editing control), display (CDF parameter display control), callback (CDF parameter callback) and other properties (property), and the present application does not limit this. In the embodiment of the present application, the callback function corresponding to the component description format parameter can be determined according to the specification index, which can specifically include: checking whether the input value of the parameter meets the Spec; according to the input value of a parameter, calculating and setting another parameter value related to it.

[0068] In the embodiment of the present application, the netlist function of the ferroelectric capacitor can be determined in the simulation information definition interface of the parameterized unit, and the structural layer of the ferroelectric capacitor can be added in the PDK. Specifically, in the embodiment of the present application, the structural layer of the ferroelectric capacitor can be added by modifying the relevant associated files in the PDK, and the associated files here can include but are not limited to files such as DRC, LVS, ERC, ANT, PEX, etc. Then, in the embodiment of the present application, multiple parameterized units that generate ferroelectric capacitors can be compiled and created in the parameterized unit library of the PDK. Exemplarily, the parameterized units here can include but are not limited to symbolview (symbol unit), simulation view (simulation unit, including Spectre View, Hspice View), LayoutView (layout unit) and auCdl view (unit used to make LVS (layout schematic diagram comparison)), etc., and the present application does not limit this.

[0069] It should be noted that, in the embodiment of the present application, before compiling and creating multiple parameterized units for generating ferroelectric capacitors, the drawing layout of the ferroelectric capacitor can also be determined based on the component description format parameters of the parameterized units of the ferroelectric capacitor.

[0070] Please refer to Figure 2 , Figure 2 A schematic cross-sectional view of a ferroelectric capacitor process structure provided in an embodiment of the present application is shown. In the embodiment of the present application, the structural layers of the ferroelectric capacitor may include a PV layer, a PP layer, a FECAP layer, a NP layer, a NV layer, a TM layer and a BM layer, wherein the meaning of each layer is as follows:

[0071] TM:Top Metal

[0072] PV: Positive Via is a through hole connecting the top plate of the ferroelectric capacitor and the top metal layer;

[0073] PP: Positive Plate ferroelectric capacitor upper plate;

[0074] FECAP: ferroelectric thin film;

[0075] NP: Negative Plate ferroelectric capacitor bottom plate;

[0076] NV: Negative Via is a through hole connecting the lower plate of the ferroelectric capacitor and the underlying metal;

[0077] BM:Bottom Metal

[0078] In the embodiment of the present application, the three-layer structure of the PP layer, the FECAP layer, and the NP layer constitutes a ferroelectric capacitor; the TM layer and the BM layer are the metal layer / active layer / gate of the standard integrated circuit process; the PV layer and the NV layer are through holes that connect the upper and lower plates of the ferroelectric capacitor to the standard process metal layer / active layer / gate.

[0079] For ferroelectric capacitors, PDK affects the main parameters of ferroelectric capacitor model simulation, taking the effective area as an example:

[0080] The layout of the ferroelectric capacitor is shown in a top view. PDK can regard the effective area of ​​the FECAP layer as the effective area of ​​the ferroelectric capacitor, which can be simplified to:

[0081] Effective area S = FECAP_W × FECAP_W FECAP_L;

[0082] Set the callback function, such as the maximum and minimum values ​​of W and L of the FECAP layer:

[0083] When the W and L of the FECAP layer exceed the maximum / minimum value, it will automatically adjust to the maximum / minimum value, i.e. if(FECAP_W<0.5 then FECAP~>W~>value="0.5u")

[0084] if(FECAP_W>100 then FECAP~>W~>value="100u")

[0085] if(FECAP_L<0.5 then FECAP~>L~>value="0.5u")

[0086] if(FECAP_L>100 then FECAP~>L~>value="100u")

[0087] In the simulation information definition interface of the ferroelectric capacitor parameterized unit, define the netlist function of the ferroelectric capacitor, such as: parameter matching of simulation units such as ams, auCdl, auLvs, HspiceD, spectre, etc., so that when the layout / symbol input parameters, the simulation unit can be matched, identified and called. FECAP_W=W, FECAP_L=L, according to the above content, you can set the compilation to create multiple units in the ferroelectric capacitor parameterized unit library, including symbol units, simulation units and layout units.

[0088] Please refer to Figure 3 , Figure 3 A schematic diagram showing a ferroelectric capacitor compatible with a standard CMOS process provided in an embodiment of the present application is shown. Figure 3 The numbers 1-9 in the figure are all different forms of ferroelectric capacitors. In the embodiment of the present application, in order to meet the process manufacturing requirements of different forms of ferroelectric capacitors, the layout unit of the ferroelectric capacitor may include layers describing TM, PV, PP, FECAP, NP, NV, and BM, and the CDF parameters of the ferroelectric capacitor PCell control these layers:

[0089] FECAP_W = input parameter;

[0090] FECAP_L = input parameter;

[0091] TM = Metal1 / Metal2 / Metal3 / active layer / gate;

[0092] BM = Metal1 / Metal2 / Metal3 / active layer / gate;

[0093] PV = Contact / Via1 / Via2;

[0094] NV = Contact / Via1 / Via2;

[0095] PP_W=FECAP_W / input other parameters;

[0096] PP_L=FECAP_L / input other parameters;

[0097] NP_W=FECAP_W / input other parameters;

[0098] NP_L=FECAP_L / input other parameters;

[0099] S=FECAP_W×FECAP_WFECAP_L.

[0100] For example, to show more clearly, Figure 3 Take the No. 5 ferroelectric capacitor as an example to draw its corresponding drawing layout, such as Figure 4 shown.

[0101] It is understandable that, in the embodiment of the present application, a method for embedding a ferroelectric capacitor model into a PDK is provided, and a ferroelectric capacitor can be embedded in the PDK, which can help IC circuit designers to fully consider the impact of the called device in the overall circuit. The present application can realize the display of the ferroelectric capacitor model in the form of circuit devices, layouts, and simulation elements, which is convenient for designers to use in simulation and design of different scenarios, and can be applied to PDK-compatible integration including but not limited to CMOS processes, SOI processes, and BCD processes, and can draw drawing layouts of various forms of ferroelectric capacitors.

[0102] In an embodiment of the present application, a device for establishing a ferroelectric capacitor model in a PDK is also provided, including:

[0103] An extraction unit, used to extract a PDK specification definition table of a ferroelectric capacitor based on simulation influence; wherein the PDK specification definition table includes specification indicators and formula definitions;

[0104] A definition unit, used to define a component description format parameter of a parameterization unit of the ferroelectric capacitor, and determine a callback function corresponding to the component description format parameter according to the specification index;

[0105] An adding unit, used for determining a netlist function of a ferroelectric capacitor in a simulation information definition interface of the parameterized unit, and adding a structural layer of the ferroelectric capacitor in a PDK;

[0106] The processing unit is used to compile and create a plurality of parameterized units of the ferroelectric capacitor in the parameterized unit library of the PDK.

[0107] It can be understood that the contents of the above method embodiments are all applicable to the present device embodiments, the functions specifically implemented by the present device embodiments are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above method embodiments.

[0108] Reference Figure 5 , an embodiment of the present application provides a computer device, including:

[0109] at least one processor 210;

[0110] At least one memory 220, used to store at least one program;

[0111] When at least one program is executed by at least one processor 210, at least one processor 210 implements Figure 1 A method for establishing a ferroelectric capacitor model in PDK is shown.

[0112] Similarly, the contents of the above method embodiments are all applicable to the present computer device embodiment. The functions specifically implemented by the present computer device embodiment are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above method embodiments.

[0113] The embodiment of the present application further provides a computer-readable storage medium, in which a program executable by the processor 210 is stored. When the program executable by the processor 210 is executed by the processor 210, it is used to execute the above-mentioned method of establishing a ferroelectric capacitor model in the PDK.

[0114] The present application also discloses a computer-readable storage medium in which a program executable by a processor is stored. When the program executable by the processor is executed by the processor, it is used to implement the following Figure 1 An embodiment of a method for establishing a ferroelectric capacitor model in PDK is shown.

[0115] It is understandable that if Figure 1 The contents of the embodiment of a method for establishing a ferroelectric capacitor model in a PDK shown in the figure are applicable to the embodiment of the computer-readable storage medium. The functions specifically implemented by the embodiment of the computer-readable storage medium are similar to those in the embodiment of the computer-readable storage medium. Figure 1 The method for establishing a ferroelectric capacitor model in a PDK is the same as that shown in the embodiment, and the beneficial effects achieved are the same as those of the embodiment shown in the embodiment. Figure 1 The beneficial effects achieved by the embodiment of the method for establishing a ferroelectric capacitor model in a PDK are also the same.

[0116] In some selectable embodiments, the function / operation mentioned in the block diagram may not occur in the order mentioned in the operation diagram. For example, depending on the function / operation involved, the two boxes shown in succession can actually be executed substantially simultaneously or the boxes can sometimes be executed in reverse order. In addition, the embodiment presented and described in the flow chart of the application is provided by way of example, for the purpose of providing a more comprehensive understanding of technology. The disclosed method is not limited to the operation and logic flow presented herein. Selectable embodiments are expected, wherein the order of various operations is changed and the sub-operation of a part described as a larger operation is performed independently.

[0117] In addition, although the present application is described in the context of functional modules, it should be understood that, unless otherwise specified, one or more of the functions and / or features can be integrated into a single physical system and / or software module, or one or more functions and / or features can be implemented in a separate physical system or software module. It can also be understood that a detailed discussion of the actual implementation of each module is unnecessary for understanding the present application. More specifically, in view of the properties, functions and internal relationships of the various functional modules in the system disclosed herein, the actual implementation of the module will be understood within the conventional techniques of engineers. Therefore, those skilled in the art can implement the present application set forth in the claims without excessive experimentation using ordinary techniques. It can also be understood that the specific concepts disclosed are merely illustrative and are not intended to limit the scope of the present application, which is determined by the full scope of the attached claims and their equivalents.

[0118] If the function is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the various embodiments of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, and other media that can store program codes.

[0119] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as an ordered list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by an instruction execution system, device or apparatus (such as a computer-based system, a system including a processor, or other system that can fetch instructions from an instruction execution system, system or apparatus and execute the instructions), or in conjunction with such instruction execution system, system or apparatus. For the purpose of this specification, "computer-readable medium" can be any system that can contain, store, communicate, propagate or transport a program for use by an instruction execution system, system or apparatus, or in conjunction with such instruction execution system, system or apparatus.

[0120] More specific examples of computer-readable media (a non-exhaustive list) include the following: an electrical connection with one or more wires (electronic systems), a portable computer disk case (magnetic systems), a random access memory (RAM), a read-only memory (ROM), an erasable and programmable read-only memory (EPROM or flash memory), a fiber optic system, and a portable compact disk read-only memory (CDROM). In addition, the computer-readable medium may even be a paper or other suitable medium on which the program is printed, since the program may be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, deciphering or, if necessary, processing in another suitable manner, and then stored in a computer memory.

[0121] It should be understood that the various parts of the present application can be implemented by hardware, software, firmware or a combination thereof. In the above-mentioned embodiments, multiple steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented by hardware, as in another embodiment, it can be implemented by any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0122] In the above description of this specification, the description with reference to the terms "one embodiment / example", "another embodiment / example" or "certain embodiments / examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0123] Although the embodiments of the present application have been shown and described, those skilled in the art will appreciate that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present application, and that the scope of the present application is defined by the claims and their equivalents.

[0124] The above is a specific description of the preferred implementation of the present application, but the present application is not limited to the embodiments. Those skilled in the art can make various equivalent modifications or substitutions without violating the spirit of the present application. These equivalent modifications or substitutions are all included in the scope defined by the claims of the present application.

[0125] In the description of this specification, the description with reference to the terms "one embodiment", "another embodiment" or "certain embodiments" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiments or examples are included in at least one embodiment or example of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0126] Although the embodiments of the present application have been shown and described, those skilled in the art will appreciate that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present application, and that the scope of the present application is defined by the claims and their equivalents.

Claims

1. A method for establishing a ferroelectric capacitor model in a PDK, characterized in that: The method comprises: Extracting a PDK specification definition table of ferroelectric capacitors based on simulation impact; wherein the PDK specification definition table includes specification indicators and formula definitions; Defining a component description format parameter of a parameterized unit of the ferroelectric capacitor, and determining a callback function corresponding to the component description format parameter according to the specification index; Determine the netlist function of the ferroelectric capacitor in the simulation information definition interface of the parameterized unit, and add the structural layer of the ferroelectric capacitor in the PDK; In the parameterized cell library of the PDK, multiple parameterized cells of the ferroelectric capacitor are compiled and created.

2. A method for establishing a ferroelectric capacitor model in a PDK according to claim 1, characterized in that: The extracted ferroelectric capacitance based simulation impacts the PDK specification definition table, including: Establish a simulated ferroelectric capacitor model through Spice circuit; According to the ferroelectric capacitor model, a PDK specification definition table corresponding to the ferroelectric capacitor is extracted.

3. The method for establishing a ferroelectric capacitor model in a PDK according to claim 1, characterized in that: The component description format parameters of the parameterized unit defining the ferroelectric capacitor include: At least one of parameter name, parameter type, parameter default value, parameter editing control, parameter display control and parameter callback of the component description format parameter is obtained.

4. The method for establishing a ferroelectric capacitor model in a PDK according to claim 1, characterized in that: The structural layer of adding the ferroelectric capacitor in the PDK includes: Modify the associated files in the PDK and add the structural layer of the ferroelectric capacitor; Among them, the associated files include DRC, LVS, ERC, ANT, and PEX files.

5. The method for establishing a ferroelectric capacitor model in a PDK according to claim 4, characterized in that: The structural layers of the ferroelectric capacitor include a PV layer, a PP layer, a FECAP layer, a NP layer, a NV layer, a TM layer and a BM layer.

6. A method for establishing a ferroelectric capacitor model in a PDK according to any one of claims 1 to 5, characterized in that: The method further comprises: The drawing layout of the ferroelectric capacitor is determined according to the component description format parameters of the parameterization unit of the ferroelectric capacitor.

7. A method for establishing a ferroelectric capacitor model in a PDK according to any one of claims 1 to 5, wherein the compiling and creating a plurality of parameterized units of the ferroelectric capacitor comprises: The symbol unit, simulation unit, layout unit and layout schematic comparison unit of the ferroelectric capacitor are compiled and created.

8. A device for establishing a ferroelectric capacitor model in a PDK, characterized in that: The device comprises: An extraction unit, used to extract a PDK specification definition table of a ferroelectric capacitor based on simulation influence; wherein the PDK specification definition table includes specification indicators and formula definitions; A definition unit, used to define a component description format parameter of a parameterization unit of the ferroelectric capacitor, and determine a callback function corresponding to the component description format parameter according to the specification index; An adding unit, used for determining a netlist function of a ferroelectric capacitor in a simulation information definition interface of the parameterized unit, and adding a structural layer of the ferroelectric capacitor in a PDK; The processing unit is used to compile and create a plurality of parameterized units of the ferroelectric capacitor in the parameterized unit library of the PDK.

9. A computer device, characterized in that: include: at least one processor; at least one memory for storing at least one program; When the at least one program is executed by the at least one processor, the at least one processor implements a method for establishing a ferroelectric capacitor model in a PDK as described in any one of claims 1 to 7.

10. A computer-readable storage medium storing a program executable by a processor, characterized in that: The processor-executable program is used to implement a method for establishing a ferroelectric capacitor model in a PDK as claimed in any one of claims 1 to 7 when executed by the processor.

Images