Laser element

Abstract

The invention discloses a semiconductor element. The semiconductor element comprises a first conductive type semiconductor structure; a plurality of semiconductor pillar structures on the first conductive type semiconductor structure, the plurality of semiconductor pillar structures including a first pillar structure adjacent to a first side of the first conductive type semiconductor structure and a second pillar structure adjacent to a second side of the first conductive type semiconductor structure; the insulating layer is positioned on the semiconductor columnar structures and extends to the first conductive type semiconductor structure, and the insulating layer is provided with a plurality of first openings which are respectively positioned on the semiconductor columnar structures and a second opening which is adjacent to the first side surface; the first electrode is electrically connected with at least one semiconductor columnar structure through the first opening; and the second electrode is electrically connected with the first conductive type semiconductor structure through the second opening.

Description

[0001] This application is a divisional application of the Chinese invention patent application (application number: 202010362638.5, application date: April 30, 2020, invention name: laser element). Technical Field

[0002] The invention relates to a laser component, in particular to a flip chip laser component. Background Art

[0003] Vertical Cavity Surface Emitting Laser (VCSEL) is a type of laser element, one of its applications is data transmission, and it has the advantage of high speed.

[0004] When laser components are used in 3D sensing, they need to be operated with short pulses and high currents to increase brightness and thus sensing distance. Under this high current driving condition, current distribution and chip reliability become very important. Summary of the invention

[0005] The present invention proposes a vertical cavity surface emitting laser (VCSEL) structure design with a flip chip architecture, wherein electrodes are formed on the same side of a substrate and have a surrounding metal connection design, thereby optimizing the current distribution of the VCSEL chip and enhancing the reliability of the chip.

[0006] According to an embodiment of the present invention, a semiconductor element includes: a first conductive type semiconductor structure having a first surface, a second surface opposite to the first surface, and a first side and a second side located between the first surface and the second surface; a plurality of semiconductor columnar structures located on the first surface, and the plurality of semiconductor columnar structures include a first columnar structure adjacent to the first side and a second columnar structure adjacent to the second side; an insulating layer located on the semiconductor columnar structures and extending to the first surface, and the insulating layer has a plurality of first openings respectively located on the semiconductor columnar structures, and a second opening adjacent to the first side, wherein a first distance between one of the plurality of first openings and the first surface is different from a second distance between the second opening and the first surface; a first electrode electrically connected to at least one of the semiconductor columnar structures through the first opening; and a second electrode electrically connected to the first conductive type semiconductor structure through the second opening. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] To further understand the features and technical contents of the present invention, please refer to the following detailed description of the embodiments of the present invention and the attached drawings. However, the detailed description and the attached drawings are only provided for reference and explanation, and are not used to limit the present invention; among which:

[0008] Figure 1A is a cross-sectional schematic diagram of a laser element according to an exemplary embodiment of the present invention;

[0009] Figure 1B for Figure 1A A schematic bottom view of the laser element shown;

[0010] Figure 1C for Figure 1A A schematic top view of the laser element shown;

[0011] Figures 2A to 2L is a schematic cross-sectional view of a structure completed in each step of a laser element manufacturing process according to an embodiment of the present invention;

[0012] FIG. 3A to FIG. 3I It is a top view or bottom view schematic diagram of a structure completed in each step of the laser element manufacturing process of one embodiment of the present invention;

[0013] Figure 4 is a bottom view schematically showing a structure completed in one step of a laser element manufacturing process according to an embodiment of the present invention;

[0014] Figure 5 FIG. 4 is a cross-sectional schematic diagram of a laser device according to an embodiment of the present invention.

[0015] Explanation of symbols

[0016] 10 permanent base plate

[0017] 100 Laser Components

[0018] 300 Laser Device

[0019] 101 Anti-reflective structure

[0020] 2 Chip

[0021] 20 Epitaxial structure

[0022] 2000 Growth substrate

[0023] 202 First Semiconductor Structure

[0024] 2020 First Semiconductor Stack

[0025] 204 Active Structure

[0026] 2040 Active Laminate

[0027] 205 Current confinement layer

[0028] 2051 Current Limit Area

[0029] 2052 current conduction area

[0030] 206 second semiconductor structure

[0031] 2060 second semiconductor stack

[0032] 2061 end face

[0033] 2062 bottom surface

[0034] 32 First insulation layer

[0035] 322 First Opening

[0036] 34 First connection layer

[0037] 341a first protrusion

[0038] 341b Second protrusion

[0039] 342 Second Opening

[0040] 344A,344B Marking Structure

[0041] 40 Adhesive layer

[0042] 50 Second connection layer

[0043] 60 Second insulation layer

[0044] 601 Side

[0045] 602a first opening

[0046] 602b Second opening

[0047] 603 Fifth opening

[0048] 702 first electrode

[0049] 7021 body part

[0050] 7022 Surrounding part

[0051] 704 Second electrode

[0052] 80 Third insulation layer

[0053] 802 The third opening

[0054] 804 The Fourth Opening

[0055] 902 first electrode pad structure

[0056] 9021 Middle Layer

[0057] 9022 bonding layer

[0058] 904 Second electrode pad structure

[0059] 9041 Middle Layer

[0060] 9042 bonding layer

[0061] B1 Optical Array

[0062] B11 Optical Structure

[0063] B2 Circuit Board

[0064] B21 First electrode pad

[0065] B22 Second electrode pad

[0066] B3 Bracket

[0067] P Columnar structure

[0068] P0 Center Position

[0069] P1 top surface

[0070] P2 First side surface

[0071] E1 First Edge

[0072] E2 Second Edge

[0073] S1 Second side surface

[0074] S11 First side

[0075] S12 Second side

[0076] G0 First gap

[0077] G11 First spacing

[0078] G2 Second gap

[0079] G3 Third Gap

[0080] C1 First side

[0081] C2 Second side

[0082] D1 First distance

[0083] D2 Second distance

[0084] L1 Connection

[0085] L2 Connection

[0086] O Central Location DETAILED DESCRIPTION

[0087] The following is a description of the concept of the present invention with reference to the accompanying drawings and exemplary embodiments. In the drawings or descriptions, similar or identical parts are represented by the same reference numerals. Furthermore, the drawings are drawn for ease of understanding, and the thickness and shape of each layer in the drawings are not the actual size or proportional relationship of the elements. It should be noted that the elements not shown in the drawings or described in the specification may be in a form known to those familiar with the art of the invention.

[0088] See also Figure 1A , which is a cross-sectional schematic diagram of a semiconductor device according to an embodiment of the present invention. The semiconductor of this embodiment is a laser device 100 and includes a permanent substrate 10 and an epitaxial structure 20 located on one side of the permanent substrate 10. The epitaxial structure 20 includes at least one columnar structure P; in this embodiment, the epitaxial structure 20 includes a plurality of columnar structures P. Each columnar structure P includes a first semiconductor structure 202, a current confinement layer 205, and an active structure 204 sequentially located on the permanent substrate 10. The plurality of columnar structures P can be arranged regularly (regular arrangement) or irregularly (random arrangement) on a second semiconductor structure 206. The so-called regular arrangement means that the plurality of columnar structures P have a specific spatial relationship and are arranged in a fixed and repetitive manner. In some regularly arranged columnar structures P, the gaps between adjacent columnar structures P are substantially the same; in other regularly arranged columnar structures P, the plurality of columnar structures P are arranged along a specific direction. The current confinement layer 205 can be selectively disposed between the active structure 204 and the first semiconductor structure 202, or between the active structure 204 and the second semiconductor structure 206. Each columnar structure P includes an upper surface P1 facing the permanent substrate 10, and a first side surface P2 connecting the upper surface P1 and the second semiconductor structure 206. In addition, the epitaxial structure 20 further includes a lower surface 2062 away from the permanent substrate 10, and the lower surface 2062 is a surface of the second semiconductor structure 206. In this embodiment, the conductivity type of the first semiconductor structure 202 is P-type, and the conductivity type of the second semiconductor structure 206 is N-type. For the sake of simplicity in the diagram, Figure 1A Only five columnar structures P are used as an example, but in actual VCSEL products, the number of columnar structures P can be adjusted according to the current and power requirements of the application, for example, 100 to 1000, but not limited thereto. The current confinement layer 205 includes a current confinement region 2051 and a current conduction region 2052 surrounded by the current confinement region 2051. The conductivity of the current conduction region 2052 is higher than that of the current confinement region 2051, so that the current is concentrated in the current conduction region 2052.

[0089] In detail, according to the embodiment, the first semiconductor structure 202 and the active structure 204 partially cover the second semiconductor structure 206, and expose an end surface 2061 of the second semiconductor structure 206. The laser element 100 further includes a first insulating layer 32 and a first connecting layer 34. The first insulating layer 32 covers the first side surface P2 of the columnar structure P, the end surface 2061 of the second semiconductor structure 206, and a portion of the upper surface P1. The first insulating layer 32 has a plurality of first openings 322, exposing a portion of the upper surface P1 from the first insulating layer 32. The first connecting layer 34 is located on the first insulating layer 32, and is electrically connected to the first semiconductor structure 202 through the first openings 322. The first connecting layer 34 has a plurality of second openings 342, so that the light emitted by the active structure 204 can be emitted from the second openings 342 to the direction of the permanent substrate 10 and out of the laser element 100. In addition, the second semiconductor structure 206 has a first side S11 and a second side S12 corresponding to the first side S11, and the first connection layer 34 has a first protrusion 341a extending beyond the first side S11, and a second protrusion 341b extending beyond the second side S12. The first protrusion 341a and the second protrusion 341b can be used for subsequent electrical connection, and the detailed structure and electrical connection method will be described in detail below.

[0090] The laser device 100 of the present embodiment further comprises an adhesive layer 40, and the epitaxial structure 20 is connected to the permanent substrate 10 through the adhesive layer 40. A second connection layer 50 is provided on the second semiconductor structure 206 on the side away from the permanent substrate 10, and the second connection layer 50 is electrically connected to the second semiconductor structure 206. The laser device 100 of the present invention comprises a second insulating layer 60, and the second insulating layer 60 covers the second connection layer 50. The second insulating layer 60 has two side portions 601, and a first opening portion 602a, a second opening portion 602b, a third opening portion 602c, and a fourth opening portion 602d pass through the second insulating layer 60. The two side portions 601 respectively cover the first side S11 and the second side S12 of the second semiconductor structure 206, the first opening portion 602a (the fourth opening portion 602d) further penetrates the first insulating layer 32 to expose the first protrusion 341a of the first connection layer 34, and the second opening portion 602b (the third opening portion 602c) further penetrates the first insulating layer 32 to expose the second protrusion 341b of the first connection layer 34. The second insulating layer 60 also has a fifth opening portion 603 to expose the second connection layer 50. The laser element 100 of the present invention includes a first electrode 702 and a second electrode 704, which are located on the same side of the permanent substrate 10 and are physically separated from each other.

[0091] In the present embodiment, the laser element 100 is a flip chip type laser element, and the laser element 100 can be subsequently bonded to an external circuit (e.g., a printed circuit board PCB) using solder. The first electrode 702 is connected to the first connection layer 34 through the openings 602a to 602d, and is electrically connected to the first semiconductor structure 202 through the first protrusion 341a and the second protrusion 341a of the first connection layer 34. The first electrode 702 covers the side 601 of the second insulating layer 60 and extends to cover the second metal connection structure 50. The second insulating layer 60 is located between the first electrode 702 and the second metal connection structure 50 to avoid forming a short circuit path. The second electrode 704 is connected to the second connection layer 50 through the fifth opening 603, thereby making the second electrode 704 electrically connected to the second semiconductor structure 206.

[0092] In addition to the above structure, the laser element 100 of the present invention may further include a first electrode pad structure 902 and a second electrode pad structure 904, which are respectively located on the first electrode 702 and the second electrode 704. The laser element 100 of the present invention further includes a third insulating layer 80 covering the first electrode 702 and the second electrode 704. In detail, the third insulating layer 80 has a third opening 802 to expose the first electrode 702, and a fourth opening 804 to expose the second electrode 704; the first electrode pad structure 902 is electrically connected to the first electrode 702 through the third opening 802, and the second electrode pad structure 904 is electrically connected to the second electrode 904 through the fourth opening 804. In addition, there is a first gap G0 between the first electrode pad structure 902 and the second electrode pad structure 904, which is between 10μm and 200μm. In the present embodiment, from the bottom view of the laser element 100, the shape of the first electrode pad structure 902 is different from the shape of the second electrode pad structure 904 for electrical identification purposes (such as Fig. 3I shown).

[0093] The laser element 100 of the present invention may optionally include an anti-reflection structure 101 located above the permanent substrate 10 and away from the first electrode 702 and the second electrode 704. The anti-reflection structure 101 can be used to reduce the reflection of the light emitted by the laser element 100 at the interface between the permanent substrate 10 and the air, so as to avoid the reduction of the light emitting efficiency of the laser element 100 or the generation of an undesirable light shape. The anti-reflection structure 101 can be a single layer or multiple layers. When it is a single layer, the refractive index of the anti-reflection structure 101 is between the refractive index of the permanent substrate 10 and the refractive index of the external environment (for example, air). For example, the refractive index of the anti-reflection structure 101 is 1.1 to 1.65. The material of the single-layer anti-reflection structure 101 is, for example, SiO x, MgF2. The anti-reflection structure 101 has a thickness, preferably an integral multiple of one quarter of the emission wavelength of the active structure 204, that is, if the emission wavelength is λ, the thickness of the anti-reflection structure 101 is (l / 4)×n, where n is an integer greater than or equal to 1. The anti-reflection structure 101 can also be a multilayer structure formed by stacking a high refractive index material and a low refractive index material, such as SiO x / TiO x 、SiO x / TiO x / SiO x .

[0094] In this embodiment, the first semiconductor structure 202 and the second semiconductor structure 206 include a plurality of film layers with different refractive indices that are alternately and periodically stacked (e.g., AlGaAs layers with high aluminum content and AlGaAs layers with low aluminum content are alternately and periodically stacked) to form a distributed Bragg reflector (DBR), so that the light emitted by the active structure 204 can be reflected in the two distributed Bragg reflectors to form coherent light. The reflectivity of the first semiconductor structure 202 is lower than the reflectivity of the second semiconductor structure 206, so that the coherent light is emitted toward the permanent substrate 10. The materials of the first semiconductor structure 202, the second semiconductor structure 206 and the active structure 204 include Group III-V compound semiconductors, such as AlGaInAs series, AlGaInP series, AlInGaN series, AlAsSb series, InGaAsP series, InGaAsN series, AlGaAsP series, etc., such as AlGaInP, GaAs, InGaAs, AlGaAs, GaAsP, GaP, InGaP, AlInP, GaN, InGaN, AlGaN, etc. In the embodiments of the present disclosure, unless otherwise specified, the chemical expressions include "compounds that meet the chemical dosage" and "compounds that do not meet the chemical dosage", wherein "compounds that meet the chemical dosage" are, for example, the total element dosage of the Group III elements is the same as the total element dosage of the Group V elements, whereas "compounds that do not meet the chemical dosage" are, for example, the total element dosage of the Group III elements is different from the total element dosage of the Group V elements. For example, the chemical formula AlGaInAs series means that it contains Group III elements aluminum (Al) and / or gallium (Ga) and / or indium (In), and Group V elements arsenic (As), wherein the total element dosage of Group III elements (aluminum and / or gallium and / or indium) can be the same as or different from the total element dosage of Group V elements (arsenic). In addition, if the compounds represented by the chemical formula are compounds that meet the chemical dosage, the AlGaInAs series means (Al y1 Ga (1-y1) ) 1-x1 Inx1 As, where 0≤x1≤1, 0≤y1≤1; AlGaInP series represents (Al y2 Ga (1-y2) ) 1-x2 In x2 P, where 0≤x2≤1, 0≤y2≤1; AlInGaN series represents (Al y3 Ga (1-y3) ) 1- x3 In x3 N, where 0≤x3≤1, 0≤y3≤1; AlAsSb series represents AlAs x4 Sb (1-x4) , where 0≤x4≤1; InGaAsP series represents In x5 Ga 1-x5 As 1-y4 P y4 , where 0≤x5≤1, 0≤y4≤1; InGaAsN series represents In x6 Ga 1-x6 As 1-y5 N y5 , where 0≤x6≤1, 0≤y5≤1; AlGaAsP series represents Al x7 Ga 1-x7 As 1-y6 P y6 , where 0≤x7≤1, 0≤y6≤1.

[0095] Depending on the material, the active structure 204 can emit infrared light with a peak wavelength between 700nm and 1700nm, red light with a peak wavelength between 610nm and 700nm, yellow light with a peak wavelength between 530nm and 570nm, green light with a peak wavelength between 490nm and 550nm, blue light or deep blue light with a peak wavelength between 400nm and 490nm, or ultraviolet light with a peak wavelength between 250nm and 400nm. In the present embodiment, the peak wavelength of the active structure 204 is infrared light between 750nm and 1200nm.

[0096] The material of the current confining layer 205 may be the above-mentioned III-V semiconductor material. In the present embodiment, the material of the current confining layer 205 is AlGaAs, and the materials of the active structure 204, the first semiconductor structure 202, and the second semiconductor structure 206 all include aluminum. The aluminum content of the current confining layer 205 is greater than the aluminum content of the active structure 204, the first semiconductor structure 202, and the second semiconductor structure 206. For example, the aluminum content of the current confining layer 205 is greater than 97%. In the present embodiment, the oxygen content of the current confining region 2051 of the current confining layer 205 is greater than the oxygen content of the current conducting region 2052, so that the current confining region 2051 has a lower conductivity than the current conducting region 2052. The bonding layer 40 is a material with high transmittance to the light emitted by the active structure 204, such as a transmittance greater than 80%. The material of the bonding layer 40 is an insulating material, such as: B-staged bisbenzocyclobutene (BCB), epoxy resin, polyimide, SOG (spin-on glass), silicone or octafluorocyclobutane (PFCB).

[0097] The materials of the first insulating layer 32, the second insulating layer 60 and the third insulating layer 80 include non-conductive materials. The non-conductive materials include organic materials or inorganic materials. The organic materials include Su8, benzocyclobutene (BCB), perfluorocyclobutane (PFCB), epoxy resin, acrylic resin, cycloolefin polymer (COC), polymethyl methacrylate (PMMA), polyethylene terephthalate (PET), polycarbonate (PC), polyetherimide or fluorocarbon polymer. The inorganic materials include silica gel or glass, aluminum oxide (Al2O3), silicon nitride (SiNx), silicon oxide (SiO x ), titanium oxide (TiO x ), or magnesium fluoride (MgF x In one embodiment, the first insulating layer 32, the second insulating layer 60 and / or the third insulating layer 80 include one or more layers (e.g., a Bragg reflector (DBR) structure formed by alternately stacking two sub-layers, such as SiO x Sublayer and TiO x sub-layer).

[0098] The materials of the first connection layer 34 and the second connection layer 50 may include metals, such as aluminum (Al), silver (Ag), chromium (Cr), platinum (Pt), nickel (Ni), germanium (Ge), beryllium (Be), gold (Au), titanium (Ti), tungsten (W) or zinc (Zn). The materials of the first electrode 702 and the second electrode 704 may be metal materials, such as gold (Au), tin (Sn), titanium (Ti) or their alloys. In the present embodiment, the first electrode 702 may be a multi-layer electrode structure, for example, it may include a titanium (Ti) layer and a gold (Au) layer in the direction away from the permanent substrate 10. The second electrode 704 has the same material and structural composition as the first electrode 702. The first electrode pad structure 902 and the second electrode pad structure may be metal materials, such as gold (Au), tin (Sn), titanium (Ti), copper (Cu), nickel (Ni), platinum (Pt) or their alloys. The material of the first electrode 702 is different from that of the first electrode pad structure 902, and the material of the second electrode 704 is different from that of the second electrode pad structure 904. For example, the first electrode pad structure 902 and the second electrode pad structure 904 contain at least one element, while the first electrode 702 and the second electrode 704 do not contain the element, so as to prevent the external (tin-containing) solder from damaging the first electrode 702 and the second electrode 704 and causing electrical failure during die bonding or under high current operation, thereby further improving the reliability of the laser element 100 of the present invention. The above-mentioned element can be used to prevent the solder from diffusing into the first electrode 702 and the second electrode 704, and the element is, for example, nickel (Ni) and / or platinum (Pt). In detail, the first electrode pad structure 902 and the second electrode pad structure 904 may include multiple layers, for example, an intermediate layer 9021, 9041 and a bonding layer 9022, 9042 are respectively included in sequence in the direction away from the substrate 10. The material of the intermediate layers 9021, 9041 is different from the first electrode 702 and the second electrode 704, thereby preventing solder (for example, tin or gold-tin alloy (AuSn)) from diffusing to the first electrode 702 and the second electrode 704. Therefore, the material of the intermediate layers 9021, 9041 preferably includes metal elements other than gold (Au), tin (Sn) and copper (Cu), such as nickel (Ni) and / or platinum (Pt). The material of the bonding layers 9022, 9042 includes a metal material with high ductility, preferably including gold (Au). In this embodiment, the materials of the intermediate layers 9021 and 9041 are platinum (Pt) and nickel (Ni) stacked in sequence in the direction away from the permanent substrate 10, and the materials of the bonding layers 9022 and 9042 are gold (Au). In other words, in the direction away from the permanent substrate, the electrode pad structures 902 and 904 include a nickel layer, a platinum layer and a gold layer.

[0099] Figure 1B for Figure 1A The bottom view of the laser device 100 is shown, that is, from the direction of the first electrode pad structure 902 and the second electrode pad structure 904 (eg, Figure 1AA view of the laser element 100 as viewed from the direction indicated by the arrow C in FIG. 1 , and Figure 1A For along Figure 1B A schematic cross-sectional view of the section taken along line AA' in FIG.

[0100] Figure 1C for Figure 1A The laser element 100 is shown in a top view, that is, from the direction of the permanent substrate 10 (eg Figure 1A A view of the laser element 100 observed in the direction indicated by the arrow D in FIG. 1 , and Figure 1A For along Figure 1C A schematic cross-sectional view of the section taken along line BB' in FIG.

[0101] like Figure 1A and Figure 1B As shown, the permanent substrate 10 has a central area and an edge area surrounding the central area. The second insulating layer 60 has a plurality of openings distributed in the surrounding area of ​​the laser element 100, such as a first opening 602a, a second opening 602b, a third opening 602c, and a fourth opening 602d. In addition, there are four spacings G11 to G14 between the openings 602a to 602d. In detail, the first opening 602a and the fourth opening 602d are separated by a first spacing G11, the first opening 602a and the second opening 602b are separated by a second spacing G12, the second opening 602b and the third opening 602c are separated by a third spacing G13, and the third opening 602c and the fourth opening 602d are separated by a fourth spacing G14.

[0102] In addition, if Figure 1C As shown, in this embodiment, the first connection layer 34 is formed with a plurality of marking structures 344A to 344D, and the line between two opposite marking structures 344B and 344D is L1. The line between two opposite marking structures 344A and 344C is L2. The intersection of L1 and L2 is defined as the center position O of the laser element 100, which is convenient for machine recognition and facilitates the subsequent packaging manufacturing process. Figure 1B and 1C As shown, the position of the first spacing G11 corresponds to the marking structure 344A, the position of the second spacing G12 corresponds to the marking structure 344B, the position of the third spacing G13 corresponds to the marking structure 344C, and the position of the fourth spacing G14 corresponds to the marking structure 344D. Figure 1B , Figure 1C The dashed lines indicate that the structure cannot be directly observed from the bottom view / top view, and only the outline of the dashed lines is visible.

[0103] In this embodiment, the second-type semiconductor structure 206 is approximately centered on the permanent substrate 10, that is, the distance from any side of the second-type semiconductor structure 206 to a side of the adjacent permanent substrate 10 is approximately equal. In another embodiment, the first electrode pad structure 902 and the second electrode pad structure 904 (or the first electrode 702 and the second electrode 704) can be arranged at a position symmetrical to L1 of the laser element 100, which is beneficial to the structural design of the subsequent packaging process and increases the area of ​​the effective connection to the external circuit. Figure 1B As shown, from the direction from the second semiconductor structure 206 of the laser element 100 toward the active structure 204, the permanent substrate 10 has a first side surface C1 adjacent to the first side edge S11, and a second side surface C2 opposite to the first side surface C1 and adjacent to the second side edge S12, the first side surface C1 and the second side surface C2 correspond to each other and are respectively disposed at the side edges of the permanent substrate 10. The difference between a first shortest distance D1 between the first side edge S11 and the first side edge C1 and a second shortest distance D2 between the second side edge S12 and the second side edge C2 is less than 30% of the first shortest distance D1; that is, the difference between the first shortest distance D1 and the second shortest distance D2 is 0≤(D1-D2) / D1<30%, in another embodiment, 0≤(D1-D2) / D1<20%; preferably, 0≤(D1-D2) / D1<15%. In another embodiment, 1%<(D1-D2) / D1<10%. In this embodiment, the first shortest distance D1 is equal to the second shortest distance D2.

[0104] The following reference Figures 2A to 2L , describing the manufacturing process of the laser element 100 of the present invention.

[0105] like Figure 2A As shown, the second semiconductor stack 2060, the active stack 2040 and the first semiconductor stack 2020 are sequentially grown on the growth substrate 2000 by epitaxial method. The epitaxial method includes, but is not limited to, metal organic chemical vapor deposition, hydride vapor phase epitaxy, molecular beam epitaxy, liquid phase epitaxy, etc. The growth substrate 2000 includes a III-V material, and its lattice constant matches the second semiconductor stack 2060, the active stack 2040 and the first semiconductor stack 2020. The material of the growth substrate 2000 of this embodiment is gallium arsenide (GaAs). In other embodiments, the material of the growth substrate 2000 can be indium phosphide (InP), sapphire, gallium nitride (GaN) or silicon carbide (SiC), etc.

[0106] Next, an etching process is performed to etch away a portion of the first semiconductor stack 2020 and a portion of the active stack 2040, thereby forming a plurality of columnar structures P and exposing the end surface 2061 of the second semiconductor stack 2060. Thus, each columnar structure P includes a first semiconductor structure 202 and an active structure 204, and has an upper surface P1 and a first side surface P2, and the first side surface P2 connects the upper surface P1 and the end surface 2061, as shown in FIG. Figure 2B shown.

[0107] Next, a current confinement layer 205 is formed in each columnar structure P, thereby forming a structure as shown in FIG. 2C. In the present embodiment, a current confinement layer 205 is formed between each first semiconductor structure 202 and each active structure 204, and each current confinement layer 205 includes a current confinement region 2051 and a current conduction region 2052 surrounded by the current confinement region 2051. The current confinement layer 205 may be formed by an oxidation process to oxidize the material generated in the region where the current confinement region 2051 is to be formed. For example, the first semiconductor structure 202 includes a plurality of AlGaAs layers with high aluminum content and AlGaAs layers with low aluminum content of different refractive indices alternately stacked periodically, and the materials of the active structure 204, the first semiconductor structure 202, and the second semiconductor structure 206 all include aluminum. The aluminum content of one layer in the first semiconductor structure 202 is greater than 97% (defined as the current confinement layer 205) and is greater than the aluminum content of the active structure 204, the other layers of the first semiconductor structure 202, and the second semiconductor structure 206. Since the aluminum content of the current confinement layer 205 is greater than the aluminum content of the active structure 204, the first semiconductor structure 202, and the second semiconductor structure 206, after the oxidation process, only the current confinement layer 205 is obviously oxidized, thereby forming a current confinement region 2051 with low conductivity. Alternatively, the current confinement region 2051 with low conductivity can be formed in the plurality of columnar structures P by an ion implantation process, and the current conduction region 2052 can be defined by a mask. The ion implantation can be performed by implanting hydrogen ions (H 2 O) into the region where the current confinement region 2051 is to be formed. + ), helium ion (He + ) or argon ions (Ar +) etc., the ion concentration of the current limiting region 2051 is greater than that of the current conduction region 2052, so that the current limiting region 2051 has a lower conductivity. In another embodiment, the oxidation process and the ion implantation process can be used simultaneously in a plurality of columnar structures P. For example, the current limiting region 2051 in some columnar structures P is formed by the ion implantation process, and the current limiting region 2051 in other columnar structures P is formed by the oxidation process. Alternatively, some columnar structures P have a current limiting region formed by the ion implantation process, and also have a current limiting region formed by the oxidation process (not shown).

[0108] like Figure 2D As shown, a first insulating layer 32 is formed to cover the first side surface P2 of the columnar structure P, the second semiconductor structure 206 and a portion of the upper surface P1. The first insulating layer 32 is formed with a first opening 322 to expose a portion of the upper surface P1. The top view shape of the first opening 322 can be, for example, circular, elliptical, square, irregular, etc. In this embodiment, the shape of the first opening 322 is a circular ring when viewed from above (see the following description of the embodiment). Figure 3B In the present embodiment, each upper surface P1 of the columnar structure P has a first opening 322 located thereon. In another embodiment, each upper surface P1 of the columnar structure P has a plurality of first openings 322 thereon.

[0109] like Figure 2E As shown, a first connection layer 34 is formed on the first insulating layer 32, and the first connection layer 34 covers the first insulating layer 32 and fills the first opening 322, thereby being electrically connected to the first semiconductor structure 202. The first connection layer 34 has a plurality of second openings 342 on the upper surface P1 side of the columnar structure P, thereby exposing the first insulating layer 32 below, so that the light generated by the active structure 204 can be emitted from the laser element 100 through the second openings 342. The top view shape of the second opening 342 of the first connection layer 34 can be, for example, circular, elliptical, square, irregular, etc. In this embodiment, the shape of the second opening 342 is circular when viewed from above (see the following description about Figure 3C ), but not limited thereto. In the present embodiment, the first connection layer 34 has a plurality of second openings 342, and each second opening 342 is substantially located at the center of the upper surface P1 of each columnar structure P, which means that the columnar structure P and the second opening 342 are in a one-to-one correspondence. In another embodiment, each upper surface P1 of each columnar structure P has a plurality of second openings 342, which means that the columnar structure P and the second opening 342 are in a one-to-many correspondence.

[0110] like Figure 2FAs shown, the columnar structure P1 and the second semiconductor stack 2060 are bonded to the permanent substrate 10 through the adhesive layer 40. The permanent substrate 10 of this embodiment is a material with high transmittance for the active structure 204 to emit light, such as sapphire with a transmittance greater than 80%. After being bonded to the permanent substrate 10, the first protrusion 341a and the second protrusion 341b are farther away from the permanent substrate 10 than the first semiconductor structure 202. Next, the growth substrate 2000 located on the side of the second semiconductor stack 2060 is removed to form a Figure 2G The structure shown.

[0111] like Figure 2H As shown, a second connection layer 50 is then formed on the second semiconductor stack 2060 exposed after the growth substrate 2000 is removed, and from a cross-sectional view, the width W1 of the second connection layer 50 is smaller than the width of the second semiconductor stack 2060 to expose a portion of the second semiconductor stack 2060. The width W1 of the second connection layer 50 is also smaller than the width W2 of the permanent substrate 10.

[0112] like Fig.2I As shown, an etching process is then performed to remove the surrounding area of ​​the second semiconductor stack 2060, such as the second semiconductor stack 2060 near the first side C1 and the second side C2 of the permanent substrate 10, to form a second semiconductor structure 206. The second semiconductor structure 206 is a platform protruding from the first connection layer 34. The plurality of columnar structures P have a first edge E1 near the first side C1, and the second semiconductor structure 206 has a first side S11 near the first side C1, and in the direction of the X-axis in the figure, the first side S11 is closer to the first side C1 than the first edge E1. In addition, the second connection layer 50 has a side that is closer to the first side C1 than the first edge E1, and moreover, all the sides of the second connection layer 50 are closer to the side than the edges of the plurality of columnar structures P. In other words, the second connection layer 50 covers all the columnar structures P1. In another embodiment, all the sides of the second connection layer 50 are farther from the side than the edges of the plurality of columnar structures P. In other words, the second connection layer 50 only covers part of the columnar structures P1.

[0113] In addition to the end surface 2061 facing the permanent substrate 10, the second semiconductor structure 206 further includes a lower surface 2062 away from the permanent substrate 10 and corresponding to the end surface 2061. The first side S11 and the second side S12 connect the end surface 2061 and the lower surface 2062.

[0114] like Figure 2JAs shown, a second insulating layer 60 is formed on the second semiconductor structure 206, covering the first side S11, the second side S12, a portion of the lower surface 2062 and a portion of the second contact metal layer 50. Then, a portion of the first insulating layer 32 and the second insulating layer 60 located on the surrounding area of ​​the first connection layer 34 are removed to form four openings 602a-602d, and a portion of the first connection layer 34 (e.g., the first and second protrusions 341a, 341b) is exposed. The second insulating layer 60 is formed with a fifth opening 603 on the second connection layer 50 to expose a portion of the second connection layer 50.

[0115] Then, if Figure 2K As shown, a first electrode 702 and a second electrode 704 are formed on the second insulating layer 60. The first electrode 702 is formed through the openings 602a-602d ( Figure 2K Only the first opening 602 a and the second opening 602 b are shown to be directly in contact with and electrically connected to the first connection layer 34 , and the second electrode 704 is connected to the second connection layer 50 through the fifth opening 603 .

[0116] Then, if Figure 2L As shown, a third insulating layer 80 is formed to cover a portion of the first electrode 702 and a portion of the second electrode 704. The third insulating layer 80 has a third opening 802 to expose the first electrode 702 and a fourth opening 804 to expose the second electrode 704.

[0117] Then, a first electrode pad structure 902 and a second electrode pad structure 904 are formed on the first insulating layer 80. The first electrode pad structure 902 is electrically connected to the first electrode 702 through the third opening 802, and the second electrode pad structure 904 is electrically connected to the second electrode 704 through the fourth opening 804, so as to form a Figure 1A The surface of the laser component 100 shown in the figure is substantially at the same level as the surface of the second electrode pad structure 904 , so as to facilitate the subsequent connection of the laser component 100 to an external circuit using solder.

[0118] FIG. 3A to FIG. 3I It is a top view or bottom view of a structure completed in each step of a laser element manufacturing process according to an embodiment of the present application. FIG. 3A to FIG. 3C is a top view viewed from the first semiconductor structure 202 toward the active structure 204. FIG. 3D to FIG. 3I It is a bottom view viewed from the active structure 204 toward the first semiconductor structure 202 .

[0119] Figure 3A For comparison Figure 2BAs shown in the top view of the structure, in this embodiment, the number of columnar structures P is 621, and the plurality of columnar structures P are regularly arranged in an array in a closest-packed manner.

[0120] Figure 3B For comparison Figure 2D In the top view and partial enlarged view of the structure shown, the first insulating layer 32 covers the plurality of columnar structures P and has a plurality of first openings 322 , thereby exposing the upper surfaces P1 of the plurality of columnar structures P respectively.

[0121] Figure 3C For comparison Figure 2E In the top view of the structure shown, the first connection layer 34 covers the first insulating layer 32 and has a plurality of second openings 342, and the second openings 342 are correspondingly located on the upper surface P1 of the multi-columnar structure P, thereby forming a plurality of light-emitting holes of the laser element 100. The four edges of the first connection layer 34 respectively have four marking structures 344A to 344D, and the intersection of the line L1 between two opposite marking structures 344B and 344D and the line L2 between two opposite marking structures 344A and 344C is defined as the center position O of the laser element 100.

[0122] Figure 3D For comparison Figure 2H In the bottom view of the structure shown, a second connection layer 50 is formed on the second semiconductor stack 2060 .

[0123] Figure 3E For comparison Fig.2I The surrounding area of ​​the second semiconductor stack 2060 is removed to form a second semiconductor structure 206 .

[0124] Figure 3F For comparison Figure 2J The bottom view of the structure shown. Figure 3F As shown, a second insulating layer 60 is formed, and then a portion of the second insulating layer 60 and the first insulating layer 32 is removed to form a first opening 602a, a second opening 602b, a third opening 602b and a fourth opening 602D, and a portion of the first connecting layer 34 is exposed, for example Figure 2JThe first protrusion 341a and the second protrusion 341b are shown. The second insulating layer 60 further has a fifth opening 603 to expose the second connection layer 50. In this embodiment, the openings 602a-602d surround the second semiconductor structure 206. Each opening 602a-602d is L-shaped. The four openings 602a-602d are not connected to each other and the four spacings G11-G14 are located between adjacent openings. The positions of the four openings 602a-602d correspond to the marking structures 344A-344D of the first connection layer 34, respectively. In other embodiments, as Figure 4 As shown, the four openings 602a-602d of the second insulating layer 60 are interconnected (ie, do not have four intervals G11-G14) and form a ring configuration surrounding the peripheral area of ​​the laser element 100. In other words, the second insulating layer 60 has only one opening, which is shaped like a mouth.

[0125] Figure 3G For comparison Figure 2K In the bottom view of the structure shown, the first electrode 702 and the second electrode 704 are respectively located on the first connection layer 34 and the second connection layer 50. In this embodiment, the first electrode 702 includes a main body 7021 and a surrounding portion 7022 connected to the main body 7021, and the top view area of ​​the first electrode 702 is larger than that of the second electrode 704. Figure 3G The dotted line represents the side surface between the main body 7021 and the surrounding portion 7022. The main body 7021 is in a square shape, and the surrounding portion 7022 is in a mouth shape. Figure 4 As shown, when the second insulating layer 60 has only one opening, the surrounding portion 7022 (refer to Figure 3C ) has the same shape as the opening (eg, mouth-shaped). In addition, the surrounding portion 7022 completely covers the opening and has a top-view area larger than a top-view area of ​​the opening.

[0126] Please refer to Figure 2K and Figure 3G As shown, the surrounding portion 7022 surrounds the second electrode 704 and contacts the first connection layer 34 through the openings 602a-602d, thereby electrically connecting the first semiconductor structure 202 and the first electrode 702; the second electrode 704 contacts the second connection layer 50 through the fifth opening 603, thereby electrically connecting the second semiconductor structure 206 and the second electrode 704. In addition, the main body 7021 and the second electrode 704 have a second gap G2, and the surrounding portion 7022 and the second electrode 704 have a third gap G3, and the third gap G3 is smaller than the second gap G2.

[0127] Figure 3H For comparison Figure 2LIn the bottom view of the structure shown, the third insulating layer 80 is located on the first electrode 702 and the second electrode 704. The third insulating layer 80 has a third opening 802 and a fourth opening 804, thereby exposing the main body 7021 of the first electrode 702 and the second electrode 704 respectively.

[0128] Fig. 3I For comparison Figure 1A For the bottom view of the structure shown, please refer to Figure 1A and Fig. 3I This step forms a first electrode pad structure 902 and a second electrode pad structure 904 , and the first electrode pad structure 902 is connected to the first electrode 702 through the third opening 802 , and the second electrode pad structure 904 is connected to the second electrode 704 through the fourth opening 804 .

[0129] The laser element 100 of one embodiment of the present invention is a flip-chip laser element, which can operate under short pulse and high current conditions. Compared with the electrode structure of the traditional vertical laser element, which uses electrodes formed on opposite sides of a permanent substrate and connected by metal wire bonding, the laser element 100 of this embodiment can operate under high current conditions without additional metal wire bonding, thereby improving the light emitting brightness of the laser element 100 and increasing the sensing distance (for example, up to 10 meters). At the same time, since the laser element 100 of the present invention does not need to be connected to the external circuit by setting additional metal wire bonding, the problem of parasitic capacitance can be improved, so as to facilitate fast response time during high-frequency operation. In addition, the laser element 100 of the present invention also has a faster response speed, for example, the signal rise time (rise time, Tr) and signal fall time (fall time, Tf) are shorter, and its reliability can be enhanced.

[0130] Another example Figure 1A As shown, the height H of the first electrode 702 in one embodiment of the present invention is substantially mainly corresponding to the thickness of the epitaxial layer of the second semiconductor structure 206. The height H of the first electrode 70 is less than 8.5 μm, for example, 5 μm to 8 μm, or 5.5 μm to 7 μm. The height of the first electrode 70 in the above range can effectively avoid the risk of electrical failure caused by poor sidewall coverage during the manufacturing process of the material of the first electrode 702, and can also shorten the current path of the laser element 100 to facilitate current transmission efficiency.

[0131] In addition, the laser element 100 of an embodiment of the present invention further has a third insulating layer 80 electrode pad structure between the first electrode 702 and the second electrode 704 and the first and second electrode pad structures 902 and 904, thereby preventing the laser element 100 from forming a eutectic structure with the electrode material (such as gold) due to high heat when the laser element 100 is used at a high current, thereby affecting the performance of the electrode. Therefore, the reliability of the laser element 100 of the present invention can be effectively improved.

[0132] Furthermore, the laser device 100 according to an embodiment of the present invention has excellent structural symmetry, which is beneficial to the subsequent packaging process. Specifically, in the laser device 100 of the present invention, the second semiconductor structure 206 is located at the substantial center of the laser device 100, so that the first electrode pad structure 902 and the second electrode pad structure 904 can also be arranged at symmetrical positions of the laser device 100, which is beneficial to the structural design of the subsequent packaging process and increases the effective area.

[0133] Please refer to Figure 5 As shown, a semiconductor device 300 of an embodiment of the present invention includes a laser element 100, an optical array B1, and a circuit board B2. The laser element 100 is located on the circuit board B2 and is electrically connected to a first electrode pad B21 and a second electrode pad B22 of the circuit board B2. Specifically, the first electrode pad structure 902 and the second electrode pad structure 904 of the laser element 100 can be electrically connected to the first electrode pad B21 and the second electrode pad B22 by solder (solder, not shown), and the optical array B1 includes a plurality of optical structures B11. In some embodiments, the optical array B1 can be a microlens array, and the optical structure B11 can be arranged regularly or irregularly to expand the light emitted by the laser element 100 to have a larger field of view (FOV). The above-mentioned laser element 100, optical array B1, and circuit board B2 can be integrated together by a bracket B3. The laser element 100 described in the embodiment of the present invention has high heat dissipation efficiency and is particularly suitable for a 3D sensing device or a flood illuminator of a time of flight (ToF), but the application field of the laser element 100 is not limited thereto.

[0134] It should be noted that the aforementioned embodiments of the present invention are only used to illustrate the present invention, and are not used to limit the scope of the present invention. Various modifications and changes made to the present invention by people familiar with the technical field to which the present invention belongs do not deviate from the spirit and scope of the present invention. The same or similar components in different embodiments, or components represented by the same element symbols in different embodiments have the same physical or chemical properties. In addition, where appropriate, the above-mentioned embodiments of the present invention may be combined or replaced with each other, rather than being limited to the specific embodiments described above. The connection relationship between the specific components described in one embodiment and other components may also be applied to other embodiments, which all fall within the scope of the present invention as claimed in the attached claims.

Claims

1. A semiconductor element, characterized in that: include: A first conductive type semiconductor structure having a first surface, a second surface opposite to the first surface, and a first side surface and a second side surface located between the first surface and the second surface; A plurality of semiconductor column structures are located on the first surface, and the plurality of semiconductor column structures include a first column structure adjacent to the first side surface and a second column structure adjacent to the second side surface; An insulating layer, located on the semiconductor pillar structures and extending to the first surface, and having a plurality of first openings respectively located on the semiconductor pillar structures, and a second opening adjacent to the first side surface, wherein a first distance between one of the plurality of first openings and the first surface is different from a second distance between the second opening and the first surface; A first electrode electrically connected to at least one of the semiconductor pillar structures through the first opening; and The second electrode is electrically connected to the first conductive type semiconductor structure through the second opening. 2 . The semiconductor device as claimed in claim 1 , further comprising a metal structure located between the second electrode and the first conductive type semiconductor structure, the metal structure comprising at least one element, while the second electrode does not comprise the element.

3. The semiconductor device according to claim 1, wherein: The first distance is greater than the second distance. 4 . The semiconductor device as claimed in claim 1 , wherein each of the plurality of semiconductor pillar structures comprises a current confinement layer, and the current confinement layer comprises a current conduction region, and the current confinement region surrounds the current conduction region. 5 . The semiconductor device as claimed in claim 1 , wherein the insulating layer covers side surfaces of the plurality of semiconductor columnar structures, and the insulating layer covers a portion of upper surfaces of the plurality of semiconductor columnar structures.

6. The semiconductor device according to claim 1, wherein The distance between the first columnar structure and the first side surface is greater than or equal to the distance between the second columnar structure and the second side surface.

7. The semiconductor device according to claim 1, wherein: The insulating layer further includes a third opening adjacent to the second side surface, and the second electrode is electrically connected to the first conductive type semiconductor structure through the third opening. 8 . The semiconductor device as claimed in claim 1 , further comprising a substrate and an adhesive layer located between the substrate and the plurality of semiconductor column structures.

9. The semiconductor device according to claim 1, wherein: The first electrode has a height less than 8.5 μm.

10. A semiconductor device, characterized in that: Include: a carrier board; and The semiconductor device as claimed in any one of claims 1 to 9, located on the carrier.

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