Data acquisition processing and transmission module for long-distance distributed optical fiber sensing

By designing a data acquisition and processing and transmission module combining ADC daughter card and FPGA, the problems of short sampling distance and insufficient sampling rate in the prior art are solved, and high-speed data acquisition of long-distance Raman distributed fiber sensing system is realized and high signal-to-noise ratio processing.

CN119496561APending Publication Date: 2025-02-21TAIYUAN UNIVERSITY OF TECHNOLOGY
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Patent Information

Application Number
CN202411446086.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-10-16
Publication Date
2025-02-21

AI Technical Summary

Technical Problem

In the prior art, the sampling distance of the acquisition card is short, and the sampling rate and accumulated times cannot meet the needs of long-distance Raman distributed fiber optic sensing systems, resulting in insufficient system performance.

Method used

A data acquisition and processing and transmission module for long-distance distributed fiber sensing is designed. The ADC daughter card and FPGA are used to transmit data through the JESD204B protocol, and the accumulation controller and convolutional neural network in the FPGA are used to The noise module and the DDR storage module realize high-speed data acquisition, accumulation and denoising processing.

Benefits of technology

It realizes data acquisition and processing of 1 million points at 1G sampling rate, improves the system's signal-to-noise ratio, supports 104 kilometers of fiber data acquisition, and reduces the demand for hardware performance.

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Abstract

The invention belongs to the field of distributed optical fiber sensing, and discloses a data acquisition, processing and transmission module for long-distance Raman distributed optical fiber sensing, an ADC (analog to digital converter) daughter card and an FPGA (field programmable gate array), the ADC daughter card is used for acquiring sensing data of a Raman distributed optical fiber sensing system, converting the sensing data into digital signals and sending the digital signals to the FPGA; a first FIFO module, an accumulation controller, an AXI4 bus writing module, an AXI4 bus reading module, a DDR storage module, a division controller, a convolutional neural network denoising module, a second FIFO module and a bus interface module are arranged in the FPGA. According to the invention, the signal-to-noise ratio of the collected data can be improved, the data collection rate can be improved, and the hardware requirement is reduced.
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Description

Technical Field

[0001] The present invention relates to the technical field of distributed optical fiber sensing, and in particular to a data acquisition, processing and transmission module for long-distance Raman distributed optical fiber sensing. Background Art

[0002] The Raman scattering effect is sensitive to temperature, so the distributed Raman fiber optic sensing system can monitor temperature characteristics in a large range, with the advantages of high accuracy, strong timeliness and anti-electromagnetic interference. It is currently widely used in temperature safety monitoring fields such as highway tunnels, railway bridges, and smart grids. As one of the most representative sensing technologies, Raman distributed fiber optic sensing technology has greatly improved its sensing performance after decades of development. Raman's fiber optic scattering signal needs to be collected and processed in a timely and high-speed manner after being converted into a voltage signal. Parameters such as spatial resolution, sensing distance, sampling accuracy, and signal-to-noise ratio are important indicators for measuring the performance of the Raman system, and the accuracy of these parameters is directly affected by the data acquisition and processing module, so the performance of the data acquisition module is particularly important. The sampling rate of the data acquisition module determines the spatial resolution of the system, the depth of the internal storage unit such as DDR3 memory determines the sensing distance of the system, and the resolution of the ADC chip determines the sampling accuracy of the system.

[0003] In addition, the signal-to-noise ratio is also an important indicator of Raman system performance. Convolutional neural network denoising is currently the mainstream denoising method, but traditional convolutional neural network denoising occupies a large amount of CPU or GPU resources, has low computing power, high power consumption, poor real-time performance, and low throughput.

[0004] Therefore, based on the technical problems that the sampling distance of the acquisition card in the existing technology is short, the sampling rate and the number of accumulation times cannot meet the requirements, in order to improve the performance of the Raman system, it is necessary to propose a high-speed data acquisition processing and transmission module, which is of great significance for long-distance distributed fiber optic sensing technology. Summary of the invention

[0005] In order to solve the technical problems in the prior art that the sampling distance of the acquisition card is short, and the sampling rate and accumulation times cannot meet the requirements, the present invention proposes a data acquisition, processing and transmission module for long-distance distributed optical fiber sensing to achieve high-speed acquisition and processing of long-distance Raman distributed optical fiber system data and reduce the system's requirements on hardware performance.

[0006] In order to solve the above technical problems, the technical solution adopted by the present invention is: a data acquisition, processing and transmission module for long-distance Raman distributed optical fiber sensing, including: an ADC daughter card and an FPGA, wherein the ADC daughter card is used to collect the sensing data of the Raman distributed optical fiber sensing system, and after converting it into a digital signal, send it to the FPGA through the JESD204B protocol;

[0007] The FPGA is provided with a first FIFO module, an accumulation controller, an AXI4 bus write module, an AXI4 bus read module, a DDR storage module, a division controller, a convolutional neural network denoising module, a second FIFO module, and a bus interface module;

[0008] The first FIFO module is used to receive the data sent by the ADC daughter card through the JESD204B protocol and send it to the accumulation controller. The accumulation controller is used to read the data stored in the DDR storage module through the AXI4 bus read module, and accumulate it with the data sent by the first FIFO module, and store it in the DDR storage module through the AXI4 bus write module; the division controller is used to average the data stored in the DDR storage module after the accumulation is completed, and then send it to the convolutional neural network denoising module; the convolutional neural network denoising module is used to send the averaged data to the second FIFO module through convolution denoising; the second FIFO module is used to cross the clock domain and reduce the bit width of the denoised data and send it to the bus interface module; the bus interface module is used to send the FIFO data to the host computer.

[0009] The bus interface module is a PCIE bus interface module, which sends 128-bit data to the host computer through XDMA IP for storage, drawing and display.

[0010] The convolutional neural network denoising module uses a CNN neural network model to denoise the data.

[0011] The CNN neural network model is first trained and simulated by collecting data, and then transplanted to the convolutional neural network denoising module of the FPGA.

[0012] The DDR memory module is a DDR3 memory module.

[0013] The ADC daughter card converts the data into digital signals and data frames through the JESD204B protocol, and splices the collected four-way data through time-division multiplexing.

[0014] The Raman distributed optical fiber sensing system comprises: continuous light, a semiconductor optical modulator, an optical amplifier, a wavelength division multiplexer, a sensing optical fiber, and a photodetector. The light emitted by the continuous light is modulated into pulse light by the semiconductor optical modulator, and then enters the sensing optical fiber after passing through the optical amplifier and the wavelength division multiplexer in sequence. The sensing signal in the sensing optical fiber is output by the wavelength division multiplexer and then detected by the photodetector, and the detection signal is collected by the ADC subcard.

[0015] The data collection, processing and transmission method comprises the following steps:

[0016] Step S1: When the external trigger signal arrives, the Raman signal enters the ADC acquisition module, and the ADC acquisition module splices the collected four-way data through time-division multiplexing, converts the data into digital signals and data frames through the JESD204B protocol, and sends them to the FPGA;

[0017] Step S2: After the data stream enters the FPGA, it first passes through the first FIFO module to perform cross-clock domain and bit width widening operations. After the data of the first FIFO module is read out by the accumulation controller, the data is written into the DDR storage module through the AXI4 bus write module; when the next trigger signal arrives, the accumulation controller reads out the last accumulated data of the DDR storage module through the AXI4 bus read module, and after superimposing the data with the real-time data currently read from the first FIFO module, the data is again written into the DDR storage module through the AXI4 bus write module; before the accumulation times are completed, the above accumulation operation and storage operation are repeated;

[0018] Step S3: After the accumulation times are completed, the division controller reads the data stored in the DDR storage module through the AXI4 bus reading module, performs average processing, and sends it to the convolutional neural network denoising module; after the convolutional neural network denoising module denoises the data, it sends the data to the bus interface module after crossing the clock domain and reducing the bit width through the second FIFO module;

[0019] Step S4: The bus interface module sends the data to the host computer for storage, drawing and display.

[0020] In step S4, the bus interface module uses XDMA IP to send data to the host computer.

[0021] Compared with the prior art, the present invention has the following beneficial effects:

[0022] The present invention proposes a data acquisition processing and transmission module for long-distance distributed optical fiber sensing, which uses the JESD204 high-speed data transmission interface to transmit ADC data; writes and reads the acquired data into DDR3 through the AXI bus, and completes data alignment; then improves the system signal-to-noise ratio through the cumulative average fusion convolutional neural network denoising algorithm; finally, through the PCIE high-speed serial interface, calls XDMA to send the data to the host computer. Therefore, the present invention can use 2G DDR memory, and at a sampling frequency of 1kHz, theoretically can collect 104 kilometers of optical fiber; in the actual measurement of 1 million points, the cumulative average number can reach 2 million times, and can realize 100 kilometers of long-distance Raman distributed optical fiber system data acquisition and processing, reducing the demand for hardware performance. Moreover, by performing cross-clock domain and data bit width settings through two FIFO modules and utilizing the joint configuration of protocols such as PCIE XDMA AXI4 bus, the present invention can effectively collect 1 million points of data at a 1G sampling rate. In addition, the specific operation of the convolutional neural network denoising algorithm used in the present invention to improve the signal-to-noise ratio of the system is: first, the collected data set is trained, and after the training is completed, it is first placed on Matlab for simulation to test the actual denoising effect, and after the model is taken out, it is transplanted to the FPGA for denoising, which greatly improves the signal-to-noise ratio of data collection. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 A schematic diagram of the overall architecture of a data acquisition, processing and transmission module for long-distance distributed optical fiber sensing provided by an embodiment of the present invention;

[0024] Figure 2 A schematic diagram of an application scenario of a data acquisition, processing and transmission module for long-distance distributed optical fiber sensing provided by the present invention. DETAILED DESCRIPTION

[0025] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all the embodiments; based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0026] like Figure 1 As shown, an embodiment of the present invention provides a data acquisition, processing and transmission module for long-distance Raman distributed optical fiber sensing, including: an ADC daughter card and an FPGA, wherein the ADC daughter card is used to collect sensing data of the Raman distributed optical fiber sensing system, and after converting it into a digital signal, send it to the FPGA through the JESD204B protocol.

[0027] Specifically, in this embodiment, the FPGA is provided with a first FIFO module, an accumulation controller, an AXI4 bus write module, an AXI4 bus read module, a DDR storage module, a division controller, a convolutional neural network denoising module, a second FIFO module, and a bus interface module.

[0028] Specifically, in this embodiment, the first FIFO module is used to receive the data sent by the ADC daughter card through the JESD204B protocol and send it to the accumulation controller; the accumulation controller is used to read the data stored in the DDR storage module through the AXI4 bus read module, and accumulate it with the data sent by the first FIFO module, and store it in the DDR storage module through the AXI4 bus write module; the division controller is used to average the data stored in the DDR storage module after the accumulation is completed, and then send it to the convolutional neural network denoising module; the convolutional neural network denoising module is used to send the averaged data to the second FIFO module through convolution denoising; the second FIFO module is used to cross the clock domain and reduce the bit width of the denoised data and send it to the bus interface module; the bus interface module is used to send the FIFO data to the host computer.

[0029] Specifically, in this embodiment, the bus interface module is a PCIE bus interface module, which sends 128-bit data to a host computer through an XDMA IP for storage, drawing and display.

[0030] Specifically, in this embodiment, the convolutional neural network denoising module uses a CNN neural network model to denoise the data. The CNN neural network model is first trained and simulated by collecting data, and then transplanted to the convolutional neural network denoising module of the FPGA.

[0031] Specifically, in this embodiment, the DDR storage module is a DDR3 storage module.

[0032] Specifically, in this embodiment, the ADC daughter card converts the data into digital signals and then into data frames through the JESD204B protocol, and splices the collected four-way data through time-division multiplexing.

[0033] Specifically, the data acquisition, processing and transmission module for long-distance Raman distributed optical fiber sensing of this embodiment, wherein the data acquisition, processing and transmission method comprises the following steps:

[0034] Step S1: When the external trigger signal arrives, the Raman signal enters the ADC acquisition module. The ADC acquisition module splices the four channels of data collected through time-division multiplexing to achieve a 1G sampling rate, converts the data into a digital signal and a data frame through the JESD204B protocol, and sends it to the FPGA; the ADC acquisition module has four channels, each channel is 16 bits of data, a total of 4 channels, a total of 64 bits of data.

[0035] Step S2: After the data stream enters the FPGA, it first passes through the first FIFO module to perform cross-clock domain and bit width widening operations. After the data of the first FIFO module is read out by the accumulation controller, the data is written into the DDR storage module through the AXI4 bus write module; when the next trigger signal arrives, the accumulation controller reads out the last accumulated data of the DDR storage module through the AXI4 bus read module, and after superimposing the data with the real-time data currently read from the first FIFO module, the data is again written into the DDR storage module through the AXI4 bus write module; before the accumulation times are completed, the above accumulation operation and storage operation are repeated.

[0036] Among them, the first FIFO module performs a bit width widening operation to convert the original 64 bits into 512 bits of data, and because the clock domain of the ADC is 250M, the clock domain of the accumulation controller and the division controller is the same as the DDR storage module, using the 200M clock domain, therefore, the first FIFO module is also required to perform cross-clock domain operations.

[0037] Step S3: The DDR cooperates with the accumulation controller to perform an accumulation and averaging operation. After the accumulation times are completed, the division controller reads the data stored in the DDR storage module through the AXI4 bus, performs an averaging process, and sends it to the convolutional neural network denoising module. After the convolutional neural network denoising module denoises the data, it sends the data to the bus interface module after the data is sent across the clock domain and the bit width is reduced through the second FIFO module.

[0038] Among them, the clock domain of the PCIE bus module adopted in the embodiment of the present invention is 200M, and the data bit width is 128 bits. The bit width and clock domain of the data after passing through the convolutional neural network denoising module are different from those of the PCIE bus module. Therefore, the data is transferred across the clock domain through the second FIFO module, and the bit width is reduced to 128 bits. At this point, the cumulative average fusion convolutional neural network denoising operation of the data is realized.

[0039] Step S4: The bus interface module sends the data to the host computer for storage, drawing and display. The bus interface module uses XDMA IP to send 128-bit data to the host computer.

[0040] like Figure 2As shown, it is a schematic diagram of the application of the present invention. The data acquisition processing and transmission module of the present invention is targeted at the Raman distributed fiber optic sensing system. The Raman distributed fiber optic sensing system includes: continuous light, semiconductor light modulator, optical amplifier, wavelength division multiplexer, sensing fiber, photoelectric detector. The light emitted by the continuous light is modulated into pulses by the semiconductor light modulator, and then enters the sensing fiber after passing through the optical amplifier and wavelength division multiplexer. The sensing signal in the sensing fiber is output by the wavelength division multiplexer and then detected by the photoelectric detector. The detection signal is collected by the ADC subcard. Furthermore, the Raman distributed fiber optic sensing system also includes an optical switch, which is arranged between the wavelength division multiplexer and the sensing fiber, and is used to turn off the light source. The sensing fiber is a multimode fiber.

[0041] In this embodiment, an external trigger simultaneously triggers the light source and the data acquisition, processing and transmission module. The light in the light source successively enters the wavelength division multiplexer, the photodetector and the amplifier, and is finally converted into an analog electrical signal and enters the ADC subcard in the data acquisition, processing and transmission module.

[0042] During specific implementation, make the data acquisition processing and transmission module work, then the signal to be collected and the trigger signal enter the acquisition card; after opening the host computer software, click to open the board, reset, local disk, enable the trigger signal, and finally click to start acquisition. When the acquisition is completed, first pull the trigger signal low, and then click to stop acquisition. If more signal accumulation times are required, the acquisition operation can be performed multiple times, and the collected data can be superimposed and averaged to finally reach the required accumulation times. For example, in this embodiment, the single sampling is set to 65536 times, then through multiple acquisition operations, 65536*N times of data averaging processing can be achieved.

[0043] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A data acquisition, processing and transmission module for long-distance Raman distributed optical fiber sensing, characterized in that: include: An ADC daughter card and an FPGA, wherein the ADC daughter card is used to collect sensing data of a Raman distributed optical fiber sensing system, convert the sensing data into digital signals, and then send the digital signals to the FPGA via the JESD204B protocol; The FPGA is provided with a first FIFO module, an accumulation controller, an AXI4 bus write module, an AXI4 bus read module, a DDR storage module, a division controller, a convolutional neural network denoising module, a second FIFO module, and a bus interface module; The first FIFO module is used to receive the data sent by the ADC daughter card through the JESD204B protocol and send it to the accumulation controller. The accumulation controller is used to read the data stored in the DDR storage module through the AXI4 bus read module, and accumulate it with the data sent by the first FIFO module, and store it in the DDR storage module through the AXI4 bus write module; the division controller is used to average the data stored in the DDR storage module after the accumulation is completed, and then send it to the convolutional neural network denoising module; the convolutional neural network denoising module is used to send the averaged data to the second FIFO module through convolution denoising; the second FIFO module is used to cross the clock domain and reduce the bit width of the denoised data and send it to the bus interface module; the bus interface module is used to send the FIFO data to the host computer.

2. The data acquisition, processing and transmission module for long-distance Raman distributed optical fiber sensing according to claim 1, characterized in that: The bus interface module is a PCIE bus interface module, which sends 128-bit data to the host computer through XDMA IP for storage, drawing and display.

3. The data acquisition, processing and transmission module for long-distance Raman distributed optical fiber sensing according to claim 1, characterized in that: The convolutional neural network denoising module uses a CNN neural network model to denoise the data.

4. The data acquisition, processing and transmission module for long-distance Raman distributed optical fiber sensing according to claim 3, characterized in that: The CNN neural network model is first trained and simulated by collecting data, and then transplanted to the convolutional neural network denoising module of the FPGA.

5. The data acquisition, processing and transmission module for long-distance Raman distributed optical fiber sensing according to claim 1, characterized in that: The DDR memory module is a DDR3 memory module.

6. The data acquisition, processing and transmission module for long-distance Raman distributed optical fiber sensing according to claim 1, characterized in that: The ADC daughter card converts the data into digital signals and data frames through the JESD204B protocol, and splices the collected four-way data through time-division multiplexing.

7. The data acquisition, processing and transmission module for long-distance Raman distributed optical fiber sensing according to claim 1, characterized in that: The Raman distributed optical fiber sensing system comprises: continuous light, a semiconductor optical modulator, an optical amplifier, a wavelength division multiplexer, a sensing optical fiber, and a photodetector. The light emitted by the continuous light is modulated into pulse light by the semiconductor optical modulator, and then enters the sensing optical fiber after passing through the optical amplifier and the wavelength division multiplexer in sequence. The sensing signal in the sensing optical fiber is output by the wavelength division multiplexer and then detected by the photodetector, and the detection signal is collected by the ADC subcard.

8. The data acquisition, processing and transmission module for long-distance Raman distributed optical fiber sensing according to claim 1, characterized in that: The data collection, processing and transmission method comprises the following steps: Step S1: When the external trigger signal arrives, the Raman signal enters the ADC acquisition module, and the ADC acquisition module splices the collected four-way data through time-division multiplexing, converts the data into digital signals and data frames through the JESD204B protocol, and sends them to the FPGA; Step S2: After the data stream enters the FPGA, it first passes through the first FIFO module to perform cross-clock domain and bit width widening operations. After the data of the first FIFO module is read out by the accumulation controller, the data is written into the DDR storage module through the AXI4 bus write module; when the next trigger signal arrives, the accumulation controller reads out the last accumulated data of the DDR storage module through the AXI4 bus read module, and after superimposing the data with the real-time data currently read from the first FIFO module, the data is again written into the DDR storage module through the AXI4 bus write module; before the accumulation times are completed, the above accumulation operation and storage operation are repeated; Step S3: After the accumulation times are completed, the division controller reads the data stored in the DDR storage module through the AXI4 bus reading module, performs average processing, and sends it to the convolutional neural network denoising module; after the convolutional neural network denoising module denoises the data, it sends the data to the bus interface module after crossing the clock domain and reducing the bit width through the second FIFO module; Step S4: The bus interface module sends the data to the host computer for storage, drawing and display.

9. The data acquisition, processing and transmission module for long-distance Raman distributed optical fiber sensing according to claim 8, characterized in that: In step S4, the bus interface module uses XDMA IP to send data to the host computer.