Lithographic masks with high extinction coefficient absorbers and related systems and methods

By using Ru-based materials with high extinction coefficients and multi-layer structures in extreme ultraviolet (EUV) lithography masks, the problems of three-dimensional mask effect and increased exposure energy consumption are solved, and better lithography quality and image contrast are achieved .

CN119511627APending Publication Date: 2025-02-25TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
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Patent Information

Application Number
CN202411417912.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2024-04-05
Filing Date
2024-10-11
Publication Date
2025-02-25

AI Technical Summary

Technical Problem

Existing extreme ultraviolet (EUV) lithography masks face the problems of three-dimensional mask effect and increased exposure energy consumption in large-scale manufacturing, which affects the quality of lithography.

Method used

The Ru-based material with a high extinction coefficient is used as the absorber layer. By forming a reflective multi-layer, a hard mask structure and a buffer layer in the mask, the thickness of the absorber film is reduced, thereby reducing the three-dimensional mask effect and exposure energy.

Benefits of technology

Effectively reduces the three-dimensional mask effect and exposure energy, and improves image quality and spatial image contrast.

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Abstract

The invention relates to a lithographic mask with a high extinction coefficient absorber and related systems and methods. An extreme ultraviolet (EUV) mask and a method of forming an EUV mask are provided. The method includes: forming a mask layer on a semiconductor wafer; generating extreme ultraviolet (EUV) light by the lithographic exposure system; forming patterned EUV light by patterning the EUV light by a mask, the mask including an absorber having an extinction coefficient at an EUV wavelength that exceeds the extinction coefficients of TaBN and TaN at the EUV wavelength; and exposing the mask layer with the patterned EUV light.
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Description

Technical Field

[0001] The present disclosure relates to photolithographic masks having high extinction coefficient absorbers and related systems and methods. Background Art

[0002] The semiconductor integrated circuit (IC) industry has experienced exponential growth. Technological advances in IC materials and design have produced generations of ICs, each with smaller and more complex circuits than the previous one. Over the course of IC evolution, functional density (i.e., the number of interconnected devices per unit chip area) has generally increased, while geometry size (i.e., the smallest component (or line) that can be created using a manufacturing process) has decreased. This scaling down process generally provides benefits by increasing production efficiency and reducing associated costs. However, this scaling down also increases the complexity of processing and manufacturing ICs. Summary of the Invention

[0003] According to one embodiment of the present disclosure, a method for forming an extreme ultraviolet (EUV) mask is provided, comprising: forming a mask layer on a semiconductor wafer; generating extreme ultraviolet (EUV) light by a photolithography exposure system; forming patterned EUV light by patterning the EUV light by a mask, the mask comprising an absorber having an extinction coefficient at an EUV wavelength exceeding the extinction coefficients of TaBN and TaN at the EUV wavelength; and exposing the mask layer by the patterned EUV light.

[0004] According to one embodiment of the present disclosure, a method for forming an extreme ultraviolet (EUV) mask is provided, comprising: forming a reflective multilayer on a substrate, the reflective multilayer being operable to reflect extreme ultraviolet (EUV) light; forming an absorber layer above the reflective multilayer, the absorber layer comprising ruthenium; forming a hard mask structure above the absorber layer; forming an opening in the hard mask structure; and forming an absorber by removing a portion of the absorber layer exposed by the opening in the hard mask structure.

[0005] According to one embodiment of the present disclosure, an extreme ultraviolet (EUV) mask is provided, including: a substrate; a reflective multilayer located on the substrate; and an absorber located on the reflective multilayer, wherein the absorber includes a ruthenium-based material. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Various aspects of the present disclosure may be best understood by the following detailed description when read in conjunction with the accompanying drawings. It should be noted that, in accordance with standard industry practice, various features are not drawn to scale. In fact, the dimensions of various features may be arbitrarily increased or decreased for clarity of discussion.

[0007] Figure 1A and Figure 1Bis a view of a portion of a lithography scanner according to an embodiment of the present disclosure.

[0008] Figure 2-9B are diagrams of various embodiments of a system including a lithographic apparatus and a fuel cell according to various aspects of the present disclosure.

[0009] Figure 10 and Figure 11 is a flow chart of a method of forming a mask according to various aspects of the present disclosure. DETAILED DESCRIPTION

[0010] The following disclosure provides many different embodiments or examples for implementing the different features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the disclosure. Of course, these are merely examples and are not intended to be limiting. For example, in the description below, forming a first feature on or above a second feature may include an embodiment in which the first feature and the second feature are in direct contact, and may also include an embodiment in which an additional feature may be formed between the first feature and the second feature so that the first feature and the second feature may not be in direct contact. In addition, the disclosure may repeat reference numbers and / or letters in various examples. This repetition is for the purpose of simplicity and clarity and does not, by itself, specify the relationship between the various embodiments and / or configurations discussed.

[0011] Furthermore, spatially relative terms such as "below," "beneath," "lower," "above," and "upper" may be used herein to describe the relationship of one element or feature relative to another element(s) or feature(s) as illustrated in the figures. These spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The device may be otherwise oriented (rotated 90 degrees or at other orientations), and the spatially relative descriptors used herein should be interpreted accordingly.

[0012] When a number or range of numbers is described using "about," "approximately," "substantially," or the like, the term is intended to encompass numbers within a reasonable range inclusive of the number, such as within + / - 10% of the number or other value understood by one skilled in the art. As a non-limiting example, the term "about 5 nm" encompasses a size range of 4.5 nm to 5.5 nm.

[0013] The present disclosure relates generally to lithographic apparatus for fabricating semiconductor devices, and more particularly to masks including high-K absorbers that improve the exposure quality associated with the use of extreme ultraviolet (EUV) lithographic equipment. It should be understood that in the context of the embodiments, "high-K" generally refers to a high extinction coefficient.

[0014] EUV mask blanks with thick absorber layers can suffer from high M3D (mask three-dimensional) effects, such as light shadowing. The absorber material of EUV mask blanks impacts high-volume manufacturing for extreme ultraviolet (EUV) lithography. Among the EUV production performance difficulties that can be introduced by the absorber material of EUV masks are the M3D effect and the increased exposure energy consumption due to thicker absorber materials in some methods.

[0015] In an embodiment of the present disclosure, a high-K material is used as an EUV mask substrate, such as a Ru-based material absorber. For example, the mask substrate material according to various embodiments may include a single or double layer of a Ru-based alloy, which may be PtRu, IrRu, OsRu, HfRu, RhRu, PtRuN, IrRuN, OsRuN, HfRuN, RhRuN, PtRuO, IrRuO, OsRuO, HfRuO, RhRuO, PtRuON, IrRuON, OsRuON, HfRuON, RhRuON, etc. Different types of hard mask layers and buffer layers may be included above the absorber to achieve improved patterning by dry etching. The hard mask layer may include 2, 3 or 4 layers in combination with a buffer layer. The material of the (one or more) hard mask layer and the buffer layer may be a Ta-based material, a Si-based material, etc. As non-limiting examples, the hard mask layer(s) and / or buffer layer(s) may include TaBO, TaBN, TaN, Ta2O5, TaO2, TaO, Ta2O, MoSi, MoSiN, MoSiO, SiN, SiON, SiO2, SiCON, SiC, SiCN, CrN, Cr2N, or GaN.

[0016] The high-K material of the EUV mask substrate described herein can reduce the M3D (three-dimensional mask) effect. In an embodiment, the high-K material is used as the absorber layer of the EUV mask substrate to reduce the thickness of the absorber film, which in turn reduces the M3D (three-dimensional mask) effect, exposure energy, and improves image quality. For example, the high-K material of the EUV mask substrate can reduce the exposure energy and increase the spatial image contrast by normalizing the image logarithmic slope (NILS) and the low mask error enhancement factor (MEEF). Image logarithmic slope (ILS) can refer to a method for evaluating the quality of spatial images. The larger the logarithmic slope value of the imaging, the higher the contrast of the spatial imaging, and the better the quality of the imaging.

[0017] Figure 1A is a schematic and diagrammatic view of a lithographic exposure system or apparatus 10 according to some embodiments. The lithographic exposure system 10 is described in detail to provide context for understanding the mask 18, which is formed with reference to FIG. Figure 2-9B Provide a description.

[0018] In some embodiments, the lithography exposure system 10 is an extreme ultraviolet (EUV) lithography system operable to expose a resist layer using EUV radiation, and may also be referred to as an EUV system 10. The EUV system 10 may also be referred to as an EUV scanner or a lithography scanner. According to some embodiments, the lithography exposure system 10 includes a light source 120, an illuminator 140, a mask stage 16, a projection optics module (or projection optics box (POB)) 180, and a substrate stage 24. Elements of the lithography exposure system 10 may be added or omitted, and the present disclosure should not be limited by the embodiments.

[0019] In certain embodiments, light source 120 is configured to generate optical radiation having a wavelength ranging from approximately 1 nm to approximately 300 nm. In one specific example, light source 120 generates EUV radiation having a wavelength centered at approximately or substantially 13.5 nm. Therefore, light source 120 is also referred to as an EUV radiation source. However, it should be understood that light source 120 is not limited to emitting EUV radiation. Light source 120 can be used to perform any high-intensity photon emission that excites a target fuel.

[0020] In various embodiments, the illuminator 140 includes various reflective optical components, such as the reflective optical device 100, which includes a single reflector or a reflective mirror system having multiple reflectors, to direct light from the light source 120 onto the mask stage 16, and in particular, onto the mask 18 fixed to the mask stage 16. In embodiments where the light source 120 generates light in the EUV wavelength range, the reflective optical device is used. In some embodiments, the illuminator 140 includes at least two reflectors, at least three reflectors, or more.

[0021] The mask stage 16 is operable to secure a mask 18. In this disclosure, the terms mask, photomask, and reticle are used interchangeably. In the present embodiment, the mask 18 is a reflective mask. An example structure for the mask 18 includes a substrate having a suitable material, such as a low thermal expansion material (LTEM) or fused silica. In various examples, the LTEM includes SiO2 doped with TiO2 or another suitable material having low thermal expansion. The mask 18 comprises a reflective multilayer deposited on the substrate. In some embodiments, the mask stage 16 includes an electrostatic chuck (e-chuck) capable of securing the mask 18. An electrostatic chuck is beneficial because gas molecules absorb EUV radiation, and the e-chuck can be operated in a lithography exposure system for EUV lithography patterning, which is maintained in a vacuum environment to avoid loss of EUV intensity. The mask stage 16 is operable to translate in two horizontal directions, such as the X-axis and the Y-axis, to expose multiple different areas of the semiconductor wafer 22 to light having a pattern generated by the mask 18. Semiconductor wafer 22 may have a mask layer 26 thereon, which may be a photoresist layer that is sensitive to the light carrying the pattern of mask 18 .

[0022] The projection optics module (or projection optics box (POB)) 180 is operable to image the pattern of the mask 18 onto the semiconductor wafer 22 fixed to the substrate or wafer stage 24 of the lithography exposure system 10. In some embodiments, the POB 180 has reflective optics. Light directed from the mask 18, carrying an image of the pattern on the mask, is collected by the POB 180. The illuminator 140 and the POB 180 may be collectively referred to as an optical module of the lithography exposure system 10. In some embodiments, the POB 180 includes at least six reflective optics, although Figure 1A Four are depicted in .

[0023] In some embodiments, semiconductor wafer 22 may be made of silicon or other semiconductor materials. Alternatively or additionally, semiconductor wafer 22 may include other basic semiconductor materials such as germanium (Ge). In some embodiments, semiconductor wafer 22 is made of a compound semiconductor, such as silicon carbide (SiC), gallium arsenide (GaAs), indium arsenide (InAs), or indium phosphide (InP). In some embodiments, semiconductor wafer 22 is made of an alloy semiconductor, such as silicon germanium (SiGe), silicon germanium carbide (SiGeC), gallium arsenide phosphide (GaAsP), or gallium indium phosphide (GaInP). In some other embodiments, semiconductor wafer 22 may be a silicon-on-insulator (SOI) or germanium-on-insulator (GOI) substrate.

[0024] In addition, the semiconductor wafer 22 can have various device elements. Examples of device elements formed in the semiconductor wafer 22 include transistors (e.g., metal oxide semiconductor field effect transistors (MOSFETs), complementary metal oxide semiconductor (CMOS) transistors, bipolar junction transistors (BJTs), high voltage transistors, high frequency transistors, p-channel and / or n-channel field effect transistors (PFETs / NFETs), etc.), capacitors, inductors, diodes, and / or other applicable elements. Various processes are performed to form the device elements, such as deposition, etching, implantation, photolithography, annealing, and / or other suitable processes. In some embodiments, the semiconductor wafer 22 is coated with a resist layer that is sensitive to EUV radiation. Various components including the above are integrated together and are operable to perform a photolithography process.

[0025] exist Figure 1B, according to some embodiments, light source 120 is shown in a diagrammatic view. In some embodiments, light source 120 employs a dual-pulse laser-produced plasma (LPP) mechanism to generate plasma 88 and further generate EUV radiation from the plasma. Light source 120 includes a droplet generator 30, a droplet receiver 35, a laser generator 50, a laser-produced plasma (LPP) collector 60, a monitoring device 70, and a controller 90. Some or all of the aforementioned elements of light source 120 may be maintained under vacuum. It should be understood that elements of light source 120 may be added or omitted and should not be limited by the embodiments.

[0026] like Figure 1B As shown, the droplet generator 30 is operable to generate a plurality of droplets 82 (which may be elongated) of a target fuel 80 into an excitation zone, where at least one laser pulse 51 from the laser generator 50 impacts the droplets 82. In one embodiment, the target fuel 80 comprises tin (Sn). In one embodiment, the droplets 82 may be formed into an elliptical shape. In one embodiment, the droplets 82 are generated at a rate of approximately 50 kilohertz (kHz) and introduced into the excitation zone in the light source 120 at a speed of approximately 70 meters per second (m / s). Other materials may also be used for the target fuel 80, for example, a tin-containing liquid material, such as a eutectic alloy containing tin, lithium (Li), and xenon (Xe). The target fuel 80 in the droplet generator 30 may be in a liquid phase.

[0027] The laser generator 50 is operable to generate at least one laser pulse to allow the droplet 82 to be converted into a plasma 88. In some embodiments, the laser generator 50 is operable to generate a laser pulse 51 to an illumination point 52 to convert the droplet 82 into a plasma 88 that produces EUV radiation 84. The laser pulse 51 is directed through a window (or lens) 55 and illuminates the droplet 82 at the illumination point 52. The window 55 is formed in the collector 60 and is made of a suitable material that is substantially transparent to the laser pulse 51. The droplet receiver 35 captures and collects unused droplets 82 and / or scattered material from the droplet 82 that is generated by the laser pulse 51 striking the droplet 82. Some of the scattered material may be deposited on various components of the lithography exposure system 10, such as the collector 60 of the light source 120, which is closest to the tin droplet 82 when it is struck by the laser pulse 51.

[0028] The plasma emits EUV radiation 84, which is collected by a collector 60. The collector 60 further reflects and focuses the EUV radiation 84 for use in a lithography process performed by an exposure tool. In some embodiments, the collector 60 has an optical axis 61 that is parallel to the z-axis and perpendicular to the x-axis. The collector 60 can include a single portion, as shown, or at least two portions that are offset from each other in the z-axis direction.

[0029] The photolithography exposure system 10 may include or be integrated (or coupled) with other modules, such as a cleaning module, device, or system 62 operable to provide hydrogen gas to the light source 120, and a tin supply system operable to provide liquid tin to the light source 120. The hydrogen gas is beneficial for reducing contamination in the light source 120. The cleaning system 62 may clean the collector 60 of the light source 120, but is not limited thereto. For example, tin debris 82A may be deposited on various components of the photolithography exposure system 10, and the cleaning system 62 may exhaust hydrogen gas toward the various components to remove the tin debris 82A.

[0030] The collector 60 may further include a container wall 65 having a cleaning system 62 and attached thereto a first pump 66 and a second pump 68. The cleaning system 62 may include one or more nozzles that may be directed toward an area of ​​the lithography exposure system 10, such as the collector 60, to discharge hydrogen gas at high pressure, thereby removing debris 82A from the surface of the collector 60. Cleaning by the cleaning system 62 is beneficial for maintaining the mirror surface of the collector 60, which increases the light output power of the light source 120 and improves wafer yield.

[0031] In one embodiment, the laser generator 50 is a carbon dioxide (CO2) laser source. In some embodiments, the laser generator 50 is operable to generate laser pulses 51 having a single wavelength. The laser pulses 51 are transmitted through an optical component for focusing and determining the angle of incidence of the laser pulses 51. In some embodiments, the laser pulses 51 have a spot size of approximately 200-300 μm, for example, 225 μm. The laser pulses 51 are generated with a selected drive power to meet wafer production targets, such as a yield of 125 wafers per hour (WPH). For example, the laser pulses 51 are equipped with a drive power of approximately 23 kW. In various embodiments, the drive power of the laser pulses 51 is at least 20 kW, for example, 27 kW.

[0032] Monitoring device 70 is operable to monitor one or more conditions in light source 120, thereby generating data for controlling selectable parameters of light source 120. In some embodiments, monitoring device 70 includes a metrology tool 71 and an analyzer 73. If metrology tool 71 is operable to monitor conditions of droplets 82 provided by droplet generator 30, metrology tool 71 may include an image sensor, such as a charge-coupled device (CCD), a complementary metal oxide semiconductor (CMOS) sensor, or the like. Metrology tool 71 generates a monitoring image including an image or video of droplets 82 and transmits the monitoring image to analyzer 73. If metrology tool 71 is configured to detect the energy or intensity of EUV light 84 generated by droplets 82 in light source 120, metrology tool 71 may include a plurality of energy sensors. The energy sensors may be any suitable sensors operable to observe and measure the energy of electromagnetic radiation in the ultraviolet region.

[0033] The analyzer 73 is operable to analyze the signal generated by the metrology tool 71 and output a detection signal to the controller 90 based on the analysis results. For example, the analyzer 73 includes an image analyzer. The analyzer 73 receives data associated with an image transmitted from the metrology tool 71 and performs an image analysis process on the image of the droplet 82 in the excitation region. The analyzer 73 then transmits the data related to the analysis to the controller 90. The analysis may include flow path errors or position errors.

[0034] In some embodiments, two or more metrology tools 71 are operable to monitor different conditions of light source 120. One metrology tool is operable to monitor the conditions of droplets 82 provided by droplet generator 30, and another metrology tool is operable to detect the energy or intensity of EUV light 84 generated by droplets in light source 120. In some embodiments, metrology tool 71 is a final focusing module (FFM) and is positioned in laser source 50 to detect light reflected from droplets 82.

[0035] The controller 90 is operable to control one or more elements of the light source 120, for example, by selecting one or more parameters or variables of the element(s). In some embodiments, the controller 90 is operable to drive the droplet generator 30 to generate droplets 82. In addition, the controller 90 is operable to drive the laser generator 50 to emit laser pulses 51. The generation of the laser pulses 51 can be controlled by the controller 90 to be associated with the generation of the droplets 82, so that the laser pulses 51 sequentially strike each target 80. The controller 90 is operable to control the delivery of hydrogen gas and the exhaust of the waste hydrogen gas via the pumps 66, 68.

[0036] In some embodiments, the droplet generator 30 includes a reservoir 31 and a nozzle assembly 32. The reservoir 31 is configured to hold a target material 80. In some embodiments, a gas line 41 is connected to the reservoir 31 for introducing a pumping gas (e.g., argon) from a gas source 40 into the reservoir 31. By controlling the flow of gas in the gas line 41, the pressure in the reservoir 31 can be manipulated. For example, when gas is continuously supplied to the reservoir 31 via the gas line 41, the pressure within the reservoir 31 increases. As a result, the target material 80 in the reservoir 31 can be squeezed out of the reservoir 31 in the form of droplets 82. The reservoir 31 receives the target material 80, such as liquid tin, from a target supply system, which can include one or more low-pressure reservoirs and one or more high-pressure reservoirs.

[0037] Figure 2-9B is a schematic diagram of a mask 20 at an intermediate stage of formation according to various embodiments. The mask 20 may include a high-K absorber layer or layers 220 having a reduced thickness and beneficial for improving imaging quality.

[0038] Figure 10 and Figure 11 Flowcharts of processes 1000, 2000 are depicted in accordance with various embodiments. In some embodiments, process 1000 for forming a mask includes a plurality of operations (1010, 1020, 1030, 1040, 1050, 1060, and 1070). In some embodiments, process 2000 for patterning a wafer layer via a mask having a high-K absorber includes operations (2010, 2020, and 2030). Processes 1000, 2000 will be further described in accordance with one or more embodiments. It should be noted that the operations of processes 1000, 2000 may be rearranged or otherwise modified within the scope of various aspects. It should also be noted that additional processes may be provided before, during, and after processes 1000, 2000, and that some other processes are only briefly described herein. In some embodiments, process 2000 consists of Figure 1A and Figure 1B The system 10 described in the reference Figure 1A and Figure 1B The embodiment of process 2000 is described using the structural elements described in , but process 2000 may be performed by a system having one or more structural elements different from those of system 10 .

[0039] Figure 2 An unpatterned mask 20 (or simply “mask 20 ”) is depicted having a hard mask structure 230 and a photoresist layer 240 thereon, according to various embodiments.

[0040] The mask 20 includes an absorber structure 220 on a reflective multilayer 270. The absorber structure 220 is operable to absorb incident EUV light, and the reflective multilayer 270 is operable to reflect incident EUV light. By patterning the absorber structure 220 to selectively expose areas of the reflective multilayer 270 according to a selected pattern, the absorber structure 220 is patterned to selectively expose areas of the reflective multilayer 270 when exposed to light (e.g., reference Figure 1A and Figure 1B When EUV light 84 is applied (as described above), a pattern can be transferred through mask 20. In some embodiments, the microstructure of one or more layers 200, 210, 222, 224 of mask 20 is in the polycrystalline range (e.g., grain size less than about 5 nm) or the amorphous range.

[0041] The reflective multilayer 270 may include alternating layers of materials such as molybdenum and silicon. In some embodiments, the reflective multilayer 270 includes one or more layers of materials having an extinction coefficient K < 0.02, such as Ru, Tc, Mo, Nb, Ti, Zr, Y, Sc, etc. For example, the reflective multilayer 270 may include a stack of layers of molybdenum, silicon, ruthenium, and strontium. The silicon layer and the strontium layer may be referred to as spacer layers, and the molybdenum layer and the ruthenium layer may be referred to as reflector layers. The reflective multilayer 270 may include tens or hundreds of spacer / reflector layer pairs (or "bilayers") stacked on top of each other. The thickness of each layer may be uniform throughout the stack, or may vary (e.g., non-periodic) throughout the stack. The thickness of each layer may be in the range of about 5 angstroms to about 50 angstroms. The arrangement of the bilayers may be uniform or non-uniform throughout the stack.

[0042] The absorber structure 220 is on the reflective multilayer 270 and can be or include a single layer or multiple layers. Figure 2 As shown, the absorber structure 220 can be a multilayer comprising a first absorber layer 222 and a second absorber layer 224 on the first absorber layer. The first absorber layer 222 can have a thickness in the range of about 5 nm to about 30 nm and can have a grain size in the polycrystalline or amorphous range, for example less than about 5 nm. The second absorber layer 224 can have a thickness in the range of about 10 nm to about 40 nm or in the range of about 20 nm to about 50 nm and can have a grain size similar to that described for the first absorber layer 222. The total thickness of the absorber structure 220 can be in the range of about 15 nm to about 80 nm. Typically, the total thickness of the absorber structure 220 is less than about 80 nm, less than about 60 nm, or less than about 50 nm. Below about 50 nm, the benefits of reduced M3D effects, reduced exposure energy, and improved NILS are achieved. The thickness can be along Figure 2 The absorbent structure 220 may extend along a first or horizontal direction D1 that is transverse to (eg, perpendicular to) the second direction D2.

[0043] The first absorber layer 222 may be or include a ruthenium-based high-K material, which may be one or more of PtRu, IrRu, OsRu, HfRu, RhRu, PtRuN, IrRuN, OsRuN, HfRuN, RhRuN, RuTa, RuTaO, a RuTa / RuTaO bilayer, etc. In some embodiments, the material may include ruthenium at an atomic concentration (“at %”) in a range of about 40% to about 70%, and may include nitrogen in a range of about 2 at % to about 20 at %.

[0044] The second absorber layer 224 may be or include a ruthenium-based high-K material, which may be one or more of PtRuO, IrRuO, OsRuO, HfRuO, PtRuON, IrRuON, OsRuON, HfRuON, RhRuON, RuTa, RuTaO, a RuTa / RuTaO bilayer, etc. In some embodiments, the material of the second absorber layer 224 includes ruthenium in a range of about 40 at % to about 70 at %, oxygen in a range of about 2 at % to about 20 at %, and nitrogen in a range of about 2 at % to about 20 at %.

[0045] In some embodiments, the first absorber layer 222 or the second absorber layer 224 is omitted. That is, the absorber structure 220 may include the first absorber layer 222, the second absorber layer 224, or both. In some embodiments, additional absorber layers similar to the first absorber layer 222 and / or the second absorber layer 224 are included in the absorber structure 220. That is, the absorber structure 220 may include three or more absorber layers, including, for example, the first absorber layer 222 and / or the second absorber layer 224 just described, and additional layers similar to the first absorber layer 222 and / or the second absorber layer 224.

[0046] The first absorber layer 222 and the second absorber layer 224 include Ru-based high extinction coefficient materials. The extinction coefficients of the first absorber layer 222 and the second absorber layer 224 may be associated with an EUV wavelength, for example, 13.5 nm. The Ru-based material may be selected because it has an extinction coefficient at EUV wavelengths that exceeds that of TaBN and TaN at EUV wavelengths. In some embodiments, other materials other than ruthenium are included when their extinction coefficient(s) exceed the extinction coefficients of TaBN and TaN at EUV wavelengths.

[0047] In some embodiments, a capping layer 200 is present on the upper surface of the reflective multilayer 270. The capping layer 200 is present overlying the reflective multilayer 270 to protect the reflective multilayer 270 from oxidation and other environmental damage. The capping layer 200 can be a ruthenium-based thin layer of one or more materials, such as Ru, RuO, RuNb, RuNbO, RuZr, RuZrN, RuRh, RuON, RuNbN, RuRhN, RuVO, RuV, RuVN, etc. Ruthenium can be selected for its beneficial stability and compatibility with EUV wavelengths. The capping layer 200 can have a thickness in the range of about 2 nm to about 5 nm.

[0048] In some embodiments, a buffer layer or barrier layer 210 is present between the cap layer 200 and the absorber structure 220. The buffer layer 210 can be included between the reflective multilayer 270 and the absorber structure 220 to prevent damage to the cap layer 200 during etching of the absorber structure 220. The buffer layer 210 can be or include CrN, Cr2N, or both. The thickness of the buffer layer 210 can be in the range of about 2 nm to about 20 nm. In some embodiments, the buffer layer 210 is omitted. The cap layer 200 can also serve as an etch stop layer during removal of the buffer layer 210.

[0049] The multilayer reflector 270 is formed on or attached to a substrate 260, which may be or include a low thermal expansion material (LTEM), such as SiO2 doped with TiO2, or other suitable materials. The LTEM substrate 260 is beneficial in maintaining the structural integrity and optical performance of the multilayer reflector 270 under the intense thermal loads experienced during EUV lithography.

[0050] A conductive layer or layers 250 may be present on the underside of the substrate 260. The conductive layer 250 present on the underside of the substrate 260 may be used to attach the mask 20 to the mask stage via the electrostatic chuck. The conductive layer 250 may also improve the thermal conductivity of the mask 20, for example by improving the dissipation of heat generated by the electrostatic chuck and / or during operation of the mask 20.

[0051] The formation of the mask 20 (in brief terms) may include providing a substrate 260, forming a conductive layer 250 on the underside of the substrate 260, forming a multilayer reflector 270 on the upper side of the substrate, forming a capping layer 200 on the multilayer reflector 270, forming an optional buffer layer 210 on the capping layer 200, and forming an absorber structure 220 on the buffer layer 210 or the capping layer 200. Each structure formed on the substrate 260 (e.g., the conductive layer 250, the multilayer reflector 270, the capping layer 200, the optional buffer layer 210, and the absorber structure 220) may be formed by one or more suitable forming operations, which may include physical vapor deposition (PVD), chemical vapor deposition, atomic layer deposition (ALD), etc. The formation of the conductive layer 250 may include any of the methods just mentioned or other methods, such as electroplating, electroless plating, etc.

[0052] The formation of the absorbent structure 220 corresponds to Figure 10Operation 1010. In some embodiments, the absorber structure 220 is or includes a PtRu layer, which can be formed by sputtering, thermal evaporation, metal organic chemical vapor deposition (MOCVD), atomic layer deposition, electroplating, electrophoretic deposition, chemical solution deposition, nanoparticle deposition, combinations thereof, etc. As previously described, the absorber structure 220 can be or include a high extinction coefficient material, which can reduce the thickness of the absorber 220. The absorber structure 220 can be formed to a thickness in a range of about 20 nm to about 50 nm.

[0053] After forming the unpatterned mask 20, a hard mask structure 230 is formed on the unpatterned mask 20, corresponding to Figure 10 Operations 1020, 1030, 1040, 1050. Figure 2 Depicted are four separate hard mask layers 232, 234, 236, 238 included in a hard mask structure 230 on an unpatterned mask 20. According to various embodiments, more than one hard mask layer may be included in the hard mask structure 230. Figure 2 . For example, the hard mask structure 230 may include only the third hard mask layer 236 and the fourth hard mask layer 238, while omitting the first hard mask layer 232 and the second hard mask layer 234. In another example, the hard mask structure 230 may include the second hard mask layer 234, the third hard mask layer 236, and the fourth hard mask layer 238, while omitting the first hard mask layer 232. Typically, the bottommost hard mask layer (e.g., the first hard mask layer 232) of the hard mask structure 230 is in direct contact with the upper surface of the uppermost absorber layer (e.g., the second absorber layer 224) of the absorber structure 220. In some embodiments, Figure 2 One or more additional material layers, not separately shown, may be interposed between the absorber structure 220 and the hard mask structure 230. The total thickness of the hard mask structure 230 in the vertical (eg, Z-axis) direction may be in a range from about 4 nm to about 80 nm.

[0054] A first hard mask layer 232 may be formed on the absorber 220, corresponding to Figure 10 Operation 1020. The first hard mask layer 232 may be or include one or more of CrN, Cr2N, etc., and may have a thickness in the vertical direction ranging from about 2 nm to about 20 nm. The first hard mask layer 232 may be formed by reactive sputtering, cathodic arc deposition, thermal CVD, plasma enhanced CVD (PECVD), ALD, pulsed laser deposition (PLD), or other suitable processes.

[0055] A second hard mask layer 234 may be formed on the first hard mask layer 232, corresponding to Figure 10Operation 1030 is performed. The second hard mask layer 234 may be or include one or more of TaBN, TaN, MoSi, MoSiN, SiN, SiC, SiCN, combinations thereof, and the like, and may have a thickness in the vertical direction ranging from about 2 nm to about 20 nm. In some embodiments, the second hard mask layer 234 is formed by sputtering, e-beam evaporation, thermal CVD, PECVD, MOCVD, ALD, electrochemical deposition, or other suitable processes.

[0056] A third hard mask layer 236 may be formed on the second hard mask layer 234, corresponding to Figure 10 Operation 1040 is performed. The third hard mask layer 236 may be or include one or more of TaBO, Ta2O5, TaO2, TaO, Ta2O, MoSiO, SiON, SiO2, SiCON, combinations thereof, and the like, and may have a thickness in the vertical direction ranging from about 2 nm to about 20 nm. In some embodiments, the third hard mask layer 236 is formed by sputtering, e-beam evaporation, thermal CVD, PECVD, MOCVD, ALD, electrochemical deposition, or other suitable processes.

[0057] A fourth hard mask layer 238 may be formed on the third hard mask layer 236, corresponding to Figure 10 Operation 1050 is performed. The fourth hard mask layer 238 may be or include one or more of CrON, CrCON, GaN, SiO, SiCO, Y2O3, SiCN, SiCON, combinations thereof, and the like, and may have a thickness in the vertical direction ranging from about 2 nm to about 20 nm. In some embodiments, the fourth hard mask layer 238 is formed by sputtering, e-beam evaporation, thermal CVD, PECVD, MOCVD, ALD, electrochemical deposition, or other suitable processes.

[0058] In some embodiments, one or more of the hard mask layers 232, 234, 236, 238 just described can be swapped with another of the hard mask layers 232, 234, 236, 238. For example, the positions of the second hard mask layer 234 and the third hard mask layer 236 can be swapped so that the third hard mask layer 236 is located between the second hard mask layer 234 and the first hard mask layer 232. In another example, the first hard mask layer 232 and the fourth hard mask layer 238 can be swapped so that the fourth hard mask layer is directly adjacent to or in direct contact with the absorber structure 220. In some embodiments, one or more of the hard mask layers 232, 234, 236, 238 are omitted. For example, as described with reference to Figure 4B and Figure 4C As mentioned, in some embodiments, the first hard mask layer 232 , the second hard mask layer 234 , or both are omitted.

[0059] After forming the hard mask structure 230, a resist layer 240 is formed on the hard mask structure 230. The resist layer 240 can be or include one or more of the following: a photoresist layer, a bottom anti-reflective coating (BARC) layer, a combination thereof, etc. The selection of photoresist materials and their components can be beneficial for achieving high resolution and pattern fidelity at the nanoscale. Two types of photoresists include positive photoresists and negative photoresists, and the components of each photoresist are selected for specific applications and manufacturing requirements. After exposure, the positive photoresist becomes more soluble in the developer solution. This characteristic allows the exposed area to be removed, leaving a pattern in which the light changes the solubility of the photoresist. The components of the positive photoresist can include photoactive compounds (PACs), which can be components that undergo chemical changes when exposed to light, typically producing soluble products in the exposed area. The positive photoresist can include a resin that can form the body of the photoresist and provide its mechanical properties. Photoresists may include a solvent that can be used to adjust the viscosity of the photoresist for application purposes. The solvent can be selected for its ability to dissolve the resin and PAC, and the solvent can be evaporated during the pre-bake process. After exposure, the negative photoresist becomes less soluble in the developer solution, so that the exposed areas remain after the development process, thereby forming a negative exposure pattern. Negative photoresists often include PAC as a component, which, unlike positive photoresists, crosslinks the polymer chains in the exposed areas, making them insoluble in the developer. Negative photoresists may include polymers that provide the structural framework of the photoresist, such as epoxy polymers or other polymers that can crosslink when exposed to light. Like positive photoresists, negative photoresists may include a solvent to adjust the viscosity of the photoresist for the coating process, and the solvent can be selected for its ability to dissolve the polymer and PAC. As the semiconductor industry moves towards the nanoscale, photoresists are being developed to provide benefits for extreme ultraviolet (EUV) lithography, electron beam lithography, and immersion lithography. Such "advanced" photoresists can provide higher resolution, lower line edge roughness (LER), and improved sensitivity, and can include chemically amplified resists (CARs) and / or inorganic resists. CARs can be a subclass of positive and negative resists that use a chemical amplification mechanism to increase the sensitivity of the photoresist. This can be achieved through a catalytic reaction triggered by exposure, allowing finer patterns to be produced. In some embodiments, an inorganic resist can be included in the resist layer 240. The inorganic resist can include hafnium-based compounds for EUV lithography, which are beneficial for higher resolution patterning due to their smaller molecular size and higher corrosion resistance.

[0060] exist Figure 3In the process, a pattern including at least one opening 56 is formed in the resist layer 240. The opening 56 can be formed by electron beam (or "e-beam") writing, which can include one or more baking operations and developing operations. During the electron beam writing, a focused electron beam can be scanned over the surface of the resist layer 240. The resist layer 240 can be selected to be sensitive to electron beam exposure. The interaction of the electron beam with the resist layer 240 changes its solubility in the subsequent development stage. For EUV photomasks, the pattern written by the electron beam corresponds to the mask design, which can include complex features to be transferred to the semiconductor wafer during EUV lithography. Electron beam lithography can achieve high resolution and high precision, which is beneficial for the manufacture of EUV photomasks, which benefit from patterning features at the nanometer scale. Resolution can be determined by factors such as beam size, resist sensitivity, and proximity effects (for example, the phenomenon of scattered electrons exposing nearby areas, which may lead to unintended exposure).

[0061] Prior to electron beam exposure, the resist layer 240 may be subjected to a pre-exposure bake to remove any solvent and improve adhesion of the resist layer 240 to the substrate (e.g., absorber 220). This step is beneficial for increasing resist thickness uniformity and reducing defects. After electron beam exposure, a post-exposure bake may be performed, which may promote chemical reactions initiated by the electron beam exposure within the resist layer 240. For chemically amplified resists (CARs), the baking step may activate an acid catalyst generated during exposure, enabling the acid catalyst to decompose or crosslink the polymers of the resist layer 240, depending on whether the resist layer 240 is a positive resist or a negative resist.

[0062] After the post-exposure bake, the development stage can remove either the exposed or unexposed areas of the resist layer 240, depending on whether the resist 240 is positive or negative. In a positive resist, the exposed areas become more soluble and are removed, leaving the patterned resist in the unexposed areas of the resist layer 240. In a negative resist, the exposed areas become insoluble, and the unexposed areas of the resist layer 240 are washed away. After development, the patterned resist of the resist layer 240 reveals the complex pattern that will be used in the subsequent etching process to transfer the pattern to the absorber 220.

[0063] Figure 3 The opening 56 at the illustrated intermediate stage of fabrication can expose the hard mask structure 230. For example, when the fourth hard mask layer 238 is present, the opening 56 can expose the upper surface of the fourth hard mask layer 238. In some embodiments, the opening 56 formed only in the resist layer 240 after the initial patterning of the resist layer 240 can expose the upper surface of the fourth hard mask layer 238, the third hard mask layer 236, the second hard mask layer 234, or the first hard mask layer 232.

[0064] exist Figures 4A-7C In various embodiments, the hard mask structure 230 is patterned, corresponding to Figure 10 Operation 1060.

[0065] exist Figures 4A-4C According to various embodiments, the opening 56 partially extends through the hard mask structure 230 by removing portions of one or more hard mask layers 232 , 234 , 236 , 238 exposed by the opening 56 in the resist layer 240 . Figure 4A A hard mask structure 230 including four hard mask layers 232 , 234 , 236 , 238 is depicted. Figure 4B A hard mask structure 230 including three hard mask layers 234 , 236 , 238 is depicted, wherein the hard mask layer 232 is omitted. Figure 4C A hard mask structure 230 is depicted that includes two hard mask layers 236, 238, with hard mask layers 232, 234 omitted. The hard mask structure 230 can be used to select a minimum feature size ("critical dimension" or "CD") of the mask 20. The minimum feature size can refer to a width or length in a horizontal plane of the mask 20 that is perpendicular to the second direction D2 and does not exceed any other width or length in the mask 20. Typically, the hard mask structure 230 includes at least two hard mask layers, such as hard mask layers 236, 238 and optional hard mask layers 232, 234, which is beneficial for improving pattern profiles when patterning one or more absorber layers of the absorber 220. The ruthenium-based material of the absorber 220 can be relatively more difficult to pattern, which results in an increased number of hard mask layers (e.g., two to four layers) being beneficial for producing a selected pattern profile when etching the absorber layer(s) 222, 224. For example, ruthenium-based materials may have relatively high etch resistance to many etching chemistries and / or plasmas, which may increase the difficulty of selectively removing the ruthenium-based materials without substantially affecting adjacent materials, such as the materials of hard mask layers 232 , 234 , 236 , 238 .

[0066] exist Figure 4A , the hard mask structure 230 includes all four hard mask layers 232, 234, 236, 238, and an extended opening 56' is formed by extending the opening 56 through the second hard mask layer 234, the third hard mask layer 236, and the fourth hard mask layer 238, thereby exposing the first hard mask layer 232 by the extended opening 56'. Extending the opening 56 may include removing portions of the hard mask layers 234, 236, 238 exposed by the opening 56 in the resist layer 240. The removal may include one or more suitable etching operations to remove material of the hard mask layers 234, 236, 238.

[0067] A first etching operation may be performed to remove the material of the fourth hard mask layer 238 using the resist layer 240 as a mask. Figure 2 The fourth hard mask layer 238 may be or include CrON, CrCON, GaN, SiO, SiCO, Y2O3, SiCN, SiCON, or the like, and may have a thickness in a range of about 2 nm to about 20 nm. The first etching operation may be an anisotropic etch, such as a dry etch (e.g., reactive ion etching or "RIE" or inductively coupled plasma etching or "ICP"), which may be a fluorine-based dry etch or a chlorine-based dry etch. The first etching operation may be a high-density plasma (HDP) etch, an atomic layer etch (ALE), or the like. In some embodiments, the fourth hard mask layer 238 is a CrON layer, and the first etching operation is performed using Cl2 and O2 gases. The first etching operation may have a directionality in a second direction D2, which may be a vertical direction perpendicular to the main surface of the fourth hard mask layer 238. The first etching operation may completely etch through the fourth hard mask layer 238 and may stop on the third hard mask layer 236. In some embodiments, the first etching operation continues slightly into the third hard mask layer 236. An upper surface of the third hard mask layer 236 may be exposed after the first etching operation is completed.

[0068] A second etching operation may be performed to remove material of the third hard mask layer 236 using the resist layer 240 and the fourth hard mask layer 238 as a mask. Figure 2 As described above, the third hard mask layer 236 may be or include TaBO, Ta2O5, TaO2, TaO, Ta2O, MoSiO, SiON, SiO2, SiCON, etc., and may have a thickness in the range of about 2 nm to about 20 nm. Figure 4A and Figure 4B In the embodiment, the third hard mask layer 236 includes a material having a different etch selectivity from the fourth hard mask layer 238 and the second hard mask layer 234, so that the second etching operation can stop on the second hard mask layer 234. Figure 4CIn the embodiment of the present invention, the third mask layer 236 includes a material having a different etch selectivity than the fourth hard mask layer 238 and the absorber 220, so that the second etching operation can stop on the absorber 220. The second etching operation can be an anisotropic etch, such as a dry etch (e.g., reactive ion etching or "RIE" or inductively coupled plasma etching or "ICP"), which can be a fluorine-based dry etch or a chlorine-based dry etch. The second etching operation can be a high-density plasma (HDP) etch, an atomic layer etch (ALE), etc. Typically, the second etching operation will have different parameters (e.g., reactant types and / or ratios, RF and / or bias power levels, pressure, gas flow rates, temperature, substrate bias voltage, plasma composition, etc.) than the first etching operation, so that the second etching operation removes material of the third hard mask layer 236 without substantially attacking the fourth hard mask layer 238 or underlying layers, such as the first hard mask layer 232 or the second hard mask layer 234 or the absorber 220. For example, the third hard mask layer 236 may be a TaBO layer, and the second etching operation may use Cl2 and CF4 gases. The second etching operation may have a directionality in a second direction D2, which may be a vertical direction perpendicular to the main surface of the third hard mask layer 236. Figure 4A and Figure 4B In the embodiment shown, the second etching operation may completely etch through the third hard mask layer 236 and may stop on the second hard mask layer 234. Figure 4C In the embodiment of the present invention, the second etching operation may completely etch through the third hard mask layer 236 and may stop on the absorber 220, or may continue slightly into the absorber 220. The upper surface of the second hard mask layer 234 or the absorber 220 may be exposed after the second etching operation is completed.

[0069] exist Figure 4A and Figure 4B In the embodiment of the present invention, a third etching operation of removing the material of the second hard mask layer 234 may be performed using the resist layer 240 and the third hard mask layer 236 and the fourth hard mask layer 238 as a mask. Figure 2 As mentioned above, the second hard mask layer 234 may be or include TaBN, TaN, MoSi, MoSiN, SiN, SiC, SiCN, etc., and may have a thickness in the range of about 2 nm to about 20 nm. Figure 4A In the embodiment, the second hard mask layer 234 includes a material having a different etch selectivity from the first mask layer 232, the third mask layer 236, and the fourth hard mask layer 238, so that the third etching operation can stop on the first hard mask layer 232 without substantially attacking the first hard mask layer 232, the third hard mask layer 236, and the fourth hard mask layer 238. Figure 4BIn the embodiment of the present invention, the second hard mask layer 234 includes a material having a different etch selectivity than the absorber 220 and the third and fourth hard mask layers 236 and 238, so that the third etching operation can stop on the absorber 220 without substantially attacking the absorber 220 and the third and fourth hard mask layers 236 and 238. The third etching operation can be an anisotropic etch, such as a dry etch (e.g., reactive ion etching or "RIE" or inductively coupled plasma etching or "ICP"), which can be a fluorine-based dry etch or a chlorine-based dry etch. The third etching operation can be a high-density plasma (HDP) etch, an atomic layer etch (ALE), etc. Typically, the third etch operation will have different parameters (e.g., reactant types and / or ratios, RF and / or bias power levels, pressure, gas flow rates, temperature, substrate bias voltage, plasma composition, etc.) than the first etch operation and / or the second etch operation such that the third etch operation removes material from the second hard mask layer 234 without substantially attacking the third hard mask layer 236 and the fourth hard mask layer 238 or underlying layers, such as the first hard mask layer 232 ( Figure 4A ) or absorber 220( Figure 4B ). For example, the second hard mask layer 234 may be a TaBN layer, and the third etching process may use Cl2 gas. The third etching operation may have a directionality in a second direction D2, which may be a vertical direction perpendicular to the main surface of the second hard mask layer 234. Figure 4A In the embodiment shown, the third etching operation may completely etch through the second hard mask layer 236 and may stop on the first hard mask layer 232. Figure 4B In the embodiment of the present invention, the third etching operation may stop on the absorber 220, or may continue slightly into the absorber 220. The upper surface of the first hard mask layer 232 or the absorber 220 may be exposed after the third etching operation is completed.

[0070] exist Figure 5A 、 Figure 5B and Figure 5C In the process, the resist layer 240 is removed, for example, by stripping. Figure 5A An embodiment is depicted in which the hard mask structure 230 includes hard mask layers 232 , 234 , 236 , 238 and the resist layer 240 is removed. Figure 5B An embodiment is depicted in which the hard mask structure 230 includes hard mask layers 234 , 236 , 238 and the resist layer 240 is removed. Figure 5C An embodiment is depicted in which the hard mask structure 230 includes hard mask layers 236 , 238 and the resist layer 240 is removed.

[0071] As reference Figures 4A-4C As described above, the absorber 220 is composed of Figure 4B and Figure 4CThe extended opening 56 ′ in FIG. 5 is exposed, wherein the first hard mask layer 232 and the optional second hard mask layer 234 are omitted.

[0072] exist Figure 6 In the removal Figure 5A After the resist layer 240 in the embodiment (wherein the first hard mask layer 232 and the second hard mask layer 234 are present), the exposed portion of the first hard mask layer 232 is removed to form an opening 56 exposing the absorber 220. Figure 2 As described above, the absorbent body 220 may include a single layer 222 or 224, or a plurality of layers including at least two layers 222, 224. The opening 56" may expose the single layer 222 or 224 or the uppermost layer of the plurality of layers 220, such as the absorbent body layer 224.

[0073] The opening 56" may be formed by performing one or more suitable etching operations to remove the portion of the first hard mask layer 232 exposed by the extended opening 56'. As previously described with reference to Figure 2 As described above, the first hard mask layer 232 may be or include CrN, Cr2N, etc., and may have a thickness in the range of about 2 nm to about 20 nm. The fifth etching operation may be anisotropic etching, such as dry etching (e.g., reactive ion etching or "RIE" or inductively coupled plasma etching or "ICP"), which may be fluorine-based dry etching or chlorine-based dry etching. The fifth etching operation may be high-density plasma (HDP) etching, atomic layer etching (ALE), etc. For example, the fifth etching operation may be performed using the second hard mask layer 234, the third hard mask layer 236, and the fourth hard mask layer 238 as a mask to remove the exposed portion of the first hard mask layer 232. In some embodiments, the first hard mask layer 232 is or includes CrN, and the fifth etching operation uses Cl2 and O2 gases as reactive gases in the anisotropic etching. The fifth etching operation may have a directionality in the second direction D2, and the second direction may be a vertical direction perpendicular to the main surface of the first hard mask layer 232. The fifth etching operation can completely etch through the first hard mask layer 232 and can stop on the absorber 220. In some embodiments, the fifth etching operation continues slightly into the absorber 220. The upper surface of the absorber 220 can be exposed after the fifth etching operation is completed. As described above, the first hard mask layer 232 can be patterned using one or more additional hard masks disposed above the first hard mask layer. This feature can provide more fine-tuning of the minimum feature size ("critical dimension" or "CD") in preparation for patterning the absorber 220.

[0074] In reference Figure 4B 、 Figure 4C 、 Figure 5B and Figure 5CIn the depicted embodiment, the fifth etching operation may be omitted, wherein the extended opening 56 ′ directly exposes the absorber 220 .

[0075] In some embodiments, as Figure 6 As shown, the fifth etching operation removes the fourth hard mask layer 238 .

[0076] Figure 7A 、 Figure 7B and Figure 7C Removal of any remaining hard mask layers except for the bottommost hard mask layer of the hard mask structure 230 that is closest to (eg, in direct contact with) the absorber 220 is shown.

[0077] exist Figure 7A , the second hard mask layer 234 and the third hard mask layer 236 are removed, leaving the first hard mask layer 232 on the absorber 220. The upper portion of the opening 56" is removed, leaving an opening 57 in the first hard mask layer 232, and the opening 57 exposes a portion of the absorber 220. The second hard mask layer 234 and the third hard mask layer 236 can be removed by one or more suitable removal operations, such as a stripping operation, followed by a cleaning operation. For example, a wet chemical stripping, dry etching, or other suitable process can be performed that removes the second hard mask layer 234 and the third hard mask layer 236 without substantially altering or damaging underlying structures, such as the first hard mask layer 232 and the absorber 220.

[0078] exist Figure 7B , the third hard mask layer 236 and the fourth hard mask layer 238 are removed, leaving the second hard mask layer 234 on the absorber 220. The upper portion of the opening 56" is removed, leaving an opening 57 in the second hard mask layer 234, which exposes a portion of the absorber 220. The third hard mask layer 236 and the fourth hard mask layer 238 can be removed by one or more suitable removal operations, such as a stripping operation, followed by a cleaning operation. For example, a wet chemical stripping, dry etching, or other suitable process can be performed that removes the third hard mask layer 236 and the fourth hard mask layer 238 without substantially altering or damaging underlying structures, such as the second hard mask layer 234 and the absorber 220.

[0079] exist Figure 7C, the fourth hard mask layer 238 is removed, leaving the third hard mask layer 236 on the absorber 220. The upper portion of the opening 56" is removed, leaving an opening 57 in the third hard mask layer 236, which exposes a portion of the absorber 220. The fourth hard mask layer 238 can be removed by a suitable removal operation, such as a stripping operation, followed by a cleaning operation. For example, a wet chemical stripping, dry etching, or other suitable process can be performed that removes the fourth hard mask layer 238 without substantially altering or damaging the underlying structures, such as the third hard mask layer 236 and the absorber 220.

[0080] exist Figure 8A 、 Figure 8B 、 Figure 8C In, as reference Figures 7A-7C As described, after removing the upper hard mask layer(s), the absorber 220 is patterned, corresponding to Figure 10 Operation 1070. The absorber 220 may be patterned by removing exposed portions of the absorber 220 using the hard mask structure 230 (eg, the first hard mask layer 232, the second hard mask layer 234, or the third hard mask layer 236) as a mask. Figure 2 As described above, the absorber 220 may include a single layer 222 or 224, or may be a multilayer including at least two layers 222, 224. For example, the absorber 220 may include PtRuO, IrRuO, OsRuO, HfRuO, RhRuO, PtRuON, IrRuON, OsRuON, HfRuON, RhRuON, RuTa, RuTaO, PtRu, IrRu, OsRu, HfRu, RhRu, PtRuN, IrRuN, OsRuN, HfRuN, RhRuN, etc. An opening 57' extending through the layer(s) of the absorber 220 is formed to expose the buffer layer 210.

[0081] exist Figure 8AIn the embodiment, the exposed portion of the absorber 220 can be etched by a sixth etching operation and / or a seventh etching operation, which forms an extended opening 57' that exposes the buffer layer 210 using the first hard mask layer 232 as a mask. In an embodiment where the absorber 220 is a single layer, the sixth etching operation can be used to etch the single layer. In an embodiment where the absorber 220 includes a double layer or a multilayer, the sixth etching operation and the seventh etching operation and optional additional etching operations can be used to etch the double layer or the multilayer. The sixth etching operation and / or the seventh etching operation can both be anisotropic etching, such as dry etching (e.g., reactive ion etching or "RIE" or inductively coupled plasma etching or "ICP"), which can be fluorine-based dry etching or chlorine-based dry etching. The sixth etching operation and / or the seventh etching operation can be high density plasma (HDP) etching, atomic layer etching (ALE), etc., respectively. In some embodiments, the absorber 220 includes a single PtRu layer, and the sixth etching operation uses CF4 and O2 as reactive gases.

[0082] exist Figure 8B In the embodiment of the present invention, the exposed portion of the absorber 220 can be etched by a sixth etching operation and / or a seventh etching operation, which forms an extended opening 57' that exposes the buffer layer 210 using the second hard mask layer 234 as a mask. This etching can be similar to the reference Figure 8A The sixth etching operation and / or the seventh etching operation may be anisotropic etching, such as dry etching (e.g., reactive ion etching or "RIE" or inductively coupled plasma etching or "ICP"), which may be fluorine-based dry etching or chlorine-based dry etching. The sixth etching operation and / or the seventh etching operation may be high-density plasma (HDP) etching, atomic layer etching (ALE), etc. In some embodiments, the absorber 220 includes a single PtRu layer, and the sixth etching operation uses CF4 and O2 as reaction gases.

[0083] exist Figure 8C In the embodiment of the present invention, the exposed portion of the absorber 220 can be etched by a sixth etching operation and / or a seventh etching operation, which forms an extended opening 57' that exposes the buffer layer 210 using the third hard mask layer 236 as a mask. This etching can be similar to the reference Figure 8A The sixth etching operation and / or the seventh etching operation may be anisotropic etching, such as dry etching (e.g., reactive ion etching or "RIE" or inductively coupled plasma etching or "ICP"), which may be fluorine-based dry etching or chlorine-based dry etching. The sixth etching operation and / or the seventh etching operation may be high-density plasma (HDP) etching, atomic layer etching (ALE), etc. In some embodiments, the absorber 220 includes a single PtRu layer, and the sixth etching operation uses CF4 and O2 as reaction gases.

[0084] Figure 9A and Figure 9B The formation of an opening 58 is shown, which exposes the cap layer 200 overlying the reflective multilayer 270. The opening 58 can be one of a plurality of openings 58 arranged in a pattern in the absorber 220. The pattern including the openings 58 allows incident light to be absorbed by the absorber 220 outside the openings 58 and allows the incident light to be reflected by the reflective multilayer 270 via the openings 58. Figure 9A In the embodiment, the absorbent body 220 comprises a single layer, which may be a reference Figure 2 The absorber layer 222 or the absorber layer 224. Figure 9B In the embodiment, the absorber 220 includes multiple layers, for example, a double layer including an absorber layer 222 and an absorber layer 224 .

[0085] exist Figure 9A and Figure 9B In the formation Figures 8A-8C After extending opening 57' to expose buffer layer 210, opening 58 is formed to expose cap layer 200 by removing the portion of buffer layer 210 exposed by extended opening 57'. Buffer layer 210 may be or include a CrN or Cr2N layer. Opening 58 may be formed by a removal operation that is selective to the material of buffer layer 210. In some embodiments, first hard mask layer 232 is in place and comprises a material similar to or identical to that of buffer layer 210. As non-limiting examples, hard mask layer 232 and buffer layer 210 may each be formed of the same material as one another, including TaBO, TaBN, TaN, Ta2O5, TaO2, TaO, Ta2O, MoSi, MoSiN, MoSiO, SiN, SiON, SiO2, SiCON, SiC, SiCN, CrN, Cr2N, or GaN. In such embodiments, the removal operation may be a stripping operation that simultaneously removes the exposed portions of first hard mask layer 232 and buffer layer 210. The removal operation may include wet chemical etching, dry etching (e.g., RIE, ICP), or other suitable processes. In embodiments where the removal operation is performed with the second mask layer 234 or the third hard mask layer 236 in place, the second hard mask layer 234 or the third hard mask layer 236 may be removed separately from the removal of the exposed portion(s) of the buffer layer 210. For example, the second hard mask layer 234 or the third hard mask layer 236 may be removed after the exposed portion(s) of the buffer layer 210 are removed.

[0086] Figure 9A and Figure 9BThe mask 20 shown includes an absorber 220 comprising a high-K material, which can reduce the thickness of the absorber film 220, which in turn reduces the M3D effect and exposure energy and improves image quality. The absorber layer 220 comprising the high-K material can be a single layer, a double layer, or a multilayer. Ru-based alloys can be included in the absorber layer(s) 220, such as PtRu, IrRu, OsRu, HfRu, RhRu, PtRuN, IrRuN, OsRuN, HfRuN, RhRuN, PtRuO, IrRuO, OsRuO, HfRuO, RhRuO, PtRuON, IrRuON, OsRuON, HfRuON, RhRuON, etc. The hard mask structure 230 and the buffer layer 210 provide improved patterning by dry etching.

[0087] Figure 11 is a flow chart of a process 2000 for forming an integrated circuit die using a mask including a high extinction coefficient absorber according to various embodiments. In some embodiments, process 2000 includes a plurality of operations (2010, 2020, 2030). In some embodiments, process 2000 can be used to pattern a wafer layer as an intermediate step in forming an integrated circuit die via a mask having a high-K absorber. Process 2000 is described according to one or more embodiments. The operations of process 2000 may be rearranged or otherwise modified within the scope of various aspects. Additional processes may be provided before, during, and after process 2000, and some other processes may be only briefly described herein. In some embodiments, process 2000 is performed by reference to Figure 1A and Figure 1B The system 10 utilizes reference Figure 2-9B The embodiment of process 2000 is performed with reference to the mask 20 described. Figure 1A and Figure 1B as well as Figure 9A and Figure 9B Although described with reference to the structural elements of system 10 , process 2000 may be performed by a system having one or more structural elements different from the structural elements of system 10 and a mask having structural elements different from the structural elements of mask 20 . Figure 11 The process 2000 can be referenced with Figure 1A 、 Figure 1B and Figure 2-9B The system 10 is combined with a mask 20 .

[0088] In operation 2010, EUV radiation is generated. The EUV radiation may be similar to the reference Figure 1A and Figure 1B The light 84.

[0089] In operation 2020, EUV radiation is patterned through a mask having a high-K absorber. The mask may be similar to that of reference Figure 2-9B The mask 20 is described. High-K absorbers can reduce the thickness of the absorber, thereby reducing the M3D effect and exposure energy, and improving image quality. The absorber comprising the high-K material can be a single layer, a double layer, or a multilayer. Ru-based alloys can be included in the high-K absorber, such as PtRu, IrRu, OsRu, HfRu, RhRu, PtRuN, IrRuN, OsRuN, HfRuN, PtRuO, IrRuO, OsRuO, HfRuO, RhRuO, PtRuON, IrRuON, OsRuON, HfRuON, RhRuON, etc.

[0090] In operation 2030, patterned EUV radiation reflected from the reflective multilayer having portions exposed by the openings in the high-K absorber can be directed toward the wafer layer to expose the wafer layer according to the pattern of the mask. For example, EUV radiation 84 can be reflected by the reflective multilayer 270 of the mask 20 having the pattern of the openings 58 in the absorber 220. The patterned EUV radiation can be directed by reference to Figure 1A The projection optical box 180 is directed to the layer 26 on the wafer 22. In some embodiments, the layer 26 is a photoresist layer. Although not necessarily the same as the reference Figure 2 The resist layer 240 is identical to that described, but the patterning of layer 26 can be similar in most respects to that of reference Figure 2 For example, layer 26 may include a positive photoresist or a negative photoresist that may be patterned by exposure to patterned EUV light to increase or decrease the solubility of exposed areas of layer 26, followed by a development process that removes the exposed or unexposed areas of layer 26 to form openings in layer 26. Layer 26 may be used as a mask to pattern (e.g., etched by a suitable etching operation) underlying layers located below layer 26. The etching operation, while not necessarily identical to that of reference 1, may be performed in a similar manner to that of reference 1. Figure 3-9B The operations are the same as those described, but may be similar in many respects to those described, such as the anisotropic etch, which may be a dry etch.

[0091] Embodiments may provide advantages. The high extinction coefficient absorber 220 includes one or more Ru-based alloy materials, which allows for a reduced thickness of the absorber 220, which can reduce M3D effects and exposure energy while improving image quality. The hard mask structure 230 and the buffer layer 210 allow for improved patterning by dry etching.

[0092] According to at least one embodiment, a method includes: forming a mask layer on a semiconductor wafer; generating extreme ultraviolet (EUV) light by a photolithography exposure system; forming patterned EUV light by patterning the EUV light by a mask, the mask including an absorber having an extinction coefficient at an EUV wavelength exceeding the extinction coefficients of TaBN and TaN at the EUV wavelength; and exposing the mask layer with the patterned EUV light.

[0093] In accordance with at least one embodiment, a method includes forming a reflective multilayer on a substrate, the reflective multilayer being operable to reflect extreme ultraviolet (EUV) light; forming an absorber layer over the reflective multilayer, the absorber layer comprising ruthenium; forming a hard mask structure over the absorber layer; forming an opening in the hard mask structure; and forming an absorber by removing a portion of the absorber layer exposed by the opening in the hard mask structure.

[0094] According to at least one embodiment, an extreme ultraviolet (EUV) mask includes: a substrate; a reflective multilayer disposed on the substrate; and an absorber disposed on the reflective multilayer, the absorber including a ruthenium-based material.

[0095] The features of several embodiments have been summarized above so that those skilled in the art can better understand the detailed description that follows. Those skilled in the art should understand that they can easily use this disclosure as a basis for designing or modifying other processes and structures to perform the same purposes and / or achieve the same advantages as the embodiments described herein. Those skilled in the art should also appreciate that such equivalent structures do not depart from the spirit and scope of the present disclosure, and that they can make various modifications, substitutions, and changes to the present disclosure without departing from the spirit and scope of the present disclosure.

[0096] Example 1 is a method for forming an extreme ultraviolet (EUV) mask, comprising: forming a mask layer on a semiconductor wafer; generating extreme ultraviolet (EUV) light by a photolithography exposure system; forming patterned EUV light by patterning the EUV light by a mask, the mask comprising an absorber having an extinction coefficient at an EUV wavelength exceeding the extinction coefficients of TaBN and TaN at the EUV wavelength; and exposing the mask layer by the patterned EUV light.

[0097] Example 2 is the method of Example 1, wherein forming the patterned EUV light includes forming the patterned EUV light through the mask including the absorber having a ruthenium-based alloy.

[0098] Example 3 is the method described in Example 1, wherein the forming of the patterned EUV light includes: forming the patterned EUV light by the mask including the absorber having the following items: a first absorber layer, having a first ruthenium-based alloy; and a second absorber layer, located on the first absorber layer, the second absorber layer having a second ruthenium-based alloy different from the first ruthenium-based alloy.

[0099] Example 4 is the method of Example 1, wherein the forming of the patterned EUV light comprises forming the patterned EUV light through the mask comprising: a reflective multilayer; a buffer layer on the reflective multilayer; and the absorber on the buffer layer.

[0100] Example 5 is the method of Example 4, wherein forming the patterned EUV light includes forming the patterned EUV light through the mask further comprising a capping layer, the capping layer being located between the reflective multilayer and the buffer layer.

[0101] Example 6 is the method of Example 5, wherein the forming the patterned EUV light comprises forming the patterned EUV light by reflecting the EUV light through a portion of the reflective multilayer exposed by an opening, the opening extending through the absorber and the buffer layer.

[0102] Example 7 is a method of forming an extreme ultraviolet (EUV) mask, comprising: forming a reflective multilayer on a substrate, wherein the reflective multilayer is operable to reflect extreme ultraviolet (EUV) light; forming an absorber layer above the reflective multilayer, wherein the absorber layer includes ruthenium; forming a hard mask structure above the absorber layer; forming an opening in the hard mask structure; and forming an absorber by removing a portion of the absorber layer exposed by the opening in the hard mask structure.

[0103] Example 8 is the method described in Example 7, wherein the forming of the hard mask structure includes: forming a first hard mask layer on the absorber layer, the first hard mask layer including a first material; and forming a second hard mask layer on the first hard mask layer, the second hard mask layer including a second material different from the first material.

[0104] Example 9 is the method described in Example 8, wherein the forming of the hard mask structure includes: forming a third hard mask layer on the second hard mask layer, the third hard mask layer including a third material different from the first material and the second material.

[0105] Example 10 is the method described in Example 9, wherein the forming of the hard mask structure includes: forming a fourth hard mask layer on the third hard mask layer, the fourth hard mask layer including a fourth material different from the first material, the second material, and the third material.

[0106] Example 11 is the method described in Example 10, wherein the forming of the absorber includes: forming an opening through the second hard mask layer, the third hard mask layer and the fourth hard mask layer; forming an extended opening by etching the first hard mask layer through the opening; and removing the fourth hard mask layer during the forming of the extended opening.

[0107] Example 12 is the method of Example 10, further comprising: before forming the absorber layer, forming a buffer layer on the reflective multilayer, the buffer layer comprising the first material.

[0108] Example 13 is the method of Example 12, further comprising removing the first hard mask layer during the removal of a portion of the buffer layer exposed by the absorber.

[0109] Example 14 is the method of Example 7, wherein forming the hard mask structure includes forming at least two hard mask layers, each of the at least two hard mask layers having a thickness in a range from about 2 nanometers to about 20 nanometers.

[0110] Example 15 is an extreme ultraviolet (EUV) mask comprising: a substrate; a reflective multilayer disposed on the substrate; and an absorber disposed on the reflective multilayer, the absorber comprising a ruthenium-based material.

[0111] Example 16 is the EUV mask of Example 15, further comprising: a cap layer located on the reflective multilayer; and a buffer layer located between the cap layer and the absorber.

[0112] Example 17 is the EUV mask of Example 16, wherein the buffer layer comprises TaBN, TaN, MoSi, MoSiN, SiN, SiC, or SiCN.

[0113] Example 18 is the EUV mask of Example 15, wherein the absorber includes a layer of a first material, and the first material is PtRuO, IrRuO, OsRuO, HfRuO, RhRuO, PtRuON, IrRuON, OsRuON, HfRuON, RhRuON, RuTa or RuTaO.

[0114] Example 19 is the EUV mask of Example 15, wherein the absorber includes a layer of a second material, and the second material is PtRu, IrRu, OsRu, HfRu, RhRu, PtRuN, IrRuN, OsRuN, HfRuN or RhRuN.

[0115] Example 20 is the EUV mask of Example 15, wherein the absorber comprises at least one absorber layer having a grain size of no more than about 5 nanometers.

Claims

1. A method for forming an extreme ultraviolet (EUV) mask, comprising: forming a mask layer on a semiconductor wafer; Generate extreme ultraviolet EUV light through a lithography exposure system; forming patterned EUV light by patterning the EUV light through a mask, the mask comprising an absorber having an extinction coefficient at an EUV wavelength that exceeds extinction coefficients of TaBN and TaN at the EUV wavelength; and The mask layer is exposed by the patterned EUV light.

2. The method according to claim 1, wherein: The forming of the patterned EUV light includes forming the patterned EUV light through the mask including the absorber having a ruthenium-based alloy.

3. The method according to claim 1, wherein: The forming the patterned EUV light includes forming the patterned EUV light through the mask including the absorber having: a first absorber layer having a first ruthenium-based alloy; and A second absorber layer is located on the first absorber layer, and the second absorber layer has a second ruthenium-based alloy different from the first ruthenium-based alloy.

4. The method according to claim 1, wherein: The forming of the patterned EUV light comprises: forming the patterned EUV light through the mask comprising: Reflective multi-layer; a buffer layer disposed on the reflective multilayer; and The absorber is located on the buffer layer.

5. The method according to claim 4, wherein: The forming of the patterned EUV light includes forming the patterned EUV light through the mask further including a capping layer, the capping layer being located between the reflective multilayer and the buffer layer.

6. The method according to claim 5, wherein: The forming the patterned EUV light includes forming the patterned EUV light by reflecting the EUV light through portions of the reflective multilayer exposed by openings extending through the absorber and the buffer layer.

7. A method for forming an extreme ultraviolet (EUV) mask, comprising: forming a reflective multilayer on a substrate, the reflective multilayer being operable to reflect extreme ultraviolet (EUV) light; forming an absorber layer over the reflective multilayer, the absorber layer comprising ruthenium; forming a hard mask structure over the absorber layer; forming an opening in the hard mask structure; as well as An absorber is formed by removing a portion of the absorber layer exposed by the opening in the hard mask structure.

8. The method according to claim 7, wherein: The forming of the hard mask structure comprises: forming a first hard mask layer on the absorber layer, the first hard mask layer comprising a first material; and A second hard mask layer is formed on the first hard mask layer, the second hard mask layer including a second material different from the first material.

9. The method according to claim 8, wherein: The forming of the hard mask structure comprises: A third hard mask layer is formed on the second hard mask layer, the third hard mask layer including a third material different from the first material and the second material.

10. An extreme ultraviolet (EUV) mask, comprising: substrate; a reflective multilayer disposed on the substrate; as well as The absorber is located on the reflective multilayer, and the absorber includes a ruthenium-based material.