Pixel circuit, display panel, display device and pixel circuit driving method

By designing a pixel circuit including a driving circuit, a data writing circuit, an initialization circuit, an energy storage circuit and a light emitting device, and optimizing scanning signal processing, the problem of many existing pixel circuit driving circuits is solved, and the support for narrow border display is achieved.

CN119516948AActive Publication Date: 2025-02-25BOE TECHNOLOGY GROUP CO LTD +2
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Patent Information

Application Number
CN202510005449.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-01-02
Publication Date
2025-02-25
Estimated Expiration
2045-01-02

AI Technical Summary

Technical Problem

The existing pixel circuit requires multiple scanning signals to drive, resulting in a large number of driving circuits and a large area, which is not conducive to the realization of narrow frame display.

Method used

A pixel circuit is designed, including a driving circuit, a data writing circuit, an initialization circuit, an energy storage circuit and a light emitting device, and by optimizing the processing method of the scan signal, the number of gate driving circuits required is reduced.

Benefits of technology

It realizes that only two sets of gate driving circuits are required for each row of pixel circuits, which reduces the overall number of settings, simplifies the layout, and supports narrow border display.

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Abstract

The invention relates to the technical field of display, particularly provides a pixel circuit, a display panel, a display device and a pixel circuit driving method, and aims to solve the problem that an existing pixel circuit needs to be driven by more scanning signals and is not beneficial to narrow-frame display. In order to achieve the purpose, the pixel circuit comprises a driving circuit, a data write-in circuit, a first initialization circuit, a second initialization circuit, an energy storage circuit and a light emitting device, a control electrode of the first initialization circuit is used for receiving a first scanning signal, a control electrode of the data write-in circuit is used for receiving a second scanning signal, and a control electrode of the second initialization circuit is used for receiving a second scanning signal. And the control electrode of the second initialization circuit is used for receiving a lower-stage first scanning signal, so that only two groups of gate drive circuits need to be arranged for each row of pixel circuits, the overall arrangement number of the gate drive circuits is reduced, and subsequent narrow-frame display can be conveniently realized.
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Description

Technical Field

[0001] The present application relates to the field of display technology, and specifically provides a pixel circuit, a display panel, a display device, and a pixel circuit driving method. Background Art

[0002] At present, each pixel circuit of a display panel generally needs to be driven by multiple scanning signals to realize image display. Different scanning signals usually need to be provided by multiple independently set driving circuits. Therefore, a large number of driving circuits are set, which requires more area and is not conducive to realizing narrow-frame display. Summary of the invention

[0003] The present application aims to solve the above technical problem, that is, to solve the problem that the existing pixel circuit requires more scanning signals to drive, which is not conducive to achieving narrow-frame display.

[0004] In a first aspect, the present application provides a pixel circuit, which includes a driving circuit, a data writing circuit, a first initialization circuit, a second initialization circuit, an energy storage circuit, and a light-emitting device;

[0005] The control electrode of the driving circuit is connected to the first node, and is used to control the driving current of the light emitting device based on the potential of the first node;

[0006] The energy storage circuit comprises a first energy storage subcircuit and a second energy storage subcircuit, the first energy storage subcircuit and the second energy storage subcircuit are connected via a second node, one end of the energy storage circuit is connected to the first node, and the other end of the energy storage circuit is connected to a third node;

[0007] The first electrode of the first initialization circuit is used to receive a reference signal through the second initialization circuit or directly receive a reference signal, the second electrode of the first initialization circuit is connected to the first node, and the control electrode of the first initialization circuit is used to receive a first scanning signal;

[0008] The first electrode of the second initialization circuit is used to receive a reference signal, the second electrode of the second initialization circuit is connected to the second node, and the control electrode of the second initialization circuit is used to receive a lower-level first scanning signal;

[0009] The first electrode of the data writing circuit is used to receive a data signal, the second electrode of the data writing circuit is connected to the first node, and the control electrode of the data writing circuit is used to receive a second scanning signal, and is used to write the data signal into the control electrode of the driving circuit in response to the second scanning signal;

[0010] The light emitting device is arranged on a connection line between the first power supply voltage terminal and the driving circuit;

[0011] The waveform shape of the lower-level first scanning signal is the same as that of the first scanning signal, the lower-level first scanning signal is time delayed relative to the first scanning signal, and the working level time of the lower-level first scanning signal and the first scanning signal partially overlap.

[0012] In some embodiments, the pixel circuit further includes a third initialization circuit and a first light emitting control circuit;

[0013] A first electrode of the third initialization circuit is connected to the first power supply voltage terminal, a second electrode of the third initialization circuit is connected to a connection line between the light emitting device and the driving circuit, and a control electrode of the third initialization circuit is used to receive the first scanning signal, and is used to write the first power supply voltage provided by the first power supply voltage terminal into the cathode of the light emitting device in response to the first scanning signal;

[0014] The first light-emitting control circuit is arranged on a connection line between the third node and the second power supply voltage terminal, and the control electrode of the first light-emitting control circuit is used to receive a first light-emitting control signal, and is used to write the second power supply voltage provided by the second power supply voltage terminal into the third node in response to the first light-emitting control signal.

[0015] In some embodiments, the pixel circuit also includes a second light-emitting control circuit, which is arranged on a connecting line between the light-emitting device and the driving circuit, and a first electrode of the second light-emitting control circuit is connected to a common connection terminal of the third initialization circuit and the light-emitting device, a second electrode of the second light-emitting control circuit is connected to the driving circuit, and a control electrode of the second light-emitting control circuit is used to receive a second light-emitting control signal, and to control the second light-emitting control circuit to be cut off in a preparation stage or a reset stage in response to the second light-emitting control signal.

[0016] In some embodiments, the control electrode of the second light-emitting control circuit is used to receive a lower-level first light-emitting control signal, and the lower-level first light-emitting control signal is used as the second light-emitting control signal. The second light-emitting control signal has the same waveform shape as the first light-emitting control signal, and the delay time of the second light-emitting control signal relative to the first light-emitting control signal is the duration of the working level of the first light-emitting control signal in the reset stage.

[0017] In some embodiments, the second light-emitting control signal has a different waveform shape from the first light-emitting control signal, and the potential of the second light-emitting control signal is opposite to the potential of the first light-emitting control signal during the reset stage and the compensation stage within a pixel driving cycle, and the potential of the second light-emitting control signal is the same as the potential of the first light-emitting control signal during the data writing stage and the light-emitting stage within a pixel driving cycle.

[0018] In some embodiments, the pixel circuit also includes a third light-emitting control circuit, which is arranged on a connecting line between the light-emitting device and the driving circuit, and a first electrode of the third light-emitting control circuit is connected to the light-emitting device, and a second electrode of the third light-emitting control circuit is connected to a common connection terminal of the third initialization circuit and the driving circuit, and a control electrode of the second light-emitting control circuit is used to receive the first light-emitting control signal, and is used to be turned on in response to the first light-emitting control signal to write the first power supply voltage into the cathode of the light-emitting device through the initialization circuit and the third light-emitting control circuit.

[0019] In some embodiments,

[0020] The anode of the light emitting device is connected to the first power supply voltage terminal;

[0021] The driving circuit comprises a first transistor, a first electrode of the first transistor is connected to the cathode of the light emitting device, a second electrode of the first transistor is connected to the third node, and a control electrode of the first transistor is connected to the first node;

[0022] The first initialization circuit includes a second transistor, a first electrode of the second transistor is used to receive a reference signal through the second initialization circuit or directly receive a reference signal, a second electrode of the second transistor is connected to the first node, and a control electrode of the second transistor is used to receive the first scanning signal;

[0023] The data writing circuit comprises a third transistor, a first electrode of the third transistor is used to receive a data signal, a second electrode of the third transistor is connected to the first node, and a control electrode of the third transistor is used to receive the second scanning signal, and is used to write the data signal into the control electrode of the first transistor in response to the second scanning signal;

[0024] The first light emitting control circuit comprises a fourth transistor, a first electrode of the fourth transistor is connected to the third node, a second electrode of the fourth transistor is connected to the second power supply voltage terminal, and a control electrode of the fourth transistor is used to receive a first light emitting control signal, and is used to write the second power supply voltage provided by the second power supply voltage terminal into the third node in response to the first light emitting control signal;

[0025] The second initialization circuit includes a fifth transistor, a first electrode of the fifth transistor is used to receive a reference signal, a second electrode of the fifth transistor is connected to the second node, and a control electrode of the fifth transistor is used to receive a lower-level first scanning signal;

[0026] The third initialization circuit includes a sixth transistor, a first electrode of the sixth transistor is connected to the first power supply voltage terminal, a second electrode of the sixth transistor is connected to a connecting line between the light-emitting device and the driving circuit, and a control electrode of the sixth transistor is used to receive the first scanning signal, and to write the first power supply voltage provided by the first power supply voltage terminal into the cathode of the light-emitting device in response to the first scanning signal.

[0027] In some embodiments, the second light-emitting control circuit includes a seventh transistor, which is arranged on a connecting line between the light-emitting device and the driving circuit, and a first electrode of the seventh transistor is connected to a common connection terminal of the sixth transistor and the light-emitting device, a second electrode of the seventh transistor is connected to a first electrode of the first transistor, and a control electrode of the seventh transistor is used to receive a second light-emitting control signal, and is used to control the seventh transistor to be cut off in a preparation stage or a reset stage in response to the second light-emitting control signal.

[0028] In some embodiments, the third light-emitting control circuit includes an eighth transistor, which is arranged on a connecting line between the light-emitting device and the driving circuit, and a first electrode of the eighth transistor is connected to a cathode of the light-emitting device, and a second electrode of the eighth transistor is connected to a common connection terminal of the sixth transistor and the first transistor, and a control electrode of the eighth transistor is used to receive a first light-emitting control signal, and is used to turn on in response to the first light-emitting control signal to write the first power supply voltage into the cathode of the light-emitting device through the sixth transistor and the eighth transistor.

[0029] In a second aspect, the present application provides a display panel comprising a pixel array, the pixel array comprising a plurality of pixel circuits as described above, the pixel circuits in each row of the pixel array being connected to the first scanning signal line and the second scanning signal line of the corresponding row, and to the first scanning signal line of the next level, and each pixel circuit in the pixel array being also connected to the data signal line and the reference signal line of the corresponding column.

[0030] In some embodiments, the display panel also includes a plurality of cascaded gate drive control circuits, each level of the gate drive control circuit includes a first gate drive control subcircuit and a second gate drive control subcircuit, the first gate drive control subcircuit is connected to the pixel circuit of the corresponding row through the first scanning signal line, and the second gate drive control subcircuit is connected to the pixel circuit of the corresponding row through the second scanning signal line. Among the plurality of drive control circuits, except for the first level of drive control circuit, the first gate drive control subcircuit of the remaining levels of drive control circuits is also connected to the pixel circuit corresponding to the first gate drive control subcircuit at the previous level.

[0031] In a third aspect, the present application provides a display device, comprising any one of the display panels described above.

[0032] In a fourth aspect, the present application provides a pixel circuit driving method, characterized in that it is applied to any of the above pixel circuits, and the method includes:

[0033] In the reset phase, the first initialization circuit is turned on in response to the first scan signal, and the second initialization circuit is turned on in response to the lower first scan signal to write the reference signal into the control electrode of the driving circuit; or the first initialization circuit is turned on in response to the first scan signal to write the reference signal into the control electrode of the driving circuit;

[0034] In the compensation stage, the first initialization circuit, the second initialization circuit and the driving circuit are all turned on to write a threshold voltage into the energy storage circuit;

[0035] In the data writing phase, the second initialization circuit is turned on to maintain the voltage difference between the second node (n)2 and the third node, and the data writing circuit is turned on in response to the second scanning signal to write the data signal into the control electrode of the driving circuit;

[0036] In the light emitting stage, the driving circuit is turned on to provide a driving current to the light emitting device.

[0037] When adopting the above-mentioned technical solution, the present application can set up a pixel circuit including a driving circuit, a data writing circuit, a first initialization circuit, a second initialization circuit, a storage circuit and a light-emitting device, wherein the control electrode of the first initialization circuit is used to receive a first scanning signal, the control electrode of the data writing circuit is used to receive a second scanning signal, and the control electrode of the second initialization circuit is used to receive a lower-level first scanning signal, so that only two groups of gate driving circuits need to be set for each row of pixel circuits, thereby reducing the overall number of gate driving circuit settings, which can facilitate the subsequent realization of narrow-border display. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] The preferred embodiments of the present application are described below in conjunction with the accompanying drawings, in which:

[0039] Figure 1 is a schematic diagram of a pixel circuit structure provided by an embodiment of the present application;

[0040] Figure 2 is a schematic diagram of a pixel circuit structure provided by another embodiment of the present application;

[0041] Figure 3A This application is based on Figure 1 Another schematic diagram of a pixel circuit structure provided by inverting the light emitting device, Figure 3B This application is based on Figure 2 Another schematic diagram of a pixel circuit structure provided by inverting the light emitting device;

[0042] Figure 4A This application is based on Figure 3A A schematic diagram of a pixel circuit structure obtained by setting a second light emitting control circuit, Figure 4B This application is based on Figure 3B A schematic diagram of a pixel circuit structure obtained by setting a second light emitting control circuit;

[0043] Figure 5A This application is based on Figure 3A A schematic diagram of a pixel circuit structure obtained by setting a third light emitting control circuit, Figure 5B This application is based on Figure 3B A schematic diagram of a pixel circuit structure obtained by setting a third light emitting control circuit;

[0044] Fig. 6A Shows this application Figure 3A The corresponding pixel circuit diagram, Figure 6B Shows this application Figure 3B The corresponding pixel circuit diagram;

[0045] Figure 7 Shown with Fig. 6A as well as Figure 6B A timing diagram of the driving method corresponding to the pixel circuit;

[0046] Fig. 8A Shows this application Figure 4A The corresponding pixel circuit diagram, Figure 8B Shows this application Figure 4B The corresponding pixel circuit diagram;

[0047] Fig. 9 Shown with Fig. 8A A timing diagram of the driving method corresponding to the pixel circuit;

[0048] Fig. 10A Shown with Figure 8BThe driving method timing diagram corresponding to the pixel circuit, Fig. 10B Shows another Figure 8B A timing diagram of the driving method corresponding to the pixel circuit;

[0049] Fig.11 This application is based on Figure 6B A pixel circuit diagram obtained by setting an eighth transistor;

[0050] Fig.12 It is a schematic diagram of a display panel provided in an embodiment of the present application. DETAILED DESCRIPTION

[0051] Some embodiments of the present application are described below with reference to the accompanying drawings. Those skilled in the art should understand that these embodiments are only used to explain the technical principles of the present application and are not intended to limit the protection scope of the present application.

[0052] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. "First", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. "Include" or "comprising" and similar words mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" and similar words are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect.

[0053] It should be noted that the transistors used in the embodiments of the present application can be thin film transistors or field effect transistors or other devices with the same characteristics. Since the source and drain of the transistors used are symmetrical, there is no difference between the source and drain. In the embodiments of the present application, in order to distinguish the source and drain of the transistor, one of the poles is called the first pole, the other pole is called the second pole, and the gate is called the control pole. In addition, according to the characteristics of the transistor, the transistor can be divided into N-type and P-type. The following embodiments are explained with N-type transistors. When N-type transistors are used, the first pole is the drain of the N-type transistor, and the second pole is the source of the N-type transistor. When the gate inputs a high level, the source and drain are turned on, the high level is the working level, and the low level is the non-working level; P-type transistors are the opposite. It can be thought that the use of P-type transistors is something that a person skilled in the art can easily think of without creative labor, so it is also within the scope of protection of the embodiments of the present application.

[0054] See also Figure 1 and Figure 2 As shown, Figure 1 is a schematic diagram of a pixel circuit structure provided by an embodiment of the present application, Figure 2 This is a schematic diagram of a pixel circuit structure provided in another embodiment of the present application.

[0055] The pixel circuit may include a driving circuit, a data writing circuit, a first initialization circuit, a second initialization circuit, an energy storage circuit and a light emitting device;

[0056] The control electrode of the driving circuit is connected to the first node N1, and is used to control the driving current of the light emitting device based on the potential of the first node N1;

[0057] The energy storage circuit includes a first energy storage subcircuit and a second energy storage subcircuit, the first energy storage subcircuit and the second energy storage subcircuit are connected via a second node N2, one end of the energy storage circuit is connected to the first node N1, and the other end of the energy storage circuit is connected to a third node N3;

[0058] The first electrode of the first initialization circuit is used to receive a reference signal ref (such as Figure 1 as shown) or directly receive the reference signal ref (as shown Figure 2 As shown), the second electrode of the first initialization circuit is connected to the first node N1, and the control electrode of the first initialization circuit is used to receive the first scanning signal gate1(n);

[0059] The first electrode of the second initialization circuit is used to receive the reference signal ref, the second electrode of the second initialization circuit is connected to the second node N2, and the control electrode of the second initialization circuit is used to receive the lower-level first scanning signal gate1(n+1);

[0060] The first electrode of the data writing circuit is used to receive the data signal data, the second electrode of the data writing circuit is connected to the first node N1, and the control electrode of the data writing circuit is used to receive the second scanning signal gate2(n), and is used to write the data signal data into the control electrode of the driving circuit in response to the second scanning signal gate2(n);

[0061] The light emitting device is arranged on a connection line between the first power supply voltage terminal VDD and the driving circuit;

[0062] Among them, the waveform shapes of the lower-level first scanning signal gate1(n+1) and the first scanning signal gate1(n) are the same, the lower-level first scanning signal gate1(n+1) has a time delay relative to the first scanning signal gate1(n), and the working level time of the lower-level first scanning signal gate1(n+1) and the first scanning signal gate1(n) partially overlap.

[0063] The following is for Figure 1 The pixel circuit structure and its driving method are described as follows:

[0064] In the reset phase, the first initialization circuit is turned on in response to the first scan signal gate1(n), and the second initialization circuit is turned on in response to the lower first scan signal gate1(n+1)gate1(n), so as to write the reference signal ref into the control electrode of the driving circuit;

[0065] In the compensation stage, the first initialization circuit, the second initialization circuit and the driving circuit are all turned on to write the threshold voltage into the energy storage circuit;

[0066] In the data writing stage, the second initialization circuit is turned on to maintain the voltage difference between the second node N2 and the third node N3, and the data writing circuit is turned on in response to the second scanning signal gate2(n) to write the data signal data into the control electrode of the driving circuit;

[0067] In the light-emitting stage, the driving circuit is turned on to provide a driving current to the light-emitting device.

[0068] against Figure 2 The pixel circuit structure, the driving method thereof may also include a reset phase, a compensation phase, a data writing phase and a light emitting phase, wherein the compensation phase, the data writing phase and the light emitting phase may be Figure 1 The driving methods of the corresponding phases of the pixel circuits shown are the same. In the reset phase, the first initialization circuit is turned on in response to the first scanning signal gate1 (n) to write the reference signal ref into the control electrode of the driving circuit.

[0069] In some embodiments, the pixel circuit may further include a third initialization circuit and a first light emitting control circuit;

[0070] When the light emitting device is disposed on the connection line between the first power supply voltage terminal VDD and the driving circuit, that is, when the light emitting device is inverted, see Figure 3A and Figure 3B As shown, Figure 3A This application is based on Figure 1 Another schematic diagram of a pixel circuit structure provided by inverting the light emitting device, Figure 3B This application is based on Figure 2 A schematic diagram of another pixel circuit structure provided by an inverted light-emitting device, wherein a first electrode of a third initialization circuit is connected to a first power supply voltage terminal VDD, a second electrode of the third initialization circuit is connected to a connection line between the light-emitting device and a driving circuit, and a control electrode of the third initialization circuit is used to receive a first scanning signal gate1(n), and is used to write a first power supply voltage provided by the first power supply voltage terminal VDD into a cathode of the light-emitting device in response to the first scanning signal gate1(n);

[0071] The first light-emitting control circuit is arranged on a connection line between the third node N3 and the second power supply voltage terminal VSS. The control electrode of the first light-emitting control circuit is used to receive a first light-emitting control signal EM1(n), and is used to write a second power supply voltage provided by the second power supply voltage terminal VSS into the third node N3 in response to the first light-emitting control signal EM1(n).

[0072] against Figure 3A The pixel circuit, the driving method may further include:

[0073] In the preparation stage before the reset stage, the third initialization circuit is turned on to reset the cathode voltage of the light emitting device to avoid the influence of the light emitting device on the display and improve the uniformity of the subsequent display. The first light emitting control circuit is turned on to write the second power supply voltage into the third node N3, and the source and drain of the driving circuit are reset at the same time. In addition, the first initialization circuit is also turned on to keep the potential of the first node N1 and the second node N2 at the state of the previous moment.

[0074] In some embodiments, Figure 3A The reset phase and compensation phase of the pixel circuit can be the same phase, that is, as the reset and compensation phase, the first initialization circuit and the second initialization circuit are both turned on, the reference signal ref is written into the first node N1 and the second node N2, and the third initialization circuit and the driving circuit are both turned on to write the threshold voltage to the energy storage circuit.

[0075] against Figure 3B The pixel circuit also includes, in the reset stage: the third initialization circuit is turned on to reset the cathode voltage of the light-emitting device, the first light-emitting control circuit is turned on to write the second power supply voltage into the third node N3, and the source and drain of the driving circuit are reset at the same time.

[0076] The compensation stage also includes: the third initialization circuit is turned on, so as to write the threshold voltage into the energy storage circuit through the third initialization circuit and the driving circuit.

[0077] In some embodiments, see Figure 4A and Figure 4BAs shown, when the light-emitting device is arranged on the connection line between the first power supply voltage terminal VDD and the driving circuit, on the basis of the pixel circuit, a second light-emitting control circuit can also be included, the second light-emitting control circuit is arranged on the connection line between the light-emitting device and the driving circuit, and the first electrode of the second light-emitting control circuit is connected to the common connection terminal of the third initialization circuit and the light-emitting device, the second electrode of the second light-emitting control circuit is connected to the driving circuit, and the control electrode of the second light-emitting control circuit is used to receive the second light-emitting control signal EM2(n), and is used to control the second light-emitting control circuit to be cut off in the preparation stage or the reset stage in response to the second light-emitting control signal EM2(n). By controlling the second light-emitting control circuit to be cut off, a path can be avoided between the first power supply voltage terminal VDD, the third initialization circuit, the second light-emitting control circuit, the driving circuit, the first light-emitting control circuit and the second power supply voltage terminal VSS, thereby effectively saving energy consumption. It should be noted that this embodiment can be based on Figure 3A and Figure 3B Get here will be based on Figure 3A As obtained Figure 4A The pixel circuit shown, and based on Figure 3B As obtained Figure 4B The pixel circuit shown is described as an example.

[0078] against Figure 4A The pixel circuit, the driving method may further include:

[0079] In the preparation stage, the second light emitting control circuit is turned off in response to the second light emitting control signal EM2(n) to save power consumption;

[0080] In the reset and compensation phase, the second light emitting control circuit is turned on in response to the second light emitting control signal EM2(n) to write the threshold voltage into the energy storage circuit;

[0081] In the data writing phase, the second light emitting control circuit is turned off in response to the second light emitting control signal EM2(n);

[0082] In the light emitting stage, the second light emitting control circuit is turned on in response to the second light emitting control signal EM2(n) to make the light emitting device emit light.

[0083] against Figure 4B The pixel circuit, the driving method may further include:

[0084] In the reset phase, the second light emitting control circuit is turned off in response to the second light emitting control signal EM2(n) to save power consumption;

[0085] In the compensation phase, the second light emitting control circuit is turned on in response to the second light emitting control signal EM2(n) to write the threshold voltage into the energy storage circuit;

[0086] In the data writing phase, the second light emitting control circuit is turned off in response to the second light emitting control signal EM2(n);

[0087] In the light emitting stage, the second light emitting control circuit is turned on in response to the second light emitting control signal EM2(n) to make the light emitting device emit light.

[0088] In some embodiments, the control electrode of the second light-emitting control circuit is used to receive the first light-emitting control signal EM1(n+1) of the lower level, and the first light-emitting control signal EM1(n+1) of the lower level is used as the second light-emitting control signal EM2(n), the second light-emitting control signal EM2(n) has the same waveform shape as the first light-emitting control signal EM1(n), and the delay time of the second light-emitting control signal EM2(n) relative to the first light-emitting control signal EM1(n) is the duration of the working level of the first light-emitting control signal EM1(n) in the reset stage.

[0089] In other embodiments, the second light-emitting control signal EM2(n) has a different waveform shape from the first light-emitting control signal EM1(n). In the reset stage and the compensation stage within a pixel driving cycle, the potential of the second light-emitting control signal EM2(n) is opposite to the potential of the first light-emitting control signal EM1(n). In the data writing stage and the light-emitting stage within a pixel driving cycle, the potential of the second light-emitting control signal EM2(n) is the same as the potential of the first light-emitting control signal EM1(n).

[0090] In some embodiments, see Figure 5A and Figure 5B As shown, when the light-emitting device is arranged on the connection line between the first power supply voltage terminal VDD and the driving circuit, the pixel circuit further includes a third light-emitting control circuit, which is arranged on the connection line between the light-emitting device and the driving circuit, and the first electrode of the third light-emitting control circuit is connected to the light-emitting device, the second electrode of the third light-emitting control circuit is connected to the common connection terminal of the third initialization circuit and the driving circuit, and the control electrode of the second light-emitting control circuit is used to receive the first light-emitting control signal EM1(n), and is used to turn on in response to the first light-emitting control signal EM1(n) so as to write the first power supply voltage into the cathode of the light-emitting device through the initialization circuit and the third light-emitting control circuit. It should be noted that this embodiment can be based on Figure 3A and Figure 3B Get, here we will use based on Figure 3A As obtained Figure 5A The pixel circuit shown, and based on Figure 3B As obtained Figure 5B The pixel circuit shown is described as an example.

[0091] against Figure 5A The pixel circuit shown, the driving method may further include:

[0092] In the preparation stage, the third light emitting control circuit is turned on in response to the first light emitting control signal EM1(n) to write the first power supply voltage into the cathode of the light emitting device through the third initialization circuit and the third light emitting control circuit;

[0001] In the reset and compensation phase and the data writing phase, the third light emitting control circuit is turned off in response to the first light emitting control signal EM1(n);

[0002] In the light emitting stage, the third light emitting control circuit is turned on in response to the first light emitting control signal EM1(n) to enable the light emitting device to emit light.

[0003] against Figure 5B The pixel circuit shown, the driving method may further include:

[0004] In the reset stage, the third light emitting control circuit is turned on in response to the first light emitting control signal EM1(n) to write the first power supply voltage into the cathode of the light emitting device through the third initialization circuit and the third light emitting control circuit;

[0005] In the compensation phase and the data writing phase, the third light emitting control circuit is turned off in response to the first light emitting control signal EM1(n);

[0006] In the light emitting stage, the third light emitting control circuit is turned on in response to the first light emitting control signal EM1(n) to enable the light emitting device to emit light.

[0007] In some embodiments, when the light emitting device is disposed on a connection line between the first power supply voltage terminal VDD and the driving circuit, Figure 3A The corresponding specific circuit can be found in Fig. 6A As shown, Figure 3B The corresponding specific circuit can be found in Figure 6B shown.

[0008] The anode of the light-emitting device is connected to the first power supply voltage terminal VDD. In the embodiment of the present application, the light-emitting device may be an OLED (Organic Light-Emitting Diode).

[0009] The driving circuit includes a first transistor M1, a first electrode of the first transistor M1 is connected to the cathode of the light emitting device, a second electrode of the first transistor M1 is connected to the third node N3, and a control electrode of the first transistor M1 is connected to the first node N1;

[0010] The first initialization circuit includes a second transistor M2, a first electrode of which is used to receive a reference signal ref (see Fig. 6A as shown) or directly receive the reference signal ref (see Figure 6B), a second electrode of the second transistor M2 is connected to the first node N1, and a control electrode of the second transistor M2 is used to receive a first scanning signal gate1(n);

[0011] The data writing circuit includes a third transistor M3, a first electrode of the third transistor M3 is used to receive the data signal data, a second electrode of the third transistor M3 is connected to the first node N1, and a control electrode of the third transistor M3 is used to receive the second scanning signal gate2(n), and is used to write the data signal data into the control electrode of the first transistor M1 in response to the second scanning signal gate2(n);

[0012] The first light emitting control circuit includes a fourth transistor M4, a first electrode of the fourth transistor M4 is connected to the third node N3, a second electrode of the fourth transistor M4 is connected to the second power supply voltage terminal VSS, and a control electrode of the fourth transistor M4 is used to receive the first light emitting control signal EM1(n), and is used to write the second power supply voltage provided by the second power supply voltage terminal VSS into the third node N3 in response to the first light emitting control signal EM1(n);

[0013] The second initialization circuit includes a fifth transistor M5, a first electrode of the fifth transistor M5 is used to receive a reference signal ref, a second electrode of the fifth transistor M5 is connected to the second node N2, and a control electrode of the fifth transistor M5 is used to receive a lower-level first scanning signal gate1(n+1);

[0014] The third initialization circuit includes a sixth transistor M6, a first electrode of the sixth transistor M6 is connected to the first power supply voltage terminal VDD, a second electrode of the sixth transistor M6 is connected to the connection line between the light emitting device and the driving circuit, and a control electrode of the sixth transistor M6 is used to receive the first scanning signal gate1(n), and is used to write the first power supply voltage provided by the first power supply voltage terminal VDD into the cathode of the light emitting device in response to the first scanning signal gate1(n);

[0015] The first energy storage subcircuit and the second energy storage subcircuit each include a capacitor.

[0016] In some embodiments, see Figure 7 As shown, for Fig. 6A The driving method of the pixel circuit shown may include:

[0017] In the preparation stage, the fourth transistor M4 and the sixth transistor M6 are turned on, the cathode of the light emitting device and the source and drain of the first transistor M1 are reset, the second transistor M2 is turned on, the first node N1 and the second node N2 maintain the state of the previous moment; the third transistor M3 and the fifth transistor M5 are both turned off;

[0018] In the reset and compensation stage, the second transistor M2 and the fifth transistor M5 are turned on, the reference signal ref is written into the first node N1 and the second node N2, the sixth transistor M6 and the first transistor M1 are turned on, the first power supply voltage provided by the first power supply voltage terminal VDD is charged to the energy storage circuit through the sixth transistor M6 and the first transistor M1, and the voltage of the third node N3 can reach Vref-Vth, where Vref represents the voltage provided by the reference signal ref, and Vth represents the threshold voltage; the third transistor M3 and the fourth transistor M4 are both turned off;

[0019] In the data writing stage T3, the third transistor M3 is turned on, the data signal data is written into the first node N1, the fifth transistor M5 is turned on, the second node N2 maintains the voltage of the previous stage, and correspondingly, the third node N3 maintains the voltage of the previous stage; the first transistor M1, the second transistor M2, the fourth transistor M4 and the sixth transistor M6 are all turned off;

[0020] In the light emitting stage, the first transistor M1 and the fourth transistor M4 are turned on, the second power supply voltage provided by the second power supply voltage terminal VSS is written to the third node N3, the corresponding voltage of the first node N1 is Vdata+Vth+VSS-Vref, and the voltage of the second node N2 is Vth+VSS; the second transistor M2, the third transistor M3, the fifth transistor M5 and the sixth transistor M6 are all turned off, where Vdata represents the voltage provided by the data signal data.

[0021] In some embodiments, see Figure 7 As shown, for Figure 6B The driving method of the pixel circuit shown may include:

[0022] In the reset stage, the second transistor M2 is turned on, the reference signal ref is written into the first node N1, the fourth transistor M4 is turned on, the second power supply voltage provided by the second power supply voltage terminal VSS is written into the third node N3, the sixth transistor M6 is turned on, the first power supply voltage provided by the first power supply voltage terminal VDD is written into the cathode of the light emitting device, and the cathode of the light emitting device is reset; the first transistor M1, the third transistor M3 and the fifth transistor M5 are all turned off;

[0023] In the compensation stage, the first transistor M1 and the sixth transistor M6 are both turned on, the first power supply voltage provided by the first power supply voltage terminal VDD charges the energy storage circuit through the sixth transistor M6 and the first transistor M1, and the voltage of the third node N3 can reach Vref-Vth; the second transistor M2 and the fifth transistor M5 are turned on, and the reference signal ref is written into the first node N1 and the second node N2;

[0024] In the data writing stage, the third transistor M3 is turned on, the data signal data is written into the first node N1, the fifth transistor M5 is turned on, the second node N2 maintains the voltage of the previous stage, and correspondingly, the third node N3 maintains the voltage of the previous stage; the first transistor M1, the second transistor M2, the fourth transistor M4 and the sixth transistor M6 are all turned off;

[0025] In the light emitting stage, the first transistor M1 and the fourth transistor M4 are turned on, the second power supply voltage provided by the second power supply voltage terminal VSS is written to the third node N3, the corresponding voltage of the first node N1 is Vdata+Vth+VSS-Vref, and the voltage of the second node N2 is Vth+VSS; the second transistor M2, the third transistor M3 and the sixth transistor M6 are all turned off.

[0026] In some embodiments, Figure 4A The corresponding specific circuit can be found in Fig. 8A As shown, Figure 4B The corresponding specific circuit can be found in Figure 8B As shown, the light emitting device, the driving circuit, the first initialization circuit, the data writing circuit, the first light emitting control circuit, the second initialization circuit and the third initialization circuit can be used and Fig. 6A or Figure 6B Set up the same way.

[0027] The second light emitting control circuit includes a seventh transistor M7, which is arranged on a connection line between the light emitting device and the driving circuit, and a first electrode of the seventh transistor M7 is connected to a common connection terminal of the sixth transistor M6 and the light emitting device, a second electrode of the seventh transistor M7 is connected to a first electrode of the first transistor M1, and a control electrode of the seventh transistor M7 is used to receive a second light emitting control signal EM2(n), and is used to control the seventh transistor M7 to be cut off in a preparation stage or a reset stage in response to the second light emitting control signal EM2(n).

[0028] In some embodiments, Fig. 8A The pixel circuit shown in Fig. 9 As shown, the control electrode of the second light emitting control circuit is used to receive the lower first light emitting control signal EM1(n+1), and the lower first light emitting control signal EM1(n+1) is used as the second light emitting control signal EM2(n). The driving method may also include:

[0029] In the preparation stage, the seventh transistor M7 is turned off in response to the lower first light emitting control signal EM1(n+1) to save power consumption;

[0030] In the reset and compensation phase, the seventh transistor M7 is turned on in response to the lower first light emitting control signal EM1(n+1) to write the threshold voltage into the energy storage circuit;

[0031] In the data writing phase, the seventh transistor M7 is turned off in response to the lower first light emitting control signal EM1(n+1);

[0032] In the holding stage, the lower first light emitting control signal EM1(n+1) is still at a non-operating level, the first light emitting control signal EM1(n) is at an operating level, and the seventh transistor M7 maintains the state of the data writing stage;

[0033] In the light emitting stage, the seventh transistor M7 is turned on in response to the lower first light emitting control signal EM1(n+1) to make the light emitting device emit light.

[0034] In some embodiments, Figure 8B The pixel circuit shown in Fig. 10A As shown, the control electrode of the second light emitting control circuit is used to receive the lower first light emitting control signal EM1(n+1), and the lower first light emitting control signal EM1(n+1) is used as the second light emitting control signal EM2(n). The driving method may also include:

[0035] In the reset phase, the seventh transistor M7 is turned off in response to the lower first light emitting control signal EM1(n+1) to save power consumption;

[0036] In the compensation stage, the seventh transistor M7 is turned on in response to the lower first light emitting control signal EM1(n+1) to write the threshold voltage into the energy storage circuit;

[0037] In the data writing phase, the seventh transistor M7 is turned off in response to the lower first light emitting control signal EM1(n+1);

[0038] In the holding stage, the lower first light emitting control signal EM1(n+1) is still at a non-operating level, the first light emitting control signal EM1(n) is at an operating level, and the seventh transistor M7 maintains the state of the data writing stage;

[0039] In the light emitting stage, the seventh transistor M7 is turned on in response to the lower first light emitting control signal EM1(n+1) to make the light emitting device emit light.

[0040] In some embodiments, Figure 8B The driving process of the pixel circuit shown in FIG. 1 can also omit the holding phase after the data writing phase, see Fig. 10BAs shown, the waveform shape of the second light-emitting control signal EM2(n) is different from that of the first light-emitting control signal EM1(n), and the potential of the second light-emitting control signal EM2(n) is opposite to that of the first light-emitting control signal EM1(n) during the reset stage and the compensation stage in one pixel driving cycle, and the potential of the second light-emitting control signal EM2(n) is the same as that of the first light-emitting control signal EM1(n) during the data writing stage and the light-emitting stage in one pixel driving cycle. The driving method may further include:

[0041] In the reset phase, the seventh transistor M7 is turned off in response to the second light emitting control signal EM2(n) to save power consumption;

[0042] In the compensation phase, the seventh transistor M7 is turned on in response to the second light emitting control signal EM2(n) to write the threshold voltage into the energy storage circuit;

[0043] In the data writing phase, the seventh transistor M7 is turned off in response to the second light emitting control signal EM2(n);

[0044] In the light emitting stage, the seventh transistor M7 is turned on in response to the second light emitting control signal EM2(n) to enable the light emitting device to emit light.

[0045] In some embodiments, see Fig.11 As shown, the third light emitting control circuit includes an eighth transistor M8, which is arranged on a connection line between the light emitting device and the driving circuit, and a first electrode of the eighth transistor M8 is connected to the cathode of the light emitting device, a second electrode of the eighth transistor M8 is connected to a common connection terminal of the sixth transistor M6 and the first transistor M1, and a control electrode of the eighth transistor M8 is used to receive a first light emitting control signal EM1(n), and is used to turn on in response to the first light emitting control signal EM1(n) so as to write the first power supply voltage into the cathode of the light emitting device through the sixth transistor M6 and the eighth transistor M8. It should be noted that this embodiment can be based on Fig. 6A or Figure 6B Implementation, based on Figure 6B Achieve Fig.11 The pixel circuit shown is described as an example.

[0046] In some embodiments, Fig.11 The pixel circuit shown can be used Figure 7 The driving method may further include:

[0047] In the reset phase, the eighth transistor M8 is turned on in response to the first light emitting control signal EM1(n) to write the first power supply voltage into the cathode of the light emitting device through the sixth transistor M6 and the eighth transistor M8;

[0048] In the compensation phase and the data writing phase, the eighth transistor M8 is turned off in response to the first light emitting control signal EM1(n);

[0049] In the light emitting stage, the eighth transistor M8 is turned on in response to the first light emitting control signal EM1(n) to enable the light emitting device to emit light.

[0050] The eighth transistor M8 and the third initialization circuit are used to reset the cathode of the light emitting device, which is beneficial to saving power consumption and achieving flexible control.

[0051] In another aspect of the present application, a display panel is provided. Fig.12 As shown, the display panel may include a pixel array, the pixel array includes the pixel circuit of any of the above embodiments, the pixel circuit of each row in the pixel array is connected to the first scanning signal line SL1(n) and the second scanning signal line SL2(n) of the corresponding row, and is connected to the lower first scanning signal line SL1(n+1), each pixel circuit in the pixel array is also connected to the data signal line DL of the corresponding column and to the reference signal line RL, wherein SL2(n+1) represents the lower second scanning signal line.

[0052] Among them, the first scanning signal line SL1(n) can be used to provide the first scanning signal gate1(n) to the nth row pixel circuit, the second scanning signal line SL2(n) can be used to provide the second scanning signal gate2(n) to the nth row pixel circuit, and the lower-level first scanning signal line SL1(n+1) can be used to provide the lower-level first scanning signal gate1(n+1) to the n+1th and nth row pixel circuits.

[0053] Fig.12 The figure only exemplarily shows the case where the pixel array has two rows and one column, and the specific arrangement of the pixel array is not particularly limited in the embodiment of the present application.

[0054] In some embodiments, see Fig.12 As shown, the display panel also includes a plurality of cascaded gate drive control circuits, each level of the gate drive control circuit includes a first gate drive control sub-circuit and a second gate drive control sub-circuit, the first gate drive control sub-circuit is connected to the pixel circuit of the corresponding row through the first scanning signal line SL1(n), and the second gate drive control sub-circuit is connected to the pixel circuit of the corresponding row through the second scanning signal line SL2(n), and among the plurality of drive control circuits, except for the first level of the drive control circuit, the first gate drive control sub-circuit of the remaining levels of the drive control circuit is also connected to the pixel circuit corresponding to the first gate drive control sub-circuit at the previous level.

[0055] This solution can effectively reduce the occupied area of ​​each drive control circuit by effectively reducing the number of gate drive control sub-circuits, thereby facilitating the realization of narrow-frame display.

[0056] In another aspect of the present application, a display device is provided, which may include the display panel of any of the above embodiments and achieve the same beneficial effects as the display panel embodiments.

[0057] In some embodiments, the display device may be a mobile phone, a tablet computer, a television, or other electronic device with a display function, which are not listed here one by one.

[0058] So far, the technical solutions of the present application have been described in conjunction with the preferred embodiments shown in the accompanying drawings. However, it is easy for those skilled in the art to understand that the protection scope of the present application is obviously not limited to these specific embodiments. Without departing from the principles of the present application, those skilled in the art can make equivalent changes or substitutions to the relevant technical features, and the technical solutions after these changes or substitutions will fall within the protection scope of the present application.

Claims

1. A pixel circuit, characterized in that: It includes a driving circuit, a data writing circuit, a first initialization circuit, a second initialization circuit, an energy storage circuit and a light emitting device; The control electrode of the driving circuit is connected to the first node, and is used to control the driving current of the light emitting device based on the potential of the first node; The energy tank circuit comprises a first energy tank subcircuit and a second energy tank subcircuit, the first energy tank subcircuit and the second energy tank subcircuit are connected via a second node, one end of the energy tank circuit is connected to the first node, and the other end of the energy tank circuit is connected to a third node; The first electrode of the first initialization circuit is used to receive a reference signal through the second initialization circuit or directly receive a reference signal, the second electrode of the first initialization circuit is connected to the first node, and the control electrode of the first initialization circuit is used to receive a first scanning signal; The first electrode of the second initialization circuit is used to receive a reference signal, the second electrode of the second initialization circuit is connected to the second node, and the control electrode of the second initialization circuit is used to receive a lower-level first scanning signal; The first electrode of the data writing circuit is used to receive a data signal, the second electrode of the data writing circuit is connected to the first node, and the control electrode of the data writing circuit is used to receive a second scanning signal, and is used to write the data signal into the control electrode of the driving circuit in response to the second scanning signal; The light emitting device is arranged on a connection line between the first power supply voltage terminal and the driving circuit; The waveform shape of the lower-level first scanning signal is the same as that of the first scanning signal, the lower-level first scanning signal is time delayed relative to the first scanning signal, and the working level time of the lower-level first scanning signal and the first scanning signal partially overlap.

2. The pixel circuit according to claim 1, characterized in that: The pixel circuit further includes a third initialization circuit and a first light emitting control circuit; A first electrode of the third initialization circuit is connected to the first power supply voltage terminal, a second electrode of the third initialization circuit is connected to a connection line between the light emitting device and the driving circuit, and a control electrode of the third initialization circuit is used to receive the first scanning signal, and is used to write the first power supply voltage provided by the first power supply voltage terminal into the cathode of the light emitting device in response to the first scanning signal; The first light-emitting control circuit is arranged on a connection line between the third node and the second power supply voltage terminal, and the control electrode of the first light-emitting control circuit is used to receive a first light-emitting control signal, and is used to write the second power supply voltage provided by the second power supply voltage terminal into the third node in response to the first light-emitting control signal.

3. The pixel circuit according to claim 2, characterized in that: The pixel circuit also includes a second light-emitting control circuit, which is arranged on a connecting line between the light-emitting device and the driving circuit, and a first electrode of the second light-emitting control circuit is connected to a common connection terminal of the third initialization circuit and the light-emitting device, a second electrode of the second light-emitting control circuit is connected to the driving circuit, and a control electrode of the second light-emitting control circuit is used to receive a second light-emitting control signal, and is used to control the second light-emitting control circuit to be cut off in a preparation stage or a reset stage in response to the second light-emitting control signal.

4. The pixel circuit according to claim 3, characterized in that: The control electrode of the second light-emitting control circuit is used to receive the first light-emitting control signal of the lower level, and the first light-emitting control signal of the lower level is used as the second light-emitting control signal. The second light-emitting control signal has the same waveform shape as the first light-emitting control signal, and the delay time of the second light-emitting control signal relative to the first light-emitting control signal is the duration of the working level of the first light-emitting control signal in the reset stage.

5. The pixel circuit according to claim 3, characterized in that: The second light-emitting control signal has a different waveform shape from the first light-emitting control signal. In the reset stage and the compensation stage within a pixel driving cycle, the potential of the second light-emitting control signal is opposite to the potential of the first light-emitting control signal. In the data writing stage and the light-emitting stage within a pixel driving cycle, the potential of the second light-emitting control signal is the same as the potential of the first light-emitting control signal.

6. The pixel circuit according to claim 2, characterized in that: The pixel circuit also includes a third light-emitting control circuit, which is arranged on a connecting line between the light-emitting device and the driving circuit, and a first electrode of the third light-emitting control circuit is connected to the light-emitting device, a second electrode of the third light-emitting control circuit is connected to a common connection terminal of the third initialization circuit and the driving circuit, and a control electrode of the second light-emitting control circuit is used to receive the first light-emitting control signal, and is used to be turned on in response to the first light-emitting control signal to write the first power supply voltage into the cathode of the light-emitting device through the initialization circuit and the third light-emitting control circuit.

7. The pixel circuit according to any one of claims 2 to 6, characterized in that: The anode of the light emitting device is connected to the first power supply voltage terminal; The driving circuit comprises a first transistor, a first electrode of the first transistor is connected to the cathode of the light emitting device, a second electrode of the first transistor is connected to the third node, and a control electrode of the first transistor is connected to the first node; The first initialization circuit includes a second transistor, a first electrode of the second transistor is used to receive a reference signal through the second initialization circuit or directly receive a reference signal, a second electrode of the second transistor is connected to the first node, and a control electrode of the second transistor is used to receive the first scanning signal; The data writing circuit comprises a third transistor, a first electrode of the third transistor is used to receive a data signal, a second electrode of the third transistor is connected to the first node, and a control electrode of the third transistor is used to receive the second scanning signal, and is used to write the data signal into the control electrode of the first transistor in response to the second scanning signal; The first light emitting control circuit comprises a fourth transistor, a first electrode of the fourth transistor is connected to the third node, a second electrode of the fourth transistor is connected to the second power supply voltage terminal, and a control electrode of the fourth transistor is used to receive a first light emitting control signal, and is used to write the second power supply voltage provided by the second power supply voltage terminal into the third node in response to the first light emitting control signal; The second initialization circuit includes a fifth transistor, a first electrode of the fifth transistor is used to receive a reference signal, a second electrode of the fifth transistor is connected to the second node, and a control electrode of the fifth transistor is used to receive a lower-level first scanning signal; The third initialization circuit includes a sixth transistor, a first electrode of the sixth transistor is connected to the first power supply voltage terminal, a second electrode of the sixth transistor is connected to a connecting line between the light-emitting device and the driving circuit, and a control electrode of the sixth transistor is used to receive the first scanning signal, and to write the first power supply voltage provided by the first power supply voltage terminal into the cathode of the light-emitting device in response to the first scanning signal.

8. The pixel circuit according to claim 7, characterized in that: The second light-emitting control circuit includes a seventh transistor, which is arranged on a connecting line between the light-emitting device and the driving circuit, and a first electrode of the seventh transistor is connected to a common connection terminal of the sixth transistor and the light-emitting device, a second electrode of the seventh transistor is connected to a first electrode of the first transistor, and a control electrode of the seventh transistor is used to receive a second light-emitting control signal, and is used to control the seventh transistor to be cut off in a preparation stage or a reset stage in response to the second light-emitting control signal.

9. The pixel circuit according to claim 7, characterized in that: The third light-emitting control circuit includes an eighth transistor, which is arranged on a connecting line between the light-emitting device and the driving circuit, and a first electrode of the eighth transistor is connected to a cathode of the light-emitting device, a second electrode of the eighth transistor is connected to a common connection terminal of the sixth transistor and the first transistor, and a control electrode of the eighth transistor is used to receive a first light-emitting control signal, and is used to be turned on in response to the first light-emitting control signal to write the first power supply voltage into the cathode of the light-emitting device through the sixth transistor and the eighth transistor.

10. A display panel, characterized in that: It comprises a pixel array, the pixel array comprising a plurality of pixel circuits according to any one of claims 1 to 9, the pixel circuits in each row of the pixel array are connected to the first scanning signal line and the second scanning signal line of the corresponding row, and are connected to the first scanning signal line of the next level, and each pixel circuit in the pixel array is also connected to the data signal line and the reference signal line of the corresponding column.

11. The display panel according to claim 10, characterized in that: The display panel also includes a plurality of cascaded gate drive control circuits, each level of the gate drive control circuit includes a first gate drive control subcircuit and a second gate drive control subcircuit, the first gate drive control subcircuit is connected to the pixel circuit of the corresponding row through the first scanning signal line, the second gate drive control subcircuit is connected to the pixel circuit of the corresponding row through the second scanning signal line, and the first gate drive control subcircuit of the drive control circuit of the remaining levels among the plurality of drive control circuits, except for the drive control circuit of the first level, is also connected to the pixel circuit corresponding to the first gate drive control subcircuit of the previous level.

12. A display device, characterized in that: Includes the display panel according to claim 10 or 11.

13. A pixel circuit driving method, characterized in that: Applied to the pixel circuit according to any one of claims 1 to 9, the method comprising: In the reset phase, the first initialization circuit is turned on in response to the first scan signal, and the second initialization circuit is turned on in response to the lower first scan signal to write the reference signal into the control electrode of the driving circuit; or the first initialization circuit is turned on in response to the first scan signal to write the reference signal into the control electrode of the driving circuit; In the compensation stage, the first initialization circuit, the second initialization circuit and the driving circuit are all turned on to write a threshold voltage into the energy storage circuit; In the data writing phase, the second initialization circuit is turned on to maintain the voltage difference between the second node and the third node, and the data writing circuit is turned on in response to the second scanning signal to write the data signal into the control electrode of the driving circuit; In the light emitting stage, the driving circuit is turned on to provide a driving current to the light emitting device.

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