Preparation method of carbon-based semiconductor film material

Abstract

The embodiment of the invention provides a preparation method of a carbon-based semiconductor thin film material, which comprises the following steps: firstly, bonding a semiconductor subjected to ion implantation and a silicon-based substrate with a dielectric layer to obtain a silicon-based semiconductor material, preparing a through hole for releasing the dielectric layer on the silicon-based substrate, providing a through hole from a supporting substrate for releasing the dielectric layer, and finally preparing a carbon-based semiconductor thin film material. The problem that in the prior art, dielectric layer release needs to provide a channel by patterning a semiconductor film is solved, the size limitation of transfer printing of the semiconductor film is broken through, and then preparation of a large-area semiconductor heterogeneous integrated material is achieved. Besides, the heterogeneous material prepared by the transfer printing Van der Waals integration method almost has no amorphous transition area at the interface, has no limitation on the types of composition materials, and is not influenced by physical factors such as lattice mismatch, thermal mismatch and the like.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a method for preparing a carbon-based semiconductor thin film material. Background Art

[0002] Carbon-based materials have excellent mechanical, electrical, and thermodynamic properties and are widely used in aviation, nuclear power, photovoltaics, electronics, and other fields. Heterogeneous integration of semiconductors and carbon-based materials can further release the application potential of semiconductors in power, radio frequency, and other fields. The current heterogeneous integration methods mainly include heterogeneous bonding and heteroepitaxial growth. Due to the carbon-based materials themselves, heterogeneous bonding usually has a low bonding strength with the wafer, which makes it difficult to support subsequent device preparation processes. Heterogeneous epitaxy has a series of problems such as lattice mismatch, thermal mismatch, and growth defects. The transfer method can avoid these difficulties and make it easier to achieve large-scale wafer-level heterogeneous integration of semiconductors and carbon-based materials. In the conventional transfer process, the release of the sacrificial layer requires patterning of the semiconductor film to provide through holes, which greatly limits the size of the transferred film. Therefore, there is an urgent need for a new method for preparing carbon-based semiconductor materials to break through the limitations of the transfer size of semiconductor films and to achieve the preparation of large-area semiconductor heterogeneous integrated materials. Summary of the invention

[0003] In order to solve the above technical problems, this application proposes a carbon-based semiconductor thin film material and a preparation method thereof, so as to further release the application potential of semiconductor materials in power, radio frequency and other fields.

[0004] On the one hand, an embodiment of the present application provides a method for preparing a carbon-based semiconductor thin film material, the preparation method comprising:

[0005] Providing an ion-implanted semiconductor and a silicon-based substrate with a dielectric layer on the surface;

[0006] The ion-implanted semiconductor is bonded to a silicon-based substrate having a dielectric layer on its surface along the dielectric layer to obtain a silicon-based semiconductor material; the silicon-based semiconductor material includes a semiconductor layer, a dielectric layer and a silicon-based substrate in order from top to bottom;

[0007] Performing deep silicon etching on the silicon-based substrate to obtain a through hole for removing the dielectric layer;

[0008] Etching the dielectric layer along the through hole to remove the dielectric layer and obtain a new silicon-based semiconductor material; the new silicon-based semiconductor material comprises a semiconductor layer and a silicon-based substrate from top to bottom;

[0009] A carbon-based material substrate is provided, and a transfer process is performed on a semiconductor layer so that the semiconductor layer is transferred from a silicon-based substrate to a carbon-based material substrate to obtain a carbon-based semiconductor thin film material.

[0010] Furthermore, the ion-implanted semiconductor and the silicon-based substrate having a dielectric layer on the surface are bonded along the dielectric layer to obtain a silicon-based semiconductor material, including:

[0011] First microchannels parallel to each other are prepared on the surface of the semiconductor after ion implantation, and second microchannels parallel to each other are prepared on the surface of the dielectric layer away from the silicon-based substrate; the semiconductor after ion implantation includes a defect layer formed by ion implantation;

[0012] Bonding the ion-implanted semiconductor and the silicon-based material with a dielectric layer on the surface along the surface where the first microchannel is located and the surface where the second microchannel is located, so that mutually interacting channels are formed between the ion-implanted semiconductor and the silicon-based material with a dielectric layer on the surface, thereby obtaining a bonding structure;

[0013] Annealing the bonding structure so that the bonding structure is peeled off along the defective layer to obtain a preset silicon-based semiconductor material;

[0014] The preset silicon-based semiconductor material is planarized to obtain a silicon-based semiconductor material.

[0015] Furthermore, the above-mentioned deep silicon etching of the silicon-based substrate to obtain a through hole for removing the dielectric layer includes:

[0016] An etching mask is applied to a part of the surface of the silicon-based substrate, and deep silicon etching is performed on the area of ​​the silicon-based substrate not coated with the etching mask by alternating passivation and etching to obtain a through hole for removing the dielectric layer.

[0017] Furthermore, the dielectric layer is etched along the through hole to remove the dielectric layer and obtain a new silicon-based semiconductor material, including:

[0018] Applying a protective film on the surface of the semiconductor layer;

[0019] Injecting an etchant along the through hole, and etching the dielectric layer with the etchant to remove the dielectric layer;

[0020] The protective film on the surface of the semiconductor layer is removed to obtain a new silicon-based semiconductor material.

[0021] Furthermore, before providing a carbon-based material substrate and performing transfer processing on the semiconductor layer so as to transfer the semiconductor layer from the silicon-based substrate to the carbon-based material substrate to obtain the carbon-based semiconductor thin film material, the method further comprises:

[0022] preparing a soluble adhesive solution of a preset concentration;

[0023] Applying a soluble adhesive solution onto a substrate, and obtaining a single layer of soluble adhesive after curing, and using the soluble adhesive as the current soluble adhesive;

[0024] Applying a soluble adhesive solution onto the current soluble glue, and obtaining a new soluble glue after curing, and using the new soluble glue as the current soluble glue again;

[0025] Repeatedly apply the soluble adhesive solution to the current soluble glue, obtain new soluble glue after curing, and use the new soluble glue as the current soluble glue again until a soluble glue of a preset thickness is obtained; the soluble glue is used to transfer the semiconductor layer.

[0026] Furthermore, the above provides a carbon-based material substrate, performs transfer processing on the semiconductor layer, so that the semiconductor layer is transferred from the silicon-based substrate to the carbon-based material substrate, and obtains a carbon-based semiconductor thin film material, including:

[0027] Under a preset heating temperature and a preset heating time, the semiconductor layer is subjected to a search process using polydimethylsiloxane glue and a soluble glue to separate the semiconductor layer from the silicon-based substrate, thereby obtaining a soluble glue with a semiconductor layer;

[0028] And use polydimethylsiloxane glue and soluble glue with a semiconductor layer for printing processing, so that the semiconductor layer is transferred from a silicon-based substrate to a carbon-based material substrate to obtain a carbon-based semiconductor film material.

[0029] Furthermore, after providing a carbon-based material substrate and performing transfer processing on the semiconductor layer so as to transfer the semiconductor layer from the silicon-based substrate to the carbon-based material substrate to obtain a carbon-based semiconductor thin film material, the method further comprises:

[0030] The carbon-based semiconductor thin film material is subjected to high-temperature annealing treatment in a vacuum and protective atmosphere to enhance the interface strength between the semiconductor layer and the carbon-based material substrate.

[0031] Furthermore, the dielectric layer is at least one of silicon oxide, silicon nitride, aluminum oxide, aluminum nitride, and hafnium oxide;

[0032] The semiconductor is one of silicon, germanium, silicon carbide, lithium niobate, lithium tantalate, gallium arsenide, indium phosphide, gallium nitride, gallium oxide, zinc oxide, aluminum nitride, and diamond;

[0033] The carbon-based material substrate includes at least one of the material systems with carbon atoms as the skeleton;

[0034] The characteristic dimensions of the first microchannel and the second microchannel are 10 nm-10 μm;

[0035] The surface roughness of the semiconductor layer is less than 0.3 nm and the thickness is 10 nm-10 μm;

[0036] The thickness of the dielectric layer is 1nm-10μm;

[0037] The thickness of the silicon-based substrate is 50 μm-500 μm.

[0038] Furthermore, the conditions for the deep silicon etching are as follows: the gas volume flow rate during passivation is 50 cm 3 / min-500cm 3 / min, power is 1000W-2000W, process time is 1s-60s; gas volume flow rate during etching is 60cm 3 / min-600cm 3 / min, power is 1500W-2500W, process time is 1s-60s;

[0039] The diameter of the through holes is 50-500 microns, and the distance between adjacent through holes is 50 μm-500 μm.

[0040] Further, the above-mentioned preset concentration is 2-20%;

[0041] The thickness of the above-mentioned single layer of soluble glue is 0.05mm-1mm; the thickness of the above-mentioned soluble glue is 0.1mm-10mm;

[0042] The preset heating temperature is 50-200°C, and the preset heating time is 0.1min-100min;

[0043] The annealing temperature of the high temperature annealing treatment is 100°C-1000°C, and the annealing time is 5min-50h.

[0044] On the other hand, an embodiment of the present application further provides a carbon-based semiconductor thin film material, which is prepared by the above-mentioned method for preparing a carbon-based semiconductor thin film material.

[0045] The embodiment of the present application provides a method for preparing a carbon-based semiconductor thin film material. First, a silicon-based semiconductor material is obtained by bonding an ion-implanted semiconductor and a silicon-based substrate with a dielectric layer. A through hole for releasing the dielectric layer is prepared on the silicon-based substrate, and a through hole from the supporting substrate is provided for the release of the dielectric layer. This solves the problem in the prior art that the sacrificial layer release requires providing a channel by patterning the semiconductor film, breaks through the size limitation of the transferred semiconductor film, and realizes the preparation of large-area semiconductor heterogeneous integrated materials. In addition, the heterogeneous material prepared by the van der Waals integration method of transfer printing has almost no amorphous transition region at the interface, has no restrictions on the types of constituent materials, and is not affected by physical factors such as lattice mismatch and thermal mismatch. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] In order to more clearly illustrate the technical solutions and advantages in the embodiments of the present application or the prior art, the drawings required for use in the embodiments or the prior art descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0047] Figure 1 It is a schematic flow chart of a method for preparing a carbon-based semiconductor thin film material provided in an embodiment of the present application.

[0048] Figure 2 This is a schematic diagram of the preparation process of a carbon-based semiconductor thin film material provided in an embodiment of the present application.

[0049] Figure 3 It is a schematic diagram of a process for preparing a semiconductor wafer after ion implantation provided in an embodiment of the present application.

[0050] Figure 4 It is a schematic structural diagram of a silicon-based substrate having a dielectric layer on its surface provided in an embodiment of the present application.

[0051] Figure 5 It is a schematic flow chart of a method for preparing a silicon-based semiconductor material provided in an embodiment of the present application.

[0052] Figure 6 It is a schematic diagram of a preparation process of a silicon-based semiconductor material provided in an embodiment of the present application.

[0053] Figure 7 It is a flow chart of a method for removing a dielectric layer provided in an embodiment of the present application.

[0054] Figure 8 It is a schematic flow chart of a method for preparing a soluble glue provided in an embodiment of the present application.

[0055] Fig. 9 It is a schematic flow chart of a transfer method provided in an embodiment of the present application.

[0056] Fig.10 It is a schematic diagram of a preparation process of a transfer wafer-level semiconductor provided in an embodiment of the present application.

[0057] The following is an explanation of the reference numerals:

[0058] 100-semiconductor layer; 100a-first microfluidic channel preparation surface; 200-silicon-based substrate; 201-through hole; 300-medium layer; 300a-second microfluidic channel preparation surface; 400-defect layer; 500-carbon-based material substrate; 600-soluble glue; 700-polydimethylsiloxane glue; 800-glass slide; 900-solvent. DETAILED DESCRIPTION

[0059] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0060] For example, when describing the embodiments of the present invention in detail, for the sake of convenience, the cross-sectional view showing the device structure will not be partially enlarged according to the general scale, and the schematic view is only an example, which should not limit the scope of protection of the present invention. In addition, in actual production, the three-dimensional space dimensions of length, width and depth should be included.

[0061] For ease of description, spatial relational terms such as “under”, “below”, “below”, “below”, “over”, etc. may be used herein to describe the relationship of one element or feature shown in the drawings to other elements or features. It will be understood that these spatial relational terms are intended to include other orientations of the device in use or operation in addition to the orientation depicted in the drawings, and may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features are formed between the first and second features, so that the first and second features may not be in direct contact. In addition, when a layer is referred to as being “between” two layers, it may be the only layer between the two layers, or one or more intervening layers may also be present.

[0062] It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and therefore the illustrations only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0063] Carbon-based materials have excellent mechanical, electrical, and thermodynamic properties and are widely used in aviation, nuclear power, photovoltaics, electronics and other fields. Heterogeneous integration of semiconductors and carbon-based materials can further unleash the application potential of semiconductors in power, radio frequency and other fields. The current heterogeneous integration methods mainly include heterogeneous bonding and heteroepitaxial growth. Due to the carbon-based materials themselves, heterogeneous bonding usually has low bonding strength with gallium oxide wafers, making it difficult to support subsequent device preparation processes. Heterogeneous epitaxy has a series of problems such as lattice mismatch, thermal mismatch, and growth defects. The transfer method can avoid these difficulties and make it easier to achieve large-scale wafer-level heterogeneous integration of semiconductors and carbon-based materials. In the conventional transfer process, the release of the sacrificial layer requires patterning the semiconductor film to provide through holes, which greatly limits the size of the transferred film.

[0064] Based on this, on the one hand, Figure 1 and Figure 2 As shown, the embodiment of the present application provides a method for preparing a carbon-based semiconductor thin film material, and the preparation method comprises the following steps:

[0065] S10: providing a semiconductor 100 that has been ion-implanted and a silicon-based substrate 200 having a dielectric layer 300 on its surface.

[0066] Illustratively, the ion-implanted semiconductor provided in the embodiments of the present application can be prepared by the following method:

[0067] (1) Providing a semiconductor wafer 100;

[0068] (2) Figure 3 As shown, ion implantation is performed on the semiconductor wafer 100, and a defect layer 400 can be formed at a preset depth of the semiconductor wafer 100, so that material stripping can be achieved at the defect layer 400 later. The preset depth refers to the distance between the implanted defect layer 400 formed after the ion implantation and the ion implantation surface of the semiconductor wafer. The preset depth is set according to the thin film heterostructure that needs to be prepared. When ions are implanted from the ion implantation surface, the energy of the ion implantation is sufficient to make the implanted ions reach the preset depth and form a defect layer 400 at the preset depth.

[0069] Optionally, the implanted ions are not specifically limited, and include but are not limited to hydrogen ion implantation, helium ion implantation, and hydrogen and helium ion co-implantation.

[0070] The silicon-based substrate 200 provided in the embodiment of the present application has a dielectric layer 300 on its surface, such as Figure 4 As shown, it refers to preparing a dielectric layer 300 on the surface of a silicon-based substrate 200, and the dielectric layer 300 is subsequently released as a sacrificial layer. The synthesis method of the silicon-based substrate 200 with the dielectric layer 300 on the surface is not specifically limited, and the silicon-based substrate 200 with the dielectric layer 300 on the surface can be formed by oxidizing or nitriding the surface of the silicon-based substrate 200, or other methods can be used.

[0071] Optionally, the silicon-based substrate 200 includes, but is not limited to, a single crystal silicon substrate, a silicon-on-insulator (SOI), a high-resistance SOI substrate, and silicon-on-sapphire (SOS).

[0072] S30: The ion-implanted semiconductor is bonded to a silicon-based substrate 200 having a dielectric layer 300 on its surface along the dielectric layer 300 to obtain a silicon-based semiconductor material having a dielectric layer; the silicon-based semiconductor material having a dielectric layer includes, from top to bottom, a semiconductor layer 100, a dielectric layer 300 and a silicon-based substrate 200.

[0073] Exemplarily, the ion-implanted semiconductor is bonded to the silicon-based substrate 200 having the dielectric layer 300 on its surface along the surface of the dielectric layer 300. The specific bonding method includes but is not limited to hydrophilic bonding and surface activated bonding to obtain a silicon-based semiconductor material having a dielectric layer. The silicon-based semiconductor material of the dielectric layer 300 includes, from top to bottom, a semiconductor layer 100, a dielectric layer 300 and a silicon-based substrate 200.

[0074] It should be noted that the semiconductor layer 100 includes a defect layer 400 formed by ion implantation.

[0075] S50 : performing deep silicon etching on the silicon-based substrate 200 to obtain a through hole 201 for removing the dielectric layer 300 .

[0076] Exemplarily, in order to remove the dielectric layer 300 and facilitate the transfer of semiconductor materials over a large area, the silicon-based substrate 200 is subjected to deep silicon etching to obtain a through hole 201 for removing the dielectric layer 300 , thereby exposing the dielectric layer 300 .

[0077] The height 200 of the through hole is the same as the height of the silicon-based substrate 200 .

[0078] S70: etching the dielectric layer 300 along the through hole 201 to remove the dielectric layer 300 and obtain a new silicon-based semiconductor material; the new silicon-based semiconductor material is a semiconductor layer 100 and a silicon-based substrate 200 from top to bottom.

[0079] Exemplarily, the dielectric layer 300 is etched to remove the dielectric layer 300, exposing the semiconductor layer 100, which can be picked up or retrieved by the soluble glue 600 used in the transfer process, thereby obtaining a new silicon-based semiconductor material including the semiconductor layer 100 and the silicon-based substrate 200.

[0080] S90: providing a carbon-based material substrate 500, and performing transfer processing on the semiconductor layer 100, so that the semiconductor layer 100 is transferred from the silicon-based substrate 200 to the carbon-based material substrate 500, to obtain a carbon-based semiconductor thin film material.

[0081] Exemplarily, a carbon-based material substrate 500 is provided, and the semiconductor layer 100 located on the silicon-based substrate 200 is transferred to the carbon-based material substrate 500 by transfer technology to obtain a carbon-based semiconductor thin film material.

[0082] The embodiment of the present application first obtains a silicon-based semiconductor material by bonding an ion-implanted semiconductor and a silicon-based substrate 200 having a dielectric layer 300, and then prepares a through hole 201 for releasing the dielectric layer 300 on the silicon-based substrate 200, thereby providing a through hole 201 from the supporting substrate for releasing the dielectric layer 300, thereby solving the problem in the prior art that the sacrificial layer release requires providing a channel by patterning the semiconductor film, breaking through the size limitation of the transfer semiconductor film transfer, and thus realizing the preparation of large-area semiconductor heterogeneous integrated materials. In addition, the heterogeneous material prepared by the van der Waals integration method of transfer printing has almost no amorphous transition region at the interface, and there is no restriction on the type of constituent materials, and is not affected by physical factors such as lattice mismatch and thermal mismatch.

[0083] As an optional implementation, in the above step S30, if Figure 5 and Figure 6 As shown, the ion-implanted semiconductor is bonded to a silicon-based substrate 200 having a dielectric layer 300 on its surface, and a bonding process is performed along the dielectric layer 300 to obtain a silicon-based semiconductor material, including:

[0084] S31: preparing mutually parallel first microchannels on the surface of the ion-implanted semiconductor, and preparing mutually parallel second microchannels on the surface of the dielectric layer 300 away from the silicon-based substrate 200; the ion-implanted semiconductor includes a defect layer 400 formed by ion implantation.

[0085] For example, Figure 6 As shown, first microchannels parallel to each other are prepared on a side surface 100 a of the semiconductor after ion implantation, and second microchannels parallel to each other are prepared on a side surface 300 a of the dielectric layer 300 away from the silicon-based substrate 200 .

[0086] As an optional embodiment, the dielectric layer 300 is at least one of silicon oxide, silicon nitride, aluminum oxide, aluminum nitride, and hafnium oxide; the semiconductor is one of silicon, germanium, silicon carbide, lithium niobate, lithium tantalate, gallium arsenide, indium phosphide, gallium nitride, gallium oxide, zinc oxide, aluminum nitride, and diamond.

[0087] As an optional implementation, the characteristic size of the first microchannel and the second microchannel is 10 nm-10 μm.

[0088] Optionally, the method of preparing the first microfluidic channel and the second microfluidic channel includes but is not limited to laser etching, photolithography, electron beam direct writing, femtosecond laser direct writing, and ultrafast laser direct writing.

[0089] S32: Bonding the ion-implanted semiconductor and the silicon-based material having a dielectric layer 300 on the surface along the surface where the first microchannel is located and the surface where the second microchannel is located, so that mutually interacting channels are formed between the ion-implanted semiconductor 100 and the silicon-based material having a dielectric layer 300 on the surface to obtain a bonding structure.

[0090] Exemplarily, a semiconductor that has undergone ion implantation is bonded to a silicon-based material having a dielectric layer 300 on its surface along the dielectric layer 300, specifically, along the surface where the first microchannel is located and the surface where the second microchannel is located, so that mutually staggered channels are formed between the semiconductor layer 100 and the dielectric layer 300 for the corrosive agent to flow through, thereby achieving the release of the dielectric layer 300.

[0091] Optionally, the bonding method includes but is not limited to hydrophilic bonding or surface activated bonding.

[0092] S33: performing annealing treatment on the bonding structure so as to peel off the bonding structure along the defective layer 400 to obtain a preset silicon-based semiconductor material.

[0093] Exemplarily, the above bonding structure is annealed to be peeled along the defective layer 400 to obtain a preset silicon-based semiconductor material. Specifically, the bonding structure includes a semiconductor wafer, a dielectric layer 300 and a silicon-based substrate 200 from top to bottom. The semiconductor wafer contains a defective layer 400. After annealing, the semiconductor wafer is peeled along the defective layer 400, and a portion of the semiconductor wafer located on the surface of the defective layer 400 and away from the silicon-based substrate 200 is peeled to obtain the preset silicon-based semiconductor material. The preset silicon-based semiconductor material is a preset semiconductor layer 100, a dielectric layer 300 and a silicon-based substrate 200 from top to bottom.

[0094] The specific conditions for annealing and peeling are not specifically limited here and can be determined according to actual conditions or using existing technologies.

[0095] S34: performing a planarization process on the preset silicon-based semiconductor material to obtain a silicon-based semiconductor material.

[0096] Exemplarily, a surface of a preset semiconductor layer 100 of a preset silicon-based semiconductor material is planarized to obtain a silicon-based semiconductor material, wherein the silicon-based semiconductor material comprises a semiconductor layer 100 , a dielectric layer 300 and a silicon-based substrate 200 from top to bottom.

[0097] Optionally, the planarization method may be a chemical mechanical polishing process to remove the defective layer 400 that may remain in the predetermined semiconductor layer 100 to obtain the semiconductor layer 100 .

[0098] As an optional implementation, the surface roughness of the semiconductor layer 100 is less than 0.3 nm, and the thickness is 10 nm-10 μm; the thickness of the dielectric layer 300 is 1 nm-10 μm; and the thickness of the silicon-based substrate 200 is 50 μm-500 μm.

[0099] The embodiment of the present application prepares a wafer-level silicon-based semiconductor material with a dielectric layer 300 by an ion beam stripping and transfer method, and prepares mutually staggered grooves or microchannels between the semiconductor layer 100 and the dielectric layer 300 for the subsequent flow of the etchant released by the dielectric layer 300. This lays the foundation for the transfer of large-area semiconductor films and helps to realize the preparation of circular-level carbon-based semiconductor film materials.

[0100] As an optional implementation, after the above step S30, the embodiment of the present application further provides a post-processing method for the above silicon-based semiconductor material, specifically comprising:

[0101] The silicon-based substrate 200 is ground and thinned to reduce the difficulty of deep silicon etching to obtain a thinned silicon-based substrate 200; and the silicon-based semiconductor material is repaired by high-temperature annealing to repair the damage in the semiconductor layer 100 caused by ion implantation, and to repair the surface damage to the silicon-based substrate 200 caused by grinding and thinning.

[0102] For example, after obtaining the silicon-based semiconductor material, in order to reduce the difficulty of preparing the subsequent through hole 201, the silicon-based substrate 200 is thinned by grinding; and high-temperature annealing is used to repair the lattice damage caused by injection, thereby improving the lattice quality of the semiconductor film and repairing the sub-surface damage of the silicon-based substrate 200. At the same time, the warping of the heterogeneous wafer (i.e., silicon-based semiconductor material) is reduced, which is beneficial for subsequent transfer.

[0103] Optionally, the temperature of the high temperature annealing repair is 100-1000°C.

[0104] As an optional implementation, in the above step S50, the above deep silicon etching is performed on the silicon-based substrate 200 to obtain the through hole 201 for removing the dielectric layer 300, including:

[0105] An etching mask is applied to a part of the surface of the silicon-based substrate 200 , and deep silicon etching is performed on the area of ​​the silicon-based substrate 200 not coated with the etching mask by alternating passivation and etching to obtain a through hole 201 for removing the dielectric layer 300 .

[0106] Exemplarily, the deep silicon etching of the silicon-based substrate 200 in the embodiment of the present application adopts the Bosch process, which is an etching technology used to manufacture high aspect ratio microstructures. This process creates almost vertical sidewalls on the silicon wafer by alternating etching and passivation steps, thereby achieving a high aspect ratio etching effect.

[0107] Specifically, the photoresist coated on the surface of the silicon-based substrate 200 is used as an etching mask, and the area not protected by the photoresist is bombarded with gas. Controllable longitudinal etching is achieved through etching, and the side wall is protected by passivation. Etching and passivation are performed alternately to achieve a high-steepness side wall structure, which is conducive to the passage of the etchant used for the subsequent release of the dielectric layer 300, thereby preparing the release through hole 201 of the dielectric layer 300.

[0108] As an optional implementation, the deep silicon etching conditions are: the gas volume flow rate during passivation is 50 cm 3 / min-500cm 3 / min, power is 1000W-2000W, process time is 1s-60s; gas volume flow rate during etching is 60cm 3 / min-600cm 3 / min, power is 1500W-2500W, process time is 1s-60s;

[0109] The diameter of the through holes 201 prepared in the above manner is 50-500 micrometers, and the distance between adjacent through holes 201 is 50-500 micrometers.

[0110] Optionally, the gas bombarded with gas may specifically include: etching gas and passivation gas. The etching gas is used to remove materials in a specific area on the dielectric layer 300 through chemical reaction, and may be a fluorine or chlorine-based compound, such as SF6, CF4, C4F8, Cl2, BCl3, etc. The passivation gas is used to form a protective layer on the surface of the silicon wafer to prevent unnecessary chemical reactions or physical damage during the etching process, and may be C4F8.

[0111] In the embodiment of the present application, a through hole 201 for releasing the dielectric layer 300 is prepared on the silicon-based substrate 200 by the Bosch process, thereby solving the problem in the prior art that the semiconductor film needs to be patterned to provide a channel, resulting in a limited size of the transferred semiconductor film.

[0112] As an optional implementation, in the above step S70, if Figure 7 As shown, the dielectric layer 300 is etched along the through hole 201 so that the dielectric layer 300 is removed to obtain a new silicon-based semiconductor material, including:

[0113] S71 : applying a protective film on the surface of the semiconductor layer 100 .

[0114] For example, an etchant is required in the etching process, which can damage the semiconductor surface and reduce the surface roughness of the semiconductor film. In order to prevent the etchant from damaging the semiconductor layer 100 in the subsequent etching process, a protective film is applied on the surface of the semiconductor layer 100. Specifically, a photoresist can be used as the protective film.

[0115] S72: injecting an etchant along the through hole 201, and etching the dielectric layer 300 with the etchant to remove the dielectric layer 300.

[0116] Exemplarily, the etchant contacts the dielectric layer 300 through the through hole 201, thereby etching and removing the dielectric layer 300 (i.e., the sacrificial layer), so that the semiconductor layer 100 can be separated from the silicon-based substrate 200 and can be picked up or retrieved by the soluble glue 600 used in the transfer process. Specifically, the etching process can be wet etching or dry etching.

[0117] Optionally, hydrofluoric acid (HF) or buffered oxide etchant (BOE) may be selected as the etchant.

[0118] S73: removing the protective film on the surface of the semiconductor layer 100 to obtain a new silicon-based semiconductor material.

[0119] Exemplarily, after the dielectric layer 300 is released, the photoresist on the surface of the semiconductor layer 100 is removed to obtain a new silicon-based semiconductor material. The new silicon-based semiconductor material includes the semiconductor layer 100 and the silicon-based substrate 200 .

[0120] In the embodiment of the present application, the dielectric layer 300 is etched through the through hole 201 by using an etchant, thereby releasing the dielectric layer 300. At the same time, a photoresist is coated on the surface of the semiconductor layer 100 to protect the semiconductor layer 100 from being damaged by the etchant. This solves the problem in the prior art that the semiconductor film needs to be patterned to provide a channel, resulting in limited size of the transferred semiconductor film, thereby enabling the preparation of large-area semiconductor heterogeneous integrated materials.

[0121] As an optional implementation, before the above step S90, that is, before the semiconductor layer 100 is subjected to transfer processing, a soluble glue 600 suitable for the transfer process needs to be prepared, such as Figure 8 As shown, the specific preparation method includes:

[0122] S81: preparing a soluble adhesive solution of a preset concentration.

[0123] Illustratively, the method of solidifying the soluble adhesive solution used in the present application for preparing the soluble glue is, as an optional implementation, the preset concentration is 2-20%.

[0124] Specifically, preparing a soluble adhesive solution of a preset concentration includes:

[0125] (1) The area, thickness and concentration of the soluble adhesive solution required for transferring the semiconductor layer 100 are determined according to the area and thickness of the semiconductor layer 100, that is, the specific value of the preset concentration.

[0126] (2) According to the preset concentration, weigh the soluble adhesive powder and measure the deionized water, and evenly divide the weighed soluble adhesive powder into the preset number of portions.

[0127] (3) Using a magnetic stirrer, first heat the deionized water to a preset temperature, which is determined according to the adhesive. To ensure the dissolution effect, the weighed soluble adhesive powder is divided into a preset number of times and added into the deionized water under magnetic stirring and constant temperature heating. The time interval between each addition is a first preset time. All the powder is added into the deionized water, and then heated for a second preset time under magnetic stirring.

[0128] Optionally, the preset temperature, the first preset time and the second preset time are determined according to the soluble adhesive powder. Different soluble adhesive powders have different solubilities and dissolving temperatures.

[0129] Optionally, the soluble glue may be polyvinyl alcohol glue. When the soluble glue is polyvinyl alcohol glue, the preset temperature is 50-90° C., the first preset time is 1 min-10 min, and the second preset time is 10 h-30 h.

[0130] Optionally, after the soluble adhesive solution is prepared, in order to ensure the surface smoothness of the prepared soluble adhesive, the soluble adhesive solution may be filtered, and filtering may be performed using filter paper.

[0131] S82: applying a soluble adhesive solution onto the substrate, and obtaining a single layer of soluble adhesive after curing, and using the soluble adhesive as the current soluble adhesive.

[0132] Exemplarily, the prepared soluble adhesive solution is evenly coated on a clean substrate and cured to obtain a single layer of soluble adhesive.

[0133] As an optional implementation, the thickness of the single layer of soluble glue is 0.05 mm-1 mm.

[0134] Optionally, the curing treatment may be performed by natural air-drying to form a film, high-temperature drying to form a film, or the like.

[0135] Taking polyvinyl alcohol film as an example, the curing process is explained as follows: the substrate coated with PVA is placed in a fume hood to dry for 5-25 hours.

[0136] S83: applying a soluble adhesive solution onto the current soluble glue, obtaining a new soluble glue after curing, and reusing the new soluble glue as the current soluble glue.

[0137] Exemplarily, the soluble adhesive solution is continuously applied onto the solidified single-layer soluble glue, and a thicker soluble glue can be obtained after the solidification process as the current soluble glue.

[0138] S84: Repeatedly apply the soluble adhesive solution onto the current soluble glue, obtain new soluble glue after curing, and use the new soluble glue as the current soluble glue again until a soluble glue of a preset thickness is obtained; the soluble glue is used to transfer the semiconductor layer 100 .

[0139] Exemplarily, step S83 is continuously repeated, and the number of repetitions is determined according to the thickness of the prepared single layer of soluble glue and the thickness of the soluble glue required for transfer.

[0140] As an optional implementation, the preset thickness is 0.05 mm to 5 mm.

[0141] The embodiments of the present application prepare a soluble glue suitable for transferring semiconductor thin film materials by regulating parameters such as the ratio of the soluble adhesive solution, the thickness of the soluble glue, and the curing time of the soluble glue. This is beneficial to ensure the accuracy and high reliability of the transfer process and realize the heterogeneous integration of semiconductors and carbon-based materials with excellent performance.

[0142] As an optional implementation, Fig. 9 As shown, in the above step S90, a carbon-based material substrate 500 is provided, and the semiconductor layer 100 is subjected to transfer processing so that the semiconductor layer 100 is transferred from the silicon-based substrate 200 to the carbon-based material substrate 500 to obtain a carbon-based semiconductor thin film material, including:

[0143] S91: Under a preset heating temperature and a preset heating time, the semiconductor layer 100 is subjected to a search process using polydimethylsiloxane glue 700 and soluble glue 600 to separate the semiconductor layer 100 from the silicon-based substrate 200 and obtain the soluble glue 600 with the semiconductor layer 100 .

[0144] For example, Fig.10 As shown, step S91 is the first step in the transfer process, and its purpose is to separate the semiconductor layer 100 and the silicon-based substrate 200. The specific process is as follows:

[0145] S911: Provide a flat polydimethylsiloxane glue 700 and stick the polydimethylsiloxane glue 700 on the slide glass 800.

[0146] Exemplarily, polydimethylsiloxane glue 700 PDMS is selected as the flexible template material, and the flat PDMS is adhered to the glass slide 800 for subsequent replication and transfer of the semiconductor layer 100 .

[0147] The reason why PDMS is chosen as the flexible template material here is that it has the advantages of excellent flexibility, biocompatibility, chemical stability, breathability, high resolution, and easy demolding.

[0148] S912 : cutting a preset area of ​​the soluble glue 600 , and adhering the preset area of ​​the soluble glue 600 to the surface of the polydimethylsiloxane glue 700 to obtain a three-layer structure; the preset area is larger than the area of ​​the semiconductor layer 100 .

[0149] For example, a piece of soluble glue 600 with an area larger than that of the semiconductor layer 100 is cut and adhered to the surface of the polydimethylsiloxane glue 700 to obtain a three-layer structure; at the same time, the soluble glue 600 can be flattened by heating, so that the soluble glue 600 and the polydimethylsiloxane glue 700 are closely attached to each other without bubbles in between. The heating conditions are: heating at a temperature of 40-150° C. for 0.1-10 minutes.

[0150] The three-layer structure includes a glass slide 800, PDMS and soluble glue 600 from top to bottom.

[0151] S913: Lay the surface of the semiconductor layer 100 on the surface of a preset area of ​​soluble glue 600, and heat at a preset temperature for a preset time to achieve the combination of the new silicon-based semiconductor material and the preset area of ​​soluble glue 600, and to achieve the separation of the preset area of ​​soluble glue 600 and polydimethylsiloxane glue 700 to obtain a new three-layer structure; the new three-layer structure is, from top to bottom, a silicon-based substrate 200, a semiconductor layer 100, and a preset area of ​​soluble glue 600.

[0152] Exemplarily, the surface of the semiconductor layer 100 in the new silicon-based semiconductor material is bonded to the surface of a preset area of ​​soluble glue 600, and heated at a temperature of 50-200°C for 0.1-100 min to achieve the combination of the soluble glue 600 and the new silicon-based semiconductor material, and at the same time, the soluble glue 600 and the polydimethylsiloxane glue 700 are separated to obtain a new three-layer structure; the new three-layer structure is, from top to bottom, a silicon-based substrate 200, a semiconductor layer 100 and a preset area of ​​soluble glue 600.

[0153] S914 : tearing off the soluble glue 600 in the new three-layer structure, so that the semiconductor layer 100 is picked up onto the soluble glue 600 of a preset area, and obtaining the soluble glue 600 with the semiconductor layer 100 .

[0154] Exemplarily, the soluble glue 600 in the new three-layer structure is torn off with tweezers to obtain the soluble glue 600 with the semiconductor layer 100 .

[0155] S915: Paste the soluble glue 600 with the semiconductor layer 100 to the surface of the polydimethylsiloxane glue 700 to obtain a four-layer structure; the four-layer structure is, from top to bottom, the semiconductor layer 100, the soluble glue 600 of a preset area, the polydimethylsiloxane glue 700 and the glass slide 800.

[0156] Exemplarily, the soluble glue 600 with the semiconductor layer 100 is pasted onto the surface of the PDMS again, and the retrieval of the large-area semiconductor layer 100 is completed at this time, and a four-layer structure is obtained; the four-layer structure is, from top to bottom, the semiconductor layer 100, the soluble glue 600 of a preset area, the polydimethylsiloxane glue 700 and the glass slide 800.

[0157] S92: Printing is performed using polydimethylsiloxane glue 700 and soluble glue 600 with semiconductor layer 100, so that semiconductor layer 100 is transferred from silicon-based substrate 200 to carbon-based material substrate 500, thereby obtaining carbon-based semiconductor thin film material.

[0158] Exemplarily, after the retrieval of the semiconductor layer 100 is completed, it is printed to obtain a wafer-level carbon-based semiconductor thin film material.

[0159] S921: Provide a carbon-based material substrate 500, and laminate the semiconductor layer 100 in the four-layer structure with the carbon-based material substrate 500, so that a preset area of ​​soluble glue 600 is laminated with the carbon-based material substrate 500, and heat at a preset temperature for a preset time to separate the preset area of ​​soluble glue 600 and polydimethylsiloxane glue 700 to obtain a preset carbon-based semiconductor thin film material.

[0160] As an optional implementation, the carbon-based material substrate 500 is a material system with carbon atoms as the skeleton, and can be a pure carbon system such as diamond, soluble graphite, or a polyatomic system such as silicon carbide, high molecular organic matter, etc.

[0161] For example, Fig.10 As shown, after the search process is completed, the semiconductor layer 100 in the four-layer structure is bonded to the carbon-based material substrate 500. At this time, because the area of ​​the soluble glue 600 is larger than the area of ​​the semiconductor layer 100, the bonding of the soluble glue 600 and the PDMS is achieved. The soluble glue 600 and the PDMS are separated by heating at a temperature of 50-200°C for 0.1min-100min to obtain a preset carbon-based semiconductor thin film material. The preset carbon-based semiconductor thin film material is, from top to bottom, a soluble glue 600 of a preset area, a semiconductor layer 100, and a carbon-based material substrate 500.

[0162] S922: dissolving the soluble glue 600 of a preset area in the preset carbon-based semiconductor thin film material, and annealing the preset carbon-based semiconductor thin film material to remove impurities introduced during the transfer process, thereby obtaining the carbon-based semiconductor thin film material.

[0163] Exemplarily, deionized water or other suitable solvent 900 is used to dissolve a preset area of ​​soluble glue 600 on the surface of a preset carbon-based semiconductor thin film material, and then annealing or other methods are used to remove organic impurities introduced during the retrieval process and printing process to purify the material surface, heterogeneous interface, etc.

[0164] It should be noted that the above transfer process is completed through a wafer-level transfer and alignment system, and a vacuum adsorption system, a multi-dimensional sample stage and a confocal microscopy system are used to fix, move and accurately align the sample. The heating system is used to separate the soluble glue 600 from polydimethylsiloxane (PDMS), and the semiconductor film is retrieved and printed by controlling the heating temperature and heating time.

[0165] The transfer technology of the embodiment of the present application transfers the semiconductor layer 100 at the wafer level from the silicon-based substrate 200 to the carbon-based material substrate 500 to obtain a wafer-level carbon-based semiconductor thin film material, thereby realizing the preparation of large-area semiconductor heterogeneous integrated materials. In addition, there is almost no amorphous transition region at the interface of the heterogeneous material prepared by the transfer van der Waals integration method, and there is no restriction on the type of constituent materials, and it is not affected by physical factors such as lattice mismatch and thermal mismatch.

[0166] As an optional implementation, after the above step S90, the above method further includes:

[0167] The carbon-based semiconductor thin film material is subjected to high-temperature annealing treatment in a vacuum and protective atmosphere to enhance the interface strength between the semiconductor layer 100 and the carbon-based material substrate 500 .

[0168] Exemplarily, a high vacuum annealing furnace is used to perform long-term vacuuming and high-temperature annealing in a protective atmosphere to reinforce the interface of the transferred carbon-based semiconductor thin film material to meet the needs of subsequent device process preparation.

[0169] As an optional implementation manner, the annealing temperature of the high temperature annealing treatment is 100° C.-1000° C., and the annealing time is 5 min-50 h.

[0170] The embodiment of the present application performs high-temperature annealing treatment on the synthesized carbon-based semiconductor thin film material, thereby strengthening the interface between the semiconductor and the carbon-based substrate, further enhancing the heterostructure strength of the carbon-based semiconductor thin film material, and being applicable to a wider range of semiconductor heterostructure applications, further unleashing the application potential of semiconductor materials in power, radio frequency and other fields.

[0171] In summary, the present invention provides a method for preparing a wafer-level carbon-based semiconductor thin film material, wherein a silicon-based semiconductor thin film material having a dielectric layer is prepared by ion beam stripping and transfer technology, and then deep silicon etching is performed on the back of the silicon-based substrate to provide a through hole 201 for releasing the dielectric layer. This method can break through the limitation of the transfer size of the semiconductor thin film, thereby realizing the preparation of large-area semiconductor heterogeneous integrated materials. In addition, the through hole 201 released by the dielectric layer used in the present invention comes from the supporting substrate, and the adverse effects of the corrosive agent on the semiconductor film can be avoided by coating the semiconductor surface with photoresist for protection.

[0172] On the other hand, an embodiment of the present application also provides a carbon-based semiconductor thin film material prepared by the above-mentioned preparation method.

[0173] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A method for preparing a carbon-based semiconductor thin film material, characterized in that: The preparation method comprises: Providing an ion-implanted semiconductor and a silicon-based substrate with a dielectric layer on the surface; The ion-implanted semiconductor and the silicon-based substrate having a dielectric layer on the surface are bonded along the dielectric layer to obtain a silicon-based semiconductor material; the silicon-based semiconductor material includes a semiconductor layer, a dielectric layer and a silicon-based substrate in order from top to bottom; Performing deep silicon etching on the silicon-based substrate to obtain a through hole for removing the dielectric layer; Etching the dielectric layer along the through hole to remove the dielectric layer and obtain a new silicon-based semiconductor material; the new silicon-based semiconductor material comprises the semiconductor layer and the silicon-based substrate from top to bottom; A carbon-based material substrate is provided, and the semiconductor layer is subjected to transfer processing so that the semiconductor layer is transferred from the silicon-based substrate to the carbon-based material substrate to obtain a carbon-based semiconductor thin film material.

2. The preparation method according to claim 1, characterized in that: The step of bonding the ion-implanted semiconductor to the silicon-based substrate having a dielectric layer on the surface thereof along the dielectric layer to obtain a silicon-based semiconductor material comprises: Preparing mutually parallel first microchannels on the surface of the semiconductor after ion implantation, and preparing mutually parallel second microchannels on the surface of the dielectric layer away from the silicon-based substrate; the semiconductor after ion implantation includes a defect layer formed by ion implantation; Bonding the semiconductor implanted with ions and the silicon-based material having a dielectric layer on the surface thereof along the surface where the first microchannel is located and the surface where the second microchannel is located, so that mutually interacting channels are formed between the semiconductor implanted with ions and the silicon-based material having a dielectric layer on the surface thereof, thereby obtaining a bonding structure; Performing annealing treatment on the bonding structure so as to peel off the bonding structure along the defective layer to obtain a preset silicon-based semiconductor material; The preset silicon-based semiconductor material is planarized to obtain the silicon-based semiconductor material.

3. The preparation method according to claim 2, characterized in that: The step of performing deep silicon etching on the silicon-based substrate to obtain a through hole for removing the dielectric layer comprises: An etching mask is applied to a partial area of ​​the surface of the silicon-based substrate, and deep silicon etching is performed on the area of ​​the silicon-based substrate not coated with the etching mask by alternating passivation and etching to obtain the through hole for removing the dielectric layer.

4. The preparation method according to claim 1, characterized in that: The etching process is performed on the dielectric layer along the through hole so that the dielectric layer is removed to obtain a new silicon-based semiconductor material, including: Applying a protective film on the surface of the semiconductor layer; Injecting an etchant along the through hole, and etching the dielectric layer with the etchant to remove the dielectric layer; The protective film on the surface of the semiconductor layer is removed to obtain the new silicon-based semiconductor material.

5. The preparation method according to claim 1, characterized in that: Before providing a carbon-based material substrate and performing transfer processing on the semiconductor layer so as to transfer the semiconductor layer from the silicon-based substrate to the carbon-based material substrate to obtain a carbon-based semiconductor thin film material, the method further comprises: preparing a soluble adhesive solution of a preset concentration; Applying the soluble adhesive solution onto the substrate, and obtaining a single layer of soluble adhesive after curing, and using the soluble adhesive as the current soluble adhesive; Applying the soluble adhesive solution onto the current soluble glue, obtaining a new soluble glue after curing, and using the new soluble glue as the current soluble glue again; Repeat the process of applying the soluble adhesive solution onto the current soluble glue, obtaining a new soluble glue after curing, and using the new soluble glue again as the current soluble glue until a soluble glue of a preset thickness is obtained; the soluble glue is used to transfer the semiconductor layer.

6. The preparation method according to claim 5, characterized in that: The method of providing a carbon-based material substrate and performing transfer processing on the semiconductor layer so as to transfer the semiconductor layer from the silicon-based substrate to the carbon-based material substrate to obtain a carbon-based semiconductor thin film material comprises: Under a preset heating temperature and a preset heating time, using polydimethylsiloxane glue and the soluble glue, the semiconductor layer is subjected to a search process so as to separate the semiconductor layer from the silicon-based substrate, thereby obtaining a soluble glue with a semiconductor layer; And the polydimethylsiloxane glue and the soluble glue with the semiconductor layer are used for printing processing, so that the semiconductor layer is transferred from the silicon-based substrate to the carbon-based material substrate to obtain the carbon-based semiconductor thin film material.

7. The preparation method according to claim 6, characterized in that: After providing a carbon-based material substrate and performing transfer processing on the semiconductor layer so that the semiconductor layer is transferred from the silicon-based substrate to the carbon-based material substrate to obtain a carbon-based semiconductor thin film material, the method further includes: The carbon-based semiconductor thin film material is subjected to high-temperature annealing treatment in a vacuum and protective atmosphere to enhance the interface strength between the semiconductor layer and the carbon-based material substrate.

8. The preparation method according to claim 2, characterized in that: The dielectric layer is at least one of silicon oxide, silicon nitride, aluminum oxide, aluminum nitride, and hafnium oxide; The semiconductor is one of silicon, germanium, silicon carbide, lithium niobate, lithium tantalate, gallium arsenide, indium phosphide, gallium nitride, gallium oxide, zinc oxide, aluminum nitride, and diamond; The carbon-based material substrate includes at least one of the material systems with carbon atoms as the skeleton; The characteristic dimensions of the first microchannel and the second microchannel are 10 nm-10 μm; The surface roughness of the semiconductor layer is less than 0.3 nm and the thickness is 10 nm-10 μm; The thickness of the dielectric layer is 1nm-10μm; The thickness of the silicon-based substrate is 50 μm-500 μm.

9. The preparation method according to claim 4, characterized in that: The conditions for deep silicon etching are: the gas volume flow rate during passivation is 50 cm 3 / min-500cm 3 / min, power is 1000W-2000W, process time is 1s-60s; The gas volume flow rate during etching is 60cm 3 / min-600cm 3 / min, power is 1500W-2500W, process time is 1s-60s; The diameter of the through hole is 50-500 micrometers, and the distance between adjacent through holes is 50 μm-500 μm.

10. The preparation method according to claim 7, characterized in that: The preset concentration is 2-20%; the thickness of the single layer of soluble glue is 0.05mm-1mm; the thickness of the soluble glue is 0.1mm-10mm; The preset heating temperature is 50-200°C, and the preset heating time is 0.1min-100min; The annealing temperature of the high temperature annealing treatment is 100° C.-1000° C., and the annealing time is 5 min-50 h.

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