Power device topological structure of integrated current sampling resistor

Abstract

The invention relates to a power device topological structure integrated with a current sampling resistor, and the structure comprises at least one power device which is used for forming at least one single-bridge arm circuit or at least one single-tube circuit; the sampling resistor is formed at a first target position of the at least one single-bridge arm circuit or a second target position of the at least one single-tube circuit, and at least one sampling point is led out, so that current of the at least one power device is sampled through the at least one sampling point; wherein the second target position comprises a position between the collector electrode and the positive electrode of at least one single-tube circuit or a position between the emitter electrode and the negative electrode of at least one single-tube circuit; the first target position comprises a position between two power devices of the at least one single-bridge arm circuit, a position between a collector electrode and a positive electrode of an upper tube of the at least one single-bridge arm circuit or a position between a lower tube emitter electrode and a negative electrode of the at least one single-bridge arm circuit. The complexity of product main circuit design can be reduced, the system integration degree is enhanced, and the manufacturing cost is reduced.

Description

Technical Field

[0001] The present disclosure relates to the technical field of integrated circuit design, and in particular to a power device topology structure with an integrated current sampling resistor. Background Art

[0002] Power devices are mainly used for high-power electronic devices (usually referring to currents of tens to thousands of amperes and voltages of hundreds of volts or more) in power equipment power conversion and control circuits. Power devices are used in almost all electronic manufacturing industries, including notebooks, PCs, servers, monitors, and various peripherals in the computer field; mobile phones, telephones, and other terminals and local equipment in the network communication field; traditional black and white home appliances and various digital products in the consumer electronics field; industrial PCs, various instruments and various control equipment in industrial control, etc. With the continuous development of integrated circuit design and detection technology, current sampling of power devices is becoming more and more important.

[0003] At present, power devices are mainly used in inverter circuits. Sampling of power devices requires designing a sampling resistor in the main circuit, and connecting the sampling resistor to the lower emitter of the power device in the inverter circuit to sample the current of the power device. However, this current collection method of designing a sampling resistor in the main circuit and connecting the sampling resistor to the lower emitter of the power device in the inverter circuit to sample the current of the power device not only has a complex structural design, but also has a high manufacturing cost. Summary of the invention

[0004] Based on this, it is necessary to provide a power device topology structure with an integrated current sampling resistor to address the above technical problems, which can at least reduce the complexity of the product main circuit design, enhance system integration and reduce manufacturing costs.

[0005] In order to achieve the above-mentioned object and other objects, the present disclosure provides a power device topology structure with integrated current sampling resistor, including: at least one power device, the at least one power device is used to form at least one single bridge arm circuit or at least one single tube circuit; a sampling resistor, the sampling resistor is formed at a first target position of the at least one single bridge arm circuit or a second target position of the at least one single tube circuit, and leads to at least one sampling point to sample the current of the at least one power device through the at least one sampling point; wherein the second target position includes the collector of at least one single tube circuit or the emitter of at least one single tube circuit, and the first target position includes between two power devices of at least one single bridge arm circuit, between the collector and the positive electrode of the upper tube of at least one single bridge arm circuit, or between the emitter and the negative electrode of the lower tube of at least one single bridge arm circuit.

[0006] In the power device topology structure of the integrated current sampling resistor in the above-mentioned embodiment, the position design of the sampling resistor is more flexible through the design of the power device topology structure. The sampling resistor only needs to be formed at the first target position or the second target position, and it is no longer necessary to limit the position of the sampling resistor to between the emitter and the cathode of the power device of the single bridge arm circuit or the single tube circuit. Therefore, the embodiment of the present disclosure effectively reduces the complexity of the main circuit design of the product, can enhance the system integration and reduce the manufacturing cost.

[0007] In one embodiment, the sampling resistor is an independent resistor, and the at least one power device and the independent resistor are integrated into an integrated circuit device through an injection molding process.

[0008] In the power device topology structure with integrated current sampling resistor in the above embodiment, the power device and the independent resistor are integrated into the integrated circuit device through the injection molding process, which further enhances the integration of the system.

[0009] In one embodiment, the sampling resistor is a thin film resistor, and the thin film resistor is formed on the emitter of the at least one power device.

[0010] In the power device topology structure with integrated current sampling resistor in the above embodiment, the thin film resistor is formed on the emitter of the at least one power device. The complexity of integrating the sampling resistor into the device is further reduced by forming the thin film resistor on the emitter in advance.

[0011] In one embodiment, the integrated circuit device includes at least one power device and an independent resistor; wherein the at least one power device is connected to the independent resistor, the at least one power device forms a single bridge arm circuit or a single tube circuit, the independent resistor is connected to the single bridge arm circuit or the single tube circuit, and an emitter connection point, a gate connection point, a collector connection point and a sampling point are formed on the integrated circuit device.

[0012] In the power device topology structure with integrated current sampling resistor in the above embodiment, a variety of sampling methods for the power device are provided by setting the position of the independent resistor, and the topology structure of the power device is specifically proposed.

[0013] In one embodiment, the integrated circuit device includes a first power device and an independent resistor, the first power device includes an emitter, a gate and a collector; when the emitter of the first power device is connected to one end of the independent resistor, the one end of the independent resistor is a sampling point; when the collector of the first power device is connected to one end of the independent resistor, the one end of the independent resistor is a sampling point.

[0014] In the power device topology structure of the integrated current sampling resistor in the above embodiment, a sampling method for a power device with a single-tube structure is provided, and a topology structure of a single-tube power device is specifically proposed.

[0015] In one embodiment, the integrated circuit device includes a first power device, a second power device and an independent resistor, the emitter of the first power device is connected to the collector of the second power device to form a single bridge arm circuit, and the independent resistor is formed at a first target position; wherein, when the first target position is between the first power device and the second power device of the single bridge arm circuit, the emitter of the first power device is connected to one end of the independent resistor, and the other end of the independent resistor is connected to the collector of the second power device, forming two sampling points at both ends of the independent resistor.

[0016] In the power device topology structure of the integrated current sampling resistor in the above embodiment, a sampling method for a power device with a single bridge arm structure is provided, and a topology structure of a power device with a single bridge arm is specifically proposed.

[0017] In one embodiment, when the first target position is the emitter of the first power device of the single-tube circuit, the emitter of the first power device is connected to one end of the independent resistor, and the one end of the independent resistor is the sampling point.

[0018] In the power device topology structure of the integrated current sampling resistor in the above embodiment, a sampling method for a power device with a single bridge arm structure is provided, and a topology structure of a power device with a single bridge arm is specifically proposed.

[0019] In one embodiment, when the first target position is the emitter of the second power device of the single bridge arm circuit, the emitter of the second power device is connected to one end of the independent resistor, and the one end of the independent resistor is the sampling point.

[0020] In the power device topology structure of the integrated current sampling resistor in the above embodiment, a sampling method for a power device with a single bridge arm structure is provided, and a topology structure of a power device with a single bridge arm is specifically proposed.

[0021] In one embodiment, the thin film resistor is formed on the emitter of at least one single tube circuit; wherein, when the thin film resistor is formed on the emitter of at least one single tube circuit, the sampling pin led out between the thin film resistor and the emitter is the sampling point.

[0022] In the power device topology structure of the integrated current sampling resistor in the above embodiment, a thin film resistor is used as the sampling resistor, a method of applying the thin film resistor to sampling in a single-tube circuit is given, and a topology structure for sampling the power device of the single-tube circuit using a thin film resistor is specifically proposed.

[0023] In one embodiment, each single bridge arm circuit includes a first power device and a second power device, and the thin film resistor is formed on the emitter of the first power device or on the emitter of the second power device; wherein, when the thin film resistor is formed on the emitter of the first power device, the thin film resistor is connected to the collector of the second power device, and two sampling pins led out from the top and bottom surfaces of the thin film resistor are two sampling points; wherein, when the thin film resistor is formed on the emitter of the second power device, the sampling pin led out between the thin film resistor and the emitter is the sampling point.

[0024] In the power device topology structure of the integrated current sampling resistor in the above embodiment, a thin film resistor is used as the sampling resistor, a method for applying the thin film resistor to sampling in a single bridge arm circuit is given, and a topology structure for sampling the power device of the single bridge arm circuit using a thin film resistor is specifically proposed. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0026] Figure 1 A topological structure of a power device provided in an embodiment;

[0027] Figure 2 An inverter circuit current sampling topology structure provided in a comparative embodiment;

[0028] Figure 3 is a schematic diagram of an integrated circuit device provided in an embodiment;

[0029] Figure 4 A connection method of an independent resistor of a single-tube circuit provided in an embodiment;

[0030] Figure 5 Three power device topology structures of a single bridge arm circuit provided in an embodiment;

[0031] Figure 6 A perspective structure of a power device provided in an embodiment;

[0032] Figure 7 A perspective structure of another power device provided in an embodiment;

[0033] Figure 8 A schematic diagram of a semiconductor structure of a power device with a thin film resistor provided in an embodiment;

[0034] Fig. 9 FIG. 1 is a schematic diagram of a semiconductor structure of another power device with a thin film resistor provided in an embodiment.

[0035] Description of reference numerals:

[0036] R, sampling resistor; 302, emitter pin; 303, collector pin; 304, gate pin; 305, lead; 401, emitter connection point; 402, collector connection point; 403, gate connection point; 404, sampling point connection point; R1, first sub-thin film resistor; R2, second sub-thin film resistor. DETAILED DESCRIPTION

[0037] In order to facilitate understanding of the present disclosure, the present disclosure will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present disclosure are shown in the drawings. However, the present disclosure can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present disclosure more thorough and comprehensive.

[0038] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which the present disclosure belongs. The terms used herein in the specification of the present disclosure are only for the purpose of describing specific embodiments and are not intended to limit the present disclosure.

[0039] It should be understood that when an element or layer is referred to as being "on, adjacent to, connected to or coupled to other elements or layers, it may be directly on, adjacent to, connected to or coupled to other elements or layers, or there may be intervening elements or layers. On the contrary, when an element is referred to as being "directly on, directly adjacent to, directly connected to or directly coupled to other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, doping types and / or parts, these elements, components, regions, layers, doping types and / or parts should not be limited by these terms. These terms are merely used to distinguish one element, component, region, layer, doping type or part from another element, component, region, layer, doping type or part. Therefore, without departing from the teachings of the present disclosure, the first element, component, region, layer, doping type or portion discussed below may be represented as a second element, component, region, layer or portion; for example, the first doping type may be referred to as the second doping type, and similarly, the second doping type may be referred to as the first doping type; the first doping type and the second doping type are different doping types, for example, the first doping type may be P-type and the second doping type may be N-type, or the first doping type may be N-type and the second doping type may be P-type.

[0040] Spatially relative terms such as "under," "beneath," "below," "under," "above," "above," and the like may be used herein to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that, in addition to the orientations shown in the figures, spatially relative terms also include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is flipped, an element or feature described as "under other elements" or "under it" or "under it" will be oriented as being "above" the other elements or features. Thus, the exemplary terms "under" and "under" may include both upper and lower orientations. In addition, the device may also include additional orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptors used herein are interpreted accordingly.

[0041] When used herein, the singular forms "a", "an" and " / the" may also include the plural forms, unless the context clearly indicates otherwise. It should also be understood that when the terms "consisting of" and / or "comprising" are used in this specification, the presence of features, integers, steps, operations, elements and / or components can be determined, but the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups is not excluded. At the same time, when used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0042] Embodiments of the invention are described herein with reference to cross-sectional views which are schematic representations of ideal embodiments (and intermediate structures) of the present disclosure, such that variations in the shapes shown due to, for example, manufacturing techniques and / or tolerances are anticipated. Thus, embodiments of the present disclosure should not be limited to the particular shapes of the regions shown herein, but rather include deviations in shapes due to, for example, manufacturing techniques. For example, an implanted region shown as a rectangle typically has rounded or curved features and / or an implant concentration gradient at its edges rather than a binary change from an implanted region to a non-implanted region. Similarly, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation is performed. Thus, the regions shown in the figures are schematic in nature, their shapes do not represent the actual shape of the region of the device, and do not limit the scope of the present disclosure.

[0043] Please refer to Figure 1 , Figure 1 for Figure 1 The topology of the most commonly used power devices is shown. Figure 1 The currently commonly used power device shown has an anti-parallel diode integrated inside, forming an integrated anti-parallel diode power device. In actual production and use, it is necessary to sample the current of the power device to detect the power device.

[0044] Please refer to Figure 2 , Figure 2 This is an inverter circuit current sampling topology structure provided in a comparative embodiment. Figure 2 The inverter circuit current sampling topology shown in the figure requires a sampling resistor to be set between the lower bridge arm and the negative electrode. When the upper bridge of each single bridge arm circuit is turned on, or the current passing through the lower bridge during freewheeling is sampled, when the lower bridge is turned on, the current flowing through the lower tube is directly sampled. Figure 2 The sampling topology structure for the power device shown needs to design a sampling resistor in the main circuit and needs to set a sampling resistor between the lower bridge arm and the negative electrode, which has a complex structural design and high manufacturing cost.

[0045] Please refer to Figure 3-Figure 9 The embodiment of the present disclosure provides a power device topology structure with an integrated current sampling resistor R, including: at least one power device, the at least one power device is used to form at least one single bridge arm circuit or at least one single tube circuit; the sampling resistor R, the sampling resistor R is formed at a first target position of the at least one single bridge arm circuit or a second target position of the at least one single tube circuit, and leads to at least one sampling point to sample the current of the at least one power device through the at least one sampling point.

[0046] Among them, the second target position includes the collector of at least one single-tube circuit or the emitter of at least one single-tube circuit, and the first target position includes between two power devices of at least one single bridge arm circuit, between the collector and the positive electrode of the upper tube of at least one single bridge arm circuit, or between the emitter and the negative electrode of the lower tube of at least one single bridge arm circuit.

[0047] In the power device topology structure of the integrated current sampling resistor R in the above-mentioned embodiment, the position design of the sampling resistor R is more flexible through the design of the power device topology structure. The sampling resistor R only needs to be formed at the first target position or the second target position, and it is no longer necessary to limit the position of the sampling resistor R to the middle of the emitter and the cathode of the power device of the single bridge arm circuit or the single tube circuit. Therefore, the embodiment of the present disclosure effectively reduces the complexity of the main circuit design of the product, can enhance the system integration and reduce the manufacturing cost.

[0048] It should be noted here that the power devices mentioned in this application include power MOSFET, IGBT (insulated gate bipolar transistor), BJT (bipolar transistor), power integrated circuit (IC), etc. Among them, power MOSFET has high switching speed and low on-resistance, which is suitable for high-frequency and high-efficiency applications. IGBT (insulated gate bipolar transistor) combines the high input impedance of MOSFET and the high current carrying capacity of BJT, which is suitable for high voltage and high current applications. BJT (bipolar transistor) has good current gain and is suitable for linear amplification and high power applications, but has a slow switching speed. The power devices mentioned in this application include but are not limited to the above devices.

[0049] In one embodiment, the sampling resistor R may be an independent resistor, and the at least one power device and the independent resistor are integrated into an integrated circuit device through an injection molding process.

[0050] In the power device topology structure of the integrated current sampling resistor R in the above embodiment, the power device and the independent resistor are integrated into the integrated circuit device through the injection molding process, which further enhances the integration of the system.

[0051] As an example, see Figure 3 , Figure 3 FIG. 4 shows a schematic diagram of a structure formed by integrating a power device and an independent resistor into an integrated circuit device. Figure 3 As shown in , the power device and the independent resistor are integrated into an integrated circuit device.

[0052] Please continue reading Figure 3 The integrated circuit device includes a device frame, a gate pin 304, an emitter pin 302 and a collector pin 303, and includes a power device and a sampling resistor R in the frame. The gate of the power device is connected to the gate pin 304, the collector of the power device is connected to the collector pin 303, and an independent resistor is connected between the emitter of the power device and the emitter pin 302 to form a sampling resistor R for the power device.

[0053] Please continue to refer to Figure 3 The number of leads 305 connected between the power device and the pin or the independent resistor is related to the current of the power device, and the number of leads 305 between the power device and the pin or the independent resistor can be determined according to the operating current of the power device.

[0054] Specifically, the integrated circuit device includes at least one power device and an independent resistor.

[0055] Among them, the at least one power device is connected to the independent resistor, the at least one power device forms a single bridge arm circuit or a single tube circuit, the independent resistor is connected to the single bridge arm circuit or the single tube circuit, and an emitter connection point 401, a gate connection point 403, a collector connection point 402 and a sampling point are formed on the integrated circuit device.

[0056] As an example, see Figure 4, Figure 4 The figure shows the connection method of two independent resistors in a single-tube circuit.

[0057] Please refer to Figure 4 Figure a in Figure 4 Figure a shows a topological structure in which an independent resistor is formed at the emitter.

[0058] Please refer to Figure 4 Figure b in the figure shows the topological structure in which an independent resistor is formed at the collector.

[0059] Specifically, the integrated circuit device includes a first power device and an independent resistor, and the first power device includes an emitter, a gate and a collector.

[0060] When the emitter of the first power device is connected to one end of the independent resistor, the one end of the independent resistor is the sampling point; when the collector of the first power device is connected to one end of the independent resistor, the one end of the independent resistor is the sampling point.

[0061] In the power device topology structure of the integrated current sampling resistor R in the above embodiment, a sampling method for a power device with a single-tube structure is provided, and a topology structure of a single-tube power device is specifically proposed.

[0062] In an optional embodiment, the integrated circuit device includes a first power device, a second power device and an independent resistor, the emitter of the first power device is connected to the collector of the second power device to form a single bridge arm circuit, and the independent resistor is formed at a first target position.

[0063] Among them, when the first target position is between the first power device and the second power device of the single bridge arm circuit, the emitter of the first power device is connected to one end of the independent resistor, and the other end of the independent resistor is connected to the collector of the second power device, forming two sampling points at both ends of the independent resistor.

[0064] Specifically, when the first target position is the emitter of the first power device of the single bridge arm circuit, the emitter of the first power device is connected to one end of the independent resistor, and the one end of the independent resistor is the sampling point.

[0065] Here, when the first target position is the emitter of the first power device of the single bridge arm circuit, when the emitter of the first power device is connected to one end of the independent resistor, the other end of the independent resistor can still serve as the emitter of the first power device.

[0066] In the power device topology structure of the integrated current sampling resistor R in the above embodiment, a sampling method for a power device with a single bridge arm structure is provided, and a topology structure of a single bridge arm power device is specifically proposed.

[0067] Specifically, when the first target position is the emitter of the second power device of the single bridge arm circuit, the emitter of the second power device is connected to one end of the independent resistor, and the one end of the independent resistor is the sampling point.

[0068] As an example, see Figure 5 , Figure 5 Three power device topologies of a single bridge arm circuit are shown in FIG.

[0069] Please refer to Figure 5 Figure a in Figure 5 Figure a shows a topological structure in which an independent resistor is formed between two power devices in a single bridge arm circuit.

[0070] Please refer to Figure 5 Figure b in the figure, Figure 5 Figure b shows a topological structure in which an independent resistor is formed at the collector of the upper tube of a single bridge arm circuit.

[0071] Please refer to Figure 5 Figure c in the figure, Figure 5 Figure c in FIG. 1 shows a topological structure in which an independent resistor is formed at the emitter of the lower tube of a single bridge arm circuit.

[0072] As an example, see Figure 6 , Figure 6 FIG. 1 shows a perspective structure of a power device. Figure 6 The perspective structure of the power device shown in the figure has an independent resistor integrated at the collector, namely the sampling resistor R.

[0073] In this way, a sampling point is formed on the power device through an independent resistor formed at the collector of the power device, thereby realizing the sampling of the analog power device.

[0074] As an example, see Figure 7 , Figure 7 FIG. 1 shows a perspective structure of another power device. Figure 7 The perspective structure of the power device shown in FIG. 1 integrates an independent resistor, namely the sampling resistor R, at the emitter.

[0075] In this way, a sampling point is formed on the power device through an independent resistor formed at the emitter of the power device, thereby realizing the sampling of the analog power device.

[0076] The sampling resistor R may be a thin film resistor, and the thin film resistor is formed on the emitter of the at least one power device.

[0077] It should be noted that the thin film resistor needs to be formed on the semiconductor structure of the power device. Since the collector of the power device is directly connected to the substrate of the power device, it is difficult to realize the processing of the thin film resistor. Therefore, the implementation scheme of the emitter surface processing thin film resistor is adopted, and it is necessary to lead out a resistor voltage sampling point under the thin film resistor for realizing analog quantity sampling.

[0078] Specifically, the thin film resistor can be formed on the emitter of at least one single-tube circuit.

[0079] When the thin film resistor is formed on the emitter of at least one single-tube circuit, the sampling pin extending between the thin film resistor and the emitter is the sampling point.

[0080] In the power device topology structure of the integrated current sampling resistor R in the above embodiment, a thin film resistor is used as the sampling resistor R, a method for applying a thin film resistor to sampling in a single-tube circuit is provided, and a topology structure for sampling a power device of a single-tube circuit using a thin film resistor is specifically proposed.

[0081] Specifically, each single bridge arm circuit includes a first power device and a second power device, and the thin film resistor can be formed on the emitter of the first power device or on the emitter of the second power device.

[0082] When the thin film resistor is formed on the emitter of the first power device, the thin film resistor is connected to the collector of the second power device, and two sampling pins led out from the top and bottom surfaces of the thin film resistor are two sampling points.

[0083] Wherein, when the thin film resistor is formed on the emitter of the second power device, the sampling pin led out between the thin film resistor and the emitter is the sampling point.

[0084] As an example, see Figure 8 , Figure 8 A schematic diagram of a semiconductor structure of a power device with a thin film resistor is shown, Figure 8 As shown in FIG. 1 , the first sub-thin-film resistor R1 and the second sub-thin-film resistor R2 together constitute a thin-film resistor.

[0085] Please continue to refer to Figure 8 , Figure 8A possible semiconductor structure of a power device is given in FIG. , including multiple N-type doped regions and multiple P-type doped regions, such as Figure 8 As shown in the figure, from collector to emitter, Type collector layer, Type termination layer J1, Type drift region, P-type well region J2, multiple Type emitter layer, etc. It should be understood that Figure 8 The semiconductor structure of the power device given in is only one possible semiconductor structure of the power device, and the topological structure of the present application can be applied to any power device.

[0086] It should be noted that the implementation scheme of processing thin film resistors on the wafer surface is difficult to implement because the collector is directly connected to the substrate. Therefore, the implementation scheme of processing thin film resistors on the emitter surface is adopted, and it is necessary to lead out the resistor voltage sampling point 404 under the thin film resistor for realizing analog quantity sampling. The device chip is mounted on the frame, and then the lead 305 is used to connect the device and the pin, and finally injection molding is used.

[0087] Specifically, the power device includes a substrate and an active region, wherein the substrate usually uses a high thermal conductivity material (such as silicon or gallium nitride) as a substrate to support high-power operation and heat dissipation. The active region includes a source, a drain and a gate, which are responsible for the conduction and shutoff of the current. The structural form may include MOSFET, IGBT or BJT, etc. Among them, the insulating gate can use silicon oxide (SiO2) or silicon nitride (Si3N4) as a gate dielectric to isolate the gate and channel regions. The gate material usually uses conductive materials such as aluminum or titanium to form an electric field to control the on-state of the device. The source and drain regions are usually heavily doped to reduce contact resistance and improve conductivity. The source and drain may have an extended structure to increase the contact area and improve thermal performance. Here, the basic structure of the power device is not the focus of the protection claimed in this application, and will not be repeated here.

[0088] Please refer to Fig. 9 In an optional embodiment, the power device is formed on the frame. A collector is formed at the bottom of the power device, a gate and an emitter are formed at the top of the power device, a thin film resistor is formed on the emitter, and a sampling point is located between the thin film resistor and the emitter (i.e., the bottom surface of the thin film resistor or the top surface of the emitter). The sampling point forms a sampling point connection point 404 through the lead 305 and the pin. The gate forms a gate connection point 403 through the lead 305 and the pin. The top surface of the thin film resistor can be used as the emitter of the power device through the lead 305 and the pin to form an emitter 401. The connection method of the collector and the formation method of the connection point are similar to those of the gate, and will not be repeated here.

[0089] In the power device topology structure of the integrated current sampling resistor R in the above embodiment, a thin film resistor is used as the sampling resistor R, a method for applying the thin film resistor to sampling in a single bridge arm circuit is provided, and a topology structure for sampling the power device of the single bridge arm circuit using a thin film resistor is specifically proposed.

[0090] The technical features of the above embodiments can be combined arbitrarily. To make the description concise, not all possible combinations of the technical features of the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0091] The above embodiments only express several implementation methods of the present disclosure, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present disclosure, and these all belong to the protection scope of the present disclosure. Therefore, the protection scope of the patent of the present disclosure shall be subject to the attached claims.

Claims

1. A power device topology structure with integrated current sampling resistor, characterized in that: include: At least one power device, wherein the at least one power device is used to form at least one single bridge arm circuit or at least one single tube circuit; A sampling resistor, wherein the sampling resistor is formed at a first target position of at least one single bridge arm circuit or a second target position of at least one single tube circuit, and leads to at least one sampling point, so as to sample the current of the at least one power device through the at least one sampling point; Among them, the second target position includes between the collector and the positive electrode of at least one single tube circuit or between the emitter and the negative electrode of at least one single tube circuit, and the first target position includes between two power devices of at least one single bridge arm circuit, between the collector and the positive electrode of the upper tube of at least one single bridge arm circuit, or between the emitter and the negative electrode of the lower tube of at least one single bridge arm circuit.

2. The power device topology according to claim 1, characterized in that: The sampling resistor is an independent resistor, and the at least one power device and the independent resistor are integrated into an integrated circuit device through an injection molding process.

3. The power device topology according to claim 1, characterized in that: The sampling resistor is a thin film resistor, and the thin film resistor is formed on the emitter of the at least one power device.

4. The power device topology structure according to claim 2, characterized in that: The integrated circuit device includes at least one power device and an independent resistor; Among them, the at least one power device is connected to the independent resistor, the at least one power device forms a single bridge arm circuit or a single tube circuit, the independent resistor is connected to the single bridge arm circuit or the single tube circuit, and an emitter connection point, a gate connection point, a collector connection point and a sampling point are formed on the integrated circuit device.

5. The power device topology structure according to claim 4, characterized in that: The integrated circuit device includes a first power device and an independent resistor, wherein the first power device includes an emitter, a gate and a collector; When the emitter of the first power device is connected to one end of the independent resistor, the one end of the independent resistor is a sampling point; When the collector of the first power device is connected to one end of the independent resistor, the one end of the independent resistor is a sampling point.

6. The power device topology structure according to claim 4, characterized in that: The integrated circuit device comprises a first power device, a second power device and an independent resistor, the emitter of the first power device is connected to the collector of the second power device to form a single bridge arm circuit, and the independent resistor is formed at a first target position; Among them, when the first target position is between the first power device and the second power device of the single bridge arm circuit, the emitter of the first power device is connected to one end of the independent resistor, and the other end of the independent resistor is connected to the collector of the second power device, forming two sampling points at both ends of the independent resistor.

7. The power device topology structure according to claim 4, characterized in that: When the first target position is the emitter of the first power device of the single-tube circuit, the emitter of the first power device is connected to one end of the independent resistor, and the one end of the independent resistor is the sampling point.

8. The power device topology structure according to claim 4, characterized in that: When the first target position is the emitter of the second power device of the single bridge arm circuit, the emitter of the second power device is connected to one end of the independent resistor, and the one end of the independent resistor is the sampling point.

9. The power device topology structure according to claim 3, characterized in that: The thin film resistor is formed on the emitter of at least one single tube circuit; When the thin film resistor is formed on the emitter of at least one single-tube circuit, the sampling pin extending between the thin film resistor and the emitter is the sampling point.

10. The power device topology structure according to claim 3, characterized in that: Each single bridge arm circuit includes a first power device and a second power device, and the thin film resistor is formed on the emitter of the first power device or the emitter of the second power device; Wherein, when the thin film resistor is formed on the emitter of the first power device, the thin film resistor is connected to the collector of the second power device, and two sampling pins led out from the top surface and the bottom surface of the thin film resistor are two sampling points; Wherein, when the thin film resistor is formed on the emitter of the second power device, the sampling pin led out between the thin film resistor and the emitter is the sampling point.

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