Control circuit and overcurrent protection circuit and method for driving half-bridge circuit

Abstract

The invention provides a control circuit for driving a half-bridge circuit and an overcurrent protection circuit and method. The control circuit comprises an over-current comparison circuit, a signal shaping circuit and a timing filter circuit, and the over-current comparison circuit compares a current detection signal with an over-current threshold value and provides an over-current comparison signal; the signal shaping circuit shapes the current detection signal and outputs at least one shaping processing signal; and the timing filter circuit selectively shields the overcurrent comparison signal based on the shaping processing signal, selectively filters a burr signal in the current detection signal, and outputs an overcurrent protection signal. According to the control circuit and the overcurrent protection circuit and method provided by the invention, an external capacitor can be omitted, the system cost is reduced, and meanwhile, overcurrent protection has relatively high accuracy and anti-interference capability and relatively high reliability.

Description

Technical Field

[0001] The present invention relates to the field of electronics, and specifically but not limited to, relates to a control circuit, an overcurrent protection circuit and an overcurrent protection method for driving a half-bridge circuit. Background Art

[0002] In the field of high-voltage half-bridge driving, the current mainstream power driver chips have a current detection function, which is used for current control and / or overcurrent protection. Figure 1 A current detection circuit for a high-voltage half-bridge circuit is shown. QL is the lower power switch tube in the half-bridge circuit, and the output end (source) of the power switch tube QL is connected in series with a detection resistor Rs to sample the current flowing through the power switch tube QL. An RC filter circuit is connected after the detection resistor Rs to filter the sampled signal to filter out the burrs in the signal, thereby avoiding the signal burrs in the non-overcurrent state from falsely triggering the overcurrent protection, wherein the RC filter circuit includes a capacitor C and a resistor R. The filtered signal is sent to the overcurrent comparator 10 inside the chip for overcurrent comparison. If the filtered signal voltage exceeds the overcurrent reference signal Vref, the comparator 10 outputs a high-level overcurrent protection signal OCP. In some cases, the output end of the comparator 10 may further include a filter circuit 11 for shielding the shorter OCP high-level pulse to further prevent short-term burrs from falsely triggering.

[0003] Especially in the field of three-phase high-voltage half-bridge driving, it is more necessary to filter the current detection signal to prevent the burrs generated in the phase switching from falsely triggering the overcurrent protection. In the three-phase high-voltage half-bridge driving circuit, the detection resistor Rs can be connected in series with the common source of the three lower tubes in the three half-bridge circuits.

[0004] In order to effectively prevent overcurrent false triggering caused by current glitches, especially large current glitches, a larger capacitor C needs to be coupled between the current detection pin 1 and the reference ground 2 to filter the large current glitches in the current. However, the larger capacitor is larger in size and will cause a large reaction delay of the detection signal to the current change, thereby causing the overcurrent protection shutdown delay, forming a current overshoot, and greatly reducing the accuracy and effect of the overcurrent protection.

[0005] In view of this, it is necessary to provide a new structure or control method to solve at least part of the above problems. Summary of the invention

[0006] In view of at least one or more problems in the background technology, the present invention proposes a control circuit, an overcurrent protection circuit and an overcurrent protection method for driving a half-bridge circuit.

[0007] According to one aspect of the present invention, a control circuit for driving a half-bridge circuit includes: an overcurrent comparison circuit, which compares a current detection signal with an overcurrent threshold and provides an overcurrent comparison signal, wherein the current detection signal represents the current flowing through the lower tube of the half-bridge circuit; a signal shaping circuit, which shapes the current detection signal and outputs at least one shaped processing signal; and a timing filter circuit, which couples the overcurrent comparison circuit and the signal shaping circuit, and the timing filter circuit selectively shields the overcurrent comparison signal based on the shaped processing signal, selectively filters the glitch signal in the current detection signal, and outputs an overcurrent protection signal.

[0008] Optionally, the control circuit has a current detection terminal and a reference ground terminal, which are used to couple the output terminal of the lower tube in the high-voltage half-bridge circuit and obtain a current detection signal, and no external capacitor is set between the current detection terminal and the reference ground terminal.

[0009] Optionally, the control circuit is used to drive a three-phase half-bridge circuit, wherein the output ends of three lower tubes in the three-phase half-bridge circuit are coupled to the first end of the detection resistor, and the second end of the detection resistor is coupled to the reference ground end of the control circuit.

[0010] Optionally, the signal shaping circuit includes at least one Schmitt trigger, an input end of the Schmitt trigger receives the current detection signal, and an output end of the Schmitt trigger is coupled to the timing filter circuit.

[0011] Optionally, the threshold of the Schmitt trigger is higher than the overcurrent threshold.

[0012] Optionally, the signal shaping circuit includes at least one inverter or at least one comparator, the input end of the inverter or the comparator receives the current detection signal, and the output end of the inverter or the comparator is coupled to the timing filter circuit.

[0013] Optionally, the signal shaping circuit includes a Schmitt trigger, and the input end of the Schmitt trigger receives a current detection signal; the timing filter circuit includes a first timing filter circuit, a second timing filter circuit and a logic circuit, the first timing filter circuit has a first timing time, the second timing filter circuit has a second timing time, the first timing time is greater than the second timing time, the input end of the first timing filter circuit and the input end of the second timing filter circuit are coupled to the output end of the overcurrent comparison circuit, the output end of the second timing filter circuit and the output end of the signal shaping circuit are respectively coupled to two input ends of the logic circuit, the output end of the logic circuit is coupled to the reset end of the first timing filter circuit, and the output end of the first timing filter circuit is coupled to the output end of the timing filter circuit.

[0014] Optionally, the signal shaping circuit further includes an inverter and a one-shot circuit, the inverter is coupled between the output end of the Schmitt trigger and the input end of the one-shot circuit, the one-shot circuit is edge triggered and provides a shaping processing signal.

[0015] Optionally, the logic circuit includes an AND gate, and an output terminal of the AND gate is coupled to a reset terminal of the first timing filter circuit.

[0016] Optionally, the first timing filter circuit includes a first switch, a first resistor, a second resistor, a second switch, a third resistor, a first capacitor and a first Schmitt trigger, wherein the first switch, the first resistor, the second resistor and the second switch are coupled in series between a voltage source and a reference ground, the control ends of the first switch and the second switch are coupled to the output end of the overcurrent comparison circuit, the coupling point between the first resistor and the second resistor is coupled to the first end of the third resistor, the second end of the third resistor is coupled to the first end of the first capacitor and the input end of the first Schmitt trigger and constitutes a reset end of the first timing filter circuit, the second end of the first capacitor is coupled to the reference ground, and the output end of the first Schmitt trigger constitutes the output end of the first timing filter circuit.

[0017] The second timing filter circuit includes a third switch, a fourth resistor, a fifth resistor, a fourth switch, a sixth resistor, a second capacitor and a second Schmitt trigger, wherein the third switch, the fourth resistor, the fifth resistor and the fourth switch are coupled in series between a voltage source and a reference ground, the control ends of the third switch and the fourth switch are coupled to the output end of the overcurrent comparison circuit, the coupling point of the fourth resistor and the fifth resistor is coupled to the first end of the sixth resistor, the second end of the sixth resistor is coupled to the first end of the second capacitor and the input end of the second Schmitt trigger, the second end of the second capacitor is coupled to the reference ground, and the output end of the second Schmitt trigger constitutes the output end of the second timing filter circuit.

[0018] Optionally, the logic circuit includes: a first logic switch, whose control end is coupled to the output end of the signal shaping circuit, and the first end of the first logic switch is coupled to the reset end of the first timing filter circuit; and a second logic switch, whose control end is coupled to the output end of the second timing filter circuit, the first end of the second logic switch is coupled to the second end of the first logic switch, and the second end of the second logic switch is coupled to the reference ground.

[0019] According to another aspect of the present invention, an overcurrent protection circuit is provided, comprising: an overcurrent comparison circuit, which compares a current detection signal with an overcurrent threshold and provides an overcurrent comparison signal; a signal shaping circuit, which shapes the current detection signal and outputs at least one shaped processing signal; and a timing filter circuit, which couples the overcurrent comparison circuit and the signal shaping circuit, wherein the timing filter circuit selectively shields the overcurrent comparison signal based on the shaped processing signal, selectively filters the glitch signal in the current detection signal, and the output end of the timing filter circuit provides an overcurrent protection signal.

[0020] Optionally, the signal shaping circuit includes at least one Schmitt trigger, the input end of the Schmitt trigger receives the current detection signal, the output end of the Schmitt trigger is coupled to the timing filter circuit, and the threshold of the Schmitt trigger is higher than the overcurrent threshold.

[0021] According to another aspect of the present invention, there is provided an overcurrent protection method for a high-voltage half-bridge drive, comprising: comparing a current detection signal with an overcurrent threshold to provide an overcurrent comparison signal; shaping the current detection signal to output a shaped processing signal; and processing the overcurrent comparison signal according to the shaped processing signal, selectively shielding the overcurrent comparison signal according to the shaped processing signal, and outputting an overcurrent protection signal.

[0022] Optionally, the overcurrent protection method further includes retiming the effective state of the overcurrent comparison signal when the current detection signal is higher than the Schmitt trigger threshold and when the effective state of the overcurrent comparison signal continues to be greater than the second timing time, and triggering the overcurrent protection when the current detection signal is lower than the Schmitt trigger threshold and the effective state of the overcurrent comparison signal continues to be greater than the first timing time after retiming, wherein the Schmitt trigger threshold is higher than the overcurrent threshold and the first timing time is greater than the second timing time.

[0023] The control circuit, overcurrent protection circuit and overcurrent protection method proposed in the present invention can save external capacitors and reduce system costs. At the same time, the overcurrent protection has high accuracy and anti-interference ability and high reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The accompanying drawings are used to provide a further understanding of the present invention and are used together with the description to explain the embodiments of the present invention, but do not constitute a limitation of the present invention. In the accompanying drawings:

[0025] Figure 1 An existing current detection circuit for high voltage half-bridge driving is shown;

[0026] Figure 2 A high voltage half-bridge driving system according to an embodiment of the present invention is shown;

[0027] Figure 3 An overcurrent protection circuit according to an embodiment of the present invention is shown;

[0028] Figure 4 An overcurrent protection circuit according to another embodiment of the present invention is shown;

[0029] Figure 5 An overcurrent protection circuit according to another embodiment of the present invention is shown;

[0030] Figure 6 An overcurrent protection circuit according to a specific embodiment of the present invention is shown;

[0031] Figure 7 An overcurrent protection method according to an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0032] In order to further understand the present invention, preferred embodiments of the present invention are described below in conjunction with examples. However, it should be understood that these descriptions are only for further illustrating the features and advantages of the present invention, rather than limiting the claims of the present invention.

[0033] The description in this section is only for several typical embodiments, and the present invention is not limited to the scope of the embodiments. The combination of different embodiments, the mutual replacement of some technical features in different embodiments, and the mutual replacement of the same or similar prior art means with some technical features in the embodiments are also within the scope of the description and protection of the present invention.

[0034] "Coupled" or "connected" in the specification includes both direct connection and indirect connection. Indirect connection is a connection through an intermediate medium, such as a connection through an electrical conductive medium such as a conductor, wherein the electrical conductive medium may contain parasitic inductance or parasitic capacitance, or a connection through an intermediate circuit or component described in the embodiments in the specification; indirect connection may also include a connection through other active or passive devices on the basis of achieving the same or similar functions, such as a connection through circuits or components such as switches, signal amplification circuits, and follower circuits. "Multiple" or "many" means two or more.

[0035] Figure 2A high-voltage half-bridge drive system 200 according to an embodiment of the present invention is shown. Preferably, the high-voltage half-bridge drive system 200 is used to drive a motor. The high-voltage half-bridge drive system 200 includes a control circuit 20 and a high-voltage half-bridge circuit 201. The control circuit 20 outputs control signals LO, HO, etc., which are used to drive the high-voltage half-bridge circuit 201 and control the on and off states of the power switch tube in the half-bridge circuit 201. The half-bridge circuit 201 includes an upper tube QH and a lower tube QL, which are controlled by control signals HO and LO, respectively. In one embodiment, the half-bridge circuit is a three-phase half-bridge circuit, including three half-bridge circuits, and the six power switch tubes in the three half-bridge circuits are controlled by six control signals output by the control circuit 20. The power switch tube in the half-bridge circuit 201 can be a metal oxide semiconductor field effect tube (MOSFET), a junction field effect tube (JFET) or an insulated gate bipolar transistor (IGBT), etc. The control circuit 20 has a current detection terminal I TRIP and a reference ground terminal VSS, wherein the output terminal of the lower tube QL (shown as the source of the power switch tube QL) is coupled to the first end of the detection resistor Rs and the current detection terminal I TRIP, and the second end of the detection resistor Rs is coupled to the reference ground terminal VSS of the control circuit 20. The control circuit 20 obtains a current detection signal Vs representing the current flowing through the lower tube QL through the current detection terminal I TRIP. The reference ground terminal VSS is connected to the reference ground of the system. In the three-phase half-bridge circuit embodiment, the output terminals of the three lower tubes in the three half-bridge circuits are all coupled to the first end of the detection resistor Rs and the current detection terminal I TRIP, and the second end of the detection resistor Rs is coupled to the reference ground terminal VSS of the control circuit 20. No external capacitor is required between the current detection terminal I TRIP and the reference ground terminal VSS, and the filtering function is completely realized by the internal circuit of the control circuit 20.

[0036] In one embodiment, the control circuit 20 is made on a semiconductor substrate, and the current detection terminal I TRIP and the reference ground terminal VSS are external ports of the semiconductor chip, and are connected to the current detection pin and the reference ground pin of the electronic package through an electrical conductor. It is not necessary to set a capacitor outside the semiconductor chip between the current detection terminal I TRIP and the reference ground terminal VSS of the semiconductor chip in the electronic package to achieve the filtering function. In another embodiment, the control circuit 20 is made in an electronic package to form a packaged chip, and the current detection terminal I TRIP and the reference ground terminal VSS are external pins of the packaged chip. It is also not necessary to set an external capacitor between the current detection pin I TRIP and the reference ground pin VSS outside the packaged chip. That is, in the embodiment of the present invention, no matter between the current detection pin I TRIP and the reference ground pin VSS outside the packaged chip, or between the current detection terminal I TRIP and the reference ground pin VSS of the semiconductor chip in the packaged chip, no capacitor is needed to achieve the filtering function.

[0037] Specifically, the control circuit 20 internally includes an overcurrent comparison circuit 21, a signal shaping circuit 22 and a timing filter circuit 23, which are used to provide overcurrent protection for the control circuit 20. The input end of the overcurrent comparison circuit 21 is coupled to the current detection end I TRIP for receiving the current detection signal Vs. The overcurrent comparison circuit 21 compares the current detection signal Vs with the overcurrent threshold Vref and provides an overcurrent comparison signal S1. The input end of the signal shaping circuit 22 is coupled to the current detection end I TRIP for receiving the current detection signal Vs, and the signal shaping circuit 22 shapes the current detection signal Vs and outputs at least one shaped processing signal Vz. In one embodiment, the signal shaping circuit 22 outputs one or more corresponding high-level pulses when the current detection signal Vs is higher than one or more thresholds. The timing filter circuit 23 processes the overcurrent comparison signal S1 and the shaping signal Vz, selectively shields the overcurrent comparison signal S1 according to the shaping signal Vz, and selectively filters the burr signal in the current detection signal according to other conditions of the current detection signal Vs that are different from the overcurrent comparison circuit 21, realizes and optimizes the filtering function, and outputs the overcurrent protection signal OCP. In one embodiment, the shaping signal Vz is used to control the enabling and resetting of the timing filter circuit 23. When the shaping signal Vz is in a valid state, the timing filter circuit 23 is reset and re-timing is performed to avoid entering the overcurrent protection immediately. It is used to avoid the overcurrent protection being falsely triggered by high-level glitches in the non-overcurrent state, such as phase switching or input signal glitches, to achieve the filtering effect of large capacitance. In the embodiment of the present invention, there is no need to set an RC filtering circuit outside the current detection terminal I TRIP, eliminating the external capacitor, making the circuit module more streamlined, the system cost lower, and the detection more timely and accurate, which can reduce the signal detection delay and prevent overshoot.

[0038] In another embodiment, by using the control circuit 20 in this embodiment, a small capacitor instead of a large capacitor may be arranged between the current detection terminal I TRIP and the reference ground terminal VSS to achieve a filtering effect, thereby reducing system volume and cost.

[0039] Figure 3An overcurrent protection circuit 300 according to an embodiment of the present invention is shown. The overcurrent protection circuit 300 includes an overcurrent comparison circuit 21, a signal shaping circuit and a timing filter circuit 23. The signal shaping circuit includes one or more Schmitt triggers 31 and 32. The input end of the first Schmitt trigger 31 and the input end of the second Schmitt trigger 32 receive the current detection signal Vs, the output end of the first Schmitt trigger 31 provides a first shaping signal Vz1, and the output end of the second Schmitt trigger 32 provides a second shaping signal Vz2. In one embodiment, the first Schmitt trigger 31 has a first threshold value, and when the current detection signal Vs is greater than the first threshold value, the first Schmitt trigger 31 outputs a valid signal. The second Schmitt trigger 32 has a second threshold value, and when the current detection signal Vs is greater than the second threshold value, the second Schmitt trigger 32 outputs a valid signal. The first threshold value, the second threshold value and the overcurrent threshold value Vref are different. Preferably, the trigger threshold value of the Schmitt trigger is higher than the overcurrent threshold value Vref. The first shaped processing signal Vz1 and the second shaped processing signal Vz2 are both coupled to the timing filter circuit 23, and are used to control the timing filter circuit 23 to selectively shield the over-current comparison signal S1. In other embodiments, the Schmitt trigger may have three or more.

[0040] In other embodiments, the Schmitt trigger may be replaced by a comparator or an inverter, that is, the signal shaping circuit includes at least one inverter or at least one comparator, the input end of the inverter or the comparator receives the current detection signal Vs, and the output end of the inverter or the comparator is coupled to the timing filter circuit. Preferably, the signal shaping circuit may include a plurality of comparators or inverters, which are used to shape the current detection signal Vs step by step according to the threshold of the signal glitch, and filter out the glitch in the current detection signal. The timing filter circuit deshields and filters the overcurrent comparison signal S1 according to the shaped processing signal.

[0041] Figure 4 An overcurrent protection circuit 400 according to an embodiment of the present invention is shown. The signal shaping circuit in the overcurrent protection circuit 400 includes an inverting Schmitt trigger 41 and an inverter 42. The input end of the Schmitt trigger 41 receives the current detection signal Vs, the output end of the Schmitt trigger 41 is coupled to the input end of the inverter 42, and the output end of the inverter 42 provides a shaped processing signal Vz for inputting the timing filter circuit 23. In one embodiment, when the current detection signal Vs is higher than the threshold of the Schmitt trigger, the Schmitt trigger outputs a valid signal. Preferably, the threshold of the Schmitt trigger is higher than the overcurrent threshold Vref.

[0042] Figure 5An overcurrent protection circuit 500 according to an embodiment of the present invention is shown. Specifically, the overcurrent protection circuit 500 is located in a control circuit for driving a half-bridge circuit, and the overcurrent protection circuit includes an overcurrent comparison circuit 21, a signal shaping circuit, and a timing filter circuit. The overcurrent comparison circuit 21 is coupled to the current detection terminal I TRIP of the control circuit, and is used to receive a current detection signal Vs. The overcurrent comparison circuit 21 compares the current detection signal Vs with the overcurrent threshold Vref, and outputs an overcurrent comparison signal S1. The signal shaping circuit includes a Schmitt trigger 51 and a one-shot circuit 52, wherein the input terminal of the Schmitt trigger 51 receives the current detection signal Vs, the output terminal of the Schmitt trigger 51 is coupled to the input terminal of the one-shot circuit 52, and the output terminal of the one-shot circuit 52 provides a shaping processing signal Oneshot. When the current detection signal Vs is greater than the flip threshold of the Schmitt trigger 51, the one-shot circuit 52 outputs a high-level pulse. The one-shot circuit 52 can be edge triggered, and outputs a pulse signal at the rising edge or falling edge of the output signal of the Schmitt trigger 51, which is used to reset the first timing filter circuit 53 so that the timing filter circuit re-times. In the illustrated embodiment, the Schmitt trigger 51 is an inverting trigger, so an inverting circuit is added behind the Schmitt trigger 51. However, it should be known that the Schmitt trigger 51 and the inverting circuit can be regarded as a Schmitt trigger as a whole. The timing filter circuit includes a first timing filter circuit 53, a second timing filter circuit 54 and a logic circuit 55. The input end of the first timing filter circuit 53 and the input end of the second timing filter circuit 54 are coupled to the output end of the overcurrent comparison circuit 21 for receiving the overcurrent comparison signal S1, the output end of the second timing filter circuit 54 and the output end of the one-shot circuit 52 are respectively coupled to the two input ends of the logic circuit 55, and the output end of the logic circuit 55 is coupled to the reset end CLR of the first timing filter circuit 53. The first timing filter circuit 53 has a first timing time T1. When the high level continuous state of the overcurrent comparison signal S1 is greater than the first timing time T1, the first timing filter circuit 53 is allowed to output a valid (such as a high level) overcurrent protection signal OCP, but whether the overcurrent protection signal OCP is a high level is further affected by the CLR reset terminal signal. The second timing filter circuit 54 has a second timing time T2. When the high level continuous state of the overcurrent comparison signal S1 is greater than the second timing time T2, the second timing filter circuit 54 outputs a high level signal. The first timing time T1 is greater than the second timing time T2. In the illustrated embodiment, the logic circuit 55 includes a NAND gate. When either the second timing filter circuit 54 or the single-shot circuit 52 outputs a low level signal, the NAND gate 55 outputs a high level, and the reset of the first timing filter circuit 53 will not be triggered. The NAND gate 55 logically includes an AND gate and a NOT gate. Of course, the logic circuit 55 can also only include the AND gate, whose two input terminals are respectively coupled to the output terminal of the second timing filter circuit and the output terminal of the signal shaping circuit, without including the NOT gate, depending on the logic control method.In one embodiment, its working state is as follows: in the first case, when the duration of the signal glitch outside the current detection terminal I TRIP is very short, less than the first timing time T1, and the amplitude of the signal glitch is lower than the flip threshold of the Schmitt trigger 51, the Schmitt trigger 51 does not flip, the single-shot circuit 52 outputs a low level, the NAND gate 55 outputs a high level, the clear reset CLR of the first timing filter circuit 53 will not be triggered, and the signal glitch of the I TRIP foot will be filtered out by the first timing filter circuit 53, the overcurrent protection signal OCP is a low level, and the overcurrent protection is not triggered. In the second case, when the duration of the signal glitch outside the current detection terminal I TRIP is very long (longer than the first timing time T1) and the glitch voltage amplitude is higher than the overcurrent threshold and lower than the flip threshold of the Schmitt trigger 51, the Schmitt trigger 51 does not flip, the one-shot circuit 52 outputs a low level, the NAND gate 55 outputs a high level, the clear reset CLR of the first timing filter circuit 53 will not be triggered, and at the same time, when the effective state of the overcurrent comparison signal lasts for T1, the first timing filter circuit 53 outputs a valid signal such as a high level, thereby triggering the OCP overcurrent protection. In the third case, the glitch time of the current detection signal Vs outside the current detection terminal I TRIP is very short and the signal glitch amplitude is very high. The glitch time is less than the second timing time T2, and the glitch amplitude is higher than the flip threshold of the Schmitt trigger. The second timing filter circuit 54 outputs a low level, and the NAND gate 55 outputs a high level. The first timing filter circuit 53 will not be reset, and the effective overcurrent comparison signal triggered by the signal glitch is less than the time T1, which will be filtered out by the first timing filter circuit 53. The overcurrent protection signal OCP is a low level and will not trigger the overcurrent protection. In the fourth case, the glitch amplitude of the current detection signal Vs is higher than the flip threshold of the Schmitt trigger, and the Vs glitch time is greater than the second timing time T2 but less than the first timing time T1. At this time, the second timing filter circuit 54 outputs a high level, the single trigger circuit 52 outputs a pulse, and the NAND gate 55 outputs a reset pulse. The first timing filter circuit 53 is reset and cleared within the T2 time, and the signal OCP is a low level. After time T2, if the glitch amplitude of the current detection signal Vs is no longer higher than the Schmitt threshold, the first timing filter circuit 53 will reset the timing, and the system will re-enter the first situation or the second situation depending on the length of time the glitch of the I TRIP pin signal Vs is greater than the overcurrent threshold Vref. In the fifth situation, the glitch time of the current detection signal Vs outside the I TRIP pin is very long (exceeding the first timing time T1) and the amplitude is continuously higher than the flip threshold of the Schmitt trigger, and the NAND gate 55 continuously outputs a reset pulse. At this time, the first timing filter circuit 53 is always in a reset state, waiting for the glitch amplitude of the I TRIP pin to return to normal before continuing the overcurrent protection.The fourth and fifth situations can be regarded as that, due to the long amplitude and duration of the external burr, the OCP filtering time of the system is adaptively lengthened, which is equivalent to adding a filtering capacitor, so that there is no need to set an RC filtering circuit outside the I TRIP pin to increase the auxiliary filtering time. Through the embodiments of the present invention, the filtering circuit outside the current detection terminal I TRIP can be removed, and filtering can be achieved without an external capacitor. It can automatically identify normal overcurrent protection triggering and abnormal states, improve reliability, save costs, reduce the delay caused by the external filtering circuit, avoid overcurrent protection overshoot, and improve the current detection accuracy of the system.

[0043] In another embodiment, the signal shaping circuit outputs multiple shaped processing signals, the timing filter circuit may have more than two sub-timing filter circuits, and the multiple shaped processing signals respectively control the sub-timing filter circuits to selectively filter the overcurrent comparison signal according to different situations, thereby achieving selective filtering in more situations.

[0044] Figure 6An overcurrent protection circuit 600 according to a specific embodiment of the present invention is shown. The overcurrent protection circuit 600 includes an overcurrent comparison circuit 21, a signal shaping circuit and a timing filter circuit. The overcurrent comparison circuit 21 is coupled to the current detection terminal I TRIP of the control circuit, and is used to receive a current detection signal Vs. The overcurrent comparison circuit 21 compares the current detection signal Vs with the overcurrent threshold Vref, and outputs an overcurrent comparison signal S1. The signal shaping circuit includes a Schmitt trigger 61 and a one-shot circuit 62. The input terminal of the Schmitt trigger 61 receives the current detection signal Vs, the output terminal of the Schmitt trigger 61 is coupled to the input terminal of the one-shot circuit 62, and the output terminal of the one-shot circuit 62 provides a shaping processing signal Oneshot. In another embodiment, according to the signal characteristics of the Schmitt trigger output, the one-shot circuit 62 may not be provided. The timing filter circuit includes a first timing filter circuit 63, a second timing filter circuit 64 and a logic circuit. The first timing filter circuit 63 includes a first switch M1, a second switch M2, a first resistor R1, a second resistor R2, a third resistor R3, a first capacitor C1 and a Schmitt trigger A1. The first switch M1, the first resistor R1, the second resistor R2 and the second switch M2 are coupled in series between the voltage source VD and the reference ground VSS, the control ends of the first switch M1 and the second switch M2 are coupled to the output end of the overcurrent comparison circuit 21 and are controlled by the overcurrent comparison signal S1, and the switch states of the first switch M1 and the second switch M2 are opposite. In the resistor network, the coupling point of the resistor R1 and the resistor R2 is coupled to the first end of the resistor R3, the second end of the resistor R3 is coupled to the first end of the first capacitor C1 and the input end of the first Schmitt trigger A1 and serves as the reset end CLR of the first timing filter circuit 63, and the second end of the first capacitor C1 is coupled to the reference ground VSS. The thresholds of resistors R1, R2, R3, the first capacitor C1 and the Schmitt trigger A1 determine the first timing time T1 of the first timing filter circuit 63, which is used to detect whether the duration of the effective state of the overcurrent comparison signal S1 is greater than the first timing time T1. When the overcurrent comparison signal S1 is in an effective state, the first switch M1 is turned on, the second switch M2 is turned off, and the current is charged from the voltage source VD to the first capacitor C1. When the effective state duration of the overcurrent comparison signal S1 is greater than the first timing time T1, the voltage on the first capacitor C1 reaches the threshold of the Schmitt trigger A1, and the Schmitt trigger A1 outputs a valid signal, as shown in the figure as a low level. When the overcurrent comparison signal S1 is in an invalid state, the first switch M1 is turned off, the second switch M2 is turned on, and the voltage on the first capacitor C1 is pulled down to zero. The second timing filter circuit 64 can be similar to the first timing filter circuit 63, including a third switch M3, a fourth switch M2, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a second capacitor C2 and a second Schmitt trigger A2. The resistors R4, R5, R6, the second capacitor C2 and the threshold of the second Schmitt trigger A2 determine the length of the second timing time T2.When the duration of the effective state of the overcurrent comparison signal S1 is greater than the second timing time T2, the second Schmitt trigger A2 outputs a valid signal, as shown in the figure as a high level. Of course, the first timing filter circuit 63 and the second timing filter circuit 64 can have other forms, which are used to time the continuous effective state of the overcurrent comparison signal S1, and output a valid signal when the effective state is greater than the corresponding timing time. The first timing filter circuit 63 and the second timing filter circuit 64 can also have different circuit structures. The logic circuit includes a first logic switch L1 and a second logic switch L2, which are used to implement. Figure 5The logic of the logic circuit 55 shown. The control end of the first logic switch L1 is coupled to the output end of the signal shaping circuit for receiving the shaping processing signal Oneshot, and the first end of the first logic switch L1 is coupled to the reset end of the first timing filter circuit 63, that is, the input end of the first Schmitt trigger A1. The control end of the second logic switch L2 is coupled to the output end of the second timing filter circuit 64, the first end of the second logic switch L2 is coupled to the second end of the first logic switch L1, and the second end of the second logic switch L2 is coupled to the reference ground VSS. When the burr amplitude of the current detection signal Vs is higher than the threshold of the Schmitt trigger 61, the shaping processing signal Oneshot outputs a high level, and the first logic switch L1 is turned on. When the current detection signal Vs is greater than the overcurrent threshold Vref and exceeds the second timing time T2, the second timing filter circuit 64 outputs a high level, and the second logic switch L2 is turned on. When the glitch amplitude of the current detection signal Vs is higher than the threshold of the Schmitt trigger 61 and the duration of the glitch exceeds the second timing time T2, the first logic switch L1 and the second logic switch L2 are both turned on, the reset clear terminal CLR of the first timing filter circuit 63 is pulled down to the reference ground VSS level, the first Schmitt trigger A1 outputs an invalid signal, such as a high level, the voltage on the first capacitor C1 is pulled down to zero voltage, and the first timing filter circuit 63 is re-timed. At this time, the previously valid overcurrent comparison signal S1 is shielded, the glitch signal in the current detection signal Vs is selectively filtered based on the reset terminal CLR signal, and the valid state of the overcurrent comparison signal S1 is re-timed by the first timing filter circuit 63. In order to ensure the stability of the circuit logic, the logic circuit can further include a NOT gate L3 and a NOR gate L4. The input end of the NOT gate L3 is coupled to the output end of the second timing filter circuit 64, the first end of the NOR gate L4 is coupled to the output end of the first timing filter circuit 63, the second end of the NOR gate L4 is coupled to the output end of the NOR gate L3, and the output end of the NOR gate L4 provides an overcurrent protection signal OCP, which is used to ensure that the effective overcurrent protection signal OCP is output when the duration of the overcurrent comparison signal S1 is greater than the second timing time T2, thereby reducing false triggering. According to the different settings of the effective state levels of the first Schmitt trigger A1 and the second Schmitt trigger A2, the NOT gate can be set at different positions. For example, when the effective state of the first Schmitt trigger A1 is a high level, the NOT gate can be placed between the output end of the first Schmitt trigger A1 and the NOR gate L4. When the effective state of the second Schmitt trigger A2 is a low level, a NOT gate can be set between the output end of the second Schmitt trigger A2 and the second logic switch L2, or the second logic switch L2 can be changed from an enhancement type to a depletion type.

[0045] Figure 7The flowchart of an overcurrent protection method 700 according to an embodiment of the present invention is shown. The overcurrent protection method 700 is used in a high-voltage half-bridge drive, such as a single-phase half-bridge circuit or a three-phase half-bridge circuit in a motor drive circuit, and a current detection signal is obtained by detecting the current in the half-bridge circuit. The overcurrent protection method 700 includes comparing the current detection signal with the overcurrent threshold in step 701, and providing an overcurrent comparison signal. The overcurrent protection method 700 includes shaping the current detection signal in step 702, and outputting a shaped processing signal. In one embodiment, when the current detection signal is higher than the Schmitt trigger threshold, the shaped processing signal is in a valid state, and when the current detection signal is lower than the Schmitt trigger threshold, the shaped processing signal is in an invalid state. In another embodiment, the shaped processing signal realizes the shaping of the current detection signal through multiple comparison circuits or multiple inverting circuits, obtains a shaped processing signal similar to the output of the Schmitt trigger, and shapes the current detection signal into a square wave signal. The overcurrent protection method 700 includes processing the overcurrent comparison signal based on the shaping processing signal in step 703, selectively shielding the overcurrent comparison signal according to the shaping processing signal, filtering the burr signal in the current detection signal, and outputting the overcurrent protection signal. In one embodiment, the overcurrent protection is triggered when the current detection signal is lower than the threshold of the Schmitt trigger and the effective state of the overcurrent comparison signal is continuously greater than the first timing time. When the current detection signal is higher than the Schmitt trigger threshold and when the effective state of the overcurrent comparison signal is continuously greater than the second timing time, the overcurrent comparison signal is shielded, the effective state of the overcurrent comparison signal is re-timed, and the overcurrent protection is triggered when the current detection signal is lower than the threshold of the Schmitt trigger and the effective state of the overcurrent comparison signal is continuously greater than the first timing time after re-timing, the filtering time is increased, and the large current burrs in the non-overcurrent state are effectively filtered. Wherein the Schmitt trigger threshold is higher than the overcurrent threshold, and the first timing time is greater than the second timing time. The overcurrent protection method of the present invention can save external capacitors, reduce system costs, and improve reliability.

[0046] Those skilled in the art should know that the logic controls such as "high level" and "low level", "set" and "reset", "AND gate" and "OR gate", "non-inverting input terminal" and "inverting input terminal" in the logic controls involved in the specification or drawings can be interchanged or changed with each other, and the same function or purpose as the above embodiment can be achieved by adjusting the corresponding logic controls.

[0047] The description and application of the present invention here are illustrative, and it is not intended to limit the scope of the present invention to the above-mentioned embodiments. The effects or advantages involved in the specification may not be reflected in the actual experimental examples due to the uncertainty of specific condition parameters or other factors, and the effects or advantages are not used to limit the scope of the invention. The deformation and change of the embodiments disclosed here are possible, and the replacement of the embodiments and the various equivalent parts are well known to those of ordinary skill in the art. It should be clear to those skilled in the art that the present invention can be implemented in other forms, structures, arrangements, proportions, and with other components, materials and parts without departing from the spirit or essential features of the present invention. Other deformations and changes can be made to the embodiments disclosed here without departing from the scope and spirit of the present invention.

Claims

1. A control circuit for driving a half-bridge circuit, comprising: An overcurrent comparison circuit compares the current detection signal with the overcurrent threshold and provides an overcurrent comparison signal, wherein the current detection signal represents the current flowing through the lower tube of the half-bridge circuit; A signal shaping circuit shapes the current detection signal and outputs at least one shaped processing signal; as well as The timing filter circuit is coupled to the overcurrent comparison circuit and the signal shaping circuit. The timing filter circuit selectively shields the overcurrent comparison signal based on the shaping processing signal, selectively filters the burr signal in the current detection signal, and the output end of the timing filter circuit provides an overcurrent protection signal.

2. The control circuit as claimed in claim 1, wherein the control circuit has a current detection terminal and a reference ground terminal, which are used to couple the output terminal of the lower tube in the high-voltage half-bridge circuit and obtain a current detection signal, and no external capacitor is set between the current detection terminal and the reference ground terminal.

3. The control circuit as claimed in claim 1 is used to drive a three-phase half-bridge circuit, wherein the output ends of the three lower tubes in the three-phase half-bridge circuit are coupled to the first end of the detection resistor, and the second end of the detection resistor is coupled to the reference ground end of the control circuit.

4. The control circuit as claimed in claim 1, wherein the signal shaping circuit comprises at least one Schmitt trigger, an input end of the Schmitt trigger receives the current detection signal, and an output end of the Schmitt trigger is coupled to the timing filter circuit.

5. The control circuit of claim 4, wherein a threshold of the Schmitt trigger is higher than an overcurrent threshold.

6. The control circuit as claimed in claim 1, wherein the signal shaping circuit comprises at least one inverter or at least one comparator, an input end of the inverter or the comparator receives the current detection signal, and an output end of the inverter or the comparator is coupled to the timing filter circuit.

7. The control circuit of claim 1, wherein: The signal shaping circuit includes a Schmitt trigger, and an input end of the Schmitt trigger receives a current detection signal; The timing filter circuit includes a first timing filter circuit, a second timing filter circuit and a logic circuit. The first timing filter circuit has a first timing time, the second timing filter circuit has a second timing time, the first timing time is greater than the second timing time, the input end of the first timing filter circuit and the input end of the second timing filter circuit are coupled to the output end of the overcurrent comparison circuit, the output end of the second timing filter circuit and the output end of the signal shaping circuit are respectively coupled to the two input ends of the logic circuit, the output end of the logic circuit is coupled to the reset end of the first timing filter circuit, and the output end of the first timing filter circuit is coupled to the output end of the timing filter circuit.

8. The control circuit as claimed in claim 7, wherein the signal shaping circuit further comprises an inverter and a one-shot circuit, the inverter is coupled between the output terminal of the Schmitt trigger and the input terminal of the one-shot circuit, and the one-shot circuit is edge triggered and provides a shaped processing signal.

9. The control circuit as claimed in claim 7, wherein the logic circuit comprises an AND gate, and an output terminal of the AND gate is coupled to a reset terminal of the first timing filter circuit.

10. The control circuit of claim 7, wherein: The first timing filter circuit includes a first switch, a first resistor, a second resistor, a second switch, a third resistor, a first capacitor and a first Schmitt trigger, wherein the first switch, the first resistor, the second resistor and the second switch are coupled in series between a voltage source and a reference ground, control terminals of the first switch and the second switch are coupled to an output terminal of the overcurrent comparison circuit, a coupling point between the first resistor and the second resistor is coupled to a first terminal of the third resistor, a second terminal of the third resistor is coupled to a first terminal of the first capacitor and an input terminal of the first Schmitt trigger and constitutes a reset terminal of the first timing filter circuit, a second terminal of the first capacitor is coupled to the reference ground, and an output terminal of the first Schmitt trigger constitutes an output terminal of the first timing filter circuit; as well as The second timing filter circuit includes a third switch, a fourth resistor, a fifth resistor, a fourth switch, a sixth resistor, a second capacitor and a second Schmitt trigger, wherein the third switch, the fourth resistor, the fifth resistor and the fourth switch are coupled in series between a voltage source and a reference ground, the control ends of the third switch and the fourth switch are coupled to the output end of the overcurrent comparison circuit, the coupling point of the fourth resistor and the fifth resistor is coupled to the first end of the sixth resistor, the second end of the sixth resistor is coupled to the first end of the second capacitor and the input end of the second Schmitt trigger, the second end of the second capacitor is coupled to the reference ground, and the output end of the second Schmitt trigger constitutes the output end of the second timing filter circuit.

11. The control circuit of claim 7, wherein the logic circuit comprises: A first logic switch, a control end of which is coupled to the output end of the signal shaping circuit, and a first end of the first logic switch is coupled to the reset end of the first timing filter circuit; as well as The second logic switch has a control end coupled to the output end of the second timing filter circuit, a first end of the second logic switch coupled to the second end of the first logic switch, and a second end of the second logic switch coupled to the reference ground.

12. An overcurrent protection circuit, comprising: An overcurrent comparison circuit compares the current detection signal with the overcurrent threshold and provides an overcurrent comparison signal; A signal shaping circuit shapes the current detection signal and outputs at least one shaped processing signal; as well as The timing filter circuit is coupled to the overcurrent comparison circuit and the signal shaping circuit. The timing filter circuit selectively shields the overcurrent comparison signal based on the shaping processing signal, selectively filters the burr signal in the current detection signal, and the output end of the timing filter circuit provides an overcurrent protection signal.

13. The overcurrent protection circuit as described in claim 12, wherein the signal shaping circuit includes at least one Schmitt trigger, the input end of the Schmitt trigger receives the current detection signal, the output end of the Schmitt trigger is coupled to the timing filter circuit, and the threshold of the Schmitt trigger is higher than the overcurrent threshold.

14. An overcurrent protection method for a high voltage half-bridge driver, comprising: Compare the current detection signal with the overcurrent threshold and provide an overcurrent comparison signal; Reshaping the current detection signal and outputting a shaped processing signal; as well as The overcurrent comparison signal is processed according to the shaping processing signal, the overcurrent comparison signal is selectively shielded according to the shaping processing signal, and an overcurrent protection signal is output.

15. The overcurrent protection method as described in claim 14 further includes re-timing the effective state of the overcurrent comparison signal when the current detection signal is higher than the Schmitt trigger threshold and when the effective state of the overcurrent comparison signal continues to be greater than the second timing time, triggering the overcurrent protection when the current detection signal is lower than the Schmitt trigger threshold and the effective state of the overcurrent comparison signal continues to be greater than the first timing time after re-timing, wherein the Schmitt trigger threshold is higher than the overcurrent threshold, and the first timing time is greater than the second timing time.

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