Closed-loop class D amplifier loop, differential closed-loop class D amplifier loop, audio device and electronic device

Abstract

The invention provides a closed-loop class-D amplifier loop, a differential closed-loop class-D amplifier loop, audio equipment and electronic equipment, a second-stage integrator of the loop comprises a second amplifier, a second resistance-capacitance network and a third resistance-capacitance network, and the second resistance-capacitance network comprises a second resistor and a second capacitor which are connected in parallel. The first end of the second resistance-capacitance network is coupled to the output end of the first-stage integrator, and the second end of the second resistance-capacitance network is coupled to the input end of the second amplifier; the third resistor-capacitor network comprises a third resistor and a third capacitor which are connected in series, the first end of the third resistor-capacitor network is coupled to the input end of the second amplifier, the second end of the third resistor-capacitor network is coupled to the output end of the second amplifier, and the third resistor-capacitor network forms a second zero point; and the zero point is designed in a frequency range between one time and two times of the gain bandwidth product. According to the invention, the second zero point is formed, so that the system stability of the class-D amplifier is improved when the class-D amplifier is in a no-load state or an accessed inductive load is relatively large.

Description

Technical Field

[0001] The present invention relates to the field of power electronics, and in particular to a closed-loop class D amplifier loop, a differential closed-loop class D amplifier loop, an audio device and an electronic device. Background Art

[0002] Class D amplifiers have high efficiency when driving speakers and are widely used in medium and high power audio equipment, mobile terminals or some portable terminals.

[0003] However, if the Class D amplifier is not connected to a speaker or the speaker has a large inductive load, the resonance peak frequency of the LC filter in the Class D amplifier is low, and in general, it will even be lower than the unit gain bandwidth of the closed-loop Class D amplifier, which will produce a resonance peak in the circuit. This problem is not only prominent when the Class D amplifier uses a large switching frequency such as 200k or even 2M, but also when the dead time of the output stage of the Class D amplifier increases; the resonance peak cannot be effectively suppressed by the existing loop system, which will lead to a resonance point in the loop gain bandwidth. At the resonance point, the phase and amplitude of the system will drop sharply, which is very likely to cause the phase shift to reach 180 degrees and the gain to be close to zero. In this case, the system is very likely to enter an oscillation state, which seriously affects the stability of the circuit, causing the power amplifier to have serious heating and reduced efficiency. Therefore, how to improve the stability of the Class D amplifier when it is not connected to a load or when the inductive load is large has become a technical problem that the industry urgently needs to solve. Summary of the invention

[0004] The present invention provides a closed-loop class D amplifier loop, a differential closed-loop class D amplifier loop, an audio device and an electronic device, which solve the technical problem of how to improve the stability of the class D amplifier when no loudspeaker is connected or the inductive load is large.

[0005] According to a first aspect of the present invention, an embodiment of the present invention provides a closed-loop class D amplifier loop, comprising:

[0006] A first-stage integrator, a second-stage integrator, a pulse width modulation module and an H-bridge module electrically connected in sequence;

[0007] A feedback module, a first end of which is coupled to the input end of the first-stage integrator, and a second end of which is coupled to the output end of the H-bridge module, wherein the first-stage integrator and the feedback module form a pole;

[0008] in:

[0009] The second stage integrator includes a second amplifier, a second resistor and capacitor network, and a third resistor and capacitor network;

[0010] The first end of the second resistor and capacitor network is coupled to the output end of the first stage integrator, and the second end of the second resistor and capacitor network is coupled to the input end of the second amplifier; the second resistor and capacitor network includes a second resistor and a second capacitor connected in parallel, and the second resistor and capacitor network forms a first zero point;

[0011] The first end of the third resistor and capacitor network is coupled to the input end of the second amplifier, and the second end of the third resistor and capacitor network is coupled to the output end of the second amplifier; the third resistor and capacitor network includes a third resistor and a third capacitor connected in series, and the third resistor and capacitor network forms a second zero point, and the zero point is designed to be within a frequency range between 1 times and 2 times the gain-bandwidth product.

[0012] Optionally, the first-stage integrator includes a first amplifier, a first resistor and a first capacitor;

[0013] A first end of the first resistor receives the input signal, a second end of the first resistor is coupled to an input end of the first amplifier, and the first capacitor is connected between the input end of the first amplifier and an output end of the first amplifier.

[0014] Optionally, the feedback module includes a fifth resistor, a first end of the fifth resistor is coupled to the input end of the first stage integrator, a second end of the fifth resistor is coupled to the output end of the H-bridge module, and the first capacitor and the fifth resistor form a pole. Optionally, the pulse width modulation module includes a comparator;

[0015] The first input terminal of the comparator is coupled to the output terminal of the second amplifier, the second input terminal of the comparator receives a triangle wave signal, and the output terminal of the comparator is coupled to the input terminal of the H-bridge module.

[0016] Optionally, the pulse width adjustment unit further includes a fourth resistor and a fourth capacitor, and the fourth resistor and the fourth capacitor form a pole;

[0017] The first end of the fourth resistor is coupled to the output end of the second amplifier, the second end of the fourth resistor is respectively coupled to the first end of the fourth capacitor and the first input end of the comparator, and the second end of the fourth capacitor is grounded.

[0018] Optionally, it further includes a speaker and an LC filter module, wherein the LC filter module includes a filter inductor and a filter capacitor;

[0019] The first end of the filter inductor is coupled to the output end of the H-bridge module, the second end of the filter inductor is grounded through the filter capacitor, and the second end of the filter inductor is also coupled to the input end of the speaker.

[0020] According to a second aspect of the present invention, an embodiment of the present invention further provides a differential closed-loop class D amplifier loop, comprising:

[0021] A first-stage integrator, a second-stage integrator, a pulse width modulation module and an H-bridge module electrically connected in sequence, wherein the first-stage integrator receives a differential input signal and a pole is formed in the first-stage integrator;

[0022] Two feedback modules, the first ends of the two feedback modules are respectively coupled to the first input end and the second input end of the first-stage integrator, the second ends of the two feedback modules are respectively coupled to the first output end and the second output end of the H-bridge module, and the first-stage integrator and the feedback modules form a pole; wherein:

[0023] The second stage integrator includes a second amplifier, two second resistor-capacitor networks, and two third resistor-capacitor networks;

[0024] The first ends of the two second resistor-capacitor networks are respectively coupled to the first output end and the second output end of the first-stage integrator, and the second ends of the two second resistor-capacitor networks are respectively coupled to the first input end and the second input end of the second amplifier; the second resistor-capacitor network includes a second resistor and a second capacitor connected in parallel, and the second resistor-capacitor network forms a first zero point;

[0025] The first ends of the two third resistor-capacitor networks are respectively coupled to the first input end and the second input end of the second amplifier, and the second ends of the two third resistor-capacitor networks are respectively coupled to the first output end and the second output end of the second amplifier; the third resistor-capacitor network includes a third resistor and a third capacitor connected in series, and the third resistor-capacitor network forms a second zero point, and the zero point is designed to be within a frequency range between 1 times and 2 times the gain-bandwidth product.

[0026] Optionally, the differential input signal includes a first input signal and a second input signal, the first-stage integrator includes a first amplifier and two first resistor-capacitor networks, and the first resistor-capacitor network includes a first resistor and a first capacitor;

[0027] The first ends of the two first resistor-capacitor networks are coupled to the first input end and the second input end of the first amplifier, the second ends of the two first resistor-capacitor networks are respectively coupled to the first output end and the second output end of the first amplifier, and the third ends of the two first resistor-capacitor circuits receive the first input signal and the second input signal respectively;

[0028] The first end of the first resistor receives the first input signal or the second input signal, and the second end of the first resistor is coupled to the first input end or the second input end of the first amplifier respectively. The second end of the first resistor is also coupled to the first end of the first capacitor, and the second end of the first capacitor is coupled to the first output end or the second output end of the first amplifier.

[0029] Optionally, the feedback module includes a fifth resistor, a first end of the fifth resistor is coupled to the first input end or the second input end of the first-stage integrator, and a second end of the fifth resistor is coupled to the first output end or the second output end of the H-bridge module;

[0030] The first capacitor and the fifth resistor form a pole.

[0031] Optionally, the pulse width modulation module includes two pulse width adjustment units, the input ends of the two pulse width adjustment units are respectively coupled to the first output end and the second output end of the second differential amplifier, and the output ends of the two pulse width adjustment units are respectively coupled to the first input end and the second input end of the H-bridge module;

[0032] The pulse width adjustment unit includes a comparator;

[0033] The first input terminal of the comparator is coupled to the first output terminal or the second output terminal of the second differential amplifier, the second input terminal thereof receives a triangle wave signal, and the output terminal thereof is coupled to the first input terminal or the second input terminal of the H-bridge module.

[0034] Optionally, the pulse width adjustment unit further includes a fourth resistor and a fourth capacitor, and the fourth resistor and the fourth capacitor form a pole;

[0035] The first end of the fourth resistor is coupled to the output end of the second amplifier, the second end of the fourth resistor is respectively coupled to the first end of the fourth capacitor and the first input end of the comparator, and the second end of the fourth capacitor is grounded.

[0036] Optionally, it further includes a speaker and an LC filter module, wherein the LC filter module includes two filter units, the two filter units are respectively coupled to the first output terminal and the second output terminal of the H-bridge module, and each filter unit includes a filter inductor and a filter capacitor;

[0037] The first end of each filter inductor is coupled to the first output end or the second output end of the H-bridge module, the second end of the filter inductor is grounded through the filter capacitor, and the second end of the filter inductor is also coupled to the first input end or the second input end of the speaker.

[0038] According to a third aspect of the present invention, an embodiment of the present invention provides an audio device, comprising a closed-loop class D amplifier loop as described in any one of the first aspect of the present invention.

[0039] According to a fourth aspect of the present invention, an embodiment of the present invention provides an electronic device, comprising the differential closed-loop class D amplifier loop as described in the second aspect of the present invention.

[0040] Compared with the prior art, the technical solution of the embodiment of the present invention has the following beneficial effects:

[0041] In the closed-loop class D amplifier loop, differential closed-loop class D amplifier loop, audio equipment and electronic equipment of the technical solution of the present invention, the second-stage integrator of the closed-loop class D amplifier loop is designed to include a second amplifier, a second resistor-capacitor network and a third resistor-capacitor network, the second resistor-capacitor network includes a second resistor and a second capacitor in parallel, the first end of the second resistor-capacitor network is coupled to the output end of the first-stage integrator, and the second end thereof is coupled to the input end of the second amplifier; the third resistor-capacitor network includes a third resistor and a third capacitor in series, the first end of the third resistor-capacitor network is coupled to the input end of the second amplifier, and the second end thereof is coupled to the output end of the second amplifier, the third resistor-capacitor network forms a second zero point, and the zero point is designed to be within a frequency range between 1 and 2 times the gain-bandwidth product. The present invention improves the system stability of the class D amplifier when it is unloaded or connected to a large inductive load through the second zero point formed.

[0042] Furthermore, the present invention may also include a speaker and an LC filter module. The LC filter module and the speaker network together constitute a secondary resonance pole. However, since the second-stage integrator adds a zero point located between 1 and 2 times the gain-bandwidth product, the circuit of the present invention can still ensure the system stability of the Class D amplifier when it is unloaded or connected to a large inductive load. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0044] Figure 1 It is a schematic diagram of the structure of a closed-loop class D amplifier loop in the prior art;

[0045] Figure 2 yes Figure 1 Bode plot of the circuit under normal resistive load;

[0046] Figure 3 yes Figure 1 Bode plot of the circuit under no load or large inductive and resistive load;

[0047] Figure 4 yes Figure 1 The output waveform of the circuit under no-load;

[0048] Figure 5 is a schematic diagram of the structure of a closed-loop class D amplifier loop provided by an embodiment of the present invention;

[0049] Figure 6 is a schematic structural diagram of a closed-loop class D amplifier loop provided by another embodiment of the present invention;

[0050] Figure 7 is a schematic structural diagram of a closed-loop class D amplifier loop provided by another embodiment of the present invention;

[0051] Figure 8 1 is a schematic diagram of the structure of a differential closed-loop class D amplifier loop provided by an embodiment of the present invention;

[0052] Fig. 9 is a schematic structural diagram of a differential closed-loop class D amplifier loop provided by another embodiment of the present invention;

[0053] Fig.10 is a schematic structural diagram of a differential closed-loop class D amplifier loop provided by another embodiment of the present invention;

[0054] Fig.11 yes Fig.10 The output waveform of the differential closed-loop class D amplifier loop under zero input condition is shown;

[0055] Fig.12 yes Fig.10 The output waveform of the differential closed-loop class D amplifier loop shown in FIG. 1 is in the case of a signal input;

[0056] Fig.13 yes Fig.10 Bode plots of the differential closed-loop Class D amplifier loop are shown with no load or large inductive and resistive loads.

[0057] Description of reference numerals:

[0058] 10- first stage integrator;

[0059] 20-second stage integrator;

[0060] 30- Pulse width modulation module;

[0061] 40-H bridge module;

[0062] 50-LC filter module;

[0063] 60-speakers;

[0064] 70-Feedback module;

[0065] amp1 - first amplifier;

[0066] amp2 - second amplifier;

[0067] comp-comparator. DETAILED DESCRIPTION

[0068] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0069] The terms "first", "second", "third", "fourth", etc. (if any) in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0070] The technical solution of the present invention is described in detail with specific embodiments below. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described in detail in some embodiments.

[0071] As described in the background art, it is currently difficult to improve the stability of a Class D amplifier when it is unloaded or connected to a large inductive load.

[0072] Figure 1 The invention is a schematic diagram of the structure of a closed-loop class D amplifier loop in the prior art.

[0073] Please refer to Figure 1 , the closed-loop Class D amplifier loop includes:

[0074] A first-stage integrator 10, a second-stage integrator 20, a pulse width modulation module 30, an H-bridge module 40, an LC filter module 50 and a speaker 60 are electrically connected in sequence, wherein the second-stage integrator 20 has a pole and a zero, the pulse width modulation module 30 has a pole, and the LC filter module 50 has two poles;

[0075] A fifth resistor R5 has a first end coupled to the input end of the first-stage integrator 10 , and a second end coupled to the output end of the H-bridge module 40 . The first capacitor C1 in the first-stage integrator 10 and the fifth resistor R5 form a pole.

[0076] exist Figure 1 In the example, if the Class D amplifier is not connected to the speaker 60 (Speaker) or the inductive load of the speaker 60 is large, the network added to the speaker 60 by the LC filter module 50 will generate a resonance peak, which cannot be effectively suppressed by the existing loop system, resulting in a resonance point within the loop gain bandwidth. At the resonance point, the phase and amplitude of the system will drop sharply, which can easily lead to a phase shift of 180 degrees and a gain close to zero. In this case, the system is very likely to enter an oscillation state, seriously affecting the stability and performance of the circuit;

[0077] Now combined Figure 2 as well as Figure 3 The Bode plot described in detail describes this phenomenon. Figure 2 Shows Figure 1 The Bode plot of the circuit under normal resistance load, Figure 3 Shows Figure 1 Bode plot of the circuit under no load or large inductive and resistive load, where:

[0078] Loop Gain Phase, which can be understood as the phase shift when the gain reaches 0;

[0079] Loop Gain can be understood as loop gain.

[0080] Figure 2 In the example, it can be seen that when the loop parameters are properly designed, the system with a phase margin of more than 45 degrees is generally stable;

[0081] Figure 3 In the example shown in FIG. 1 , a notch appears on both the gain curve and the phase curve due to the influence of the LC resonance point, which causes the loop to become unstable.

[0082] Moreover, when the class D amplifier is in a zero input state, due to the resonance of the LC filter module 50 , the output signal of the amplifier will include a frequency component of the resonance peak, resulting in poor electromagnetic compatibility (EMC) performance.

[0083] Now combined Figure 4 The waveform diagram described in this paper describes this phenomenon in detail. Figure 4 Shows Figure 1 The output waveform of the circuit under no-load condition, where:

[0084] M1 can be understood as the differential output waveform of the amplifier under 0 input conditions.

[0085] exist Figure 4 In the example, it can be seen that the output signal of the amplifier will contain the frequency component of the resonance peak, which will lead to poor EMC performance.

[0086] At the same time, when the Class D amplifier is unstable, the amplifier will generate invalid power consumption. The additional oscillation and power consumption caused by resonance will cause the system to consume more electricity, overheat the system, affect the reliability of the equipment, and even cause the system to overheat and fail to output music signals normally.

[0087] It can be seen that the existing technology is difficult to ensure that the stability of the Class D amplifier is maintained when the load changes.

[0088] In view of this, the present invention provides a closed-loop class D amplifier loop, wherein the second-stage integrator of the closed-loop class D amplifier loop includes a second amplifier, a second resistor-capacitor network and a third resistor-capacitor network, wherein the second resistor-capacitor network includes a second resistor and a second capacitor in parallel, wherein the first end of the second resistor-capacitor network is coupled to the output end of the first-stage integrator, and the second end thereof is coupled to the input end of the second amplifier; wherein the third resistor-capacitor network includes a third resistor and a third capacitor in series, wherein the first end of the third resistor-capacitor network is coupled to the input end of the second amplifier, and the second end thereof is coupled to the output end of the second amplifier, and the third resistor-capacitor network forms a second zero point, and the zero point is designed to be within a frequency range between 1 and 2 times of the gain-bandwidth product. It can be seen that the present invention adds a zero point between 1 and 2 times of the gain-bandwidth product through the third resistor, thereby improving the system stability of the class D amplifier when it is unloaded or when the inductive load connected is large.

[0089] In order to make the above-mentioned objects, features and beneficial effects of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0090] Figure 5 A closed-loop class D amplifier circuit with a single-ended input is provided in an embodiment of the present invention, comprising:

[0091] A first-stage integrator 10, a second-stage integrator 20, a pulse width modulation module 30 and an H-bridge module 40 electrically connected in sequence;

[0092] A feedback module 70, a first end of which is coupled to the input end of the first-stage integrator 10, and a second end of which is coupled to the output end of the H-bridge module 40, wherein the first-stage integrator 10 and the feedback module 70 form a pole;

[0093] in:

[0094] The second stage integrator 20 comprises a second amplifier amp2, a second resistor and capacitor network 201 and a third resistor and capacitor network 202;

[0095] The first end of the second resistor and capacitor network 201 is coupled to the output end of the first stage integrator 10, and the second end of the second resistor and capacitor network 201 is coupled to the input end of the second amplifier amp2; the second resistor and capacitor network 201 includes a second resistor R2 and a second capacitor C2 connected in parallel, and the second resistor and capacitor network 201 forms a first zero point;

[0096] A first end of the third resistor-capacitor network 202 is coupled to the input end of the second amplifier amp2, and a second end of the third resistor-capacitor network 202 is coupled to the output end of the second amplifier amp2; the third resistor-capacitor network 202 includes a third resistor R3 and a third capacitor C3 connected in series, and the third resistor-capacitor network 202 forms a second zero point, and the zero point is designed to be within a frequency range between 1 times and 2 times the gain-bandwidth product.

[0097] It can be seen that the present invention increases the zero point in the loop through the third resistor R3, and the zero point is

[0098]

[0099] Wherein, R3 is the resistance value of the third resistor R3, and C3 is the capacitance value of the third capacitor C3.

[0100] Therefore, the present invention increases the third resistor R3 so that the second-stage integrator 20 has two zero points, and the added zero points are designed to be within a frequency range between 1 times and 2 times the gain-bandwidth product (gbw), thereby optimizing the frequency response of the circuit within this frequency range, ensuring stability and sufficient phase margin, and improving the system stability of the Class D amplifier when it is unloaded or connected to a large inductive load.

[0101] In this case, even if an LC circuit is added to the circuit, it is guaranteed that the loop does not meet the oscillation condition at the LC resonance point.

[0102] Now, other modules of the circuit provided by the present invention are further described:

[0103] For a specific implementation, please refer to Figure 6 , the first stage integrator 10 includes a first amplifier amp1, a first resistor R1 and a first capacitor C1;

[0104] A first end of the first resistor R1 receives the input signal, and a second end of the first resistor R1 is coupled to the input end of the first amplifier amp1 . The first capacitor C1 is connected between the input end of the first amplifier amp1 and the output end of the first amplifier amp1 .

[0105] In this case, in one implementation, the feedback module 70 includes a fifth resistor R5, a first end of the fifth resistor R5 is coupled to the input end of the first-stage integrator 10, and a second end of the fifth resistor R5 is coupled to the output end of the H-bridge module 40, and the first capacitor C1 and the fifth resistor R5 form a pole.

[0106] Please refer to Figure 6 , regarding the pulse width modulation module 30, in one implementation, the pulse width modulation module 30 includes a comparator comp;

[0107] The first input terminal of the comparator comp is coupled to the output terminal of the second amplifier amp2 , the second input terminal thereof receives a triangle wave signal, and the output terminal thereof is coupled to the input terminal of the H-bridge module 40 .

[0108] In a preferred embodiment, in order to improve the audio quality and reduce the distortion and noise in the output signal, please refer to Figure 7 , the pulse width adjustment unit further includes a fourth resistor R4 and a fourth capacitor C4, the fourth resistor and the fourth capacitor form a pole;

[0109] The first end of the fourth resistor R4 is coupled to the output end of the second amplifier amp2, and the second end thereof is respectively coupled to the first end of the fourth capacitor C4 and the first input end of the comparator comp. The second end of the fourth capacitor C4 is grounded. The second input end of the comparator comp receives the triangular wave signal, and the output end thereof is coupled to the input end of the H-bridge module 40.

[0110] In this way, the pulse width modulation module 30 has a pole. Since the second-stage integrator 20 has two zeros, the circuit of the present invention can still ensure the system stability of the class D amplifier when it is unloaded or connected with a large inductive load.

[0111] To improve the quality of the output signal, please refer to Figure 7The closed-loop class D amplifier loop provided by the present invention will be connected to the LC filter module 50, wherein the input end of the LC filter module 50 is coupled to the output end of the H-bridge module 40.

[0112] In this case, the LC filter module 50 will form a secondary resonant pole, but because the second-stage integrator 20 adds a zero point located between 1 and 2 times the gain-bandwidth product, the circuit of the present invention can still ensure the system stability of the Class D amplifier when it is unloaded or connected to a large inductive load.

[0113] In actual use, please continue to refer to Figure 7 In a preferred embodiment, the closed-loop class D amplifier loop includes a speaker 60 and an LC filter module 50, and the LC filter module 50 includes a filter inductor L and a filter capacitor C;

[0114] A first end of the filter inductor L is coupled to the output end of the H-bridge module 40 , a second end of the filter inductor L is grounded via the filter capacitor C, and a second end of the filter inductor L is also coupled to the input end of the speaker 60 .

[0115] Figure 7 The speaker 60 in the example can also be understood as the load of the closed-loop class D amplifier loop. In practical applications, those skilled in the art can control the load as needed. Figure 7 The closed Class D amplifier loop shown is connected to a load if and what kind of load is connected.

[0116] exist Figure 7 In the example, the network of the LC filter module 50 and the speaker 60 together constitute a secondary resonance pole, but because the second-stage integrator 20 adds a zero point located between 1 and 2 times the gain-bandwidth product, the circuit of the present invention can not only ensure the system stability of the class D amplifier when it is unloaded or the connected inductive load is large, but also avoid the risk of generating a resonance peak in the circuit when the class D amplifier uses a larger switching frequency and when the dead time of the output stage of the class D amplifier is increased.

[0117] The closed-loop class D amplifier circuit provided by the present invention can also be applied to differential input. For details, please refer to Figure 8 , Figure 8 A differential closed-loop class D amplifier circuit provided by an embodiment of the present invention includes:

[0118] A first-stage integrator 10, a second-stage integrator 20, a pulse width modulation module 30 and an H-bridge module 40 electrically connected in sequence, wherein the first-stage integrator 10 receives a differential input signal;

[0119] Two feedback modules 70, the first ends of the two feedback modules 70 are respectively coupled to the first input end and the second input end of the first-stage integrator 10, the second ends of the two feedback modules 70 are respectively coupled to the first output end and the second output end of the H-bridge module 40, and the first-stage integrator 10 and the feedback modules 70 form a pole; wherein:

[0120] The second stage integrator 20 comprises a second amplifier amp2, two second resistor-capacitor networks 201 and two third resistor-capacitor networks 202;

[0121] The first ends of the two second resistor-capacitor networks 201 are respectively coupled to the first output end and the second output end of the first-stage integrator 10, and the second ends of the two second resistor-capacitor networks 201 are respectively coupled to the first input end and the second input end of the second amplifier amp2; the second resistor-capacitor network 201 includes a second resistor R2 and a second capacitor C2 connected in parallel, and the second resistor-capacitor network 201 forms a first zero point;

[0122] The first ends of the two third resistor-capacitor networks 202 are respectively coupled to the first input end and the second input end of the second amplifier amp2, and the second ends of the two third resistor-capacitor networks 202 are respectively coupled to the first output end and the second output end of the second amplifier amp2; the third resistor-capacitor network 202 includes a third resistor R3 and a third capacitor C3 connected in series, and the third resistor-capacitor network 202 forms a second zero point, and the zero point is designed to be within a frequency range between 1 times and 2 times the gain-bandwidth product.

[0123] It can be seen that the present invention improves the system stability of the class D amplifier when it is unloaded or connected with a large inductive load by forming the second zero point.

[0124] Now, other modules of the differential circuit provided by the present invention are further described:

[0125] For a specific implementation, please refer to Fig. 9 , the differential input signal includes a first input signal and a second input signal, and the first-stage integrator 10 includes a first amplifier and two first resistor-capacitor networks;

[0126] The first ends of the two first resistor-capacitor networks are coupled to the first input end and the second input end of the first amplifier, the second ends of the two first resistor-capacitor networks are respectively coupled to the first output end and the second output end of the first amplifier, and the third ends of the two first resistor-capacitor circuits receive the first input signal and the second input signal respectively.

[0127] It should be understood that the first input signal and the second input signal are differential signals.

[0128] Wherein, the first resistor-capacitor network includes a first resistor R1 and a first capacitor C1;

[0129] The first end of the first resistor R1 receives the first input signal or the second input signal, and the second end thereof is coupled to the first input end or the second input end of the first differential amplifier amp1. The second end thereof is also coupled to the first end of the first capacitor C1, and the second end of the first capacitor C1 is coupled to the first output end or the second output end of the first differential amplifier amp1.

[0130] In this case, in one implementation, the feedback module 70 includes a fifth resistor R5, a first end of the fifth resistor R5 is coupled to the first input end or the second input end of the first-stage integrator 10, and a second end thereof is coupled to the first output end or the second output end of the H-bridge module 40;

[0131] The first capacitor and the fifth resistor form a pole.

[0132] Please refer to Fig. 9 Regarding the pulse width modulation module 30, in one embodiment, the pulse width modulation module 30 includes two pulse width adjustment units, the input ends of the two pulse width adjustment units are respectively coupled to the first output end and the second output end of the second differential amplifier amp2, and the output ends of the two pulse width adjustment units are respectively coupled to the first input end and the second input end of the H-bridge module 40;

[0133] The pulse width adjustment unit comprises a comparator comp;

[0134] The first input terminal of the comparator comp is coupled to the first output terminal or the second output terminal of the second differential amplifier amp2 , the second input terminal thereof receives a triangle wave signal, and the output terminal thereof is coupled to the first input terminal or the second input terminal of the H-bridge module 40 .

[0135] In a preferred embodiment, in order to improve the audio quality and reduce the distortion and noise in the output signal, please refer to Fig.10 , the pulse width adjustment unit further includes a fourth resistor R4 and a fourth capacitor C4, the fourth resistor and the fourth capacitor form a pole;

[0136] The first end of the fourth resistor R4 is coupled to the first output end or the second output end of the second amplifier amp2, the second end thereof is respectively coupled to the first end of the fourth capacitor C4 and the first input end of the comparator comp, and the second end of the fourth capacitor C4 is grounded.

[0137] To further improve the quality of the output signal, please refer to Fig.10 , the differential closed-loop class D amplifier loop provided by the present invention will be connected to the LC filter module 50, and the LC filter module 50 includes two LC filter units, and the two filter units are respectively coupled to the first output terminal and the second output terminal of the H-bridge module 40;

[0138] Each filter unit includes a filter inductor L and a filter capacitor C;

[0139] A first end of each filter inductor L is coupled to the first output end or the second output end of the H-bridge module 40 , and a second end of the filter inductor L is grounded through the filter capacitor C.

[0140] In this case, the LC filter module 50 will form a secondary resonant pole, but because the second-stage integrator 20 adds a zero point located between 1 and 2 times the gain-bandwidth product, the circuit of the present invention can still ensure the system stability of the Class D amplifier when it is unloaded or connected to a large inductive load.

[0141] In practical applications, please refer to Fig.10 In a preferred embodiment, the closed-loop class D amplifier loop includes the speaker 60 and the LC filter module 50, and the LC filter module 50 includes two LC filter units, and the two filter units are respectively coupled to the first output terminal and the second output terminal of the H-bridge module 40;

[0142] Each filter unit includes a filter inductor L and a filter capacitor C;

[0143] The first end of each filter inductor L is coupled to the first output end or the second output end of the H-bridge module 40 , the second end of the filter inductor L is grounded through the filter capacitor C, and the second end of the filter inductor L is also coupled to the first input end or the second input end of the speaker.

[0144] It should be understood that Fig.10 The speaker 60 in the example can also be understood as the load of the closed-loop class D amplifier loop. In practical applications, those skilled in the art can control the load as needed. Fig.10 The closed Class D amplifier loop shown is connected to a load if and what kind of load is connected.

[0145] exist Fig.10In the example, the network of the LC filter module 50 and the speaker 60 together constitute a secondary resonance pole, but because the second-stage integrator 20 adds a zero point located between 1 and 2 times the gain-bandwidth product, the circuit of the present invention can not only ensure the system stability of the class D amplifier when it is unloaded or the connected inductive load is large, but also avoid the risk of generating a resonance peak in the circuit when the class D amplifier uses a larger switching frequency and when the dead time of the output stage of the class D amplifier is increased.

[0146] Now combined Figure 11 to Figure 13 The waveform diagram of Fig.10 The operation of the closed-loop Class D amplifier loop shown in FIG. 1 is illustrated in FIG. 1 , where:

[0147] M2 can be understood as the differential output waveform of the closed-loop class D amplifier loop provided by the present invention under the condition of 0 input;

[0148] OUT can be understood as the output waveform of the closed-loop class D amplifier loop provided by the present invention when there is a signal input;

[0149] loop gain (deg), which can be understood as the phase loop gain;

[0150] loop gain (dB) can be understood as loop gain.

[0151] Please refer to Fig.11 , Fig.11 The output waveform of the closed-loop class D amplifier loop is shown. Figure 4 In the shown class D amplifier, under the condition of 0 input, the output signal M2 of the closed-loop class D amplifier loop provided by the present invention gradually returns to 0V, and has no frequency component containing the resonance peak, thereby ensuring the EMC performance.

[0152] Please refer to Fig.12 , Fig.12 Another output waveform diagram of the closed-loop class D amplifier loop is shown. It can be seen that when there is a signal input, the harmonic distortion and noise (THDN) index of the closed-loop class D amplifier loop provided by the present invention is better. It can be seen that the present invention does not affect the THDN index while improving the system stability.

[0153] Please refer to Fig.13 , Fig.13 The Bode plot of the closed-loop Class D amplifier loop under no-load or large inductive and resistive loads is shown. Figure 3In the Bode diagram shown, although a notch appears on both the gain curve and the phase curve due to the influence of the LC resonance point, the closed-loop class D amplifier loop provided by the present invention not only ensures that the loop does not meet the oscillation condition at the LC resonance point, but also ensures that there is sufficient phase margin at the frequency of the gain-bandwidth product (gbw) by adding a zero point and slightly adjusting other parameters; wherein the position of the added zero point is between 1 and 2 times the gain-bandwidth product (gbw).

[0154] In summary, the present invention adds a third resistor R3 to add a zero point between 1 and 2 times the gain-bandwidth product, thereby improving the system stability of the class D amplifier when it is unloaded or connected to a large inductive load.

[0155] In addition, the present invention also provides an audio device, comprising any of the above-mentioned closed-loop class D amplifier loops. As an example, the audio device can be headphones, speakers, etc., and the present invention is not limited to this.

[0156] In addition, the present invention also provides an electronic device, including any of the above differential closed-loop class D amplifier loops. As an example, the electronic device can be a low-power portable device (such as a cellular phone and a laptop computer), a high-power application (such as a car audio system or a flat-panel display), etc. The present invention is not limited to this, and any device requiring a class D amplifier is within the protection scope of the present invention.

[0157] In summary, the present invention designs a second-stage integrator of a closed-loop class D amplifier loop, including a second amplifier, a second resistor-capacitor network, and a third resistor-capacitor network, wherein the second resistor-capacitor network includes a second resistor and a second capacitor connected in parallel, a first end of the second resistor-capacitor network is coupled to the output end of the first-stage integrator, and a second end thereof is coupled to the input end of the second amplifier; the third resistor-capacitor network includes a third resistor and a third capacitor connected in series, a first end of the third resistor-capacitor network is coupled to the input end of the second amplifier, and a second end thereof is coupled to the output end of the second amplifier, and the third resistor-capacitor network forms a second zero point, and the zero point is designed to be within a frequency range between 1 and 2 times the gain-bandwidth product. The present invention improves the system stability of the class D amplifier when it is unloaded or connected to a large inductive load through the second zero point formed.

[0158] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A closed-loop class D amplifier circuit, characterized in that: include: A first-stage integrator, a second-stage integrator, a pulse width modulation module and an H-bridge module electrically connected in sequence; A feedback module, a first end of which is coupled to the input end of the first-stage integrator, and a second end of which is coupled to the output end of the H-bridge module, wherein the first-stage integrator and the feedback module form a pole; in: The second stage integrator includes a second amplifier, a second resistor and capacitor network, and a third resistor and capacitor network; The first end of the second resistor and capacitor network is coupled to the output end of the first stage integrator, and the second end of the second resistor and capacitor network is coupled to the input end of the second amplifier; the second resistor and capacitor network includes a second resistor and a second capacitor connected in parallel, and the second resistor and capacitor network forms a first zero point; The first end of the third resistor and capacitor network is coupled to the input end of the second amplifier, and the second end of the third resistor and capacitor network is coupled to the output end of the second amplifier; the third resistor and capacitor network includes a third resistor and a third capacitor connected in series, and the third resistor and capacitor network forms a second zero point, and the zero point is designed to be within a frequency range between 1 times and 2 times the gain-bandwidth product.

2. The closed-loop class D amplifier circuit of claim 1, wherein: The first stage integrator includes a first amplifier, a first resistor and a first capacitor; A first end of the first resistor receives the input signal, a second end of the first resistor is coupled to an input end of the first amplifier, and the first capacitor is connected between the input end of the first amplifier and an output end of the first amplifier.

3. The closed-loop class D amplifier circuit of claim 2, wherein: The feedback module includes a fifth resistor, a first end of the fifth resistor is coupled to the input end of the first-stage integrator, a second end of the fifth resistor is coupled to the output end of the H-bridge module, and the first capacitor and the fifth resistor form a pole.

4. The closed-loop class D amplifier circuit of claim 1, wherein: The pulse width modulation module includes a comparator; The first input terminal of the comparator is coupled to the output terminal of the second amplifier, the second input terminal of the comparator receives a triangle wave signal, and the output terminal of the comparator is coupled to the input terminal of the H-bridge module.

5. The closed-loop class D amplifier circuit of claim 4, wherein: The pulse width adjustment unit further includes a fourth resistor and a fourth capacitor, wherein the fourth resistor and the fourth capacitor form a pole; The first end of the fourth resistor is coupled to the output end of the second amplifier, the second end of the fourth resistor is respectively coupled to the first end of the fourth capacitor and the first input end of the comparator, and the second end of the fourth capacitor is grounded.

6. The closed-loop class D amplifier circuit of claim 1, wherein: Also includes a speaker and an LC filter module, wherein the LC filter module includes a filter inductor and a filter capacitor; The first end of the filter inductor is coupled to the output end of the H-bridge module, the second end of the filter inductor is grounded through the filter capacitor, and the second end of the filter inductor is also coupled to the input end of the speaker.

7. A differential closed-loop class D amplifier loop, characterized in that: include: A first-stage integrator, a second-stage integrator, a pulse width modulation module and an H-bridge module electrically connected in sequence, wherein the first-stage integrator receives a differential input signal; Two feedback modules, the first ends of the two feedback modules are respectively coupled to the first input end and the second input end of the first-stage integrator, the second ends of the two feedback modules are respectively coupled to the first output end and the second output end of the H-bridge module, and the first-stage integrator and the feedback modules form a pole; wherein: The second stage integrator includes a second amplifier, two second resistor-capacitor networks, and two third resistor-capacitor networks; The first ends of the two second resistor-capacitor networks are respectively coupled to the first output end and the second output end of the first-stage integrator, and the second ends of the two second resistor-capacitor networks are respectively coupled to the first input end and the second input end of the second amplifier; the second resistor-capacitor network includes a second resistor and a second capacitor connected in parallel, and the second resistor-capacitor network forms a first zero point; The first ends of the two third resistor-capacitor networks are respectively coupled to the first input end and the second input end of the second amplifier, and the second ends of the two third resistor-capacitor networks are respectively coupled to the first output end and the second output end of the second amplifier; the third resistor-capacitor network includes a third resistor and a third capacitor connected in series, and the third resistor-capacitor network forms a second zero point, and the zero point is designed to be within a frequency range between 1 times and 2 times the gain-bandwidth product.

8. The differential closed-loop class D amplifier circuit of claim 7, wherein: The differential input signal includes a first input signal and a second input signal, the first stage integrator includes a first amplifier and two first resistor-capacitor networks, and the first resistor-capacitor network includes a first resistor and a first capacitor; The first ends of the two first resistor-capacitor networks are coupled to the first input end and the second input end of the first amplifier, the second ends of the two first resistor-capacitor networks are respectively coupled to the first output end and the second output end of the first amplifier, and the third ends of the two first resistor-capacitor circuits receive the first input signal and the second input signal respectively; The first end of the first resistor receives the first input signal or the second input signal, and the second end of the first resistor is coupled to the first input end or the second input end of the first amplifier respectively. The second end of the first resistor is also coupled to the first end of the first capacitor, and the second end of the first capacitor is coupled to the first output end or the second output end of the first amplifier.

9. The differential closed-loop class D amplifier circuit of claim 8, wherein: The feedback module includes a fifth resistor, a first end of the fifth resistor is coupled to the first input end or the second input end of the first-stage integrator, and a second end of the fifth resistor is coupled to the first output end or the second output end of the H-bridge module; The first capacitor and the fifth resistor form a pole.

10. The differential closed-loop class D amplifier circuit of claim 7, wherein: The pulse width modulation module includes two pulse width adjustment units, the input ends of the two pulse width adjustment units are respectively coupled to the first output end and the second output end of the second differential amplifier, and the output ends of the two pulse width adjustment units are respectively coupled to the first input end and the second input end of the H-bridge module; The pulse width adjustment unit includes a comparator; The first input terminal of the comparator is coupled to the first output terminal or the second output terminal of the second differential amplifier, the second input terminal thereof receives a triangle wave signal, and the output terminal thereof is coupled to the first input terminal or the second input terminal of the H-bridge module.

11. The differential closed-loop class D amplifier circuit of claim 10, wherein: The pulse width adjustment unit further includes a fourth resistor and a fourth capacitor, wherein the fourth resistor and the fourth capacitor form a pole; The first end of the fourth resistor is coupled to the output end of the second amplifier, the second end of the fourth resistor is respectively coupled to the first end of the fourth capacitor and the first input end of the comparator, and the second end of the fourth capacitor is grounded.

12. The differential closed-loop class D amplifier circuit of claim 7, wherein: It also includes a speaker and an LC filter module, wherein the LC filter module includes two filter units, the two filter units are respectively coupled to the first output terminal and the second output terminal of the H-bridge module, and each filter unit includes a filter inductor and a filter capacitor; The first end of each filter inductor is coupled to the first output end or the second output end of the H-bridge module, the second end of the filter inductor is grounded through the filter capacitor, and the second end of the filter inductor is also coupled to the first input end or the second input end of the speaker.

13. An audio device, characterized in that: It comprises a closed-loop class D amplifier circuit as claimed in any one of claims 1 to 6.

14. An electronic device, characterized in that: It includes a differential closed-loop class D amplifier loop as described in any one of items 7 to 12.

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