Phased-array antenna calibration test method and system, and storage medium

By converting the information interaction between the upper computer and the wave control and the vector network into instantaneous pulses of the hardware circuit, using the Flash memory chip and FPGA chip in the wave control box to directly send calibration instructions and trigger the vector network, the problem of long time and insufficient accuracy of the existing phased array antenna calibration test is solved, and efficient and accurate calibration test is achieved, reducing costs and improving system performance.

CN119519857APending Publication Date: 2025-02-25CHENGDU RUIXIN SHENGTONG ELECTRONIC TECH CO LTD
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Patent Information

Application Number
CN202411610540.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-12
Publication Date
2025-02-25

AI Technical Summary

Technical Problem

The calibration test time of existing phased array antennas is long and insufficiently accurate to meet the needs of efficient testing and comprehensive evaluation.

Method used

By converting the information interaction between the upper computer and the wave control and the vector network into instantaneous pulses of the hardware circuit, the Flash memory chip and FPGA chip in the wave control box are used to directly send calibration instructions and trigger the vector network, so as to read and analyze the calibration data at one time.

Benefits of technology

It saves communication overhead between the upper computer and the wave control and the arrow network during calibration, improves the speed and accuracy of calibration, reduces labor costs, and supports rapid deployment and improved system performance.

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Abstract

The invention discloses a phased-array antenna calibration test method and system and a storage medium, and belongs to the technical field of phased-array antennas. When the phased-array antenna is calibrated, an upper computer, a wave controller and a vector network are converted into instantaneous pulses of a hardware circuit through information interaction of a specific protocol and a complex process. A Flash storage chip and an FPGA chip are arranged in the wave control box, before a phased-array antenna is prepared for calibration testing, an upper computer writes a calibration instruction set into the Flash of the wave control box, and a vector network is set to be in an external trigger mode. In the calibration process, the condition that the upper computer sends a calibration instruction to the wave controller and the wave control box analyzes the calibration instruction and then issues the calibration instruction is avoided, but the wave control box directly sends the calibration instruction and triggers the vector network, and the vector network collects and caches data. And after receiving a calibration completion command sent back by the wave control box, the upper computer reads the cached data at one time through the vector network FIFO function and then analyzes and displays the cached data. According to the method, the communication overhead between the upper computer and the wave control and vector network during calibration is saved, the calibration speed and accuracy are improved, and the labor cost is saved.
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Description

Technical Field

[0001] The present invention relates to the technical field of phased array antennas, and in particular to a phased array antenna calibration test method, system and storage medium. Background Art

[0002] Phased array antenna is an advanced communication and radar technology that quickly adjusts the direction of the beam electronically without the need for a traditional mechanical tracking system. It consists of multiple antenna units, a feed section, a receiving channel, and a transmitting channel. In order to achieve the ideal beam synthesis effect, it is necessary to accurately know the phase calibration value of each channel, so phase calibration has become one of the important tasks in the development of phased array antennas. Phase calibration of phased array antennas is crucial to ensure the performance of communication and radar systems. Inaccurate calibration may lead to beam pointing errors, signal attenuation, and system performance degradation. Therefore, the development of an efficient and convenient phase calibration system is of great significance for the development of phased array antennas.

[0003] The existing technical solutions have the following disadvantages: 1. Long test time: The test host computer communicates with the wave control and vector network respectively to control the phased array antenna channel and collect data. They communicate through a series of processes such as handshake, inquiry, and waiting through a specific protocol. The communication overhead increases the test time, and the more calibration channels there are, the greater the communication overhead. 2. Insufficient calibration accuracy: Since the host computer software communicates with the wave control through the serial port, packet loss may occur during the instruction sending process, or after the instruction is sent, the host computer performs vector network data collection before the wave control completes TR control or effectively controls the channel, resulting in inaccurate data collection and calibration errors. Therefore, the problems and limitations of the existing technical solutions make it impossible to meet the needs of efficient testing and comprehensive evaluation of phased array antennas. Summary of the invention

[0004] The purpose of the present invention is to overcome the deficiencies of the prior art and to provide a phased array antenna calibration test method, system and storage medium.

[0005] The objective of the present invention is achieved through the following technical solutions: The first aspect of the present invention provides: a phased array antenna calibration test method, comprising the following steps: The host computer configures the vector network module to external trigger mode, and then sends a Flash erase command to the wave control box; After receiving the Flash erase command and completing the return, write the calibration command set to the Flash module; After the calibration instruction set is written, the data at any address is read back and the sent data is verified. If the data verification fails, the Flash is erased and the calibration instruction set is written again. If the data verification passes, the calibration frequency point is selected. The host computer calculates the start address and end address of the calibration instruction set that the wave control box in the Flash module needs to send according to the selected calibration frequency point; The host computer writes the pole voltage of the current frequency point to each channel; The host computer sends a command to start calibration; The wave control box sends a calibration instruction set, and after completion, it sends a calibration completion instruction to the host computer; After the host computer receives the calibration completion instruction and completes the return, it reads the calibration data at one time through the vector network FIFO function for analysis and processing and displays the calibration results.

[0006] Preferably, the data verification comprises the following steps: selecting target data, and verifying data selected at any position in the middle of the target data and the first data.

[0007] Preferably, the start calibration instruction includes obtaining a starting address and an ending address of Flash data.

[0008] Preferably, the calibration instruction set is written into the Flash module by the following steps: Write the receive or transmit calibration instructions for the target frequency band; First, the entire array is powered off; a single channel is powered on; a single channel writes the ring band voltage; the first voltage update; a single channel writes back to the pole; the voltage is updated again; a single channel is powered off; the channel number is increased by one, and the single channel power-on steps are repeated until the channel number is equal to the number of channels; Turn off the power of the entire array again; increase the frequency point by one, and repeat the single-channel power-on steps until the frequency point number equals the total number of frequencies; Repeat the writing steps until the receive and transmit calibration instructions of the target frequency band are written.

[0009] Preferably, the target frequency bands are KU band and KA band.

[0010] The second aspect of the present invention provides: a phased array antenna calibration and testing system for implementing any of the above-mentioned phased array antenna calibration and testing methods, comprising a host computer, the host computer being connected to a vector network module and a wave control box; the wave control box being connected to the vector network module and the phased array antenna; the host computer being used to write a calibration instruction set to the wave control box, the wave control box being used to send the calibration instruction set to the phased array antenna and send an external trigger signal to the vector network module.

[0011] Preferably, the wave control box includes a Flash module and an FPGA module, the Flash module is connected to the host computer and the FPGA module; the FPGA module is connected to the phased array antenna and the vector network module, and the FPGA module is used to read the command set to the Flash module, send an external trigger signal to the vector network module, and send a calibration instruction set to the phased array antenna.

[0012] A third aspect of the present invention provides: a computer-readable storage medium, wherein the computer-readable storage medium stores computer-executable instructions, and when the computer-executable instructions are loaded and executed by a processor, any of the above-mentioned phased array antenna calibration test methods is implemented.

[0013] The beneficial effects of the present invention are: 1) It saves the communication overhead between the host computer and the wave control and vector network during calibration, improves the speed and accuracy of calibration, and saves labor costs.

[0014] 2) Through the broadband fast-hopping polarization signal source, the phased array antenna can perform polarization testing within a broadband range and quickly switch between different polarization states. This makes the calibration test and optimization of the phased array antenna more comprehensive and efficient.

[0015] 3) Improve test efficiency and test accuracy: The PFGA performs pulse input detection and pulse output judgment based on timing logic, and converts the handshake, inquiry, and waiting performed by each module on the network through the characteristic protocol into the instantaneous pulse response of the hardware circuit, saving software communication overhead and providing more accurate phase and amplitude calibration, thereby ensuring that the performance of the phased array antenna system meets the expected standards.

[0016] 4) Reduce costs: The use of a rapid calibration system can reduce manual operation time and the need for high-precision instruments, thereby reducing the cost of the entire testing process.

[0017] 5) Enhanced reliability: The fast calibration system can ensure the stability and consistency of the phased array antenna system, reduce problems caused by improper calibration, and improve the reliability and stability of the system.

[0018] 6) Support rapid deployment: The use of the phased array rapid calibration system can speed up the deployment process of the phased array antenna system, especially in scenarios that require emergency response or rapid deployment, rapid calibration can provide great convenience.

[0019] 7) Improve system performance: Through fast calibration, it can ensure that the phased array antenna system can achieve optimal performance in various working environments and improve the overall performance of the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 Flow chart of the test method for phased array antenna calibration; Figure 2 Block diagram of the test system for phased array antenna calibration; Figure 3 generating a flow chart for a calibration instruction set; Figure 4 This is a schematic diagram of the calibration test environment; Figure 5This is a schematic diagram of vector network parameter configuration; Figure 6 Write schematics for the calibration instruction set; Figure 7 Write a flow chart for the calibration instruction set; Figure 8 Write a schematic for the pole voltage; Fig. 9 This is a schematic diagram of the calibration test results of the present invention; Fig.10 This is a schematic diagram of the traditional calibration test results. DETAILED DESCRIPTION

[0021] The technical solution of the present invention will be clearly and completely described below in conjunction with the embodiments. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0022] The core idea of ​​the present invention is that when calibrating the phased array antenna, the information interaction between the host computer and the wave control and vector network through specific protocols and complex processes is converted into instantaneous pulses of the hardware circuit. The wave control box includes Flash storage chips and FPGA chips. Before the phased array antenna is prepared for calibration and testing, the host computer first writes the calibration instruction set into the wave control box Flash, and the vector network is set to external trigger mode. During the calibration process, the host computer no longer sends calibration instructions to the wave control, and the wave control box parses and then sends them down. Instead, the wave control box directly sends calibration instructions and triggers the vector network, and the vector network collects data and caches it. After receiving the calibration completion command sent back by the wave control box, the host computer uses the vector network FIFO function to read out the cached data at one time and then analyzes and displays it. This method saves the communication overhead between the host computer and the wave control and vector network during calibration, improves the speed and accuracy of calibration, and saves labor costs.

[0023] See also Figure 1-Figure 10 The first aspect of the present invention provides: a phased array antenna calibration test method, comprising the following steps: The host computer configures the vector network module to external trigger mode, and then sends a Flash erase command to the wave control box; After receiving the Flash erase command and completing the return, write the calibration command set to the Flash module; After the calibration instruction set is written, the data at any address is read back and the sent data is verified. If the data verification fails, the Flash is erased and the calibration instruction set is written again. If the data verification passes, the calibration frequency point is selected. The host computer calculates the start address and end address of the calibration instruction set that the wave control box in the Flash module needs to send according to the selected calibration frequency point; The host computer writes the pole voltage of the current frequency point to each channel; The host computer sends a command to start calibration; The wave control box sends a calibration instruction set, and after completion, it sends a calibration completion instruction to the host computer; After the host computer receives the calibration completion instruction and completes the return, it reads the calibration data at one time through the vector network FIFO function for analysis and processing and displays the calibration results.

[0024] In this embodiment, the calibration instruction set generation process is as follows: Figure 3 As shown, phased array antenna calibration has a specific process, which is divided into several steps. Each step has a corresponding command to set a different state. After the current state is set correctly, it enters the next test step and sends the corresponding command. The calibration instruction set combines the step process and the instruction sending, and generates the calibration instruction set according to a specific process sequence.

[0025] Before the efficient calibration test, confirm whether there is enough Flash space reserved to store the calibration instruction set. Confirm whether the number of amplitude and phase acquired at one time will exceed the storage limit of the vector network FIFO function if there are too many channels and calibration frequencies when multiple frequency points need to be calibrated at the same time. If the storage limit is exceeded, frequency point calibration is required.

[0026] Flash storage space: Confirm whether the Flash space is sufficient by calculating the number of bytes of the calibration instruction set. The calculation formula for the real and imaginary part calibration is: Total number of instruction bytes = ((channel power-on instruction + power-off instruction + ((write loop voltage instruction + write pole voltage + write loop inverted voltage instruction) * 4 (4 voltage instructions in total)) + update voltage instruction * 2) * number of channels * number of frequency points * data frame length * phase shift angle list) * 2 (transmitting and receiving) + full array power-off instruction * 2 (power off before and after calibration) * number of frequency points * 2 (transmitting and receiving), the amplitude and phase calibration calculation formula is: Total number of instruction bytes = ((channel power-on instruction + power-off instruction + ((write loop voltage instruction + write pole voltage) * 4 (4 voltage instructions in total)) + update voltage instruction * 2) * number of channels * number of frequency points * data frame length * phase shift angle list) * 2 (transmitting and receiving) + full array power-off instruction * 2 (power off before and after calibration) * number of frequency points * 2 (transmit and receive).

[0027] FIFO storage: Determine the maximum number of frequency points that can be calibrated at one time through calculation. The calculation formula for the number of samplings in the real and imaginary calibration method is: number of samplings = number of channels * number of frequencies * shift angle list * 4. The calculation formula for the number of samplings in the amplitude and phase calibration method is: number of samplings = number of channels * number of frequencies * shift angle list * 2. If the total number of samplings is less than the upper limit of the vector network cache data, all frequency points can be calibrated together; if the number of samplings is greater than the upper limit of the vector network cache data, segmented multi-frequency point calibration is performed according to the upper limit of the vector network.

[0028] The test environment is set up as follows Figure 4 As shown in the figure, taking receiving calibration as an example, the auxiliary antenna and the antenna under test are set up in the microwave darkroom, connected to the far-field test system instrument, the signal input port of the vector network is connected to the auxiliary antenna, and the signal output port is connected to the antenna under test. The wave control box test port is connected to the external trigger input port of the vector network, and the host computer is connected to the wave control box and the vector network.

[0029] VN hardware configuration: The hardware part of the wave control box needs to lead out a test port to connect to the external trigger input port of the VN to provide external trigger excitation to the VN. This port is usually a BNC coaxial interface or a special connector, such as RS-232, GPIB (IEEE-488), USB, etc. The VN port in this test is a BNC coaxial interface.

[0030] The software configuration part of the vector network is as follows Figure 5 As shown in the figure, taking the single frequency calibration of Ka band as an example, the vector network frequency is set to 33GHz, the trigger mode is set to "external trigger FIFO" mode, and the acquisition mode is set to "Real / Imag" real and imaginary part mode.

[0031] In some embodiments, the data verification includes the following steps: selecting target data, verifying data selected from any position in the middle of the target data and the first data.

[0032] In some embodiments, the start calibration instruction includes fetching a start address and an end address of Flash data.

[0033] In some embodiments, the calibration instruction set is written into the Flash module by the following steps: Write the receive or transmit calibration instructions for the target frequency band; First, the entire array is powered off; a single channel is powered on; a single channel writes the ring band voltage; the first voltage update; a single channel writes back to the pole; the voltage is updated again; a single channel is powered off; the channel number is increased by one, and the single channel power-on steps are repeated until the channel number is equal to the number of channels; Turn off the power of the entire array again; increase the frequency point by one, and repeat the single-channel power-on steps until the frequency point number equals the total number of frequencies; Repeat the writing steps until the receive and transmit calibration instructions of the target frequency band are written.

[0034] In this embodiment, the design of the calibration instruction set is as follows: in order of frequency points, a "full array shutdown" instruction is sent before and after the calibration starts, and the channel is powered on, the single channel writes the ring band voltage, updates the voltage, the single channel writes the pole voltage, updates the voltage, and the single channel is powered off starting from channel 0 according to the single-channel test steps. The above 6 steps are a channel calibration process. When a channel calibration process is completed, the channels are accumulated and the above process is repeated. When the channel number is equal to the total number of channels, the design of all calibration instructions at one frequency point is completed. The calibration instruction sets for all frequency points are accumulated according to the above process. Figure 6 As shown in the figure, before the phased array antenna calibration begins, the host computer writes the calibration instruction set to the beam control box Flash, and the progress bar shows the progress of writing the calibration instruction set. After the instruction is written, the data at any address can be read back and compared with the sent data, usually to verify the first and last data. Since the phased array in this example is divided into frequency bands, the calibration instruction set design also needs to consider the frequency bands. The receiving calibration and transmitting calibration instructions are separated, and the KA and KU calibration instruction sets in the receiving and transmitting calibration are separated. The host computer writes the calibration instruction set as Figure 7 The order shown is written into the Flash, and the address is calculated according to this order when the wave control is used to obtain data.

[0035] like Figure 8 As shown in the figure, before starting the calibration, the host computer writes the pole data of each channel at the current frequency point according to the selected frequency point. The host computer clicks the "Start Calibration" button to send the start calibration command, and the wave control box starts to send the calibration command set. After the calibration command is sent, the host computer reads the data and analyzes it. After the calibration test is completed, Fig. 9 It can be seen that, using the efficient calibration method of the present invention, it takes 51 seconds to calibrate 320 channels in the KA band, 12 seconds to write the pole voltage, and the total time consumed by the efficient calibration method is 63 seconds. Fig.10 The traditional calibration method takes 356 seconds to calibrate 320 channels in the KA band. This method is nearly 7 times faster than the original one.

[0036] In some embodiments, the target frequency bands are KU band and KA band. The second aspect of the present invention provides: a phased array antenna calibration and testing system for implementing any of the above-mentioned phased array antenna calibration and testing methods, comprising a host computer, the host computer being connected to a vector network module and a wave control box; the wave control box being connected to the vector network module and the phased array antenna; the host computer being used to write a calibration instruction set to the wave control box, the wave control box being used to send the calibration instruction set to the phased array antenna and send an external trigger signal to the vector network module.

[0037] In some embodiments, the wave control box includes a Flash module and an FPGA module, the Flash module is connected to the host computer and the FPGA module; the FPGA module is connected to the phased array antenna and the vector network module, and the FPGA module is used to read the command set to the Flash module, send an external trigger signal to the vector network module, and send a calibration instruction set to the phased array antenna.

[0038] In this embodiment, if Figure 2 As shown in the figure, the host computer writes the calibration instruction set into the Flash chip storage in the beam control box. During the calibration process, the FPGA takes out the data frame from the Flash and sends it to the phased array antenna for calibration control. At the same time, the FPGA generates an external trigger signal to the vector network through the timing to collect data and cache data. When the calibration is completed, the host computer reads the data through the FIFO function of the vector network for analysis.

[0039] A third aspect of the present invention provides: a computer-readable storage medium, wherein the computer-readable storage medium stores computer-executable instructions, and when the computer-executable instructions are loaded and executed by a processor, any of the above-mentioned phased array antenna calibration test methods is implemented.

[0040] The above is only a preferred embodiment of the present invention. It should be understood that the present invention is not limited to the form disclosed herein, and should not be regarded as excluding other embodiments, but can be used in various other combinations, modifications and environments, and can be modified within the scope of the concept described herein through the above teachings or the technology or knowledge of the relevant field. The changes and modifications made by those skilled in the art shall not deviate from the spirit and scope of the present invention, and shall be within the scope of protection of the claims attached to the present invention.

Claims

1. A phased array antenna calibration test method, characterized in that: The following steps are involved: The host computer configures the vector network module to external trigger mode, and then sends a Flash erase command to the wave control box; After receiving the Flash erase command and completing the return, write the calibration command set to the Flash module; After the calibration instruction set is written, the data at any address is read back and the sent data is verified. If the data verification fails, the Flash is erased and the calibration instruction set is written again. If the data verification passes, the calibration frequency point is selected. The host computer calculates the start address and end address of the calibration instruction set that the wave control box in the Flash module needs to send according to the selected calibration frequency point; The host computer writes the pole voltage of the current frequency point to each channel; The host computer sends a command to start calibration; The wave control box sends a calibration instruction set, and after completion, it sends a calibration completion instruction to the host computer; After the host computer receives the calibration completion instruction and completes the return, it reads the calibration data at one time through the vector network FIFO function for analysis and processing and displays the calibration results.

2. The phased array antenna calibration test method according to claim 1, characterized in that: The data verification comprises the following steps: selecting target data, and verifying data selected at any position in the middle of the target data and the first data.

3. The phased array antenna calibration test method according to claim 1, characterized in that: The start calibration instruction includes fetching the starting address and the ending address of the Flash data.

4. The phased array antenna calibration test method according to claim 1, characterized in that: The calibration instruction set is written into the Flash module by the following steps: Write the receive or transmit calibration instructions for the target frequency band; First time, the whole array is powered off; a single channel is powered on; a single channel writes the ring band voltage; first voltage update; a single channel writes back to the pole; voltage update again; Power off a single channel; increase the channel number by one, and repeat the single channel power-on steps until the channel number equals the number of channels; Turn off the power of the entire array again; increase the frequency point by one, and repeat the single-channel power-on steps until the frequency point number equals the total number of frequencies; Repeat the writing steps until the receive and transmit calibration instructions of the target frequency band are written.

5. The phased array antenna calibration test method according to claim 4, characterized in that: The target frequency bands are KU band and KA band.

6. A phased array antenna calibration test system, characterized in that: Used to implement the phased array antenna calibration test method as described in any one of claims 1-5, including a host computer, the host computer is connected to the vector network module and the wave control box; the wave control box is connected to the vector network module and the phased array antenna; the host computer is used to write a calibration instruction set to the wave control box, and the wave control box is used to send the calibration instruction set to the phased array antenna and send an external trigger signal to the vector network module.

7. The phased array antenna calibration test system according to claim 6, characterized in that: The wave control box includes a Flash module and an FPGA module. The Flash module is connected to the host computer and the FPGA module; the FPGA module is connected to the phased array antenna and the vector network module. The FPGA module is used to read the command set from the Flash module, send an external trigger signal to the vector network module, and send a calibration instruction set to the phased array antenna.

8. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer-executable instructions, and when the computer-executable instructions are loaded and executed by the processor, the phased array antenna calibration test method according to any one of claims 1 to 5 is implemented.

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