Semiconductor device, display panel, and electronic apparatus
By setting up a multi-layer stacked structure in the TFT and using the gate as the voltage control layer, the problems of insufficient driving current of the TFT and difficult to control the threshold voltage in the prior art are solved, and higher driving capabilities and flexible voltage regulation are achieved.
Patent Information
- Application Number
- CN202311010442.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-08-09
- Publication Date
- 2025-02-25
AI Technical Summary
In the prior art, it is difficult for the TFT to increase the driving current without changing the projection area on the substrate, and the threshold voltage is difficult to control.
By providing at least two stacked structures and making the gate in at least one of the stacked structures serve to receive a fixed voltage signal, the threshold voltage of each channel is regulated as a voltage regulation layer.
It improves the driving capability of semiconductor devices and enables its threshold voltage to be regulated, enhancing the flexibility of the device.
Smart Images
Figure CN119521775A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of semiconductor devices, and in particular to a semiconductor device, a display panel and an electronic device. Background Art
[0002] In some electronic devices, thin film transistors (TFTs) are often used as switching devices. Parameters such as TFT driving capability and size are very important for some electronic devices. For example, in a display panel, TFT driving capability determines the pixel density (Pixels Per Inch, PPI) of the display panel. How to increase the driving current of TFT while keeping the projected area of TFT on the substrate unchanged has become a focus of attention in the industry. Summary of the invention
[0003] In order to overcome the above-mentioned deficiencies in the prior art, the object of the present application is to provide a semiconductor device, the semiconductor device comprising:
[0004] substrate;
[0005] At least two stacked structures are formed on one side of the substrate and a first insulating layer is located between two adjacent stacked structures;
[0006] Each of the stacked structures comprises a gate, a semiconductor layer and a second insulating layer located between the gate and the semiconductor layer; in each of the stacked structures, the gate, the second insulating layer and the semiconductor layer have the same stacking direction;
[0007] The gate in at least one of the stacked structures is used to adjust the threshold voltage of the semiconductor device based on a received fixed voltage signal, and the gate in at least one of the stacked structures is used to turn on or off the semiconductor device based on a received switch control signal.
[0008] In some possible implementations, the semiconductor device includes three or more stacked structures.
[0009] In some possible implementations, in the stacked structure, the gate is located on a side of the second insulating layer close to the substrate, and the semiconductor layer is located on a side of the second insulating layer away from the substrate.
[0010] In some possible implementations, the gate in the stacked structure closest to the substrate is used to adjust the threshold voltage of the semiconductor device based on a received fixed voltage signal; and the gates in the other stacked structures except the stacked structure closest to the substrate are used to turn on or off the semiconductor device based on the same received switch control signal.
[0011] In some possible implementations, in the stacked structure, the semiconductor layer is located on a side of the second insulating layer close to the substrate, and the gate is located on a side of the second insulating layer away from the substrate.
[0012] In some possible implementations, the gate in the stacked structure farthest from the substrate is used to adjust the threshold voltage of the semiconductor device based on a received fixed voltage signal; the gates of the other stacked structures except the stacked structure farthest from the substrate are used to turn on or off the semiconductor device based on the same received switch control signal.
[0013] In some possible implementations, the orthographic projections of the gates in each of the stacked structures on the substrate at least partially overlap;
[0014] Preferably, the orthographic projections of the gates in each of the stacked structures on the substrate overlap.
[0015] In some possible implementations, the semiconductor device further includes a third insulating layer, wherein the third insulating layer is located on a side of the stacked structure that is farthest from the substrate and away from the substrate;
[0016] Preferably, the semiconductor device further comprises a source electrode and a drain electrode, wherein the source electrode and the drain electrode respectively penetrate from a side of the third insulating layer away from the substrate to the semiconductor layer closest to the substrate, and are respectively in electrical contact with each of the semiconductor layers;
[0017] Preferably, the orthographic projections of the source and the drain on the substrate are located on both sides of the orthographic projections of each gate on the substrate.
[0018] In some possible implementations, the material of the semiconductor layer includes an oxide semiconductor;
[0019] Preferably, the material of the semiconductor layer includes indium gallium zinc oxide.
[0020] Another object of the present application is to provide a display panel, which includes the semiconductor device provided by the present application.
[0021] Another object of the present application is to provide an electronic device, which includes the display panel provided in the present application.
[0022] Compared with the prior art, this application has the following beneficial effects:
[0023] The embodiments of the present application provide a semiconductor device, a display panel, and an electronic device, which provide at least two stacked structures and allow a gate in at least one of the stacked structures to receive a fixed voltage signal, so that the gate can be used as a voltage control layer to control the threshold voltage of each channel. In this way, the driving capability of the semiconductor device can be improved and the threshold voltage of the semiconductor device can be controlled. BRIEF DESCRIPTION OF THE DRAWINGS
[0024] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.
[0025] Figure 1 It is a schematic diagram of a semiconductor device in the prior art;
[0026] Figure 2 One of the schematic diagrams of a semiconductor device provided in an embodiment of the present application;
[0027] Figure 3 A second schematic diagram of a semiconductor device provided in an embodiment of the present application;
[0028] Figure 4 A third schematic diagram of a semiconductor device provided in an embodiment of the present application;
[0029] Figure 5 A fourth schematic diagram of a semiconductor device provided in an embodiment of the present application;
[0030] Figure 6 A schematic diagram of the threshold voltage regulation effect of a semiconductor device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0031] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various different configurations.
[0032] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for which protection is sought, but merely represents selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.
[0033] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.
[0034] In the description of the present application, it should be noted that the terms "center", "upper", "lower", "vertical", "horizontal", "inner", "outer", etc. indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, or the positions or positional relationships in which the inventive product is usually placed when in use. They are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific position, be constructed and operated in a specific position, and therefore cannot be understood as a limitation on the present application. In addition, the terms "first", "second", "third", etc. are only used to distinguish the description, and cannot be understood as indicating or implying relative importance.
[0035] It should be noted that, in the absence of conflict, different features in the embodiments of the present application may be combined with each other.
[0036] See also Figure 1 In some existing semiconductor devices, in order to improve the driving capability of the semiconductor device, a first semiconductor layer 231 ′ and a first semiconductor layer 232 ′ are respectively disposed on the upper and lower sides of the gate 210 ′.
[0037] Specifically, such a semiconductor device includes a substrate 100' and a first semiconductor layer 231', a first insulating layer 221', a gate 210', a second insulating layer 222', a second semiconductor layer 232' and a third insulating layer 223' stacked in sequence on the substrate, and the semiconductor device includes a source 510' and a drain 520' electrically connected to the first semiconductor layer 231' and the second semiconductor layer 232', respectively.
[0038] In this type of semiconductor device, the gate 210' and the first semiconductor layer 231' and the second semiconductor layer 232' above and below form a dual-channel structure, and the gate 210' controls the upper and lower channels. However, the inventors have found that due to the differences in the film layer positions and manufacturing processes of the upper and lower channels, the threshold voltage (Vth) and other characteristics of the semiconductor device are difficult to control.
[0039] In view of this, this embodiment provides a solution that can at least partially solve the above-mentioned problem. The solution provided by this embodiment is described in detail below.
[0040] See also Figure 2 and Figure 3 , Figure 2 and Figure 3A semiconductor device is provided in this embodiment. The semiconductor device includes a substrate 100 , at least two stacked structures 200 formed on one side of the substrate 100 , and a first insulating layer 300 located between two adjacent stacked structures 200 .
[0041] In this embodiment, each of the stacked structures 200 includes a plurality of sub-layers. For example, each of the stacked structures 200 may include a gate 210, a semiconductor layer 230, and a second insulating layer 220 located between the gate 210 and the semiconductor layer 230. In each of the stacked structures 200, the stacking directions of the gate 210, the second insulating layer 220, and the semiconductor layer 230 are consistent. The first insulating layer 300 and the second insulating layer 220 may both be gate 210 insulating layers (Gate Insulation Layer, GI).
[0042] The gate 210 in at least one of the stacked structures 200 is used to adjust the threshold voltage of the semiconductor device based on a received fixed voltage signal, and the gate 210 in at least one of the stacked structures 200 is used to turn on or off the semiconductor device based on a received switch control signal.
[0043] For example, the gate 210 in at least one of the stacked structures 200 is connected to a regulating voltage line for transmitting a fixed voltage signal, and the gate 210 in another at least one of the stacked structures 200 is connected to a gate signal line for transmitting a switch control signal.
[0044] Based on the above design, in this embodiment, by providing at least two stacked structures 200 to form a multi-channel stacked structure, the driving current of the semiconductor device can be increased while the projected area of the semiconductor device on the substrate 100 remains unchanged. In addition, by making the gate 210 in at least one of the stacked structures 200 receive a fixed voltage signal, the gate 210 can be used as a voltage control layer, and by adjusting the voltage loaded on the voltage control layer, the threshold voltage of the entire semiconductor structure can be controlled, thereby improving the use flexibility of the semiconductor device.
[0045] For some possible implementations, see Figure 5 and Figure 6 The semiconductor device provided in this embodiment includes three or more stacked structures 200. In this case, n stacked structures 200 can form 2n-1 conductive channels, thereby improving the driving capability of the semiconductor structure.
[0046] For some possible implementations, see Figure 2 and Figure 5In the stacked structure 200, the gate 210 is located on the side of the second insulating layer 220 close to the substrate 100, and the semiconductor layer 230 is located on the side of the second insulating layer 220 away from the substrate 100. That is, in this embodiment, the semiconductor device as a whole can be a bottom gate structure. Each gate 210 is located on the side of each semiconductor layer 230 close to the substrate 100.
[0047] In this case, except for the semiconductor layer 230 farthest from the substrate 100 , the other semiconductor layers 230 on the sides close to the substrate 100 and the sides far away from the substrate 100 can form conductive channels.
[0048] Further, in this case, the gate 210 in the stacked structure 200 closest to the substrate 100 is used to adjust the threshold voltage of the semiconductor device based on a received fixed voltage signal, and the gates 21 in the other stacked structures 200 except the stacked structure 200 closest to the substrate 100 are used to turn on or off the semiconductor device based on the same received switch control signal.
[0049] For example, the gate 210 in the stacked structure 200 closest to the substrate 100 is connected to a regulating voltage routing for transmitting a fixed voltage signal, and the gates 210 of the other stacked structures 200 except the stacked structure 200 closest to the substrate 100 are connected to a gate signal routing for transmitting a switch control signal.
[0050] For other possible implementations, see Figure 3 and Figure 6 In the stacked structure 200, the semiconductor layer 230 is located on the side of the second insulating layer 220 close to the substrate 100, and the gate 210 is located on the side of the second insulating layer 220 away from the substrate 100. That is, in this embodiment, the semiconductor device as a whole can be a top gate structure. Each gate 210 is located on the side of each semiconductor layer 230 away from the substrate 100.
[0051] In this case, except for the semiconductor layer 230 closest to the substrate 100 , the other semiconductor layers 230 on the sides close to the substrate 100 and the sides away from the substrate 100 can form conductive channels.
[0052] Further, in this case, the gate 210 in the stacked structure 200 farthest from the substrate 100 is used to adjust the threshold voltage of the semiconductor device based on a received fixed voltage signal, and the gates 210 of the other stacked structures 200 except the stacked structure 200 farthest from the substrate 100 are used to turn on or off the semiconductor device based on the same received switch control signal.
[0053] For example, the gate 210 in the stacked structure 200 farthest from the substrate 100 is connected to a regulating voltage routing for transmitting a fixed voltage signal, and the gates 210 of the other stacked structures 200 except the stacked structure 200 farthest from the substrate 100 are connected to a gate signal routing for transmitting a switch control signal.
[0054] Based on the above design, please refer to Figure 6. Figure 6 The semiconductor device provided in this embodiment is shown in which one of the gate electrodes 210 is used as a bottom shielding metal (BSM) to receive a fixed voltage signal, so that it can be used as a voltage adjustment layer. By adjusting the control voltage V loaded on the voltage adjustment layer BSM The threshold voltage of the semiconductor device can be changed. Specifically, Figure 6 The horizontal axis is the voltage VGS of the control signal provided by the gate signal line, and the vertical axis is the leakage current IDS of the semiconductor device. Different curves correspond to the control voltage V BSM When the voltage VGS of the control signal changes from 10V to -10V, the leakage current IDS changes with the voltage VGS of the control signal. BSM At different times, the leakage current IDS changes stepwise at the voltage VGS node of different control signals, that is, when the control voltage V BSM Therefore, in the solution provided in this embodiment, by adjusting the control voltage V transmitted by the control voltage routing BSM Routing can flexibly adjust the threshold voltage of semiconductor devices.
[0055] In some possible implementations, the orthographic projections of the gates 210 in each of the stacked structures 200 on the substrate 100 at least partially overlap. Optionally, the orthographic projections of the gates 210 in each of the stacked structures 200 on the substrate 100 all overlap.
[0056] In some possible implementations, the semiconductor device further includes a third insulating layer 400, and the third insulating layer 400 is located on a side of the stacked structure 200 that is farthest from the substrate 100 and away from the substrate 100. The third insulating layer 400 may be an interlayer dielectric (ILD).
[0057] Optionally, the semiconductor device further includes a source 510 and a drain 520 , wherein the source 510 and the drain 520 respectively penetrate from a side of the third insulating layer 400 away from the substrate 100 to the semiconductor layer 230 closest to the substrate 100 , and are respectively in electrical contact with each of the semiconductor layers 230 .
[0058] Optionally, the orthographic projections of the source 510 and the drain 520 on the substrate 100 are located on both sides of the orthographic projections of each gate 210 on the substrate 100 .
[0059] In some possible implementations, the material of the semiconductor layer 230 includes an oxide semiconductor. For example, the material of the semiconductor layer 230 may include indium gallium zinc oxide. The structure provided in this embodiment can effectively improve the driving current of the oxide semiconductor thin film transistor and make its threshold voltage adjustable.
[0060] This embodiment also provides a method for manufacturing a semiconductor device. The semiconductor manufacturing method may include the following steps.
[0061] In step S110 , a substrate 100 is provided.
[0062] In step S120 , at least two stacked structures 200 and a first insulating layer 300 located between two adjacent stacked structures 200 are formed on one side of the substrate 100 .
[0063] Step S130 , forming a third insulating layer 400 , wherein the third insulating layer 400 is located on a side of the stacked structure 200 that is farthest from the substrate 100 and away from the substrate 100 .
[0064] In step S140, the source 510 and the drain 520 are formed from the side of the third insulating layer 400 away from the substrate 100. The source 510 and the drain 520 respectively penetrate from the side of the third insulating layer 400 away from the substrate 100 to the semiconductor layer 230 closest to the substrate 100, and are respectively in electrical contact with each of the semiconductor layers 230.
[0065] This embodiment also provides a display panel, the display panel includes the semiconductor device provided in this application. For example, the display panel may include an array substrate and a light-emitting layer located on the array substrate and driven by the array substrate, the array substrate may include a plurality of the above-mentioned semiconductor devices, for example, the array substrate may be a TFT array substrate, and the semiconductor device may be a TFT switch device.
[0066] This embodiment also provides an electronic device, which includes the display panel provided in this application. The electronic device may include a mobile phone, a tablet computer, a laptop computer, a display, a television, a smart wearable device, or other device with a display function.
[0067] In summary, the embodiments of the present application provide a semiconductor device, a display panel, and an electronic device, which provide at least two stacked structures and enable the gate in at least one of the stacked structures to receive a fixed voltage signal, so that the gate can be used as a voltage control layer to control the threshold voltage of each channel. In this way, the driving capability of the semiconductor device can be improved and the threshold voltage of the semiconductor device can be controlled.
[0068] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0069] The above-mentioned embodiments only express several implementation methods of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.
Claims
1. A semiconductor device, characterized in that: The semiconductor device comprises: substrate; At least two stacked structures are formed on one side of the substrate and a first insulating layer is located between two adjacent stacked structures; Each of the stacked structures comprises a gate, a semiconductor layer and a second insulating layer located between the gate and the semiconductor layer; in each of the stacked structures, the gate, the second insulating layer and the semiconductor layer have the same stacking direction; The gate in at least one of the stacked structures is used to adjust the threshold voltage of the semiconductor device based on a received fixed voltage signal, and the gate in at least one of the stacked structures is used to turn on or off the semiconductor device based on a received switch control signal.
2. The semiconductor device according to claim 1, wherein: The semiconductor device includes three or more stacked structures.
3. The semiconductor device according to claim 1 or 2, characterized in that: In the stacked structure, the gate is located on a side of the second insulating layer close to the substrate, and the semiconductor layer is located on a side of the second insulating layer away from the substrate.
4. The semiconductor device according to claim 3, characterized in that The gate in the stacked structure closest to the substrate is used to adjust the threshold voltage of the semiconductor device based on the received fixed voltage signal; The gates in the other stacked structures except the stacked structure closest to the substrate are used to turn on or off the semiconductor device based on the same received switch control signal.
5. The semiconductor device according to claim 1 or 2, characterized in that: In the stacked structure, the semiconductor layer is located on a side of the second insulating layer close to the substrate, and the gate is located on a side of the second insulating layer away from the substrate.
6. The semiconductor device according to claim 5, characterized in that The gate in the stacked structure farthest from the substrate is used to adjust the threshold voltage of the semiconductor device based on the received fixed voltage signal; The gates of the other stacked structures except the stacked structure farthest from the substrate are used to turn on or off the semiconductor device based on the same received switch control signal.
7. The semiconductor device according to claim 1 or 2, characterized in that: The orthographic projections of the gates in each of the stacked structures on the substrate at least partially overlap; Preferably, the orthographic projections of the gate electrodes in each of the stacked structures on the substrate overlap; Preferably, the semiconductor device further comprises a third insulating layer, wherein the third insulating layer is located on a side of the stacked structure farthest from the substrate and away from the substrate; Preferably, the semiconductor device further comprises a source electrode and a drain electrode, wherein the source electrode and the drain electrode respectively penetrate from a side of the third insulating layer away from the substrate to the semiconductor layer closest to the substrate, and are respectively in electrical contact with each of the semiconductor layers; Preferably, the orthographic projections of the source and the drain on the substrate are located on both sides of the orthographic projections of each gate on the substrate.
8. The semiconductor device according to claim 1, characterized in that: The material of the semiconductor layer includes an oxide semiconductor; Preferably, the material of the semiconductor layer includes indium gallium zinc oxide.
9. A display panel, characterized in that: The display panel comprises the semiconductor device according to any one of claims 1 to 8.
10. An electronic device, characterized in that: The electronic device comprises the display panel according to claim 9.