Deep ultraviolet LED device with buried electrode and preparation method of deep ultraviolet LED device
By adopting buried electrode structure and multi-pore structure DBR in deep ultraviolet LED chips, the problems of current accumulation, leakage current and self-heating are solved, and the luminous efficiency and electrical performance are improved.
Patent Information
- Application Number
- CN202411652085.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-19
- Publication Date
- 2025-02-25
- Estimated Expiration
- 2044-11-19
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Figure CN119521885A_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the technical field of semiconductors, and in particular relates to a deep ultraviolet LED device with buried electrodes and a preparation method thereof. Background Art
[0002] In recent years, deep ultraviolet (UVC) LEDs based on AlGaN materials have the advantages of energy saving, environmental protection, small size and long life compared to mercury lamps. In particular, deep ultraviolet LEDs with a light emission wavelength shorter than 280nm have great application prospects in civil and military fields such as sterilization, air / water purification, photocuring, medical treatment and non-line-of-sight (NLOS) communications due to their characteristics that traditional light sources do not have.
[0003] AlGaN-based deep ultraviolet LEDs with a wavelength shorter than 280nm require AlGaN materials with a high Al content. However, the doping efficiency of AlGaN materials with a high Al content is low, resulting in high resistivity of the AlGaN material and limited lateral transport of carriers. Traditional deep ultraviolet LED chips generally use a flip-chip structure, such as Figure 1 As shown, it includes a substrate 1; an AlN template 2 fixed to one side of the substrate 1; and a step-shaped n-Al x1 Ga 1-x1 N layer 3; fixed on n-Al x1 Ga 1-x1 A quantum well layer 4 on a step surface of the N layer 3 away from the substrate 1; an electron blocking layer 5 fixed to the quantum well layer 4 away from the substrate 1; a p-Al2O3 fixed to the electron blocking layer 5 away from the substrate 1 y1 Ga 1-y1 N layer 6; fixed on p-Al y1 Ga 1-y1 The p-Al layer 6 is far from the substrate 1. y2 Ga 1-y2 N contact layer 7; fixed on n-Al x1 Ga 1-x1 The n-type electrode contact layer 8 is located on the other step surface of the N-layer 3 away from the substrate; the n-type electrode pad layer 9 is fixed to the side of the n-type electrode contact layer 8 away from the substrate 1; and the p-Al y3 Ga 1-y3 The p-type electrode contact layer 10 on the side of the N-contact layer 7 away from the substrate 1; the p-type electrode pad layer 11 fixed to the side of the p-type electrode contact layer 10 away from the substrate 1; and the n-Al x1 Ga 1-x1 N layer 3, quantum well layer 4, electron blocking layer 5, p-Al y1 Ga 1-y1 N layer 6, p-Al y2 Ga1-y2 The passivation layer 12 on the surface of the N-contact layer 7, the p-type electrode contact layer 10 and the n-type electrode contact layer 8 contacting the air. In this type of flip-chip structure, the p-side uses an electrode to cover the light-emitting table, and the lateral expansion problem of p-AlGaN is effectively solved. However, the conductivity of n-AlGaN is much smaller than that of metal, which causes the current to gather near the n-electrode side of the light-emitting table, aggravates the sidewall leakage current, and generates a large amount of localized self-heating, thereby affecting the performance of the deep ultraviolet LED chip.
[0004] In addition, the use of vertically structured deep ultraviolet LEDs can effectively solve the problem of current concentration. However, the substrate stripping technology for AlGaN-based deep ultraviolet LEDs with high Al components is still immature, the development process is complex, the yield is low, and the cost is high. Summary of the invention
[0005] The present invention provides a deep ultraviolet LED device with buried electrodes and a preparation method thereof, which are used to solve the problems of current concentration, serious leakage current and reduced luminous efficiency caused by self-heating of existing deep ultraviolet LEDs.
[0006] The technical solution adopted by the present invention to solve the above-mentioned technical problems is as follows.
[0007] In a first aspect, the present invention provides a deep ultraviolet LED device with buried electrodes, comprising:
[0008] substrate;
[0009] AlN template, fixed on one side of the substrate;
[0010] First n-Al x1 Ga 1-x1 An N layer is fixed on a side of the AlN template away from the substrate;
[0011] The buried metal electrode is fixed to the first n-Al x1 Ga 1-x1 The N layer is away from the side of the substrate;
[0012] Second n-Al x1 Ga 1-x1 N layer, fixed to the side of the buried metal electrode away from the substrate, and a second n-Al x1 Ga 1-x1 One side of the N layer is polycrystalline and has several holes;
[0013] The quantum well layer is fixed to the second n-Al x1 Ga 1-x1 The N layer is away from the side of the substrate;
[0014] An electron blocking layer, fixed on a side of the quantum well layer away from the substrate;
[0015] p-Al y1 Ga 1-y1 An N layer, fixed to a side of the electron blocking layer away from the substrate;
[0016] p-Al y2 Ga 1-y2 N contact layer, fixed to the p-Al y1 Ga 1-y1 The N layer is away from the side of the substrate, the electron blocking layer, the p-Al y1 Ga 1-y1 N layer, p-Al y2 Ga 1-y2 The Al content in the N contact layer decreases;
[0017] The n-type electrode contact layer is fixed to the side of the buried metal electrode away from the substrate and is connected to the second n-Al x1 Ga 1-x1 N-layer interval setting;
[0018] An n-type electrode pad layer is fixed to a side of the n-type electrode contact layer away from the substrate;
[0019] The p-type electrode contact layer is fixed to the p-Al y2 Ga 1-y2 The N-contact layer is away from the side of the substrate;
[0020] A p-type electrode pad layer is fixed to a side of the p-type electrode contact layer away from the substrate;
[0021] The passivation layer is fixed to the buried metal electrode, the second n-Al x1 Ga 1-x1 N layer, quantum well layer, electron blocking layer, p-Al y1 Ga 1-y1 N layer, p-Al y2 Ga 1-y2 The N-contact layer, the n-type electrode contact layer, and the p-type electrode contact layer contact surfaces of the air.
[0022] Preferably, the material of the substrate is a heterogeneous substrate material or a homogeneous substrate material, the heterogeneous substrate material is any one of sapphire, silicon carbide, and silicon, and the homogeneous substrate material is GaN or AlN.
[0023] Preferably, the first n-Al x1 Ga 1-x1 N layer and the second n-Al x1 Ga 1-x1In the N layer, 0.5 < x1 < 1, the first n-Al x1 Ga 1-x1 N layer and the second n-Al x1 Ga 1-x1 The total thickness of the N layer is 100 - 5000 nm. The first n-Al x1 Ga 1-x1 N layer and the second n-Al x1 Ga 1-x1 The doping concentration of the N layer ≥ 5×10 17 cm -3 .
[0024] Preferably, the material of the buried metal electrode is at least one of Ti, V, and TiN, and the thickness of the buried metal electrode is 50 - 500 nm.
[0025] Preferably, the quantum well layer is a multi-quantum well, containing 3 - 5 periods of Al m Ga 1-m N well layers and Al n Ga 1-n N barrier layers, wherein the thickness of the Al m Ga 1-m N well layer is 2 - 5 nm, and the thickness of the Al n Ga 1-n N barrier layer is 4 - 10 nm, and both n and m are between 0 and 1 and n > m.
[0026] Preferably, the material of the electron blocking layer is p-Al y3 Ga 1-y3 N, 0.8 ≤ y3 ≤ 1. The thickness of the electron blocking layer is 5 - 30 nm, and the doping concentration of the electron blocking layer ≥ 1×10 17 cm -3 .
[0027] Preferably, in the p-Al y1 Ga 1-y1 N layer, y1 < y3. The thickness of the p-Al y1 Ga 1-y1 N layer is 10 - 100 nm, and the doping concentration of the p-Al y1 Ga 1-y1 N layer ≥ 1×10 17 cm -3 .
[0028] Preferably, in the p-Al y2 Ga 1-y2 N contact layer, y2 < y1. The p-Al y2 Ga 1-y2The thickness of the N contact layer is 10 to 30 nm. y2 Ga 1-y2 The doping concentration of N contact layer is ≥1×10 17 cm -3 ;
[0029] More preferably, y2 is 0.
[0030] Preferably, the material of the n-type electrode contact layer includes at least one of Pt, Ti, Al, Ni, Au, and V, and the thickness of the n-type electrode contact layer is 20 to 200 nm.
[0031] Preferably, the material of the p-type electrode contact layer includes at least one of Ni, Al, Au, ITO, Ti, Pt, Pd, Mg, and Rh, and the thickness of the p-type electrode contact layer is 20 to 200 nm.
[0032] Preferably, the materials of the n-type electrode pad layer and the p-type electrode pad layer independently include at least one of Ti, Al, Ni, Au, Pt, Pd, and V, and the thicknesses of the n-type electrode pad layer and the p-type electrode pad layer independently range from 500 to 2000 nm.
[0033] Preferably, the passivation layer is a non-conductive material; more preferably, the non-conductive material includes at least one of SiO2, AlN, AlScN, and AlGaN.
[0034] In a second aspect, the present invention further provides a method for preparing the buried electrode deep ultraviolet LED, comprising the following steps:
[0035] Step 1: providing a substrate;
[0036] Step 2: growing an AlN template on the substrate;
[0037] Step 3: Growing the first n-Al on the AlN template x1 Ga 1-x1 N layers;
[0038] Step 4: In the first n-Al x1 Ga 1-x1 A pattern is etched on the N layer;
[0039] Step 5: On the n-Al with pattern x1 Ga 1-x1 A pattern electrode is prepared on the N layer to form a buried metal electrode;
[0040] Step 6: On the first n-Al with buried metal electrode x1 Ga 1-x1The second n-Al layer is epitaxially grown on the N layer. x1 Ga 1-x1 N layers;
[0041] Step 7: The second n-Al x1 Ga 1-x1 The N layer is solution treated and the second n-Al x1 Ga 1-x1 A number of holes are formed on one side of the N layer;
[0042] Step 8: On the second n-Al x1 Ga 1-x1 The quantum well layer, electron blocking layer, p-Al y1 Ga 1-y1 N layer and p-Al y2 Ga 1-y2 N contact layer;
[0043] Step 9: growing the quantum well layer, the electron blocking layer, and the p-Al y1 Ga 1-y1 N layer and p-Al y2 Ga 1-y2 The epitaxial wafer of the N contact layer is etched until the metal electrode is buried to form a mesa;
[0044] Step 10: preparing an n-type electrode contact layer on the side of the mesa buried metal electrode formed by etching away from the substrate;
[0045] Step 11: Etching the mesa p-Al y2 Ga 1-y2 A p-type electrode contact layer is prepared on the side of the N contact layer away from the substrate;
[0046] Step 12: preparing an n-type electrode pad layer and a p-type electrode pad layer respectively on the side of the n-type electrode contact layer and the p-type electrode contact layer away from the substrate;
[0047] Step 13: On the buried metal electrode, the second n-Al x1 Ga 1-x1 N layer, quantum well layer, electron blocking layer, p-Al y1 Ga 1-y1 N layer, p-Al y2 Ga 1-y2 A passivation layer is prepared on the surfaces of the N-contact layer, the n-type electrode contact layer and the p-type electrode contact layer contacting the air.
[0048] The principle of the present invention is: based on the existing deep ultraviolet LED with flip-chip structure, the present invention x1 Ga 1-x1 N layer and the second n-Alx1 Ga 1-x1 A buried metal electrode is set between the N layers, presenting a x1 Ga 1-x1 N buried metal electrode structure. The current can be x1 Ga 1-x1 N layer and the second n-Al x1 Ga 1-x1 In the N layer, along the buried metal electrode, the fast transmission improves the electrical performance of the device. At the same time, due to the disorder of the metal crystal orientation and the high migration barrier of Al atoms, the second n-Al2O3 that continues to grow on the buried metal electrode x1 Ga 1-x1 The N layer is polycrystalline and can form a multi-pore structure DBR after corrosion to increase light extraction.
[0049] Compared with the prior art, the present invention has the following beneficial effects:
[0050] The buried electrode deep ultraviolet LED device of the present invention has a buried metal electrode buried into a first n-Al x1 Ga 1-x1 N layer and the second n-Al x1 Ga 1-x1 In the N layer, it is in direct contact with the n-type electrode contact layer on one side. Compared with AlGaN materials, metal has the advantages of good electrical conductivity and thermal conductivity, and is used as a high-speed current transmission channel between the n-type electrode contact layer and the table, thereby increasing the uniformity of current distribution, alleviating the problem of self-heating and aggregation, and thus improving light efficiency.
[0051] At the same time, due to the disordered crystal orientation of the metal and the high migration barrier of Al atoms, the second n-Al atoms that continue to grow on the metal x1 Ga 1-x1 The N layer is polycrystalline. To address this problem, the polycrystalline is treated with a solution to form a multi-porous structure, which can be used as a DBR reflector to increase light extraction and further improve light efficiency. BRIEF DESCRIPTION OF THE DRAWINGS
[0052] In order to more clearly illustrate the technical solutions of the implementation methods of the present application, the drawings required for use in the implementation methods of the present application or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some implementation methods of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0053] Figure 1 It is a schematic diagram of a flip-chip structure deep ultraviolet LED in the prior art;
[0054] Figure 2 Schematic diagram of a deep ultraviolet LED with buried electrodes according to the present invention;
[0055] Figure 3 The process flow chart of the method for preparing the buried electrode deep ultraviolet LED of the present invention;
[0056] Figure 4 The buried metal electrode and n-Al of the deep ultraviolet LED of the buried electrode of the present invention x1 Ga 1-x1 N-layer schematic diagram;
[0057] In the figure, 1, substrate, 2, AlN template, 3, first n-Al x1 Ga 1-x1 N layer, 4, quantum well layer, 5, electron blocking layer, 6, p-Al y1 Ga 1-y1 N layer, 7, p-Al y2 Ga 1-y2 N contact layer, 8, n-type electrode contact layer, 9, n-type electrode pad layer, 10, p-type electrode contact layer, 11, p-type electrode pad layer, 12, passivation layer, 13, current, 14, buried metal electrode, 15, second n-Al x1 Ga 1-x1 N layers. DETAILED DESCRIPTION
[0058] The embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present application, and should not be construed as limiting the present application.
[0059] In the description of the present application, it should be understood that the terms "upper", "lower", "horizontal", "inside", "outside", etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.
[0060] like Figure 2 and Figure 4 As shown, the buried electrode deep ultraviolet LED device of the present invention comprises:
[0061] Substrate 1;
[0062] An AlN template 2 is fixed to one side of the substrate 1;
[0063] First n-Alx1 Ga 1-x1 N layer 3, fixed on a side of the AlN template 2 away from the substrate 1;
[0064] The buried metal electrode 14 is fixed to the first n-Al x1 Ga 1-x1 The N layer 3 is away from the side of the substrate 1;
[0065] Second n-Al x1 Ga 1-x1 The N layer 15 is fixed to the side of the buried metal electrode 14 away from the substrate 1 and is in contact with the buried metal electrode 14. x1 Ga 1-x1 One side of the N layer 15 is polycrystalline and has a number of holes;
[0066] The quantum well layer 4 is fixed to the n-Al x1 Ga 1-x1 The N layer 3 is away from the side of the substrate 1;
[0067] An electron blocking layer 5 is fixed on a side of the quantum well layer 4 away from the substrate 1;
[0068] p-Al y1 Ga 1-y1 An N layer 6, fixed to a side of the electron blocking layer 5 away from the substrate 1;
[0069] p-Al y2 Ga 1-y2 N contact layer 7 is fixed to the p-Al y1 Ga 1-y1 The N layer 6 is away from the side of the substrate 1, and the electron blocking layer 5, p-Al y1 Ga 1-y1 N layer 6, p-Al y2 Ga 1-y2 The Al composition in the N contact layer 7 decreases gradually;
[0070] The n-type electrode contact layer 8 is fixed to the side of the buried metal electrode 14 away from the substrate 1 and is connected to the second n-Al x1 Ga 1-x1 The N layer 15 is arranged in a spaced manner (i.e., the n-type electrode contact layer 8 and the second n-Al x1 Ga 1-x1 N layer 15 is not in contact);
[0071] An n-type electrode pad layer 9 is fixed to a side of the n-type electrode contact layer 8 away from the substrate 1;
[0072] The p-type electrode contact layer 10 is fixed to the p-Al y2Ga 1-y2 The side of the GaN contact layer 7 away from the substrate 1;
[0073] The p-type electrode pad layer 11 is fixed on the side of the p-type electrode contact layer 10 away from the substrate 1;
[0074] The passivation layer 12 is fixed on the surfaces of the buried metal electrode 14, the second n-Al x1 Ga 1-x1 N layer 15, the quantum well layer 4, the electron blocking layer 5, the p-Al y1 Ga 1-y1 N layer 6, the p-Al y2 Ga 1-y2 N contact layer 7, the n-type electrode contact layer 8 and the p-type electrode contact layer 10 contacting the air.
[0075] In the above technical solution, the material of the substrate 1 is a hetero-substrate material or a homo-substrate material. The hetero-substrate material is any one of sapphire, silicon carbide, and silicon, and the homo-substrate material is GaN or AlN.
[0076] In the above technical solution, in the first n-Al x1 Ga 1-x1 N layer 3 and the second n-Al x1 Ga 1-x1 N layer 15, 0.5 < x1 < 1. The total thickness of the first n-Al x1 Ga 1-x1 N layer 3 and the second n-Al x1 Ga 1-x1 N layer 15 is 100 - 5000 nm, and the doping concentration of the first n-Al x1 Ga 1-x1 N layer 3 and the second n-Al x1 Ga 1-x1 N layer 15 ≥ 5 × 10 17 cm -3 .
[0077] In the above technical solution, the material of the buried metal electrode 14 is at least one of Ti, V, and TiN, and the thickness of the buried metal electrode 14 is 50 - 500 nm.
[0078] In the above technical solution, the quantum well layer 4 is a multi-quantum well, containing 3 - 5 periods of Al m Ga 1-m N well layer and Al n Ga 1-n N barrier layer. Among them, the thickness of the Al m Ga 1-m N well layer is 2 - 5 nm, and the Al n Ga1-n The thickness of the N layer is 4 - 10 nm, and n > m.
[0079] In the above technical solution, the material of the electron blocking layer 5 is p-Al y3 Ga 1-y3 N, 0.8 ≤ y3 ≤ 1. The thickness of the electron blocking layer 5 is 5 - 30 nm, and the doping concentration of the electron blocking layer 5 ≥ 1×10 17 cm -3 .
[0080] In the above technical solution, in the p-Al y1 Ga 1-y1 N layer 6, y1 < y3. The thickness of the p-Al y1 Ga 1-y1 N layer 6 is 10 - 100 nm. The doping concentration of the p-Al y1 Ga 1-y1 N layer 6 ≥ 1×10 17 cm -3 .
[0081] In the above technical solution, in the p-Al y2 Ga 1-y2 N contact layer 7, y2 < y1. The thickness of the p-Al y2 Ga 1-y2 N contact layer 7 is 10 - 30 nm. The doping concentration of the p-Al y2 Ga 1-y2 N contact layer 7 ≥ 1×10 17 cm -3 ; preferably, y2 is 0.
[0082] In the above technical solution, the material of the n-type electrode contact layer 8 includes at least one of Pt, Ti, Al, Ni, Au, V, and the thickness of the n-type electrode contact layer 8 is 20 - 200 nm.
[0083] In the above technical solution, the material of the p-type electrode contact layer 10 includes at least one of Ni, Al, Au, ITO, Ti, Pt, Pd, Mg, Rh, and the thickness of the p-type electrode contact layer 10 is 20 - 200 nm.
[0084] In the above technical solution, the materials of the n-type electrode pad layer 9 and the p-type electrode pad layer 11 each independently include at least one of Ti, Al, Ni, Au, Pt, Pd, V, and the thicknesses of the n-type electrode pad layer 9 and the p-type electrode pad layer 11 are each independently 500 - 2000 nm.
[0085] In the above technical solution, the passivation layer 12 is a non-conductive material; preferably, the non-conductive material includes at least one of SiO2, AlN, AlScN, and AlGaN.
[0086] like Figure 3 As shown, the method for preparing a deep ultraviolet LED with buried electrodes of the present invention comprises the following steps:
[0087] Step 1: providing a substrate 1;
[0088] Step 2: growing an AlN template 2 on the substrate 1;
[0089] Step 3: Growing n-Al on the AlN template 2 x1 Ga 1-x1 N layer 3;
[0090] Step 4: In the first n-Al x1 Ga 1-x1 A pattern is etched on the N layer 3;
[0091] Step 5: On the first n-Al x1 Ga 1-x1 A pattern electrode is prepared on the N layer 3 to form a buried metal electrode 14;
[0092] Step 6: In the first n-Al having the buried metal electrode 14 x1 Ga 1-x1 The second n-Al layer is epitaxially grown on the N layer 3. x1 Ga 1-x1 N layer 15;
[0093] Step 7: The second n-Al x1 Ga 1-x1 The N layer 15 is solution treated, and the second n-Al layer in contact with the buried metal electrode 14 x1 Ga 1-x1 A plurality of holes are formed on one side of the N layer 15;
[0094] Step 8: On the second n-Al x1 Ga 1-x1 The N layer 15 is further epitaxially grown with the quantum well layer 4, the electron blocking layer 5, and the p-Al y1 Ga 1- y1 N layer 6 and p-Al y2 Ga 1-y2 N contact layer 7;
[0095] Step 9: growing the quantum well layer 4, the electron blocking layer 5, and the p-Al y1 Ga 1-y1 N layer 6 and p-Aly2 Ga 1-y2 The epitaxial wafer of the N-contact layer 7 is etched until the buried metal electrode 14 is formed;
[0096] Step 10: preparing an n-type electrode contact layer 8 on the side of the mesa buried metal electrode 14 formed by etching away from the substrate;
[0097] Step 11: Etching the mesa p-Al y2 Ga 1-y2 A p-type electrode contact layer 10 is prepared on the side of the N contact layer 7 away from the substrate;
[0098] Step 12: preparing an n-type electrode pad layer 9 and a p-type electrode pad layer 11 respectively on the side of the n-type electrode contact layer 8 and the p-type electrode contact layer 10 away from the substrate;
[0099] Step 13: In the buried metal electrode 14, the second n-Al x1 Ga 1-x1 N layer 15, quantum well layer 4, electron blocking layer 5, p-Al y1 Ga 1-y1 N layer 6, p-Al y2 Ga 1-y2 A passivation layer 12 is formed on the surfaces of the N-contact layer 7 , the n-type electrode contact layer 8 , and the p-type electrode contact layer 10 that are in contact with air.
[0100] Based on the existing deep ultraviolet LED with flip-chip structure, the present invention x1 Ga 1-x1 N layer 3 and the second n-Al x1 Ga 1-x1 A buried metal electrode is provided between the N layers 15, presenting a n-Al x1 Ga 1-x1 The structure of buried metal electrode in N. Current 13 can be x1 Ga 1-x1 N layer 3 and the second n-Al x1 Ga 1-x1 In the N layer 15, along the buried metal electrode 14, the fast transmission improves the electrical performance of the device. At the same time, due to the disorder of the metal crystal orientation and the high migration barrier of Al atoms, the second n-Al2O3 that continues to grow on the buried metal electrode 14 x1 Ga 1-x1 The N layer 15 is polycrystalline and can form a multi-hole structure DBR after corrosion to increase light extraction.
[0101] The above is only an exemplary implementation of the present application, and only describes the structural examples of the present application in detail. These descriptions are only for explaining the principles of the present application and cannot be interpreted as limiting the scope of protection of the present application in any way. Based on the explanation here, any modifications, equivalent substitutions and improvements made within the spirit and principles of the present application, and other specific implementations of the present application that can be associated with the present application by technicians in this field without creative work, should be included in the scope of protection of the present application.
Claims
1. A buried electrode deep ultraviolet LED device, characterized in that: include: Substrate (1); An AlN template (2) is fixed on one side of the substrate (1); First n-Al x1 Ga 1-x1 An N layer (3) fixed on a side of the AlN template (2) away from the substrate (1); A buried metal electrode (14) is fixed to the first n-Al x1 Ga 1-x1 The N layer (3) is away from the side of the substrate (1); Second n-Al x1 Ga 1-x1 The N layer (15) is fixed to the side of the buried metal electrode (14) away from the substrate (1) and is in contact with the buried metal electrode (14). x1 Ga 1-x1 One side of the N layer (15) is polycrystalline and has a plurality of holes; The quantum well layer (4) is fixed to the second n-Al x1 Ga 1-x1 The N layer (15) is away from the side of the substrate (1); An electron blocking layer (5) fixed to a side of the quantum well layer (4) away from the substrate (1); p-Al y1 Ga 1-y1 An N layer (6) fixed to a side of the electron blocking layer (5) away from the substrate (1); p-Al y2 Ga 1-y2 N contact layer (7), fixed to the p-Al y1 Ga 1-y1 The N layer (6) is away from the side of the substrate (1), and the electron blocking layer (5), p-Al y1 Ga 1-y1 N layer (6), p-Al y2 Ga 1-y2 The Al content in the N contact layer (7) decreases gradually; The n-type electrode contact layer (8) is fixed to the side of the buried metal electrode (14) away from the substrate (1) and is connected to the second n-Al x1 Ga 1-x1 N layers (15) are arranged at intervals; An n-type electrode pad layer (9) fixed to a side of the n-type electrode contact layer (8) away from the substrate (1); The p-type electrode contact layer (10) is fixed to the p-Al y2 Ga 1-y2 The N contact layer (7) is away from the side of the substrate (1); A p-type electrode pad layer (11) fixed to a side of the p-type electrode contact layer (10) away from the substrate (1); The passivation layer (12) is fixed to the buried metal electrode (14), the second n-Al x1 Ga 1-x1 N layer (15), quantum well layer (4), electron blocking layer (5), p-Al y1 Ga 1-y1 N layer (6), p-Al y2 Ga 1-y2 The N-contact layer (7), the n-type electrode contact layer (8) and the p-type electrode contact layer (10) are in contact with the surface of the air.
2. The buried electrode deep ultraviolet LED device according to claim 1, characterized in that: The material of the substrate (1) is a heterogeneous substrate material or a homogeneous substrate material, the heterogeneous substrate material is any one of sapphire, silicon carbide and silicon, and the homogeneous substrate material is GaN or AlN.
3. The buried electrode deep ultraviolet LED device according to claim 1, characterized in that: The first n-Al x1 Ga 1-x1 N layer (3) and the second n-Al x1 Ga 1-x1 In the N layer (15), 0.5 < x1 < 1, the first n-Al x1 Ga 1-x1 N layer (3) and the second n-Al x1 Ga 1-x1 The total thickness of the N layer (15) is 100 - 5000 nm, the first n-Al x1 Ga 1-x1 N layer (3) and the second n-Al x1 Ga 1- x1 The doping concentration of the N layer (15) ≥ 5×10 17 cm -3 .
4. The buried electrode deep ultraviolet LED device according to claim 1, characterized in that: The material of the buried metal electrode (14) is at least one of Ti, V and TiN, and the thickness of the buried metal electrode (14) is 50-500 nm.
5. The buried electrode deep ultraviolet LED device according to claim 1, characterized in that: The quantum well layer (4) is a multi-quantum well containing 3 to 5 periods of Al m Ga 1-m N well layer and Al n Ga 1-n N barrier layer, wherein the Al m Ga 1-m The thickness of the N well layer is 2 to 5 nm. n Ga 1-n The thickness of the N barrier layer is 4 to 10 nm, n>m.
6. The buried electrode deep ultraviolet LED device according to claim 1, characterized in that: The material of the electron blocking layer (5) is p-Al y3 Ga 1-y3 N, 0.8≤y3≤1, the thickness of the electron blocking layer (5) is 5 to 30 nm, and the doping concentration of the electron blocking layer (5) is ≥1×10 17 cm -3 ; The p-Al y1 Ga 1-y1 N, in layer (6), y1 < y3, the p-Al y1 Ga 1-y1 N layer (6) has a thickness of 10 - 100 nm, the p-Al y1 Ga 1-y1 N layer (6) has a doping concentration ≥ 1×10 17 cm -3 ; The p-Al y2 Ga 1-y2 In the N contact layer (7), y2 < y1, the p-Al y2 Ga 1-y2 The thickness of the N contact layer (7) is 10 - 30 nm, the p-Al y2 Ga 1-y2 The doping concentration of the N contact layer (7) ≥ 1×10 17 cm -3 .
7. The buried electrode deep ultraviolet LED device according to claim 1, characterized in that: The material of the n-type electrode contact layer (8) includes at least one of Pt, Ti, Al, Ni, Au, and V, and the thickness of the n-type electrode contact layer (8) is 20 to 200 nm; And / or, the material of the p-type electrode contact layer (10) includes at least one of Ni, Al, Au, ITO, Ti, Pt, Pd, Mg, and Rh, and the thickness of the p-type electrode contact layer (10) is 20 to 200 nm.
8. The buried electrode deep ultraviolet LED device according to claim 1, characterized in that: The materials of the n-type electrode pad layer (9) and the p-type electrode pad layer (11) independently include at least one of Ti, Al, Ni, Au, Pt, Pd, and V, and the thicknesses of the n-type electrode pad layer (9) and the p-type electrode pad layer (11) independently range from 500 to 2000 nm.
9. The buried electrode deep ultraviolet LED device according to claim 1, characterized in that: The passivation layer (12) is a non-conductive material, and the non-conductive material includes at least one of SiO2, AlN, AlScN, and AlGaN.
10. The method for preparing a deep ultraviolet LED with buried electrodes according to any one of claims 1 to 9, characterized in that: The following steps are involved: Step 1: providing a substrate (1); Step 2: growing an AlN template (2) on the substrate (1); Step 3: Growing a first n-Al on the AlN template (2) x1 Ga 1-x1 N layers (3); Step 4: In the first n-Al x1 Ga 1-x1 Etching a pattern on the N layer (3); Step 5: On the first n-Al x1 Ga 1-x1 A pattern electrode is prepared on the N layer (3) to form a buried metal electrode (14); Step 6: In the first n-Al having a buried metal electrode (14) x1 Ga 1-x1 The second n-Al layer is epitaxially grown on the N layer (3). x1 Ga 1-x1 N layer (15); Step 7: The second n-Al x1 Ga 1-x1 The N layer (15) is solution treated, and the second n-Al layer in contact with the buried metal electrode (14) x1 Ga 1-x1 A plurality of holes are formed on one side of the N layer (15); Step 8: On the second n-Al x1 Ga 1-x1 The quantum well layer (4), the electron blocking layer (5), and the p-Al layer (15) are further epitaxially grown on the N layer (15). y1 Ga 1-y1 N layer (6) and p-Al y2 Ga 1-y2 N contact layer (7); Step 9: growing the quantum well layer (4), the electron blocking layer (5), and the p-Al y1 Ga 1-y1 N layer (6) and p-Al y2 Ga 1-y2 The epitaxial wafer of the N contact layer (7) is etched until the buried metal electrode (14) is buried to form a mesa; Step 10: preparing an n-type electrode contact layer (8) on the side of the mesa buried metal electrode (14) formed by etching away from the substrate; Step 11: Etching the mesa p-Al y2 Ga 1-y2 A p-type electrode contact layer (10) is prepared on the side of the N contact layer (7) away from the substrate; Step 12: preparing an n-type electrode pad layer (9) and a p-type electrode pad layer (11) respectively on the side of the n-type electrode contact layer (8) and the p-type electrode contact layer (10) away from the substrate; Step 13: In the buried metal electrode (14), the second n-Al x1 Ga 1-x1 N layer (15), quantum well layer (4), electron blocking layer (5), p-Al y1 Ga 1-y1 N layer (6), p-Al y2 Ga 1-y2 A passivation layer (12) is prepared on the surfaces of the N-type contact layer (7), the n-type electrode contact layer (8) and the p-type electrode contact layer (10) that are in contact with air.
Citation Information
Patent Citations
Buried high-brightness light emitting diode structure
CN102208506A
Deep ultraviolet light emitting diode and preparation method thereof
CN112885933A
Structure and method for index-guided buried heterostructure AlGalnN laser diodes
US20020094003A1