Micro LED chip and preparation method thereof, display device and display system

Abstract

The invention discloses a Micro LED chip and a preparation method thereof, a display device and a display system. The Micro LED chip comprises: a substrate; the light-emitting units are located on one side of the substrate, each light-emitting unit comprises an active layer, and each light-emitting unit is provided with a top surface and a side surface; the insulating protection layer covers the top surface and the side surface of the light-emitting unit; the filling layer covers the partial surface, far away from the substrate, of the insulating protection layer, the maximum distance between the filling layer and the first surface of the substrate is recorded as h1, the distance between the surface, far away from the substrate, of the active layer and the first surface is recorded as h2, the maximum distance between the insulating protection layer and the first surface of the substrate is recorded as h3, and h1 is larger than h2 and smaller than or equal to h3. The height of the highest point of the filling layer is larger than that of the active layer, the active layer can be well protected, then the reflecting layer formed on the surface, far away from the substrate, of the filling layer can reflect light rays emitted by the active layer, more light rays are emitted from the light-emitting face of the light-emitting unit, and therefore the light-emitting efficiency of the chip is improved.

Description

Technical Field

[0001] The present application relates to the field of display, and specifically, to a Micro LED chip and a preparation method thereof, a display device and a display system. Background Art

[0002] At present, the display solutions for AR products on the market mainly include L-CoS (Liquid Crystal on Silicon), DLP (Digital Light Processing), Micro OLED (Micro Organic Light Emitting Diode) and Micro LED (Micro Light Emitting Diode). Compared with other display technologies, Micro LED has excellent brightness, high luminous efficiency, low energy consumption, high response speed, high contrast, ultra-high resolution and color saturation, etc., and is considered to be an ideal display technology. Micro LED has most of the advantages of LED, and also has the characteristics of small size, easy disassembly and high flexibility, which can cover most display application scenarios.

[0003] Although the theoretical parameters of Micro LED are very good, it still has a long way to go before it can be truly industrialized. As the design size of LED chips decreases, the EQE (external quantum efficiency) value of LEDs will decrease significantly, and this phenomenon is particularly evident in red light chips. Therefore, the current light output efficiency of Micro LEDs still needs to be improved. In addition, the related technology uses traditional photolithography methods to etch the filling layer, and the photoresist layer needs to be aligned with the step position of the light-emitting unit, which is prone to alignment deviations. As a result, the filling layer will have residues at the step position after etching, and at least one more etching is required to remove the remaining parts, and the process is relatively complicated.

[0004] Therefore, the current Micro LED chips and their preparation methods, display devices and display systems still need to be improved. Summary of the invention

[0005] This application is based on the inventor's discovery and understanding of the following facts and problems:

[0006] Forming a metal reflective layer on the side wall of the Micro LED can reduce the light lost from the side wall. By reflecting the light to the light-emitting surface through the reflective layer structure, the LEE (light extraction efficiency) of the Micro LED device can be improved. However, this process has obvious defects: on the one hand, the formation of a metal reflective layer structure on the side wall of the LED places strict requirements on the passivation insulating protective layer on the side wall of the LED device. Damage and holes in the passivation insulating protective layer on the side wall may cause leakage failure of the device. Therefore, it is necessary to form a dense and hole-free passivation insulating protective layer. On the other hand, the shape and size of the reflective layer formed on the side wall of the LED are fixed, and there is almost no adjustable space. It is impossible to adapt the shape and size of the reflective layer structure according to demand, and the effect of improving the light extraction efficiency is limited. Therefore, it is urgent to propose a Micro LED chip that can significantly improve the light extraction efficiency of Micro LED and a Micro LED chip preparation method that can adapt the shape and size of the reflective layer structure according to demand.

[0007] The present application aims to alleviate or solve at least one of the above-mentioned problems to at least a certain extent. In one aspect of the present application, the present application proposes a Micro LED chip. In some embodiments of the present application, the Micro LED chip includes: a substrate; a plurality of light-emitting units, the light-emitting units are located on one side of the substrate, the light-emitting units include an active layer, and the light-emitting units have a top surface and a side surface; an insulating protective layer, the insulating protective layer covers the top surface and the side surface of the light-emitting unit; a filling layer, the filling layer covers the part of the surface of the insulating protective layer away from the substrate, the maximum distance between the filling layer and the first surface of the substrate is recorded as h1, the distance between the surface of the active layer away from the substrate and the first surface of the substrate is recorded as h2, and the maximum distance between the insulating protective layer and the first surface of the substrate is recorded as h3, h2

[0008] In some embodiments of the present application, the thickness of the filling layer on the insulating protection layer on the same light-emitting unit at the same horizontal height is consistent.

[0009] In some embodiments of the present application, the light emitting unit further includes a first semiconductor portion and a second semiconductor portion, the first semiconductor portion, the active layer and the second semiconductor portion are stacked in sequence, and the first semiconductor portion is located between the active layer and the substrate.

[0010] ​In some embodiments of the present application, the filling layer includes a side wall, the side wall has a second surface and a third surface, the second surface is arranged in contact with the side surface of the insulating protection layer, the angle between the second surface and the first surface of the substrate is α, the angle between the third surface and the first surface is β, α and β are both obtuse angles, and α<β.

[0011] In some embodiments of the present application, the Micro LED chip satisfies at least one of the following conditions: the Micro LED chip also includes a reflective layer, which covers the surface of the filling layer away from the substrate; the Micro LED chip also includes a first doped semiconductor layer, and the plurality of light-emitting units are located on the surface of the first doped semiconductor layer away from the substrate; the filling layer also includes a bottom, the bottom and the side wall are an integral structure, the fourth surface of the bottom is parallel to the first surface of the substrate, and the fourth surface is the surface of the bottom away from the substrate.

[0012] In some embodiments of the present application, the Micro LED chip satisfies at least one of the following conditions: the material of the filling layer includes at least one of silicon oxide, silicon nitride, polyimide and photoresist; the material of the substrate is silicon, gallium arsenide, sapphire or glass; the material of the insulating protective layer is aluminum oxide; the material of the reflective layer is metal, or the reflective layer is a distributed Bragg reflection structure.

[0013] In another aspect of the present application, the present application proposes a method for preparing a Micro LED chip. In some embodiments of the present application, the method for preparing a Micro LED chip includes: providing a substrate; forming a plurality of light-emitting units on one side of the substrate, the light-emitting units including an active layer, and the light-emitting units having a top surface and a side surface; forming an insulating protective layer on a side of the light-emitting unit away from the substrate, the insulating protective layer covering the top surface and the side surface of the light-emitting unit; forming an original filling layer, the original filling layer covering the surface of the insulating protective layer away from the substrate; etching the original filling layer using a non-photolithography process to obtain a filling layer, the filling layer covering a portion of the surface of the insulating protective layer away from the substrate, the maximum distance between the filling layer and the first surface of the substrate is recorded as h1, the distance between the surface of the active layer away from the substrate and the first surface of the substrate is recorded as h2, the maximum distance between the insulating protective layer and the first surface of the substrate is recorded as h3, h2

[0014] In some embodiments of the present application, the method for preparing a Micro LED chip further includes: forming a reflective layer on a side of the filling layer away from the substrate, wherein the reflective layer covers a surface of the filling layer away from the substrate, thereby further improving the light extraction efficiency of the chip.

[0015] In some embodiments of the present application, forming a plurality of the light-emitting units includes: sequentially forming an original first doped semiconductor layer, an original active layer, and an original second doped semiconductor layer on one side of the substrate; etching the original first doped semiconductor layer, the original active layer, and the original second doped semiconductor layer to form a first doped semiconductor layer and a plurality of the light-emitting units, wherein the light-emitting units are located on a side of the first doped semiconductor layer away from the substrate, and the light-emitting units include a first semiconductor portion, the active layer, and a second semiconductor portion, wherein the first semiconductor portion and the first doped semiconductor layer are an integrated structure. Thus, the light-emitting units formed by the above steps have good light-emitting performance, and are simple to operate and easy to implement, which is conducive to further improving the yield of the chip.

[0016] ​In some embodiments of the present application, the insulating protection layer also covers a portion of the surface of the first doped semiconductor layer away from the substrate, the original filling layer has a top and an original side wall, the thickness of the top is the same as the thickness of the original side wall, the original filling layer is etched, a portion of the original filling layer is removed, and a filling layer is obtained, the filling layer includes a side wall, the side wall has a second surface and a third surface, the second surface is arranged in contact with the side surface of the insulating protection layer, the angle between the second surface and the first surface of the substrate is α, the angle between the third surface and the first surface is β, α and β are both obtuse angles, and α<β. As a result, there is a certain angle between the two surfaces of the side wall of the filling layer, which is conducive to the preparation of the subsequent reflective layer, and the reflective layer can reflect the light emitted by the corresponding light-emitting unit, so that more light is emitted from the light-emitting side, thereby improving the light-emitting efficiency of the chip.

[0017] In some embodiments of the present application, the non-photolithography process includes at least one of the RIE method and the ICP etching. When the non-photolithography process is used to etch the original filling layer, there is no need to align the photoresist layer with the step position of the light-emitting unit. The non-photolithography process is relatively simple to operate, and the original filling layer can be etched according to actual needs to obtain a filling layer that meets the use requirements.

[0018] In another aspect of the present application, the present application proposes a display device. In some embodiments of the present application, the display device includes the Micro LED chip described above, or a Micro LED chip prepared by the method described above. Therefore, the display device has all the features and advantages of the Micro LED chip described above, which will not be repeated here.

[0019] In another aspect of the present application, the present application provides a display system. In some embodiments of the present application, the display system includes the display device described above. Therefore, the display system has all the features and advantages of the display device described above, which will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0021] Figure 1 A schematic diagram of the structure of a Micro LED chip according to an embodiment of the present application is shown;

[0022] Figure 2 shows a schematic structural diagram of a Micro LED chip according to another embodiment of the present application;

[0023] Figure 3 A schematic diagram showing the structure of a Micro LED chip according to another embodiment of the present application is shown;

[0024] Figure 4 A schematic diagram showing the structure of a Micro LED chip according to another embodiment of the present application is shown;

[0025] Figure 5 A schematic diagram showing the structure of a Micro LED chip according to another embodiment of the present application is shown;

[0026] Figure 6 A flow chart of a method for preparing a Micro LED chip according to an embodiment of the present application is shown;

[0027] Figure 7 A flow chart of a method for preparing a Micro LED chip according to another embodiment of the present application is shown;

[0028] Figure 8 A partial flow chart of a method for preparing a Micro LED chip according to an embodiment of the present application is shown;

[0029] Fig. 9 A partial flow chart of a method for preparing a Micro LED chip according to an embodiment of the present application is shown;

[0030] Fig.10 The curve showing the variation of the remaining thickness of the original filling layer with etching time;

[0031] Fig.11 A flow chart of some methods for preparing Micro LED chips in related technologies is shown.

[0032] Description of reference numerals:

[0033] 100: substrate; 110: first surface; 200: first doped semiconductor layer; 200': original first doped semiconductor layer; 300: light emitting unit; 310: first semiconductor portion; 320: active layer; 320': original active layer; 330: second semiconductor portion; 330': original second doped semiconductor layer; 301: top surface; 302: side surface; 400: insulating protection layer; 410: side surface; 420: bottom surface; 500: filling layer; 510: side wall; 511: second surface; 512: third surface; 520: bottom; 521: fourth surface; 522: fifth surface; 500': original filling layer; 530': top; 510': original side wall; 520': original bottom; 500": photolithography filling layer; 600: reflection layer; 700: photoresist layer. DETAILED DESCRIPTION

[0034] The embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application, and cannot be understood as limiting the present application.

[0035] In one aspect of the present application, the present application proposes a Micro LED chip. In some embodiments of the present application, reference Figures 1 to 5 , the Micro LED chip can include a substrate 100 , a plurality of light-emitting units 300 , an insulating protection layer 400 and a filling layer 500 .

[0036] In some embodiments of the present application, reference Figures 1 to 5 The light-emitting unit 300 is located on one side of the substrate 100, the light-emitting unit 300 includes an active layer, and the light-emitting unit 300 has a top surface 301 and a side surface 302, and the insulating protection layer 400 covers the top surface 301 and the side surface 302 of the light-emitting unit 300; the filling layer 500 covers a portion of the surface of the insulating protection layer 400 away from the substrate 100, the maximum distance between the filling layer 500 and the first surface 110 of the substrate 100 is recorded as h1, the distance between the surface of the active layer 320 away from the substrate 100 and the first surface 110 of the substrate 100 is recorded as h2, and the maximum distance between the insulating protection layer 400 and the first surface 110 of the substrate 100 is recorded as h3, h2

[0037] It should be noted that the maximum distance between the filling layer 500 and the first surface 110 of the substrate 100 refers to the distance between the highest point of the filling layer 500 and the first surface 110 of the substrate 100, and the maximum distance between the insulating protection layer 400 and the first surface 110 of the substrate 100 refers to the distance between the surface of the insulating protection layer 400 away from the substrate 100 (the surface of the insulating protection layer 400 on the top surface of the light-emitting unit 300 away from the substrate 100) and the first surface 110 of the substrate 100.

[0038] In some specific embodiments of the present application, reference is made to Figures 1 to 4 , h2

[0039] In other specific embodiments of the present application, refer to Figure 5 ​​, h2

[0040] In some embodiments of the present application, the material of the substrate 100 may be a semiconductor material, such as silicon, gallium arsenide, etc. In other embodiments of the present application, the material of the substrate 100 may be a non-conductive material, such as sapphire or glass.

[0041] In some embodiments of the present application, a CMOS (complementary metal oxide semiconductor) structure or a thin film transistor structure may be provided on the substrate 100 to adjust and control the light emission or display of the light emitting unit.

[0042] In some embodiments of the present application, reference Figures 1 to 5 The light-emitting unit 300 may have a stepped structure, and the cross-section of the light-emitting unit 300 may be a trapezoid along the thickness direction of the Micro LED chip.

[0043] In some embodiments of the present application, reference Figures 1 to 5 The light emitting unit 300 may further include a first semiconductor portion 310 and a second semiconductor portion 330 . The first semiconductor portion 310 , the active layer 320 , and the second semiconductor portion 330 are sequentially stacked, and the first semiconductor portion 310 is located between the active layer 320 and the substrate 100 .

[0044] In some embodiments of the present application, a maximum distance h1 between the filling layer 500 and the first surface 110 of the substrate 100 may be less than or equal to a distance between a surface of the second semiconductor portion 330 away from the substrate 100 and the first surface 110 of the substrate 100 .

[0045] In some embodiments of the present application, the material of the first semiconductor portion 310 may be P-type gallium nitride, the material of the second semiconductor portion 330 may be N-type gallium nitride, the active layer 320 may be a multi-quantum well layer, and the active layer 320 is arranged between the first semiconductor portion 310 and the second semiconductor portion 330, and the carrier electrons and holes can recombine in the active layer to emit light.

[0046] In some embodiments of the present application, reference Figure 3 and Figure 5 The Micro LED chip may further include a first doped semiconductor layer 200 , and a plurality of light-emitting units 300 are located on a surface of the first doped semiconductor layer 200 away from the substrate.

[0047] ​In some embodiments of the present application, the material of the first doped semiconductor layer 200 may be the same as the material of the first semiconductor portion 310. The first doped semiconductor layer and the first semiconductor portion may be prepared by the same process and the same steps, which is beneficial to saving process steps and preparation time. In some embodiments of the present application, the first doped semiconductor layer and the first semiconductor portion may be an integral structure.

[0048] In some embodiments of the present application, the thickness of the filling layer 500 on the insulating protection layer 400 on the same light-emitting unit 300 at the same level is consistent. Figures 1 to 5 The thickness of the filling layer 500 at the same level refers to the thickness of the filling layer 500 at any cross section parallel to the first surface 110 of the substrate 100. The thickness of the filling layer 500 on the insulating protection layer 400 on the same light-emitting unit 300 at the same level is consistent, and the thickness of the filling layer at the side of the same light-emitting unit at the same level is consistent, which can better protect the light-emitting unit, thereby facilitating the improvement of the overall performance of the chip.

[0049] In some embodiments of the present application, reference Figures 1 to 5 , the filling layer 500 may include a side wall 510, the side wall 510 has a second surface 511 and a third surface 512, the second surface 511 is in contact with the side surface 410 of the insulating protection layer 400, the angle between the second surface 511 and the first surface 110 of the substrate 100 is α, the angle between the third surface 512 and the first surface 110 is β, α and β are both obtuse angles, and α<β. Therefore, the structure of the filling layer can make the subsequently formed reflective layer accurately match the light-emitting unit, so that the reflective layer reflects the light emitted by the light-emitting unit to the light-emitting surface, reducing the light loss from the side, and thus significantly improving the light-emitting efficiency of the Micro LED chip.

[0050] In some embodiments of the present application, reference Figure 4 and Figure 5 , the filling layer 500 may further include a bottom 520, the bottom 520 and the sidewall 510 may be an integral structure, the fourth surface 521 of the bottom 520 is parallel to the first surface 110 of the substrate 100, and the fourth surface 521 is the surface of the bottom 520 away from the substrate 100. It should be noted that, since it is difficult to ensure that the fourth surface 521 is absolutely parallel to the first surface 110 during the preparation process, the fourth surface 521 being parallel to the first surface 110 means that the fourth surface 521 is roughly parallel to the first surface 110. It should also be noted that the thickness of the bottom 520 is uniform, and the fifth surface 522 of the bottom 520 (the surface of the bottom 520 close to the substrate 100) is also parallel to the first surface 110 of the substrate 100. Therefore, Figure 4 and Figure 5In the figure, α is marked as the angle between the second surface 511 and the fifth surface 522 , and β is marked as the angle between the third surface 512 and the fourth surface 521 .

[0051] In some embodiments of the present application, reference Figure 3 The insulating protection layer 400 has a bottom surface 420, which is a surface of the bottom surface of the insulating protection layer 400 away from the substrate 100, and the bottom surface 420 is parallel to the first surface 110 of the substrate 100. Therefore, Figure 3 In the figure, α is the angle between the second surface 511 and the bottom surface 420 , and β is the angle between the third surface 512 and the bottom surface 420 .

[0052] In some embodiments of the present application, the material of the filling layer 500 may include at least one of silicon oxide, silicon nitride, polyimide (PI), photoresist, etc. The above materials have good insulation properties, which are beneficial to prevent the Micro LED chip from leaking electricity, thereby improving the overall stability of the Micro LED chip and extending the service life of the Micro LED chip.

[0053] In some embodiments of the present application, the material of the insulating protection layer 400 may be aluminum oxide, which has excellent electrical insulation properties and can protect the light-emitting unit, thereby avoiding problems such as device failure caused by leakage of the Micro LED chip.

[0054] In some embodiments of the present application, reference Figures 2 to 5 The Micro LED chip may further include a reflective layer 600, which covers the surface of the filling layer 500 away from the substrate 100. Thus, the reflective layer can reflect the light emitted by the light-emitting unit, thereby adjusting the light path of the light so that more light can be emitted from the light-emitting surface of the light-emitting unit, thereby helping to improve the luminous efficiency of the chip.

[0055] In some embodiments of the present application, the material of the reflective layer 600 may be metal, for example, the material of the reflective layer 600 may be metallic silver, metallic aluminum, etc. The above materials have good light reflection performance, which is beneficial to further improve the light extraction efficiency of the device.

[0056] In other embodiments of the present application, the reflective layer 600 may be a distributed Bragg reflective structure, which may also better reflect light to the light emitting surface, thereby facilitating improving the light emitting efficiency of the device.

[0057] In another aspect of the present application, the present application proposes a method for preparing a Micro LED chip. In some embodiments of the present application, reference is made to Figures 6 to 9The method for preparing a Micro LED chip may include the following steps:

[0058] S100: providing a substrate.

[0059] The material of the substrate 100 has been described above and will not be repeated here.

[0060] In some embodiments of the present application, a CMOS structure or a thin film transistor structure may be formed on one side of the substrate 100, and then a light-emitting unit and other structures may be formed, so that the light emission of the light-emitting unit may be adjusted and controlled by the CMOS structure or the thin film transistor structure.

[0061] S200: forming a plurality of light emitting units on one side of a substrate.

[0062] refer to Figures 6 to 9 A plurality of light emitting units 300 are formed on one side of the substrate 100 , wherein the light emitting unit 300 includes an active layer 320 , and the light emitting unit 300 has a top surface 301 and a side surface 302 .

[0063] In some embodiments of the present application, the active layer 320 may be a multi-quantum well layer.

[0064] In some specific embodiments of the present application, reference is made to Figure 8 , forming a plurality of light emitting units 300 may include the following steps:

[0065] S210: forming an original first doped semiconductor layer, an original active layer and an original second doped semiconductor layer in sequence on one side of the substrate.

[0066] refer to Figure 8 An original first doped semiconductor layer 200', an original active layer 320' and an original second doped semiconductor layer 330' are sequentially formed on one side of the substrate 100, and the original first doped semiconductor layer 200', the original active layer 320' and the original second doped semiconductor layer 330' constitute an epitaxial layer. Afterwards, a light-emitting unit can be formed by etching the epitaxial layer.

[0067] S220: Etching the original first doped semiconductor layer, the original active layer and the original second doped semiconductor layer to form a first doped semiconductor layer and a plurality of light emitting units arranged at intervals.

[0068] refer to Figure 2After the epitaxial layer is etched, the original first doped semiconductor layer 200' forms the first doped semiconductor layer 200 and the first semiconductor portion 310, and the first doped semiconductor layer 200 and the first semiconductor portion 310 are an integrated structure. The light-emitting unit 300 is located on the side of the first doped semiconductor layer 200 away from the substrate 100, and the light-emitting unit 300 includes the first semiconductor portion 310, the active layer 320 and the second semiconductor portion 330. The first semiconductor portion 310 is located on a portion of the surface of the first doped semiconductor layer 200 away from the substrate 100, the active layer 320 is located on the side of the first semiconductor portion 310 away from the substrate 100, and the second semiconductor portion 330 is located on the side of the active layer 320 away from the substrate 100.

[0069] The etching depth is based on the predetermined thickness that the first doped semiconductor layer 200 can reach, and the remaining original first doped semiconductor layer 200 ′ is continuous in the horizontal direction (the plane direction where the first surface 110 of the substrate 100 is located).

[0070] S300: forming an insulating protective layer.

[0071] refer to Figures 6 to 8 After forming the light emitting unit 300, an insulating protective layer 400 is formed on the side of the light emitting unit 300 away from the substrate 100, and the insulating protective layer 400 covers the top surface 301 and the side surface 302 of the light emitting unit 300. The insulating protective layer can play the role of electrical insulation, thereby avoiding technical problems such as device failure caused by leakage of the light emitting unit.

[0072] In some embodiments of the present application, reference Figure 8 The insulating protection layer 400 may cover the surface of the light emitting unit 300 away from the substrate 100 and a portion of the surface of the first doped semiconductor layer 200 away from the substrate 100 .

[0073] In some embodiments of the present application, an atomic layer deposition process can be used to form an insulating protective layer 400. For example, an atomic layer deposition process can be used to form an aluminum oxide protective layer with a thickness between tens of nanometers and 1 micron. The insulating protective layer formed by this method has a denser structure and is more conducive to protecting the light-emitting unit.

[0074] S400: forming an original filling layer.

[0075] In some embodiments of the present application, reference Figure 6 and Figure 7 The original filling layer 500 ′ covers the surface of the insulating protection layer 400 away from the substrate 100 .

[0076] In some embodiments of the present application, reference Figure 6 , Figure 7 and Fig. 9The original filling layer 500 ′ covers the surface of the insulating protection layer 400 away from the substrate 100 , and the original filling layer 500 ′ has a top 530 ′, an original sidewall 510 ′ and an original bottom 520 ′.

[0077] In some embodiments of the present application, the original filling layer 500 ′ may be formed by a low pressure chemical vapor deposition process (LPCVD), a plasma enhanced chemical vapor deposition process (PECVD) or a physical sputtering deposition process.

[0078] In some specific embodiments of the present application, reference is made to Fig. 9 , the thickness d3 of the top 530', the thickness d1 of the original side wall 510' and the thickness d2 of the original bottom 520' are all the same, that is, a uniformly coated original filling layer 500' can be formed. It should be noted that the thickness d1 of the original side wall 510' refers to the thickness of the original side wall 510' in a direction perpendicular to the surface of the original side wall 510' in contact with the insulating protection layer 400.

[0079] In other embodiments of the present application, reference Figure 6 and Figure 7 , the thickness d3 of the top 530', the thickness d1 of the original sidewall 510', and the thickness d2 of the original bottom 520' may not be exactly the same. In some embodiments of the present application, the thickness d3 of the top 530' and the thickness d1 of the original sidewall 510' may be the same, and the thickness d3 of the top 530' and the thickness d2 of the original bottom 520' may be different. In other embodiments of the present application, the thickness d3 of the top 530' and the thickness d1 of the original sidewall 510' may be different, and the thickness d1 of the original sidewall 510' and the thickness d2 of the original bottom 520' may be the same. In some other embodiments of the present application, the thickness d3 of the top 530', the thickness d1 of the original sidewall 510', and the thickness d2 of the original bottom 520' may all be different.

[0080] S500: etching the original filling layer using a non-photolithography process to obtain a filling layer.

[0081] In some embodiments of the present application, reference Figure 6 , Figure 7 and Fig. 9 The filling layer 500 covers a portion of the surface of the insulating protection layer 400 away from the substrate 100, the maximum distance between the filling layer 500 and the first surface 110 of the substrate 100 is recorded as h1, the maximum distance between the active layer 320 and the first surface of the substrate 100 is recorded as h2, and the maximum distance between the insulating protection layer 400 and the first surface of the substrate 100 is recorded as h3, h2

[0082] ​The original filling layer 500' is etched by a non-photolithography process. The etching medium moves from the side of the original filling layer 500' away from the substrate to the side close to the substrate. The etching medium first contacts the top 530' of the original filling layer 500'. The movement speed of the etching medium is uniform. However, due to the height difference of the position where the original filling layer 500' is etched, the decomposition amount of the movement speed on the top 530', the original side wall 510' and the original bottom 520' is different, thereby forming the following Figure 6 , Figure 7 or Fig. 9 The filling layer 500 is shown in FIG.

[0083] In some embodiments of the present application, reference Figure 6 and Figure 7 After the original filling layer 500' is etched by a non-photolithography process, the top 530' and the original bottom 520' are completely etched, and the original sidewall 510' is partially etched.

[0084] In some embodiments of the present application, the material of the original filling layer 500' can be silicon dioxide, and the material of the insulating protection layer 400 can be aluminum oxide. When etching the original filling layer 500', a mixed gas of carbon tetrafluoride (CF4) and trifluoromethane (CHF3) can be used as an etching medium. The above etching gas can effectively etch the original filling layer, but will not etch the insulating protection layer. Therefore, after the top 530' and / or the original bottom 520' are completely etched, the original sidewall 510' can continue to be etched according to actual needs, and there is no need to use a mask for shielding. The specific ratio of carbon tetrafluoride and trifluoromethane in the mixed gas is not particularly limited in this application, and those skilled in the art can set and adjust it according to actual needs.

[0085] In other embodiments of the present application, reference Fig. 9 After the original filling layer 500' is etched by a non-photolithography process, the top 530' is completely etched, and the original bottom 520' and the original sidewall 510' are partially etched.

[0086] In some embodiments of the present application, reference Fig. 9The light emitting unit 300 is located on a portion of the surface of the first doped semiconductor layer 200 away from the substrate 100, and the insulating protection layer 400 can also cover a portion of the surface of the first doped semiconductor layer 200 away from the substrate 100. The original filling layer 500' has a top 530' and an original side wall 510', and the thickness d3 of the top 530' is the same as the thickness d1 of the original side wall 510'. The original filling layer 500' is etched by a non-photolithography process to remove a portion of the original filling layer 500' to obtain a filling layer 500. The filling layer 500 includes a side wall 510, and the side wall 510 has a second surface 511 and a third surface 512. The second surface 511 is arranged in contact with the side surface of the insulating protection layer 400, and the angle between the second surface 511 and the first surface 110 of the substrate 100 is α, and the angle between the third surface 512 and the first surface 110 is β, and α and β are both obtuse angles, and α<β.

[0087] In some embodiments of the present application, the non-photolithography process may include at least one of the RIE (reactive ion etching) method and the ICP (inductively coupled plasma) etching. For example, the original filling layer 500' may be etched by the RIE method or the ICP etching method, or the original filling layer 500' may be etched by a method combining the RIE method and the ICP etching method. By etching the original filling layer 500' by the non-photolithography process, the shape of the filling layer can be better adjusted, and there will be no etching residue problem caused by the alignment deviation between the photoresist and the light-emitting unit, which is beneficial to improving the etching efficiency and etching effect; after the filling layer is formed, a reflective layer is formed on the side of the filling layer away from the substrate, and the shape and size of the reflective layer structure can be adapted according to actual needs, so that the prepared chip has a higher light extraction efficiency.

[0088] In some embodiments of the present application, reference Figure 7 and Fig. 9 The method for preparing a Micro LED chip may further include the following steps:

[0089] S600: forming a reflective layer.

[0090] refer to Figure 7 and Fig. 9 A reflective layer 600 is formed on a side of the filling layer 500 away from the substrate 100 , and the reflective layer 600 covers a surface of the filling layer 500 away from the substrate 100 .

[0091] In some embodiments of the present application, reference Figure 7 , a reflective layer 600 is formed on a side of the filling layer 500 away from the substrate 100, and the reflective layer 600 can cover the third surface 512 of the filling layer 500. According to other embodiments of the present application, Fig. 9The reflective layer 600 can cover the third surface 512 and the fourth surface 521 of the filling layer 500. Thus, the reflective layer can reflect the light emitted by each light-emitting unit, so that more light is emitted from the light-emitting surface of the Micro LED chip, thereby improving the light-emitting efficiency of the Micro LED chip.

[0092] In some embodiments of the present application, the reflective layer 600 may be formed by processes such as metal evaporation, metal sputtering, and electron beam evaporation.

[0093] The material of the reflective layer has been described above and will not be repeated here.

[0094] Combine the following Fig. 9 The specific principle of etching the original filling layer to form the filling layer in some specific embodiments of the present application is described in detail:

[0095] refer to Fig. 9 After the original filling layer 500' is formed, the original filling layer 500' is etched by RIE (reactive ion etching) method and / or ICP (inductively coupled plasma) method to remove the top 530', a part of the original sidewall 510' and a part of the original bottom 520', so as to form the filling layer 500. The filling layer 500 has a sidewall 510 and a bottom 520, and the sidewall 510 and the bottom 520 are connected.

[0096] In some embodiments of the present application, the etching rate of the top portion 530' is greater than the etching rate of the original sidewall 510'. Fig. 9 Since the initial thickness d3 of the top 530' is the same as the initial thickness d1 of the original sidewall 510', when the top is completely etched, the original sidewall is not completely etched, and a Fig. 9 Since the etching rate of the top 530' is greater than the etching rate of the original sidewall 510', this property can be used to achieve independent adjustment of the sidewall and other positions (including the top and bottom), thereby achieving the target shape of the filling layer 500 without the need for photolithography.

[0097] The original filling layer 500' is etched by RIE method and / or ICP method. The variation curve of the thickness H of the original filling layer 500' with the etching time t can be referred to Fig.10 , where H0 is the initial thickness of the original filling layer 500'. Curve L1 is a curve showing the variation of the remaining thickness of the original sidewall 510' with the etching time t, and curve L2 is a curve showing the variation of the remaining thickness of the top 530' with the etching time t.

[0098] Assuming that the etching rate at the original sidewall 510' is v, the etching rate at the top 530' is bv (b>1, because the etching rate at the top is faster). Then, at the end of etching, the remaining thickness at the original sidewall 510' is H0-vt; the remaining thickness at the top 530' is H0-bvt. Although b is affected by the process (such as the inclination angle of the step structure, the deposition density of the filling layer, the setting of the etching process parameters, etc.), it can be regarded as a constant under specific equipment / process. In some embodiments of the present application, reference Fig. 9 , S is the width of the original bottom 520' close to the substrate side, the straight line segment L is a right-angled side of the right triangle, γ is an acute angle of the right triangle, γ=(180°-α), wherein, 2H0<L=S·sinγ=S·sin(180°-α)=S·sinα, that is, the sum of the thicknesses of the original side walls 510' on the opposite sides of two adjacent light-emitting units 300 can be less than S·sinα, and there is a certain distance between the original side walls 510' on the opposite sides of two adjacent light-emitting units 300.

[0099] In some embodiments, the top 530' is completely removed. At this time, H0-bvt=0, and t=H0 / bv. Then, the remaining thickness at the original sidewall 510' is H0-vt=H0-H0 / b. It should be noted that when the original filling layer 500' is etched by RIE method and / or ICP, the reaction medium (etching medium) moves from the side of the original filling layer 500' away from the substrate 100 to the original filling layer 500'. The reaction medium first contacts the top 530' and finally contacts the original bottom 520'. Fig. 9 , a uniformly coated original filling layer can be formed, the thickness d2 of the original bottom 520' is the same as the thickness d3 of the top 530' and the thickness d1 of the original sidewall 510'. Therefore, the etching rate of the original bottom 520' is also lower than the etching rate of the top 530'. Therefore, the filling layer 500 finally etched has a bottom with a certain thickness.

[0100] Therefore, the remaining thickness at the original side wall and the remaining thickness at the top can be independently adjusted by controlling H0 and t without the aid of photolithography, thereby achieving the purpose of adapting the shape and size of the reflective layer structure according to needs and improving the light output efficiency.

[0101] refer to Fig.11In the related art, after the original filling layer 500' is formed, the original filling layer 500' is etched by a photolithography method. Specifically, a photoresist layer 700 is first formed on the surface of the original filling layer 500' away from the substrate 100, and then the photoresist layer 700 is exposed and developed, and the original filling layer is etched. In the etching process using the photoresist layer as a mask, there is an alignment deviation between the step position of the photoresist layer 700 and the light-emitting unit 300. There will be etching residues in the photolithography filling layer 500" formed after etching, and the residual part needs to be removed by etching again, and the process is complicated.

[0102] In general, when preparing Micro LED chips using the method proposed in the present application, the reflective layer structure and the Micro LED are processed on the same substrate and there is no need to etch the original filling layer through a photolithography process, which simplifies the process flow, does not require repeated etching, is easy to operate, and has a high qualified rate of finished products; the shape and size of the reflective layer structure can be adjusted according to the size, shape and processing requirements of the Micro LED, so that the structure for improving the light output efficiency is accurately matched with each light-emitting unit, so that the prepared device has a more optimized light type and a higher light output efficiency.

[0103] In another aspect of the present application, the present application proposes a display device. In some embodiments of the present application, the display device includes the Micro LED chip described above or the Micro LED chip prepared by the method described above. As a result, the display device has high light extraction efficiency and good display effect. In some embodiments of the present application, the display device can be a display panel, etc.

[0104] In another aspect of the present application, the present application proposes a display system. In some embodiments of the present application, the display system may include the display device described above. As a result, the display system has a good display effect. There are no special requirements for the specific type of the above display system, and those skilled in the art can flexibly select according to actual needs, such as a display system for a mobile phone, iPad, notebook, etc.

[0105] Those skilled in the art will appreciate that, in addition to the display devices described above, the display system may also have the necessary structures and components of a conventional display system. Taking a mobile phone as an example, in addition to the display devices described above, the display system also has the necessary structures and components such as a battery back cover, a middle frame, a touch panel, an audio module, and a motherboard.

[0106] In the description of this specification, the description of reference terms "one embodiment", "some embodiments", "other embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment are included in at least one embodiment of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art can combine and combine the different embodiments or examples described in this specification and the features of different embodiments or examples without contradiction. In addition, it should be noted that in this specification, the terms "first", "second", "third", "fourth" and "fifth" are used only for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated.

[0107] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the present application. Ordinary technicians in this field can change, modify, replace and modify the above embodiments within the scope of the present application.

Claims

1. A Micro LED chip, characterized in that: include: substrate; A plurality of light-emitting units, each of which is located on one side of the substrate, comprises an active layer, and has a top surface and a side surface; an insulating protective layer, wherein the insulating protective layer covers the top surface and the side surfaces of the light-emitting unit; A filling layer, wherein the filling layer covers a portion of the surface of the insulating protection layer away from the substrate, the maximum distance between the filling layer and the first surface of the substrate is recorded as h1, the distance between the surface of the active layer away from the substrate and the first surface of the substrate is recorded as h2, the maximum distance between the insulating protection layer and the first surface of the substrate is recorded as h3, h2<h1≤h3, and the first surface is the surface of the substrate close to the light-emitting unit.

2. The Micro LED chip according to claim 1, characterized in that: The thickness of the filling layer on the insulating protection layer on the same light-emitting unit at the same horizontal height is consistent.

3. The Micro LED chip according to claim 1, wherein: The light emitting unit further includes a first semiconductor portion and a second semiconductor portion, wherein the first semiconductor portion, the active layer and the second semiconductor portion are sequentially stacked, and the first semiconductor portion is located between the active layer and the substrate.

4. The Micro LED chip according to claim 1, wherein: The filling layer includes a side wall, the side wall has a second surface and a third surface, the second surface is arranged in contact with the side surface of the insulating protection layer, the angle between the second surface and the first surface of the substrate is α, the angle between the third surface and the first surface is β, α and β are both obtuse angles, and α<β.

5. The Micro LED chip according to any one of claims 1 to 4, characterized in that: At least one of the following conditions is met: The Micro LED chip further includes a reflective layer, wherein the reflective layer covers a surface of the filling layer away from the substrate; The Micro LED chip further includes a first doped semiconductor layer, and the plurality of light-emitting units are located on a surface of the first doped semiconductor layer away from the substrate; The filling layer further includes a bottom, the bottom and the sidewall of the filling layer are an integral structure, a fourth surface of the bottom is parallel to the first surface of the substrate, and the fourth surface is a surface of the bottom away from the substrate.

6. The Micro LED chip according to claim 5, characterized in that: At least one of the following conditions is met: The material of the filling layer includes at least one of silicon oxide, silicon nitride, polyimide and photoresist; The material of the substrate is silicon, gallium arsenide, sapphire or glass; The material of the insulating protective layer is aluminum oxide; The material of the reflection layer is metal, or the reflection layer is a distributed Bragg reflection structure.

7. A method for preparing a Micro LED chip, characterized in that: include: providing a substrate; A plurality of light emitting units are formed on one side of the substrate, wherein the light emitting units include an active layer and have a top surface and a side surface; forming an insulating protective layer on a side of the light emitting unit away from the substrate, wherein the insulating protective layer covers the top surface and the side surface of the light emitting unit; forming an original filling layer, wherein the original filling layer covers a surface of the insulating protection layer away from the substrate; The original filling layer is etched by a non-photolithography process to obtain a filling layer, wherein the filling layer covers a portion of the surface of the insulating protection layer away from the substrate, the maximum distance between the filling layer and the first surface of the substrate is recorded as h1, the distance between the surface of the active layer away from the substrate and the first surface of the substrate is recorded as h2, the maximum distance between the insulating protection layer and the first surface of the substrate is recorded as h3, h2<h1≤h3, and the first surface is the surface of the substrate close to the light-emitting unit.

8. The method according to claim 7, characterized in that The method for preparing a Micro LED chip also includes: A reflective layer is formed on a side of the filling layer away from the substrate, and the reflective layer covers a surface of the filling layer away from the substrate.

9. The method according to claim 7 or 8, characterized in that: Forming a plurality of the light emitting units comprises: Sequentially forming an original first doped semiconductor layer, an original active layer, and an original second doped semiconductor layer on one side of the substrate; The original first doped semiconductor layer, the original active layer and the original second doped semiconductor layer are etched to form a first doped semiconductor layer and a plurality of the light-emitting units, wherein the light-emitting units are located on a side of the first doped semiconductor layer away from the substrate, and the light-emitting units include a first semiconductor portion, the active layer and a second semiconductor portion, and the first semiconductor portion and the first doped semiconductor layer are an integrated structure.

10. The method according to claim 9, characterized in that The insulating protection layer also covers a portion of the surface of the first doped semiconductor layer away from the substrate. The original filling layer has a top and an original side wall, the thickness of the top is the same as the thickness of the original side wall, the original filling layer is etched to remove a portion of the original filling layer to obtain a filling layer, the filling layer includes a side wall, the side wall has a second surface and a third surface, the second surface is in contact with the side surface of the insulating protection layer, the angle between the second surface and the first surface of the substrate is α, the angle between the third surface and the first surface is β, α and β are both obtuse angles, and α<β.

11. The method according to any one of claims 7, 8 and 10, characterized in that The non-photolithography process includes at least one of a RIE method and an ICP etching method.

12. A display device, characterized in that: A Micro LED chip comprising any one of claims 1-6, or a Micro LED chip prepared by the method of any one of claims 7-11.

13. A display system, characterized in that: A display device comprising the display device according to claim 12.

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