Method and device for automatically matching verification program

Abstract

The invention relates to the field of communication, and provides a method and a device for automatically matching a verification program. The method comprises the following steps: determining a first signal bit and a first check bit of a first message frame; searching a first verification program set matched with the first redundant segment from a first verification program library, wherein the first verification program library comprises verification programs corresponding to various different controllers used for carrying the bench test; based on the first signal bit, determining a first verification result corresponding to each first verification program; and based on the first check bit and the first check result, screening out a target check program matched with the check mode of the target controller from the first check program set. According to the method and the device, the target verification programs corresponding to the verification modes of the controllers can be automatically matched for the controllers carried by the rack, the method and the device are not influenced by the fact that the controllers are additionally carried by the rack or other controllers are replaced and carried by the rack, and the requirement of building various rack test environments can be met.

Description

Technical Field

[0001] The present application relates to the field of communications, and in particular to a method and device for automatically matching and verifying a program. Background Art

[0002] CRC (Cyclic Redundancy Check) is the most commonly used error checking method in the field of data communication. Before conducting bench tests, it is usually necessary to perform a CRC check on the message transmitted by the controller to ensure the correctness and integrity of the message before forwarding it to the bench test object (such as the range extender, engine and other electronic control units), so as to ensure that the controller can effectively control the bench test object.

[0003] Different controllers may have different CRC verification modes, and different CRC verification modes generally correspond to different CRC verification programs.

[0004] For a test bench equipped with multiple different controllers, although a specific CRC check program can be written to implement CRC check of messages transmitted from multiple different controllers currently on the test bench, every time one (or more) of the multiple different controllers currently on the test bench needs to be replaced, the specific CRC check program needs to be rewritten. This method not only has a large workload, low work efficiency, and high maintenance cost, but also has poor flexibility and is difficult to meet the needs of building various test bench environments. Summary of the invention

[0005] In view of this, the embodiments of the present application provide a method and device for automatically matching verification programs to solve the problem in the prior art that for a test bench equipped with multiple different controllers, whenever one (some) of the multiple different controllers currently equipped on the test bench needs to be replaced, the specific CRC verification program needs to be rewritten, which not only has a large workload and low work efficiency, but also has high maintenance costs, and poor flexibility, making it difficult to meet the needs of building various test bench test environments.

[0006] A first aspect of an embodiment of the present application provides a method for automatically matching and verifying a program, comprising:

[0007] Acquire a message frame set sent by a controller group currently carried by the test platform, wherein the controller group includes at least two different target controllers, and the message frame set includes at least two first message frames, and one first message frame corresponds to one target controller;

[0008] For each first message frame corresponding to the target controller, determine a first signal bit and a first check bit of the first message frame, wherein the first signal bit includes a first valid signal segment and a first redundant segment;

[0009] Searching a first verification program set matching the first redundant segment from a first verification program library, wherein the first verification program set includes at least one first verification program, and the first verification program library includes verification programs corresponding to various controllers for bench testing;

[0010] Based on the first signal bit, determining a first verification result corresponding to each first verification procedure;

[0011] Based on the first check bit and the first check result, a target check program matching the check mode of the target controller is selected from the first check program set.

[0012] According to a second aspect of the embodiment of the present application, there is provided a device for automatically matching and verifying a program, comprising:

[0013] An acquisition module is configured to acquire a message frame set sent by a controller group currently carried by the gantry, wherein the controller group includes at least two different target controllers, and the message frame set includes at least two first message frames, and one first message frame corresponds to one target controller;

[0014] A first determination module is configured to determine, for each first message frame corresponding to a target controller, a first signal bit and a first check bit of the first message frame, wherein the first signal bit includes a first valid signal segment and a first redundant segment;

[0015] A search module is configured to search a first verification program set matching the first redundant segment from a first verification program library, wherein the first verification program set includes at least one first verification program, and the first verification program library includes verification programs corresponding to various controllers for carrying bench tests;

[0016] A second determination module is configured to determine a first verification result corresponding to each first verification program based on the first signal bit;

[0017] The screening module is configured to screen out a target verification program that matches the verification mode of the target controller from the first verification program set based on the first verification bit and the first verification result.

[0018] According to a third aspect of an embodiment of the present application, an electronic device is provided, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the above method when executing the computer program.

[0019] According to a fourth aspect of an embodiment of the present application, a readable storage medium is provided, which stores a computer program, and when the computer program is executed by a processor, the steps of the above method are implemented.

[0020] Compared with the prior art, the beneficial effects of the embodiments of the present application include at least the following: before building a test bench (the test bench is equipped with one or more different target controllers) and conducting a test bench test, first, obtaining a message frame set sent by the controller group; then, for each first message frame corresponding to the target controller, determining the first signal bit and the first check bit of the first message frame; then searching the first check program set that matches the first redundant segment from the first check program library; then, based on the first signal bit, determining the first check result corresponding to each first check program in the first check program set; finally, based on the first check bit and the first check result, selecting a target check program that matches the check method of the target controller from the first check program set. Through the above method, it is possible to automatically match the target verification program corresponding to the verification method of each controller carried by the test bench. This method is not affected by the addition of a controller or the replacement of other controllers carried by the test bench. It has good flexibility and can meet the needs of building various test bench environments. It is not necessary to write a specific CRC verification program for multiple different controllers currently carried by the test bench, nor is it necessary to rewrite a specific CRC verification program every time a certain (some) controller carried by the current test bench is added or replaced. Therefore, the workload can be greatly reduced, the work efficiency can be improved, and the maintenance cost is low. At the same time, it can effectively reduce the communication abnormality caused by the mismatch between the verification method and the verification program of the target controller. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0022] Figure 1 It is a schematic diagram of an application scenario of an embodiment of the present application;

[0023] Figure 2 It is a flowchart of a method for automatically matching and verifying a program provided in an embodiment of the present application;

[0024] Figure 3 is a schematic diagram of a storage structure in a first verification program library provided in an embodiment of the present application;

[0025] Figure 4 It is a schematic diagram of the overall flow of a method for automatically matching and verifying a program provided in an embodiment of the present application;

[0026] Figure 5 It is a flowchart of a method for automatic matching and verification program of an application example provided in an embodiment of the present application;

[0027] Figure 6 It is a structural schematic diagram of a device for automatically matching and verifying a program provided in an embodiment of the present application;

[0028] Figure 7 It is a structural schematic diagram of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0029] In the following description, specific details such as specific system structures, technologies, etc. are provided for the purpose of illustration rather than limitation, so as to provide a thorough understanding of the embodiments of the present application. However, it should be clear to those skilled in the art that the present application may also be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted to prevent unnecessary details from obstructing the description of the present application.

[0030] A method and device for automatic matching and verification procedures according to an embodiment of the present application will be described in detail below with reference to the accompanying drawings.

[0031] Figure 1 It is a scenario diagram of an application scenario of an embodiment of the present application. The application scenario may include a server 101, a host computer 102 (also referred to as a test bench host computer), a controller group 103, a test bench 104, and a target ECU (electronic control unit) 105. Among them, the host computer 102 can establish communication connections with the target controller 103, the test bench 104, and the target ECU 105 respectively through a CAN (Controller Area Network) bus, Ethernet, etc.; the host computer 102 can establish a communication connection with the server 101 through a wired network or a wireless network. The host computer 102 and the test bench 104 constitute a test bench system.

[0032] The server 101 may be a single server, a server cluster consisting of several servers, or a cloud computing service center, which is not limited in the embodiments of the present application.

[0033] The server 101 is provided with a first verification program library, which stores verification programs (also called generating polynomials) corresponding to various controllers for bench testing. Different controllers may have different verification methods (verification algorithms), and different verification methods usually correspond to different verification programs.

[0034] In some embodiments, the controller development personnel may provide verification programs for verification methods corresponding to various controllers for bench testing. These verification programs may be uniformly stored in a first verification program library, and the first verification program library is directly open to the bench system.

[0035] The host computer 102 may be any electronic device having a user operation interface and supporting communication with the server 101 , the target controller 103 , the test bench 104 and the target ECU 105 , and may specifically be a computer, a mobile phone, a tablet, a panel, a touch screen, etc.

[0036] The controller group 103 includes at least two controllers with different structures and / or functions. Specifically, the type and quantity of controllers that the test bench needs to carry can be selected according to the actual needs of the test bench environment to be built. As an example, a test bench environment needs to be equipped with target controller 1, target controller 2, target controller 3 and target controller 4, then the controller group 103 includes target controller 1, target controller 2, target controller 3 and target controller 4. Among them, target controller 1, target controller 2, target controller 3 and target controller 4 are controllers with different structures and / or functions.

[0037] The bench 104 is a test bench. Different bench tests require different technical support systems. For example, a gasoline engine bench requires technical support systems such as air intake, fuel injection, and ignition control. Another example is an aircraft engine bench that requires technical support systems such as fuel supply, power supply, engine monitoring, fire protection, riot control, and environmental monitoring.

[0038] The target ECU 105 may also be referred to as a bench test object, and may specifically be an electronic control unit (ECU) such as an automobile engine or a range extender.

[0039] Figure 2 It is a flowchart of a method for automatically matching and verifying a program provided in an embodiment of the present application. Figure 2 The method of automatic matching verification program can be Figure 1 The host computer 102 of the test bench system executes. Figure 2 As shown, the method of automatically matching and verifying the program comprises the following steps:

[0040] Step S201, obtaining a message frame set sent by a controller group currently carried by the platform, wherein the controller group includes at least two different target controllers, and the message frame set includes at least two first message frames, and one first message frame corresponds to one target controller.

[0041] As an example, suppose that a test bench is currently equipped with target controller 1, target controller 2 and target controller 3, wherein target controller 1, target controller 2 and target controller 3 are controllers with different structures and / or functions, then the controller group 103 includes target controllers 1 to 3. After the test bench environment is built and before the test bench begins, the target controller 1 can send the first message frame 1 to the host computer 102, the target controller 2 can send the first message frame 2 to the host computer 102, and the target controller 3 can send the first message frame 3 to the host computer 102, that is, the target controllers 1 to 3 each send their own first message frame to the host computer 102. Of course, the controller group 103 can also collect the first message frame 1, the first message frame 2 and the first message frame 3 that the target controllers 1 to 3 need to send to the host computer 102, form a message frame set, and then send the message frame set to the host computer 102. Exemplarily, the first message frame 1 may be a message frame including a first control instruction (such as a start control instruction, etc.) from the target controller 1 to the target ECU 105; the first message frame 2 may be a message frame including a second control instruction (such as an engine torque control instruction, etc.) from the target controller 2 to the target ECU 105; the third message frame 3 may be a message frame including a third control instruction (such as a generator torque control instruction, etc.) from the target controller 3 to the target ECU 105.

[0042] Step S202: for each first message frame corresponding to the target controller, determine a first signal bit and a first check bit of the first message frame, wherein the first signal bit includes a first valid signal segment and a first redundant segment.

[0043] The first signal bit is the information code in the first message frame. The first check bit is the check code of the first message frame. The first valid signal segment is the information code in the first signal bit. The first redundant segment, also called the C segment, is the redundant code length information in the first signal bit.

[0044] Assume that the total length of the first message frame is X bits, the length of the first signal bit is Y bits, the length of the first check bit is Z bits, the length of the first valid signal segment is A bits, and the length of the first redundant segment is B bits, where Y = A + B, and the length of the first check bit is the same as the length of the first redundant segment. For a given (X, Y) code, there exists a polynomial F(x) with the highest power XY = Z. Based on F(x), a check code of Y bits of information can be generated, and F(x) is called the generator polynomial of the check code.

[0045] As an example, assuming that the first message frame 1 of the target controller 1 is 7D 00 27 10 08 00 0E 16, then its first signal bit is 7D 00 27 10 08 00 0E; the first check bit is 16; the first valid signal segment in the first signal bit is 7D 00 27 10 08 00, and the first redundant segment in the first signal bit is 0E.

[0046] Step S203, searching the first verification program set matching the first redundant segment from the first verification program library, wherein the first verification program set includes at least one first verification program, and the first verification program library includes verification programs corresponding to various controllers for bench testing.

[0047] Figure 3 It is a schematic diagram of a storage structure in a first verification program library provided in an embodiment of the present application.

[0048] See also Figure 3 The first verification program library is provided with a plurality of storage structures, wherein one storage structure is used to store a type of verification program. For example, the storage structure CRC8 is used to store a series of verification programs with a verification method of CRC8; the storage structure CRC16 is used to store a series of verification programs with a verification method of CRC16; and the storage structure CRC32 is used to store a series of verification programs with a verification method of CRC32.

[0049] Step S204: determining a first verification result corresponding to each first verification procedure based on the first signal bit.

[0050] Specifically, the first signal bit of the first message frame is respectively substituted into each first verification program in the first verification program set, and a first verification result corresponding to each first verification program is calculated to obtain.

[0051] Step S205 , based on the first check bit and the first check result, a target check program matching the check mode of the target controller is selected from the first check program set.

[0052] Specifically, the consistency of the first check bit of the first message frame and the first check result of each first check program can be compared to obtain a comparison result, and then a target check program matching the check method of the target controller can be screened out from the first check program set according to the comparison result.

[0053] The technical solution provided in the embodiment of the present application is, after the test bench (which is equipped with one or more different target controllers) is built and before the test bench is conducted, first, a message frame set sent by the controller group is obtained; then, for the first message frame corresponding to each target controller, a first signal bit and a first check bit of the first message frame are determined; then, a first check program set matching the first redundant segment is searched from the first check program library; then, based on the first signal bit, a first check result corresponding to each first check program in the first check program set is determined; finally, based on the first check bit and the first check result, a target check program matching the check method of the target controller is screened out from the first check program set. Through the above method, it is possible to automatically match the target verification program corresponding to the verification method of each controller carried by the test bench. This method is not affected by the addition of a controller or the replacement of other controllers carried by the test bench. It has good flexibility and can meet the needs of building various test bench test environments. There is no need to write a specific CRC verification program for multiple different controllers currently carried by the test bench, and there is no need to rewrite a specific CRC verification program every time a certain controller (or controllers) carried by the current test bench is added or replaced. Therefore, the workload can be greatly reduced, the work efficiency can be improved, and the maintenance cost is low. At the same time, the above method can effectively reduce the communication abnormality caused by the mismatch between the verification method and the verification program of the target controller.

[0054] In some embodiments, determining a first signal bit and a first check bit of a first message frame includes:

[0055] Read the message parsing file;

[0056] Based on the message parsing file, the first message frame is identified and field-divided to determine a first signal bit and a first check bit of the first message frame.

[0057] The message parsing file may be a DBC (Database CAN, CAN database file) parsing file, which contains relevant rules and instructions for defining how the host computer identifies and divides the fields of the message frame.

[0058] In some implementations, the written message parsing file may be pre-stored in the host computer 102 or the server 101 , so that the host computer 102 can read and use it at any time.

[0059] As an example, assuming that the host computer 102 receives a message frame set sent by the controller group 103 including the first message frame 1 (corresponding to the target controller 1), the first message frame 2 (corresponding to the target controller 2) and the first message frame 3 (corresponding to the target controller 3), then the host computer 102 can first read the pre-stored DBC parsing file from the local or server 101, and then identify and divide the fields of the first message frame 1, the first message frame 2 and the first message frame 3 according to the relevant rules for identifying and dividing the fields of the message frames defined in the DBC parsing file, and obtain the first signal bit and the first check bit corresponding to the first message frame 1, the first message frame 2 and the first message frame 3, as well as the first valid signal segment and the first redundant segment in the first signal bit.

[0060] Through the message parsing file, the first signal bit, the first check bit, and the first valid signal segment and the first redundant segment in the first signal bit of the first message frame of each frame can be quickly and accurately identified and divided.

[0061] In some embodiments, searching a first verification program set matching the first redundant segment from a first verification program library includes:

[0062] Obtaining classification label information corresponding to each verification program in the first verification program library;

[0063] Based on the classification mark information and the first redundant segment, at least one first verification program is selected from the first verification program library to form a first verification program set.

[0064] Classification tag information is used to distinguish the identifiers of each storage structure and a series of verification programs stored therein in the first verification program library. Each storage structure and a series of verification programs stored therein carry the same identifier. For example, Figure 3 The storage structure CRC8 shown has an identifier "CRC8", so a series of verification programs stored in the storage structure CRC8 also carry the identifier "CRC8".

[0065] Taking the first message frame 1 corresponding to the target controller 1 as an example, searching the first verification program set matching the first redundant segment of the first message frame 1 from the first verification program library is described in detail below.

[0066] Assume that the first message frame 1 corresponding to the target controller 1 is 7D 00 27 10 08 00 0E 16; its first redundant segment is 0E, and the redundant code length corresponding to the first redundant segment 0E is CRC8. The host computer 102 can first search for the classification mark information matching the redundant code length "CRC8" of the first redundant segment 0E from the first verification program library, wherein the classification mark information "CRC8" of the storage structure CRC8 matches the redundant code length "CRC8" of the first redundant segment 0E, then a series of verification programs stored in the storage structure CRC8 can be determined as the first verification program, and form a first verification program set.

[0067] By utilizing the classification mark information and the first redundant segment, a series of first verification programs that match the first redundant segment of the first message frame can be quickly and accurately found from the first verification program library, which is beneficial to reducing the amount of calculation of the test bench system, saving computing power, and at the same time beneficial to improving the efficiency of subsequent automatic matching of verification programs.

[0068] In some embodiments, based on the first check bit and the first check result, selecting a target check program that matches the check method of the target controller from the first check program set includes:

[0069] Determine a first verification program in the first verification program set whose first verification result is consistent with the first verification bit as a candidate verification program;

[0070] If the number of candidate verification programs is one, the candidate verification program is determined as a target verification program that matches the verification mode of the target controller.

[0071] Continuing to use the first message frame 1 in the above example, the first redundant segment of the first message frame 1 is 0E, and its redundant code length is CRC8. The series of first check programs in the first check program set found by the host computer 102 from the first check program library are a series of check programs in the storage structure CRC8. Assume that the following check programs are stored in the storage structure CRC8: ①CRC8; ②CRC8_SAE_J1850; ③CRC8_SAE_J1850-ZERO; ④CRC8_8H2F; ⑤CRC8_CDMA2000; ⑥CRC8_DVB_S2, then the check programs ① to ⑥ can all be determined as the first check programs, forming the first check program set.

[0072] Next, substitute the first signal bit "7D 00 27 10 08 00 0E" of the first message frame 1 into the above-mentioned first check programs (generator polynomials) ① to ⑥, and calculate the first check results corresponding to each first check program. If the first check results of the first check programs ① to ⑥ are: 26, A1, AB, 16, 29, 20, respectively, then the first check result of the first check program ④ (16) is consistent with the first check bit of the first message frame 1 (16), and the first check program ④ (CRC8_8H2F) can be determined as a candidate check program.

[0073] In the above example, the number of candidate verification programs is one, and the candidate verification program (ie, the first verification program ④) is determined as the target verification program that matches the verification mode of the target controller 1 .

[0074] In the process of screening the target verification program, the upper computer only extracts the first signal bit from the first message frame, and substitutes the first signal bit into each first verification program of the first verification program set for calculation, rather than substituting the complete first message frame into each first verification program for calculation. This is conducive to improving calculation efficiency, reducing the amount of calculation, and saving computing power.

[0075] After determining the target verification program, the host computer can automatically associate other valid information of the first message frame (including redundant code length information of the first redundant segment of the first message frame, the first signal bit and the first check bit) to form an independent and complete final verification program.

[0076] In some other embodiments, after determining the first verification program in the first verification program set whose first verification result is consistent with the first verification bit as the candidate verification program, the method further includes:

[0077] If the number of candidate verification programs is at least two, forming a second verification program set with at least two candidate verification programs;

[0078] Obtain a second message frame sent by the target controller;

[0079] Determine a second signal bit and a second check bit of the second message frame, wherein the second signal bit includes a second valid signal segment and a second redundant segment, and the second redundant segment is different from the first redundant segment;

[0080] Determine, based on the second signal bit, a second verification result corresponding to each candidate verification program in the second verification program set;

[0081] Based on the second check bit and the second check result, from the second check program

[0082] A target verification program that matches the verification mode of the target controller is filtered out from the collection.

[0083] As an example, it is assumed that the host computer 102 finds 7 first check programs that match the redundant code length of the first redundant segment of the first message frame 2 of the target controller 2 from the first check program library, which are respectively recorded as first check programs 1 to 7, wherein the first check results of the first check programs 2, 3 and 5 are consistent with the first check bit of the first message frame 2, then the first check programs 2, 3 and 5 are determined as candidate check programs 1, 2, 3. The number of candidate check programs is 3, and the candidate check programs 1, 2, 3 can be formed into a second check program set.

[0084] Next, the host computer 102 continues to receive the second message frame (next message frame) sent by the target controller 2, or the controller group 103 sends the second message frame of the target controller 2. The host computer 102 identifies and divides the fields of the second message frame according to the relevant rules for identifying and dividing the fields of the message frame defined in the DBC parsing file to determine the second signal bit and the second check bit of the second message frame. Then, the second signal bit is substituted into the candidate check programs 1, 2, and 3 in the second check program set, and the second check results corresponding to the candidate check programs 1, 2, and 3 are calculated.

[0085] If only the second check result of the candidate check program 1 is consistent with the second check bit of the second message frame, then the candidate check program 1 can be determined as the target check program that matches the check mode of the target controller 2 .

[0086] If the second verification results of candidate verification programs 1 and 2 are consistent with the second verification bit of the second message frame, the host computer 102 continues to receive the third message frame sent by the target controller 2, repeats the above steps, and selects the only target verification program that matches the verification method of the target controller 2.

[0087] For the same target controller, the redundant code length of the first redundant segment of the first message frame is different from the redundant code length of the second redundant segment of the second message frame. In this way, the uniqueness of each message frame can be ensured, and the host computer of the test bench system can be prevented from falling into a loop of invalid calculations due to the unchanged message frames sent by the target controller, which is beneficial to improving computing efficiency and saving computing power.

[0088] In some further embodiments, after determining the first verification program in the first verification program set whose first verification result is consistent with the first verification bit as a candidate verification program, the method further includes:

[0089] If the number of candidate verification programs is zero, a refresh request is sent to the server, so that the server refreshes the first verification program library based on the refresh request to obtain a second verification program library;

[0090] Searching for a third check program set matching the first redundant segment from the second check program library, wherein the third check program set includes at least one third check program;

[0091] Determine, based on the first signal bit, a third verification result corresponding to each third verification procedure;

[0092] Based on the first check bit and the third check result, a target check program matching the check mode of the target controller is selected from the third check program set.

[0093] Continuing to use the first message frame 2 in the above example, if the first check results of the first check programs 1 to 7 are all inconsistent with the first check bit of the first message frame 2, then the number of candidate check programs is 0, and the host computer 102 sends a refresh request to the server 101. After receiving the refresh request, the server 101 refreshes the first check program library to obtain the second check program library. The controller development personnel will upload the newly developed check programs to the first check program library of the server 101 regularly or irregularly, and can also maintain and manage the check programs in the first check program library.

[0094] After receiving the refresh completion notification fed back by the server 101, the host computer 102 searches the second verification program library for a third verification program set that matches the first redundant segment of the first message frame 2. According to the relevant rules for identifying and dividing the fields of the message frame defined in the DBC parsing file, the first message frame 2 is identified and divided into fields to determine the first signal bit and the second check bit of the first message frame 2. Then, the first signal bit is substituted into each third verification program in the third verification program set, and the third verification result corresponding to each third verification program is calculated. Finally, the third verification program whose third verification result is consistent with the first check bit is determined as a candidate verification program, and finally a target verification program matching the verification method of the target controller is determined based on the candidate verification program.

[0095] Through the above method, the verification program in the first verification program library can be refreshed in time, which is beneficial to improving the efficiency of the subsequent automatic matching of the verification program corresponding to the verification method of the target controller by the host computer.

[0096] In some embodiments, the above method may further include the following steps:

[0097] Get the control signal value of the test bench input;

[0098] Generate a control message frame based on the target verification program and the control signal value;

[0099] Send the control message frame to the target ECU.

[0100] Specifically, the host computer 102 obtains the control signal value input by the test bench 104, and the control signal value may be a parameter value related to the function of controlling the target ECU 105 (such as a range extender), for example, a start signal value, an engine torque signal value, an engine speed signal value, a generator torque signal value, a generator speed signal value, etc. Then, according to the target verification program corresponding to the target controller and the control signal value, a control message frame is generated, and then the control message frame is sent to the target ECU 105, so as to realize the control of the target ECU 105 by the target controller.

[0101] Figure 4 It is a schematic diagram of the overall flow of a method for automatically matching and verifying a program provided in an embodiment of the present application. Figure 5 It is a flowchart of a method for automatic matching and verification program of an application example of the present application.

[0102] See also Figure 4 and Figure 5After the bench (equipped with multiple different target controllers) is built and the bench test is performed, first, the controller group 103 sends the first message frame of each target controller to the host computer 102; the host computer 102 receives the first message frame of each target controller, and then parses each first message frame to determine the first signal bit and the first check bit (CRC check bit) of the first message frame, as well as the first valid signal segment and the first redundant segment (also referred to as the C segment) in the first signal bit; next, the host computer 102 searches the first check program set that matches the first redundant segment from the first check program library of the server 101 according to the redundant code length of the first redundant segment of the first message frame; the host computer 102 calculates the first check result of each first check program in the first check program set according to the first signal bit of the first message frame; the host computer 102 determines whether the first check result of only one first check program is consistent with the first check bit (CRC check bit); if the first check result of only one first check program is consistent with the first check bit (CRC check bit), the target check program is output. The host computer 102 receives the control signal value sent by the test bench 104, generates a control message frame according to the target verification program and the control signal value, and sends the control message frame to the target ECU 105 to realize the control of the target controller on the target ECU 105. If the first verification result of the first verification program is not the same as the first verification bit (CRC verification bit), the first verification program whose first verification result is consistent with the first verification bit is determined as a candidate verification program to form a second verification program set. The host computer 102 continues to receive the second message frame sent by the controller group 103, and parses the second message frame to determine the second signal bit and the second verification bit of the second message frame, as well as the second valid signal segment and the second redundant segment in the second signal bit, and then substitutes the second signal bit into each candidate verification program in the second verification program set to calculate the second verification result of each candidate verification program; if only one second verification result is consistent with the second verification bit, the target verification program is output, otherwise the third message frame sent by the controller group 103 is continued to be received, and the above steps are repeated until the only target verification program is determined.

[0103] By applying the technical solution of the embodiment of the present application, when building different bench test environments and carrying multiple different controllers, the corresponding target verification program can be automatically matched for each controller, and the engineer does not need to write a specific CRC verification program for the multiple different controllers currently carried by the bench, nor does it need to rewrite the specific CRC verification program every time a certain (some) controllers carried by the current bench are added or replaced. This can greatly reduce the workload of engineers, reduce the handover process of program files, assist in channel matching work in the bench building stage, improve work efficiency, and have low maintenance costs. At the same time, it can effectively reduce the situation of communication abnormalities caused by mismatch between the verification method of the target controller and the verification program.

[0104] All the above optional technical solutions can be arbitrarily combined to form optional embodiments of the present application, which will not be described one by one here.

[0105] The following is an embodiment of the device of the present application, which can be used to execute the embodiment of the method of the present application. For details not disclosed in the embodiment of the device of the present application, please refer to the embodiment of the method of the present application.

[0106] Figure 6 It is a structural diagram of a device for automatically matching and verifying programs provided in an embodiment of the present application.

[0107] like Figure 6 As shown, the device for automatically matching the verification program includes:

[0108] The acquisition module 601 is configured to acquire a message frame set sent by a controller group currently carried by the gantry, wherein the controller group includes at least two different target controllers, and the message frame set includes at least two first message frames, and one first message frame corresponds to one target controller;

[0109] The first determination module 602 is configured to determine, for each first message frame corresponding to the target controller, a first signal bit and a first check bit of the first message frame, wherein the first signal bit includes a first valid signal segment and a first redundant segment;

[0110] A search module 603 is configured to search a first verification program set matching the first redundant segment from a first verification program library, wherein the first verification program set includes at least one first verification program, and the first verification program library includes verification programs corresponding to various controllers for carrying bench tests;

[0111] The second determination module 604 is configured to determine a first verification result corresponding to each first verification procedure based on the first signal bit;

[0112] The screening module 605 is configured to screen out a target verification program that matches the verification mode of the target controller from the first verification program set based on the first verification bit and the first verification result.

[0113] In some embodiments, the first determining module 602 includes:

[0114] A reading unit, configured to read a message parsing file;

[0115] The identification unit is configured to identify and divide fields of the first message frame based on the message parsing file to determine a first signal bit and a first check bit of the first message frame.

[0116] In some embodiments, the above-mentioned search module 603 includes:

[0117] An information acquisition unit, configured to acquire classification mark information corresponding to each verification program in the first verification program library;

[0118] The screening unit is configured to screen out at least one first verification program from the first verification program library based on the classification mark information and the first redundant segment to form a first verification program set.

[0119] In some embodiments, the screening module 605 includes:

[0120] A first determination unit is configured to determine a first verification program in the first verification program set whose first verification result is consistent with the first verification bit as a candidate verification program;

[0121] The second determination unit is configured to determine the candidate verification program as a target verification program matching the verification mode of the target controller if the number of the candidate verification programs is one.

[0122] In some embodiments, the screening module 605 further includes:

[0123] a composition unit configured to, if the number of candidate verification programs is at least two, compose at least two candidate verification programs into a second verification program set;

[0124] A message acquisition unit, configured to acquire a second message frame sent by the target controller;

[0125] A third determining unit is configured to determine a second signal bit and a second check bit of the second message frame, wherein the second signal bit includes a second valid signal segment and a second redundant segment, and the second redundant segment is different from the first redundant segment;

[0126] a fourth determination unit, configured to determine, based on the second signal bit, a second verification result corresponding to each candidate verification program in the second verification program set;

[0127] The first screening unit is configured to screen out a target verification program that matches the verification mode of the target controller from the second verification program set based on the second verification bit and the second verification result.

[0128] In some embodiments, the screening module 605 further includes:

[0129] a refresh unit configured to send a refresh request to the server if the number of candidate verification programs is zero, so that the server refreshes the first verification program library based on the refresh request to obtain a second verification program library;

[0130] A search unit is configured to search a third check program set matching the first redundant segment from the second check program library, wherein the third check program set includes at least one third check program;

[0131] a fifth determining unit, configured to determine a third verification result corresponding to each third verification procedure based on the first signal bit;

[0132] The second screening unit is configured to screen out a target verification program that matches the verification method of the target controller from the third verification program set based on the first verification bit and the third verification result.

[0133] In some embodiments, the above apparatus further comprises:

[0134] A signal acquisition module is configured to acquire a control signal value input by the test bench;

[0135] A message generation module is configured to generate a control message frame based on a target verification procedure and a control signal value;

[0136] The sending module is configured to send the control message frame to the target ECU.

[0137] It should be understood that the size of the serial numbers of the steps in the above embodiments does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0138] Figure 7 Schematic diagram of an electronic device 7 provided in an embodiment of the present application. Figure 7 As shown, the electronic device 7 of this embodiment includes: a processor 701, a memory 702, and a computer program 703 stored in the memory 702 and executable on the processor 701. When the processor 701 executes the computer program 703, the steps in the above-mentioned method embodiments are implemented. Alternatively, when the processor 701 executes the computer program 703, the functions of the modules / units in the above-mentioned device embodiments are implemented.

[0139] The electronic device 7 may be a desktop computer, a notebook, a PDA, a cloud server, or other electronic device. The electronic device 7 may include, but is not limited to, a processor 701 and a memory 702. Those skilled in the art will appreciate that Figure 7 The electronic device 7 is merely an example and does not limit the electronic device 7 , and may include more or less components than those shown in the figure, or different components.

[0140] The processor 701 may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc.

[0141] The memory 702 may be an internal storage unit of the electronic device 7, for example, a hard disk or memory of the electronic device 7. The memory 702 may also be an external storage device of the electronic device 7, for example, a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, a flash card, etc. equipped on the electronic device 7. The memory 702 may also include both an internal storage unit of the electronic device 7 and an external storage device. The memory 702 is used to store computer programs and other programs and data required by the electronic device.

[0142] Those skilled in the art can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional units and modules is used as an example. In actual applications, the above-mentioned functions can be assigned to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiments can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of software functional units.

[0143] If the integrated module / unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium (e.g., a computer-readable storage medium). Based on this understanding, the present application implements all or part of the processes in the above-mentioned embodiment method, and can also be completed by instructing the relevant hardware through a computer program. The computer program can be stored in a computer-readable storage medium, and the computer program can implement the steps of the above-mentioned various method embodiments when executed by the processor. The computer program may include computer program code, which may be in source code form, object code form, executable file or some intermediate form. Computer-readable storage media may include: any entity or device capable of carrying computer program code, recording medium, U disk, mobile hard disk, disk, optical disk, computer memory, read-only memory (ROM), random access memory (RAM), electric carrier signal, telecommunication signal and software distribution medium, etc.

[0144] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A method for automatically matching a verification program, characterized in that: include: Acquire a message frame set sent by a controller group currently carried by the test platform, wherein the controller group includes at least two different target controllers, and the message frame set includes at least two first message frames, and one first message frame corresponds to one target controller; For each first message frame corresponding to the target controller, determine a first signal bit and a first check bit of the first message frame, wherein the first signal bit includes a first valid signal segment and a first redundant segment; Searching a first verification program set matching the first redundant segment from a first verification program library, wherein the first verification program set includes at least one first verification program, and the first verification program library includes verification programs corresponding to various controllers for bench testing; Based on the first signal bit, determining a first verification result corresponding to each of the first verification procedures; Based on the first check bit and the first check result, a target check program matching the check mode of the target controller is selected from the first check program set.

2. The method according to claim 1, characterized in that Determining a first signal bit and a first check bit of the first message frame includes: Read the message parsing file; Based on the message parsing file, the first message frame is identified and field-divided to determine a first signal bit and a first check bit of the first message frame.

3. The method according to claim 1, characterized in that Searching a first verification program set matching the first redundant segment from a first verification program library includes: Obtaining classification label information corresponding to each of the verification programs in the first verification program library; Based on the classification tag information and the first redundant segment, at least one first verification program is selected from the first verification program library to form a first verification program set.

4. The method according to claim 1, characterized in that: Based on the first check bit and the first check result, a target check program matching the check mode of the target controller is selected from the first check program set, including: Determine a first verification program in the first verification program set whose first verification result is consistent with the first verification bit as a candidate verification program; If the number of the candidate verification program is one, the candidate verification program is determined as a target verification program that matches the verification mode of the target controller.

5. The method according to claim 4, characterized in that After determining the first verification program in the first verification program set whose first verification result is consistent with the first verification bit as a candidate verification program, the method further includes: If the number of the candidate verification programs is at least two, forming a second verification program set with at least two of the candidate verification programs; Acquire a second message frame sent by the target controller; Determine a second signal bit and a second check bit of the second message frame, wherein the second signal bit includes a second valid signal segment and a second redundant segment, and the second redundant segment is different from the first redundant segment; Determine, based on the second signal bit, a second verification result corresponding to each of the candidate verification programs in the second verification program set; Based on the second check bit and the second check result, a target check program matching the check mode of the target controller is selected from the second check program set.

6. The method according to claim 4, characterized in that After determining the first verification program in the first verification program set whose first verification result is consistent with the first verification bit as a candidate verification program, the method further includes: If the number of candidate verification programs is zero, sending a refresh request to the server, so that the server refreshes the first verification program library based on the refresh request to obtain a second verification program library; Searching the second verification program library for a third verification program set that matches the first redundant segment, wherein the third verification program set includes at least one third verification program; Determine, based on the first signal bit, a third verification result corresponding to each of the third verification procedures; Based on the first check bit and the third check result, a target check program matching the check mode of the target controller is selected from the third check program set.

7. The method according to claim 1, characterized in that The method further comprises: Get the control signal value of the test bench input; generating a control message frame based on the target verification program and the control signal value; The control message frame is sent to the target ECU.

8. A device for automatically matching and verifying a program, characterized in that: include: An acquisition module is configured to acquire a message frame set sent by a controller group currently carried by the test platform, wherein the controller group includes at least two different target controllers, and the message frame set includes at least two first message frames, and one first message frame corresponds to one target controller; A first determination module is configured to determine, for each first message frame corresponding to the target controller, a first signal bit and a first check bit of the first message frame, wherein the first signal bit includes a first valid signal segment and a first redundant segment; a search module configured to search a first verification program set matching the first redundant segment from a first verification program library, wherein the first verification program set includes at least one first verification program, and the first verification program library includes verification programs corresponding to various controllers for bench testing; A second determination module is configured to determine a first verification result corresponding to each of the first verification procedures based on the first signal bit; The screening module is configured to screen out a target verification program that matches the verification method of the target controller from the first verification program set based on the first verification bit and the first verification result.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 7 are implemented.

10. A readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 7 are implemented.

Images