RRAM control method and system, control terminal and RRAM

Abstract

The invention discloses an RRAM control method and system, a control end and an RRAM, and the RRAM control method comprises the steps: inputting a first control signal and a second control signal to a read-write control end of a storage unit, so as to enable the storage unit to execute a write-in operation according to the first control signal; the first control signal comprises a plurality of write control pulses, the second control signal comprises metastable state elimination pulses corresponding to the write control pulses respectively, and the pulse direction of the metastable state elimination pulses is opposite to that of the corresponding write control pulses. And the read-write control pulse is generated between the corresponding write control pulse and the first read-write control pulse after the write control pulse. In the application, the metastable state elimination pulse can counteract or eliminate the metastable state after the write control pulse is removed, so that the metastable state is prevented from interfering processes such as read verification executed by a subsequent storage unit, and the data retention of the storage unit can be improved, thereby improving the reliability of the storage unit during the subsequent execution of the processes such as read verification.

Description

Technical Field

[0001] The present application relates to the field of RRAM control technology, and in particular to a RRAM control method, system and control terminal, and RRAM. Background Art

[0002] RRAM (resistance variable RAM) includes multiple memory cells, each of which can also be called a cell. Figure 1 The partial structure of RRAM is shown. The memory cell can refer to Figure 1 The structure in the dotted box includes a transistor and a variable resistor. The source of the transistor is connected to SL (source line), and one end of the variable resistor is connected to BL (bit line). Applying a write pulse signal to SL or BL can control the selected storage unit to perform a write operation.

[0003] The inventors have studied the above-mentioned write operation control process and found that the continuous stimulation of several unidirectional square waves (or pulses) can easily cause the storage unit to pass the read verification with more metastable states. Once the stimulation is removed or thermal stress is applied, the metastable state will be quickly released, and the resistance state will change in a very short time, thereby causing RRAM bit errors; the metastable state can include free vacancies and / or trap charges. It can be seen that the above-mentioned storage operation control process is likely to affect the reliability of the storage unit. Summary of the invention

[0004] In view of this, the present application provides a RRAM control method, system, control terminal, and RRAM to solve the technical problem that the traditional RRAM operation control process easily affects the working reliability of the storage unit.

[0005] The present application provides a RRAM control method, comprising the following steps:

[0006] A first control signal and a second control signal are input to the read / write control terminal of the storage unit so that the storage unit performs a write operation according to the first control signal; the first control signal includes a plurality of write control pulses, and the second control signal includes a metastable elimination pulse corresponding to each of the write control pulses, the metastable elimination pulse is opposite to the pulse direction of the corresponding write control pulse, and occurs between the corresponding write control pulse and the first read / write control pulse after the write control pulse.

[0007] Optionally, the RRAM control method further includes:

[0008] S211, obtaining a resistance state parameter of the storage unit; the resistance state parameter is used to determine whether a corresponding write operation is successful;

[0009] S212, determining whether the first count value is greater than a first threshold;

[0010] S213, if the first count value is less than or equal to the first threshold, determining whether the resistance state parameter is greater than or equal to a resistance state upper limit value, or whether the resistance state parameter is less than or equal to a resistance state lower limit value;

[0011] S214, if the resistance state parameter is greater than or equal to the resistance state upper limit value, or the resistance state parameter is less than or equal to the resistance state lower limit value, then it is determined that the corresponding write operation is successful;

[0012] S215, if the resistance state parameter is less than the resistance state upper limit value, and the resistance state parameter is greater than the resistance state lower limit value, return to the step of inputting the first control signal and the second control signal to the read and write control terminal of the storage unit, and perform an addition operation on the first count value.

[0013] Optionally, in step S213, before determining whether the resistance state parameter is greater than or equal to the resistance state upper limit value, or whether the resistance state parameter is less than or equal to the resistance state lower limit value, it also includes: updating the amplitude of the metastable elimination pulse according to a preset rule, so as to use the updated amplitude to determine the metastable elimination pulse in the second control signal.

[0014] Optionally, the preset rules include: RE =V RE *Ratio; where V RE represents the amplitude of the metastable elimination pulse, Ratio represents the scaling ratio, and the symbol * represents multiplication.

[0015] Optionally, after step S212, the RRAM control method further includes:

[0016] S216, if the first count value is greater than the first threshold, determining whether the second count value is greater than a second threshold;

[0017] S217, if the second count value is greater than a second threshold, determining that the corresponding write operation fails;

[0018] S218, if the second count value is less than or equal to the second threshold value, the scaling ratio is updated according to a preset formula to update the scaling ratio in the preset rule, and an addition operation is performed on the second count value, and the second count value is set to a preset initial value; the preset formula is used to gradually reduce the scaling ratio.

[0019] Optionally, the preset formula includes: Ratio=100%-k*M; wherein k represents the proportional update coefficient, and M represents the second count value.

[0020] Optionally, the RRAM control method further includes: inputting a third control signal to the read / write control terminal so that the storage unit performs a read operation according to the third control signal; the third control signal includes read control pulses corresponding to each write control pulse, and each metastable elimination pulse occurs between the corresponding write control pulse and the read control pulse.

[0021] The present application also provides a RRAM control system, including:

[0022] A control module is used to input a first control signal and a second control signal to a read / write control terminal of a storage unit so that the storage unit performs a write operation according to the first control signal; the first control signal includes a plurality of write control pulses, and the second control signal includes a metastable elimination pulse corresponding to each of the write control pulses, the metastable elimination pulse is opposite in pulse direction to the corresponding write control pulse, and occurs between the corresponding write control pulse and the first read / write control pulse after the write control pulse.

[0023] The present application also provides a control end of an RRAM, comprising: a memory and a processor, wherein the memory stores an RRAM control program, and when the RRAM control program is executed by the processor, the steps of any of the above RRAM control methods are implemented.

[0024] The present application also provides an RRAM, which includes a control terminal of any one of the above RRAMs and a plurality of storage units; the control terminal connected to the RRAM is respectively connected to the read and write control terminals of each of the storage units.

[0025] The control method, system, control end, and RRAM of the RRAM of the present application, in the process of controlling the storage unit to perform a write operation, input a first control signal including multiple write control pulses to the read / write control end of the storage unit, and also input a second control signal including multiple metastable elimination pulses to the read / write control end of the storage unit, so that the metastable elimination pulse can offset or eliminate the metastable state after the write control pulse is removed, thereby avoiding the metastable state from interfering with the subsequent read verification and other processes performed by the storage unit, and can improve the data retention of the storage unit, thereby improving the reliability of the storage unit when performing subsequent read verification and other processes.

[0026] Furthermore, the present application can also identify whether the storage cell is written successfully based on the resistance parameters of the storage cell. When it is determined that the storage cell fails to be written, it returns to the step of inputting the first control signal and the second control signal to the read-write control end of the storage cell to control the storage cell to cyclically perform the write operation until it is determined that the write operation is successful or the write operation fails, thereby improving the reliability of the write operation.

[0027] Furthermore, in the process of cyclically controlling the write operation, the present application can also set the second count value to gradually update the scaling ratio, gradually reduce the amplitude of the metastable elimination pulse, reduce the impact of applying the metastable elimination pulse on the resistance parameters of the storage unit, and determine that the corresponding write operation has failed when the second count value M is greater than the second threshold value, and exit the write operation control process in time, which can improve the control efficiency of the write operation. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0029] Figure 1 A schematic diagram of a storage unit according to an embodiment of the present application;

[0030] Figure 2 is a flow chart of a control method for RRAM according to an embodiment of the present application;

[0031] Figure 3a , Figure 3b and Figure 3c is a schematic diagram of relevant control signals according to an embodiment of the present application;

[0032] Figure 4 is a flow chart of a control method of RRAM according to another embodiment of the present application;

[0033] Figure 5 is a flow chart of a control method of RRAM according to another embodiment of the present application;

[0034] Figure 6 is a schematic diagram of the control system structure of an RRAM according to an embodiment of the present application;

[0035] Figure 7a and Figure 7b Schematic diagram of the dielectric charge storage state of a variable resistor in one embodiment of the present application. DETAILED DESCRIPTION

[0036] The technical solutions in the embodiments of the present application are clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application. In the absence of conflict, the following embodiments and their technical features can be combined with each other.

[0037] In a first aspect, the present application provides a control method for an RRAM, and the control method for the RRAM can be executed by a control terminal for controlling the RRAM. Figure 1 As shown, the above RRAM control method includes the following step S110.

[0038] S110, inputting a first control signal and a second control signal to a read / write control terminal of a storage unit, so that the storage unit performs a write operation according to the first control signal.

[0039] Specifically, the read / write control end of the storage unit may include the SL or BL connected to the storage unit, and which end the read / write control end is specifically may be determined according to factors such as the type of data to be written.

[0040] Specifically, the first control signal includes a plurality of write control pulses, for example, Figure 3a As shown, after receiving the above-mentioned first control signal, the selected storage unit can perform a write operation in the high level period of each write control pulse. The second control signal includes a metastable elimination pulse corresponding to each write control pulse, the metastable elimination pulse is opposite to the pulse direction of the corresponding write control pulse (for example, if the write control pulse is a positive pulse, the metastable elimination pulse is a negative pulse or a reverse pulse), and occurs between the corresponding write control pulse and the first read-write control pulse after the write control pulse; wherein the read-write control pulse may include a read control pulse or a write control pulse. If the read-write control pulse includes a read control pulse, such as each pulse in the third control signal used to control the storage unit to perform a read operation, each write control pulse corresponds to a metastable elimination pulse and a read control pulse, and the metastable elimination pulse occurs between the corresponding write control pulse and the read control pulse. For example, if the write control pulse and the read control pulse are both valid at a high level, the metastable elimination pulse occurs between the falling edge of the corresponding write control pulse and the rising edge of the read control pulse. At this time, the overall control signal formed by the superposition of the first control signal, the second control signal and the third control signal can be referred to. Figure 3c shown.

[0041] Optionally, parameters such as the amplitude (also referred to as the amplitude) and duration of the metastable elimination pulse can be determined by factors such as the structure and / or configuration characteristics of the RRAM, or can be determined by means such as pre-testing the RRAM. Optionally, the duration of the metastable elimination pulse can be greater than a certain proportion (e.g., 10% or the like) of the duration of the write control pulse, and less than the duration of the write control pulse. Optionally, the amplitude of the metastable elimination pulse is less than a preset amplitude, so that the metastable elimination pulse is characterized as a weak reverse pulse with a lower amplitude relative to the write control pulse, so as to offset or eliminate the metastable state after the write control pulse is removed. Optionally, the preset amplitude can be determined based on factors such as the structure and / or configuration characteristics of the RRAM; optionally, the preset amplitude can be set to a value such as one-third or one-half of the amplitude of the write control pulse.

[0042] In the control method of the RRAM, in the process of controlling the storage unit to perform a write operation, on the basis of inputting a first control signal including a plurality of write control pulses to the read / write control terminal of the storage unit, a second control signal including a plurality of metastable elimination pulses is also input to the read / write control terminal of the storage unit, so that the metastable elimination pulse can offset or eliminate the metastable state after the write control pulse is removed, thereby avoiding the metastable state from interfering with subsequent read verification processes performed by the storage unit, and improving the data retention of the storage unit, thereby improving the reliability of the storage unit when performing subsequent read verification processes.

[0043] In some embodiments, reference Figure 4 As shown, the above RRAM control method further includes the following steps S211 to S215.

[0044] S211, obtaining the resistance parameter R0 of the storage unit. The resistance parameter R0 may include parameters such as current and / or resistance of the storage unit, and the resistance parameter R0 may be used to determine whether the corresponding write operation is successful. For example, the resistance parameter R0 within a certain range may indicate that the current write of the storage unit is successful, and outside the range may indicate that the current write of the storage unit fails, etc.

[0045] S212, determine whether the first count value N is greater than the first threshold value N jud The initial value of the first count value N may be 0. The first threshold value N jud It can be set according to factors such as writing efficiency; Optionally, the first threshold N jud The value range of the first threshold N can be 90 to 110. jud It can take values ​​like 90, 100 or 110.

[0046] S213: If the first count value N is less than or equal to the first threshold value N, jud, it is determined whether the resistance parameter R0 is greater than or equal to the resistance upper limit HR, or whether the resistance parameter R0 is less than or equal to the resistance lower limit LR. Optionally, the resistance parameter R0 includes the resistance of the corresponding storage unit, and the resistance upper limit HR may range from 30KΩ to 90KΩ, for example, the resistance upper limit HR may be 30KΩ, 50KΩ, 60KΩ or 90KΩ, etc.; the resistance lower limit LR may range from 2KΩ to 10KΩ, for example, the resistance lower limit LR may be 2KΩ, 5KΩ, 8KΩ or 10KΩ, etc.

[0047] S214, if the resistance state parameter R0 is greater than or equal to the resistance state upper limit value HR, or the resistance state parameter R0 is less than or equal to the resistance state lower limit value LR, then it is judged that the corresponding write operation is successful, and other control signals or pulses can be input to the read-write control terminal of the storage unit to control the storage unit to perform other operations.

[0048] S215, if the resistance parameter R0 is less than the resistance upper limit value HR, and the resistance parameter R0 is greater than the resistance lower limit value LR, it indicates that the corresponding write operation has failed, and the process returns to the step of inputting the first control signal and the second control signal to the read / write control terminal of the storage unit (such as step S110) to control the storage unit to re-execute the write operation, and performs an addition operation on the first count value N, that is, N=N+1.

[0049] This embodiment identifies whether the storage cell is written successfully based on the resistance parameter R0 of the storage cell. When it is determined that the storage cell fails to be written, it returns to the step of inputting the first control signal and the second control signal to the read-write control terminal of the storage cell to control the storage cell to re-execute the write operation, which can improve the reliability of the write operation.

[0050] In some examples, in step S213, before determining whether the resistance-state parameter is greater than or equal to the resistance-state upper limit value, or whether the resistance-state parameter is less than or equal to the resistance-state lower limit value, it also includes: updating the amplitude of the metastable elimination pulse according to a preset rule, so as to determine the metastable elimination pulse in the second control signal with the updated amplitude, so as to realize dynamic adjustment of the metastable elimination pulse amplitude, thereby re-inputting the first control signal and the updated second control signal to the read-write control terminal of the storage unit, so that the updated metastable elimination pulse will not cause a large change in the resistance-state parameter of the storage unit on the basis of eliminating the metastable state, and can further improve the stability of the storage unit during operation.

[0051] Optionally, the preset rule may include a rule for controlling the amplitude of the metastable elimination pulse to decrease from an initial amplitude value, so as to reduce the influence of applying the metastable elimination pulse on the resistance parameter of the memory cell by dynamically adjusting the amplitude of the metastable elimination pulse.

[0052] Optionally, the preset rules include: RE =V RE *Ratio; where V RE represents the amplitude of the metastable elimination pulse, V RE The initial value of can be set to one third or one half of the amplitude of the write control pulse, etc.; Ratio represents the scaling ratio; Ratio can be a value less than or equal to 1, and optionally, Ratio can be dynamically changed with an initial value of 1, so that V RE The adjustment process is more flexible; the symbol * indicates multiplication.

[0053] In some examples, reference Figure 5 As shown, after step S212, the RRAM control method further includes:

[0054] S216: If the first count value is greater than the first threshold value, determine whether the second count value M is greater than the second threshold value M. jud The initial value of the second count value M may be 0. The second threshold value M jud It can be set according to factors such as writing efficiency; Optionally, the second threshold M jud It can take values ​​like 4 or 5.

[0055] S217: If the second count value M is greater than the second threshold value M jud , it is determined that the corresponding write operation has failed, and the write operation control process is exited in time to improve the control efficiency of the write operation.

[0056] S218: If the second count value M is less than or equal to the second threshold value M, jud , the scaling ratio Ratio is updated according to a preset formula to update the scaling ratio Ratio in the preset rule, and the second count value M is incremented by one, and the second count value M is set to a preset initial value; the preset formula is used to gradually reduce the scaling ratio. Optionally, the preset initial value can be set to the initial value of the second count value M, such as 0. Optionally, the preset initial value can also be set to -1. When the preset initial value is -1, the initial value of the second count value M can be the initial value of the second count value M after the increment operation is performed.

[0057] Specifically, the preset formula includes: Ratio=100%-k*M; wherein k represents the proportional update coefficient, and the value range of k is 10% to 30%, for example, k can be 10%, 20% or 30%, and M represents the second count value.

[0058] In this example, the second count value M is set to gradually update the scaling ratio Ratio, so as to gradually reduce the amplitude of the metastable elimination pulse, reduce the influence of the application of the metastable elimination pulse on the resistance parameter of the storage unit, and also when the second count value M is greater than the second threshold M jud When the corresponding write operation is determined to have failed, the write operation control process is exited in time, which can improve the control efficiency of the write operation.

[0059] In some embodiments, the RRAM control method further includes: inputting a third control signal to the read / write control terminal so that the storage unit performs a read operation according to the third control signal; the third control signal includes a read control pulse corresponding to each write control pulse, and the reference Figure 3c As shown, each metastable state elimination pulse occurs between the corresponding write control pulse and the read control pulse; the metastable state elimination pulse can offset or eliminate the metastable state after the write control pulse is removed, thereby preventing the metastable state from interfering with the subsequent storage unit in the read verification process during the read control pulse duration period, thereby improving the data retention of the storage unit, thereby improving the reliability of the storage unit.

[0060] In the above RRAM control method, in the process of controlling the storage unit to perform a write operation, on the basis of inputting a first control signal including a plurality of write control pulses to the read / write control terminal of the storage unit, a second control signal including a plurality of metastable elimination pulses is also input to the read / write control terminal of the storage unit, so that the metastable elimination pulse can offset or eliminate the metastable state after the write control pulse is removed, thereby avoiding the metastable state from interfering with subsequent read verification processes performed by the storage unit, and improving the data retention of the storage unit, thereby improving the reliability of the storage unit when performing subsequent read verification processes.

[0061] The control method of the RRAM can also identify whether the storage unit is successfully written based on the resistance state parameter R0 of the storage unit. When it is determined that the storage unit fails to be written, it returns to the step of inputting the first control signal and the second control signal to the read / write control terminal of the storage unit to control the storage unit to cyclically perform the write operation until it is determined that the write operation is successful or the write operation fails, which can improve the reliability of the write operation. In the process of cyclically performing the write operation control, the second count value M can also be set to gradually update the scaling ratio Ratio, gradually reduce the amplitude of the metastable elimination pulse, reduce the influence of applying the metastable elimination pulse on the resistance state parameter of the storage unit, and when the second count value M is greater than the second threshold value M jud When the corresponding write operation is determined to have failed, the write operation control process is exited in time, which can improve the control efficiency of the write operation.

[0062] A second aspect of the present application provides a control system for an RRAM, and the control system for the RRAM can be provided at a control terminal for controlling the RRAM. Figure 6 As shown, the control system of the above RRAM includes:

[0063] The control module 110 is used to input a first control signal and a second control signal to the read / write control terminal of the storage unit so that the storage unit performs a write operation according to the first control signal; the first control signal includes a plurality of write control pulses, and the second control signal includes a metastable elimination pulse corresponding to each of the write control pulses, the metastable elimination pulse is opposite to the pulse direction of the corresponding write control pulse, and occurs between the corresponding write control pulse and the first read / write control pulse after the write control pulse.

[0064] For the specific definition of the control system of RRAM, please refer to the definition of the control method of RRAM above, which will not be repeated here. Each module in the above RRAM control system can be implemented in whole or in part by software, hardware and a combination thereof. The above modules can be embedded in or independent of the computing module in the relevant computer device in the form of hardware, or can be stored in the RRAM in the computer device in the form of software, so that the computing module can call and execute the operations corresponding to the above units.

[0065] According to a third aspect of the present application, a control end of an RRAM is provided. The control end of the RRAM may include: a memory and a processor, wherein a control program of the RRAM is stored on the memory, and when the control program of the RRAM is executed by the processor, the steps of the RRAM control method described in any of the above embodiments are implemented.

[0066] In a fourth aspect, the present application provides an RRAM, wherein the RRAM comprises a control terminal of the RRAM described in any of the above embodiments and a plurality of storage units; the control terminal connected to the RRAM is respectively connected to the read and write control terminals of each of the storage units; wherein the storage units can refer to Figure 1 As shown, each storage unit includes components of a transistor and a variable resistor, and the read-write control terminal may include a BL or SL corresponding to the storage unit.

[0067] Optionally, the memory cell is a MIM structure, wherein the process structure of the variable resistor can refer to Figure 7a and Figure 7b As shown, it includes multiple dielectric layers (eg Figure 7a , 7b BE, TE layer, etc.), a capacitance effect can be formed between dielectric layers. If the write control pulse is a positive pulse and the metastable elimination pulse is a reverse pulse, after a positive pulse is applied to the variable resistor, there is accumulated charge between the dielectric layers. When the positive pulse is removed, the accumulated charge is released to form an unstable metastable state. For example, refer to Figure 7aAt this time, if a reverse pulse is applied to the variable resistor, the unstable metastable state can be eliminated, and a stable state can be formed between the dielectric layers. Figure 7b As shown, the subsequent reading judgment process is made more reliable.

[0068] The above-mentioned RRAM includes the control end of the RRAM described in any of the above-mentioned embodiments. In the control end of the RRAM, a control program of the RRAM is stored in a memory. When the control program of the RRAM is executed by the processor, the steps of the control method of the RRAM described in any of the above-mentioned embodiments are implemented. Therefore, the above-mentioned RRAM has all the beneficial effects of the control method of the RRAM described in any of the above-mentioned embodiments, which will not be repeated here.

[0069] The present application also provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the RRAM control method as described in any of the above embodiments are implemented.

[0070] Although the present application has been shown and described with respect to one or more implementations, equivalent variations and modifications will occur to those skilled in the art based on reading and understanding of this specification and the accompanying drawings. The present application includes all such modifications and variations and is limited only by the scope of the appended claims. In particular, with respect to the various functions performed by the above-mentioned components, the terms used to describe such components are intended to correspond to any component (unless otherwise indicated) that performs the specified function of the component (e.g., it is functionally equivalent), even if it is not structurally equivalent to the disclosed structure that performs the functions in the exemplary implementation of this specification shown herein.

[0071] That is, the above description is only an embodiment of the present application, and does not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the specification and drawings of the present application, such as the mutual combination of technical features between the embodiments, or direct or indirect application in other related technical fields, are also included in the patent protection scope of the present application.

[0072] In addition, in the description of the present application, it should be understood that the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more features. In the description of the present application, "plurality" means two or more, unless otherwise clearly and specifically defined.

[0073] In this application, the word "exemplary" is used to mean "used as an example, illustration or description". Any embodiment described as "exemplary" in this application is not necessarily to be construed as being more preferred or more advantageous than other embodiments. In order to enable any technician in the field to implement and use the present application, the present application provides the above description. In the above description, various details are listed for the purpose of explanation. It should be understood that a person of ordinary skill in the art can recognize that the present application can be implemented without using these specific details. In other embodiments, well-known structures and processes will not be elaborated in detail to avoid unnecessary details that make the description of the present application obscure. Therefore, the present application is not intended to be limited to the embodiments shown, but is consistent with the widest range of principles and features disclosed in the present application.

Claims

1. A method for controlling a RRAM, characterized in that: The RRAM control method comprises: A first control signal and a second control signal are input to the read / write control terminal of the storage unit so that the storage unit performs a write operation according to the first control signal; the first control signal includes a plurality of write control pulses, and the second control signal includes a metastable elimination pulse corresponding to each of the write control pulses, the metastable elimination pulse is opposite to the pulse direction of the corresponding write control pulse, and occurs between the corresponding write control pulse and the first read / write control pulse after the write control pulse.

2. The RRAM control method according to claim 1, characterized in that: The RRAM control method further includes: S211, obtaining a resistance state parameter of the storage unit; the resistance state parameter is used to determine whether a corresponding write operation is successful; S212, determining whether the first count value is greater than a first threshold; S213, if the first count value is less than or equal to the first threshold, determining whether the resistance state parameter is greater than or equal to a resistance state upper limit value, or whether the resistance state parameter is less than or equal to a resistance state lower limit value; S214, if the resistance state parameter is greater than or equal to the resistance state upper limit value, or the resistance state parameter is less than or equal to the resistance state lower limit value, then it is determined that the corresponding write operation is successful; S215, if the resistance state parameter is less than the resistance state upper limit value, and the resistance state parameter is greater than the resistance state lower limit value, return to the step of inputting the first control signal and the second control signal to the read and write control terminal of the storage unit, and perform an addition operation on the first count value.

3. The RRAM control method according to claim 2, characterized in that: In step S213, before determining whether the resistance state parameter is greater than or equal to the resistance state upper limit value, or whether the resistance state parameter is less than or equal to the resistance state lower limit value, the method further includes: The amplitude of the metastable elimination pulse is updated according to a preset rule, so as to determine the metastable elimination pulse in the second control signal by using the updated amplitude.

4. The RRAM control method according to claim 3, characterized in that: The preset rules include: V RE =V RE *Ratio; Where V RE represents the amplitude of the metastable elimination pulse, Ratio represents the scaling ratio, and the symbol * represents multiplication.

5. The RRAM control method according to claim 4, characterized in that: After step S212, the RRAM control method further includes: S216, if the first count value is greater than the first threshold, determining whether the second count value is greater than a second threshold; S217, if the second count value is greater than a second threshold, determining that the corresponding write operation fails; S218, if the second count value is less than or equal to the second threshold value, the scaling ratio is updated according to a preset formula to update the scaling ratio in the preset rule, and an addition operation is performed on the second count value, and the second count value is set to a preset initial value; the preset formula is used to gradually reduce the scaling ratio.

6. The RRAM control method according to claim 5, characterized in that: The preset formula includes: Ratio = 100% - k*M; Wherein, k represents the proportional update coefficient, and M represents the second count value.

7. The RRAM control method according to claim 1, characterized in that: The RRAM control method further includes: A third control signal is input to the read / write control terminal so that the storage unit performs a read operation according to the third control signal; the third control signal includes read control pulses corresponding to each write control pulse, and each metastable elimination pulse occurs between the corresponding write control pulse and the read control pulse.

8. A control system of RRAM, characterized in that: include: A control module, used for inputting a first control signal and a second control signal to a read / write control terminal of a storage unit, so that the storage unit performs a write operation according to the first control signal; The first control signal includes multiple write control pulses, and the second control signal includes metastable elimination pulses corresponding to each of the write control pulses. The metastable elimination pulse has a pulse direction opposite to the corresponding write control pulse and occurs between the corresponding write control pulse and the first read / write control pulse after the write control pulse.

9. A control terminal of a RRAM, characterized in that: The control end of the RRAM may include: a memory and a processor, wherein the memory stores a control program of the RRAM, and when the control program of the RRAM is executed by the processor, the steps of the RRAM control method according to any one of claims 1 to 7 are implemented.

10. A RRAM, characterized in that: The RRAM comprises the control terminal of the RRAM as claimed in claim 9 and a plurality of storage units; the control terminal connected to the RRAM is respectively connected to the read / write control terminals of each of the storage units.

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