Signal synchronization method and device based on phase shift keying and spectrum analyzer
By performing two-time frequency deviation estimation and compensation of the synchronization signal, the problem of poor signal synchronization effect in the prior art is solved, the reliability of frequency deviation estimation is improved, and a more efficient signal synchronization effect is achieved.
Patent Information
- Application Number
- CN202411716475.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-27
- Publication Date
- 2025-02-28
- Estimated Expiration
- 2044-11-27
AI Technical Summary
In the prior art, signal synchronization effect is poor, and the reliability of frequency deviation estimation and compensation is low.
The signal synchronization method based on phase shift keying is adopted to gradually improve the reliability of frequency deviation estimation by performing two frequency deviation estimation times by estimating and compensating the synchronized signal. The specific steps include estimating and compensating the first frequency deviation of the synchronization signal to be synchronized, and then estimating and compensating the second frequency deviation of the first frequency deviation compensation signal, and finally outputting the target synchronization signal.
Through two frequency deviation estimation and compensation, the reliability of frequency deviation estimation is improved, thereby improving the effect of signal synchronization and ensuring the reliability of the target synchronization signal.
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Figure CN119544174A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of signal synchronization, and in particular to a signal synchronization method, device and spectrum analyzer based on phase shift keying. Background Art
[0002] Phase shift keying (PSK) is a commonly used digital modulation method in coherent systems. It is suitable for medium and high speed data transmission and is widely used in the fields of communication and radar. Common modes of PSK include BPSK, QPSK, 8PSK, and the above-mentioned variant modes DBPSK, DQPSK, D8PSK, etc. In practice, the receiver needs to mix the received signal with the locally generated carrier signal and convert the passband signal into a baseband signal. In digital communication systems, the local oscillator at the receiving end and the carrier signal at the transmitting end cannot be completely consistent, and the frequency deviation changes in link transmission will cause the frequency deviation phenomenon of the receiving end signal. The frequency deviation phenomenon of the receiving end signal directly affects the final demodulation performance of the receiver. Therefore, the carrier synchronization algorithm for estimating and compensating the frequency deviation is a direction worthy of key research. However, the inventors have found that in the prior art, there is a relatively low reliability of frequency deviation estimation and compensation, which makes the synchronization effect of the signal relatively poor. Summary of the invention
[0003] In view of this, the purpose of the present application is to provide a signal synchronization method, device and spectrum analyzer based on phase shift keying, so as to improve the problem of poor signal synchronization effect existing in the prior art.
[0004] To achieve the above objectives, this application adopts the following technical solutions:
[0005] A signal synchronization method based on phase shift keying, comprising:
[0006] Performing a first frequency offset estimation on the signal to be synchronized to obtain a first frequency offset corresponding to the signal to be synchronized, and performing frequency offset compensation on the signal to be synchronized based on the first frequency offset to obtain a first frequency offset compensation signal corresponding to the signal to be synchronized, wherein the first frequency offset is used to reflect the frequency offset of the signal to be synchronized;
[0007] Performing a second frequency offset estimation on the first frequency offset compensation signal to obtain a second frequency offset corresponding to the signal to be synchronized, and performing frequency offset compensation on the signal to be synchronized based on the second frequency offset to obtain a second frequency offset compensation signal corresponding to the signal to be synchronized, wherein the second frequency offset is used to reflect the frequency offset of the signal to be synchronized;
[0008] A synchronization signal is output based on the second frequency offset compensation signal to obtain a target synchronization signal corresponding to the signal to be synchronized.
[0009] In a preferred embodiment of the present application, in the above-mentioned signal synchronization method based on phase shift keying, the step of estimating a first frequency offset of the signal to be synchronized, obtaining a first frequency offset corresponding to the signal to be synchronized, and performing frequency offset compensation on the signal to be synchronized based on the first frequency offset to obtain a first frequency offset compensation signal corresponding to the signal to be synchronized includes:
[0010] Extracting the best sampling point of the extracted initial signal, outputting the signal to be synchronized corresponding to the initial signal, performing signal exponentiation calculation on the signal to be synchronized, and outputting the exponentiation signal to be synchronized corresponding to the sampled signal to be synchronized;
[0011] Performing Fourier transform on the power signal to be synchronized, outputting a spectrum signal to be synchronized corresponding to the power signal to be synchronized, performing power analysis processing on the spectrum signal to be synchronized, and outputting a first frequency deviation corresponding to the spectrum signal to be synchronized;
[0012] Frequency offset compensation is performed on the power signal to be synchronized based on the first frequency offset to obtain a first frequency offset compensation signal corresponding to the signal to be synchronized.
[0013] In a preferred embodiment of the present application, in the above-mentioned signal synchronization method based on phase shift keying, the step of performing Fourier transform on the exponential signal to be synchronized, outputting the spectrum signal to be synchronized corresponding to the exponential signal to be synchronized, performing power analysis processing on the spectrum signal to be synchronized, and outputting the first frequency deviation corresponding to the spectrum signal to be synchronized includes:
[0014] Performing Fourier transform on the power signal to be synchronized, and outputting a frequency spectrum signal to be synchronized corresponding to the power signal to be synchronized;
[0015] Performing power signal determination on the spectrum signal to be synchronized, outputting a power signal to be synchronized corresponding to the spectrum signal to be synchronized, and determining an index value corresponding to a power with a maximum value in the power signal to be synchronized to obtain a target index value;
[0016] Based on the target index value and the index value with the maximum value in the sampled signal to be synchronized, the first frequency deviation corresponding to the spectrum signal to be synchronized is determined, wherein the first frequency deviation and the target index value have a positive correlation, and the first frequency deviation and the index value with the maximum value have a negative correlation.
[0017] In a preferred embodiment of the present application, in the above-mentioned signal synchronization method based on phase shift keying, the step of performing frequency offset compensation on the exponentiation signal to be synchronized based on the first frequency offset to obtain a first frequency offset compensation signal corresponding to the signal to be synchronized includes:
[0018] Determining a first frequency offset compensation rule;
[0019] Performing frequency offset compensation on the to-be-synchronized power signal based on the first frequency offset compensation rule and the first frequency offset to obtain a first frequency offset compensation signal corresponding to the to-be-synchronized signal;
[0020] The first frequency offset compensation rule includes:
[0021] x 23 (k) = x2(k)*exp(-j*2π*f o1 *k);
[0022] x 23 (k) is the first frequency offset compensation signal, x2(k) is the exponentiation signal to be synchronized, f o1 is the first frequency offset, and k is the symbol index.
[0023] In a preferred selection of the present application, in the above-mentioned signal synchronization method based on phase shift keying, the step of performing a second frequency offset estimation on the first frequency offset compensation signal to obtain a second frequency offset corresponding to the signal to be synchronized, and performing frequency offset compensation on the signal to be synchronized based on the second frequency offset to obtain a second frequency offset compensation signal corresponding to the signal to be synchronized includes:
[0024] Performing power calculation on the first frequency offset compensation signal to obtain a first power value;
[0025] Based on the first power value, estimating a second frequency offset of the signal to be synchronized to obtain a second frequency offset corresponding to the signal to be synchronized;
[0026] Frequency offset compensation is performed on the signal to be synchronized based on the second frequency offset to obtain a second frequency offset compensation signal corresponding to the signal to be synchronized.
[0027] In a preferred embodiment of the present application, in the above-mentioned signal synchronization method based on phase shift keying, the step of estimating the second frequency offset of the signal to be synchronized based on the first power value to obtain the second frequency offset corresponding to the signal to be synchronized includes:
[0028] Determine the current iteration offset value;
[0029] Based on the current iterative offset value, respectively perform different offset processing on the current first frequency offset to form a current first intermediate frequency offset and a current second intermediate frequency offset;
[0030] Based on the current first intermediate frequency offset and the current second intermediate frequency offset, respectively, frequency offset compensation is performed on the signal to be synchronized to obtain a current first intermediate frequency offset compensation signal and a current second intermediate frequency offset compensation signal, wherein the manner of performing frequency offset compensation on the signal to be synchronized is the same as the manner of performing frequency offset compensation on the signal to be synchronized based on the first frequency offset;
[0031] Performing power calculation on the first intermediate frequency offset compensation signal and the second intermediate frequency offset compensation signal respectively to obtain corresponding first intermediate power value and second intermediate power value;
[0032] Based on the current first power value, the current first intermediate power value, and the current second intermediate power value, updating the current first frequency offset to form an updated first frequency offset;
[0033] Determine whether the current iteration offset value meets the predetermined target condition;
[0034] When the current iterative offset value meets the target condition, determining a second frequency offset corresponding to the signal to be synchronized based on the updated first frequency offset;
[0035] When the current iteration offset value does not meet the target condition, the current iteration offset value is updated to form an updated iteration offset value;
[0036] Based on the updated iterative offset value, the step of performing different offset processing on the current first frequency offset based on the current iterative offset value to form the current first intermediate frequency offset and the current second intermediate frequency offset is executed again until the current iterative offset value meets the target condition.
[0037] In a preferred embodiment of the present application, in the above-mentioned signal synchronization method based on phase shift keying, the step of updating the current first frequency deviation based on the current first power value, the current first intermediate power value and the current second intermediate power value to form an updated first frequency deviation includes:
[0038] Compare the current first power value, the current first intermediate power value, and the current second intermediate power value to determine the maximum power value;
[0039] Based on the frequency deviation corresponding to the maximum power value, the current first frequency deviation is updated to form an updated first frequency deviation, wherein when the maximum power value is the current first power value, the updated first frequency deviation is the current first frequency deviation, when the maximum power value is the current first intermediate power value, the updated first frequency deviation is the current first intermediate frequency deviation, and when the maximum power value is the current second intermediate power value, the updated first frequency deviation is the current second intermediate frequency deviation.
[0040] In a preferred embodiment of the present application, in the above-mentioned signal synchronization method based on phase shift keying, the step of determining whether the current iteration offset value meets a predetermined target condition includes:
[0041] Determine the magnitude relationship between the current iterative offset value and a predetermined reference threshold;
[0042] When the current iteration offset value is less than the reference threshold, determining that the current iteration offset value satisfies the target condition, and when the current iteration offset value is not less than the reference threshold, determining that the current iteration offset value does not satisfy the target condition;
[0043] In which, the initial value of the iteration offset value is determined based on the number of symbol indexes of the signal to be synchronized, the reference threshold is negatively correlated with the number of symbol indexes of the signal to be synchronized, and after each update of the current iteration offset value, the updated iteration offset value is smaller than the current iteration offset value.
[0044] The present application also provides a signal synchronization device based on phase shift keying, comprising:
[0045] A first frequency offset compensation module, configured to perform a first frequency offset estimation on a signal to be synchronized, obtain a first frequency offset corresponding to the signal to be synchronized, and perform frequency offset compensation on the signal to be synchronized based on the first frequency offset, to obtain a first frequency offset compensation signal corresponding to the signal to be synchronized, wherein the first frequency offset is used to reflect the frequency offset of the signal to be synchronized;
[0046] A second frequency offset compensation module, used to perform a second frequency offset estimation on the first frequency offset compensation signal to obtain a second frequency offset corresponding to the signal to be synchronized, and perform frequency offset compensation on the signal to be synchronized based on the second frequency offset to obtain a second frequency offset compensation signal corresponding to the signal to be synchronized, wherein the second frequency offset is used to reflect the frequency offset of the signal to be synchronized;
[0047] A synchronization signal output module is used to output a synchronization signal based on the second frequency offset compensation signal to obtain a target synchronization signal corresponding to the signal to be synchronized.
[0048] On the basis of the above, the present application also provides a spectrum analyzer, including:
[0049] Memory for storing computer programs;
[0050] The processor connected to the memory is used to execute the computer program stored in the memory to implement the above-mentioned signal synchronization method based on phase shift keying.
[0051] The signal synchronization method, device and spectrum analyzer based on phase shift keying provided by the present application firstly estimate the first frequency offset of the signal to be synchronized to obtain the first frequency offset corresponding to the signal to be synchronized, and compensate the frequency offset of the signal to be synchronized based on the first frequency offset to obtain the first frequency offset compensation signal corresponding to the signal to be synchronized; secondly, estimate the second frequency offset of the first frequency offset compensation signal to obtain the second frequency offset corresponding to the signal to be synchronized, and compensate the frequency offset of the signal to be synchronized based on the second frequency offset to obtain the second frequency offset compensation signal corresponding to the signal to be synchronized; then, output the synchronization signal based on the second frequency offset compensation signal to obtain the target synchronization signal corresponding to the signal to be synchronized. Based on the above content, since the frequency offset estimation is performed twice, the reliability of the obtained frequency offset is higher, so that the reliability of the frequency offset compensation based on the obtained frequency offset can also be higher, that is, the basis for outputting the synchronization signal (the second frequency offset compensation signal) is guaranteed to have a higher reliability, so that the reliability of the formed target synchronization signal is higher, thereby improving the problem of poor signal synchronization effect existing in the prior art. BRIEF DESCRIPTION OF THE DRAWINGS
[0052] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, preferred embodiments are specifically cited below and described in detail with reference to the attached drawings.
[0053] Figure 1 This is a structural block diagram of a spectrum analyzer provided in an embodiment of the present application.
[0054] Figure 2 A flow chart of a signal synchronization method based on phase shift keying provided in an embodiment of the present application.
[0055] Figure 3 A schematic diagram of a flow chart for calculating phase detection error provided in an embodiment of the present application.
[0056] Figure 4 A schematic diagram of a process for estimating phase deviation provided in an embodiment of the present application.
[0057] Figure 5 A block diagram of a phase-shift keying-based signal synchronization device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0058] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various different configurations.
[0059] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for which protection is sought, but merely represents selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.
[0060] like Figure 1 As shown, an embodiment of the present application provides a spectrum analyzer, wherein the spectrum analyzer may include a memory, a processor, and a signal synchronization device based on phase shift keying.
[0061] In detail, the memory and the processor are electrically connected directly or indirectly to realize data transmission or interaction. For example, the memory and the processor can be electrically connected through one or more communication buses or signal lines. The signal synchronization device based on phase shift keying includes at least one software function module stored in the memory in the form of software or firmware. The processor is used to execute an executable computer program stored in the memory, for example, the software function module and computer program included in the signal synchronization device based on phase shift keying, so as to realize the signal synchronization method based on phase shift keying provided in the embodiment of the present application.
[0062] Optionally, the memory may be, but not limited to, a random access memory (RAM), a read only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), etc. Furthermore, the processor may be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), a system on chip (SoC), etc.; it may also be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components.
[0063] Understandably, Figure 1 The structure shown is for illustration only. The spectrum analyzer may also include Figure 1More or fewer components as shown, or with Figure 1 The different configurations shown, for example, may also include a communication unit for exchanging information with other devices.
[0064] Combination Figure 2 The embodiment of the present application also provides a phase shift keying based signal synchronization method applicable to the above spectrum analyzer. The method steps defined in the process related to the phase shift keying based signal synchronization method can be implemented by the spectrum analyzer.
[0065] The following will Figure 2 The specific process shown is explained in detail.
[0066] Step S110: perform a first frequency offset estimation on the signal to be synchronized to obtain a first frequency offset corresponding to the signal to be synchronized, and perform frequency offset compensation on the signal to be synchronized based on the first frequency offset to obtain a first frequency offset compensation signal corresponding to the signal to be synchronized.
[0067] In an embodiment of the present application, the spectrum analyzer can perform a first frequency offset estimation on the signal to be synchronized, obtain a first frequency offset corresponding to the signal to be synchronized, and perform frequency offset compensation on the signal to be synchronized based on the first frequency offset, to obtain a first frequency offset compensation signal corresponding to the signal to be synchronized. The first frequency offset is used to reflect the frequency offset of the signal to be synchronized.
[0068] Step S120: perform a second frequency offset estimation on the first frequency offset compensation signal to obtain a second frequency offset corresponding to the signal to be synchronized, and perform frequency offset compensation on the signal to be synchronized based on the second frequency offset to obtain a second frequency offset compensation signal corresponding to the signal to be synchronized.
[0069] In an embodiment of the present application, after obtaining the first frequency offset compensation signal, the spectrum analyzer may perform a second frequency offset estimation on the first frequency offset compensation signal to obtain a second frequency offset corresponding to the signal to be synchronized, and perform frequency offset compensation on the signal to be synchronized based on the second frequency offset to obtain a second frequency offset compensation signal corresponding to the signal to be synchronized. The second frequency offset is used to reflect the frequency offset of the signal to be synchronized.
[0070] Step S130: output a synchronization signal based on the second frequency offset compensation signal to obtain a target synchronization signal corresponding to the signal to be synchronized.
[0071] In the embodiment of the present application, after obtaining the second frequency offset compensation signal, the spectrum analyzer may output a synchronization signal based on the second frequency offset compensation signal to obtain a target synchronization signal corresponding to the signal to be synchronized.
[0072] Based on the above content, since two frequency offset estimates are performed, the reliability of the obtained frequency offset is higher, and thus the reliability of the frequency offset compensation based on the obtained frequency offset can also be higher, that is, the basis for outputting the synchronization signal (the second frequency offset compensation signal) is guaranteed to have a higher reliability, so that the reliability of the formed target synchronization signal is higher, thereby improving the problem of poor signal synchronization effect existing in the prior art.
[0073] In the first aspect, it should be noted that for step S110, the specific method of performing the first frequency offset estimation and frequency offset compensation on the synchronization signal is not limited and can be selected according to actual needs.
[0074] For example, in an alternative implementation, in order to improve the reliability of the first frequency offset estimation and frequency offset compensation so that the reliability of the obtained first frequency offset compensation signal is better, the above-mentioned step S110 may further include the following steps S111, S112 and S113, and the specific contents of each step are described as follows.
[0075] Step S111, extracting the best sampling point of the extracted initial signal, outputting the signal to be synchronized corresponding to the initial signal, performing signal power calculation on the signal to be synchronized, and outputting the power signal to be synchronized corresponding to the sampled signal to be synchronized.
[0076] In an embodiment of the present application, the optimal sampling point extraction can be performed on the extracted initial signal, and the signal to be synchronized corresponding to the initial signal is output, and the signal to be synchronized is squared, and the signal to be synchronized corresponding to the sampled signal to be synchronized is output. Exemplarily, the signal to be synchronized can be calculated to the Mth power to obtain the corresponding signal to be synchronized, where M refers to the number of constellations of the signal, for example, for BPSK signal, the corresponding M=2, for QPSK signal, the corresponding M=4, for 8PSK signal, the corresponding M=8. In addition, the extracted initial signal can also be first processed by matched filtering, clock synchronization, etc., and then the optimal sampling point extraction can be performed. For example, the input actual baseband signal s1(n) can be first matched filtered to obtain the filtered signal s2(n), where n is the index of the sampling point, n=1,…,KI, K is the number of symbols, and I is the sampling multiple. The timing error τ is calculated for the signal s2(n) using the Gardner timing synchronization algorithm. Perform Fourier transform on signal s2(n), then compensate for the timing error τ in the frequency domain, and finally perform inverse Fourier transform to obtain the clock-synchronized signal s3(n). Extract the best sampling point from signal s3(n) to obtain signal x1(k), i.e. the signal to be synchronized, where k is the symbol index, k=1,…,K. In this way, perform signal power calculation to obtain x2(k)=[x1(k)] M .
[0077] Step S112, performing Fourier transform on the power signal to be synchronized, outputting a spectrum signal to be synchronized corresponding to the power signal to be synchronized, performing power analysis processing on the spectrum signal to be synchronized, and outputting a first frequency offset corresponding to the spectrum signal to be synchronized.
[0078] In an embodiment of the present application, after obtaining the power signal to be synchronized, Fourier transform can be performed on the power signal to be synchronized, and a spectrum signal to be synchronized corresponding to the power signal to be synchronized can be output, and power analysis processing can be performed on the spectrum signal to be synchronized to output a first frequency deviation corresponding to the spectrum signal to be synchronized.
[0079] Step S113: Perform frequency offset compensation on the power signal to be synchronized based on the first frequency offset to obtain a first frequency offset compensation signal corresponding to the signal to be synchronized.
[0080] In the embodiment of the present application, after obtaining the first frequency offset, the power signal to be synchronized may be frequency offset compensated based on the first frequency offset to obtain a first frequency offset compensation signal corresponding to the signal to be synchronized. It is understandable that the first frequency offset may be a roughly estimated frequency offset.
[0081] It can be understood that, in the above step S112, the specific method of determining the first frequency offset is not limited and can be selected according to actual needs. For example, in an alternative implementation, in order to improve the reliability of the determined first frequency offset, the above step S112 may include:
[0082] First, the exponentiation signal to be synchronized may be subjected to Fourier transform (the specific processing process may refer to the relevant prior art), and a spectrum signal to be synchronized corresponding to the exponentiation signal to be synchronized may be output;
[0083] Secondly, the power signal of the spectrum signal to be synchronized can be determined, and the power signal to be synchronized corresponding to the spectrum signal to be synchronized can be output, and the index value corresponding to the power with the maximum value can be determined in the power signal to be synchronized to obtain the target index value; illustratively, the spectrum signal x can be calculated first 21 (k), that is, the power signal x of the spectrum signal to be synchronized 22 (k), that is, x 22 (k) = [abs(x 21 (k))] 2 ; Then, search for signal x 22 (k) The index of the maximum power value maxIdx;
[0084] Then, based on the target index value and the index value with the maximum value in the to-be-synchronized sampled signal, a first frequency offset corresponding to the to-be-synchronized spectrum signal is determined, wherein the first frequency offset has a positive correlation with the target index value, and the first frequency offset has a negative correlation with the index value with the maximum value; exemplarily, f o1 =maxIdx / K, where K is the index value with the maximum value.
[0085] It can be understood that, in the above step S113, the specific manner of performing frequency offset compensation on the to-be-synchronized power signal based on the first frequency offset is not limited and can be selected according to actual needs. For example, in an alternative implementation, in order to ensure the reliability of the first frequency offset compensation signal obtained by performing frequency offset compensation, the above step S113 may include:
[0086] First, a first frequency offset compensation rule can be determined;
[0087] Secondly, frequency offset compensation may be performed on the to-be-synchronized power signal based on the first frequency offset compensation rule and the first frequency offset to obtain a first frequency offset compensation signal corresponding to the to-be-synchronized signal;
[0088] The first frequency offset compensation rule includes:
[0089] x 23 (k) = x2(k)*exp(-j*2π*f o1 *k);
[0090] Among them, x 23 (k) is the first frequency offset compensation signal, x2(k) is the exponentiation signal to be synchronized, f o1 is the first frequency deviation, k is the symbol index, j represents the imaginary unit, and exp() represents the exponential operation, specifically refers to the operation related to the natural logarithm base e.
[0091] On the second aspect, it should be noted that for step S120, the specific method of performing the second frequency offset estimation and frequency offset compensation is not limited and can be selected according to actual needs.
[0092] For example, in an alternative implementation, in order to ensure higher reliability of the second frequency offset estimation and frequency offset compensation, thereby obtaining a reliable second frequency offset compensation signal, the above-mentioned step S120 may further include step S121, step S122 and step S123, and the contents of each step are as follows.
[0093] Step S121: performing power calculation on the first frequency offset compensation signal to obtain a first power value.
[0094] In the embodiment of the present application, after obtaining the first frequency offset compensation signal, power calculation may be performed on the first frequency offset compensation signal to obtain a first power value. Exemplarily, the power calculation rule may be: p1 = [abs(sum(x 23 (k))] 2 . Among them, p1 is the first power value, x 23 (k) is the first frequency offset compensation signal, and abs() is the absolute value calculation.
[0095] Step S122: Based on the first power value, estimate the second frequency offset of the signal to be synchronized to obtain a second frequency offset corresponding to the signal to be synchronized.
[0096] In an embodiment of the present application, a second frequency offset estimation may be performed on the signal to be synchronized based on the first power value to obtain a second frequency offset corresponding to the signal to be synchronized, that is, the method for estimating the second frequency offset may be different from the method for estimating the first frequency offset.
[0097] Step S123: Perform frequency offset compensation on the signal to be synchronized based on the second frequency offset to obtain a second frequency offset compensation signal corresponding to the signal to be synchronized.
[0098] In the embodiment of the present application, after obtaining the second frequency offset, the signal to be synchronized may be subjected to frequency offset compensation based on the second frequency offset to obtain a second frequency offset compensation signal corresponding to the signal to be synchronized. Exemplarily, the frequency offset compensation rule may be, x3(k)=x1(k)*exp(-j*2π*f o *k), where x3(k) is the second frequency offset compensation signal, f o is the second frequency deviation.
[0099] It can be understood that, in the above-mentioned step S122, the specific method of estimating the second frequency offset of the signal to be synchronized based on the first power value is not limited and can be selected according to actual needs. For example, in an alternative implementation, in order to ensure the reliability of the obtained second frequency offset, the above-mentioned step S122 can further include step S122a, step S122b, step S122c, step S122d, step S122e, step S122f, step S122g, step S122h and step S122i, and the specific content of each step is as follows.
[0100] Step S122a, determining the current iteration offset value.
[0101] In the embodiment of the present application, since the process of determining the second frequency offset is a continuously iterative process, a current iterative offset value can be determined for each iterative stage.
[0102] Step S122b: Based on the current iterative offset value, different offset processing is performed on the current first frequency offset to form a current first intermediate frequency offset and a current second intermediate frequency offset.
[0103] In the embodiment of the present application, after determining the current iteration offset value, different offset processing can be performed on the current first frequency offset based on the current iteration offset value to form the current first intermediate frequency offset and the current second intermediate frequency offset. o2 =f o1 -step and f o3 =f o1 +step, where step is the current iteration offset value, f o1 is the current first frequency deviation, f o2 is the current first intermediate frequency deviation, f o3 is the current second intermediate frequency deviation.
[0104] Step S122c: performing frequency offset compensation on the signal to be synchronized based on the current first intermediate frequency offset and the current second intermediate frequency offset, respectively, to obtain a current first intermediate frequency offset compensation signal and a current second intermediate frequency offset compensation signal.
[0105] In an embodiment of the present application, after determining the current first intermediate frequency offset and the current second intermediate frequency offset, the signal to be synchronized can be frequency offset compensated based on the current first intermediate frequency offset and the current second intermediate frequency offset, respectively, to obtain the current first intermediate frequency offset compensation signal and the current second intermediate frequency offset compensation signal. The method of frequency offset compensation for the signal to be synchronized is the same as the method of frequency offset compensation for the signal to be synchronized based on the first frequency offset. For example, the current first intermediate frequency offset compensation signal can be x2(k)*exp(-j*2π*f o2 *k), the current second intermediate frequency offset compensation signal can be x2(k)*exp(-j*2π*f o3 *k).
[0106] Step S122d: performing power calculation on the first intermediate frequency offset compensation signal and the second intermediate frequency offset compensation signal respectively to obtain corresponding first intermediate power value and second intermediate power value.
[0107] In an embodiment of the present application, after obtaining the current first intermediate frequency offset compensation signal and the current second intermediate frequency offset compensation signal, power calculation can be performed on the first intermediate frequency offset compensation signal and the second intermediate frequency offset compensation signal respectively to obtain corresponding first intermediate power values and second intermediate power values. The specific calculation method can refer to the calculation method of the first power value mentioned above.
[0108] Step S122e: Based on the current first power value, the current first intermediate power value and the current second intermediate power value, the current first frequency offset is updated to form an updated first frequency offset.
[0109] In an embodiment of the present application, after obtaining the current first intermediate power value and the current second intermediate power value, the current first frequency deviation can be updated based on the current first power value, the current first intermediate power value and the current second intermediate power value to form an updated first frequency deviation.
[0110] Step S122f, determining whether the current iterative offset value meets a predetermined target condition.
[0111] In the embodiment of the present application, after the updated first frequency offset is formed, it can be determined whether the current iterative offset value meets a predetermined target condition, that is, whether it is necessary to continue the iterative calculation.
[0112] Step S122g: When the current iterative offset value meets the target condition, a second frequency offset corresponding to the signal to be synchronized is determined based on the updated first frequency offset.
[0113] In the embodiment of the present application, when the current iterative offset value meets the target condition, the second frequency offset corresponding to the signal to be synchronized is determined based on the updated first frequency offset, that is, when it is not necessary to continue the iterative calculation, the second frequency offset corresponding to the signal to be synchronized can be determined based on the updated first frequency offset, for example, f o =f o1 / M, where f o is the second frequency deviation, f o1 is the first frequency offset after update, and M is the number of constellations.
[0114] Step S122h: When the current iteration offset value does not meet the target condition, the current iteration offset value is updated to form an updated iteration offset value.
[0115] In an embodiment of the present application, when the current iteration offset value does not meet the target condition, the current iteration offset value is updated to form an updated iteration offset value, that is, when it is necessary to continue the iterative calculation, the current iteration offset value can be updated, for example, step = step / 2, that is, the updated iteration offset value is half of the current iteration offset value.
[0116] Step S122i, based on the updated iterative offset value, returns to execute the step of performing different offset processing on the current first frequency offset based on the current iterative offset value to form the current first intermediate frequency offset and the current second intermediate frequency offset, until the current iterative offset value meets the target condition.
[0117] In an embodiment of the present application, after forming an updated iterative offset value, the step of performing different offset processing on the current first frequency offset based on the current iterative offset value to form a current first intermediate frequency offset and a current second intermediate frequency offset can be executed based on the updated iterative offset value, until the current iterative offset value meets the target condition, that is, the updated iterative offset value is used as the current iterative offset value of the next iterative stage to execute step S122b.
[0118] It can be understood that, in the above step S122e, the specific manner of updating the current first frequency offset is not limited and can be selected according to actual needs. For example, in an alternative implementation, the above step S122e can further include the following contents:
[0119] First, the current first power value, the current first intermediate power value, and the current second intermediate power value may be compared to determine the maximum power value;
[0120] Secondly, the current first frequency deviation can be updated based on the frequency deviation corresponding to the maximum power value to form an updated first frequency deviation, wherein when the maximum power value is the current first power value, the updated first frequency deviation is the current first frequency deviation, when the maximum power value is the current first intermediate power value, the updated first frequency deviation is the current first intermediate frequency deviation, and when the maximum power value is the current second intermediate power value, the updated first frequency deviation is the current second intermediate frequency deviation.
[0121] It is understandable that, in the above step S122f, the specific method of determining the target condition is not limited and can be selected according to actual needs. For example, in an alternative implementation, the above step S122f can further include the following content:
[0122] First, the magnitude relationship between the current iteration offset value and a predetermined reference threshold value may be determined, such as whether the current iteration offset value is smaller than the reference threshold value;
[0123] Secondly, when the current iteration offset value is less than the reference threshold, it can be determined that the current iteration offset value meets the target condition, and when the current iteration offset value is not less than the reference threshold, it can be determined that the current iteration offset value does not meet the target condition;
[0124] Among them, the initial value of the iterative offset value is determined based on the number of symbol indexes of the signal to be synchronized. There is a negative correlation between the reference threshold and the number of symbol indexes of the signal to be synchronized. Moreover, after each update of the current iterative offset value, the updated iterative offset value formed is smaller than the current iterative offset value. Exemplarily, step*K<thd, where step is the current iterative offset value, the reference threshold is the ratio between thd and K, and the specific value of thd is not limited. For example, it can be 0.001. Additionally, the initial value of the iterative offset value can be 1 / K.
[0125] In the third aspect, it should be noted that for step S130, the specific manner of outputting the synchronization signal based on the second frequency offset compensation signal is not limited and can be selected according to actual needs.
[0126] For example, in an alternative implementation manner, in order to ensure that the obtained target synchronization signal has a high reliability, the above step S130 may further include the following contents:
[0127] First, the phase discrimination error can be calculated for the signal x3(k), and the phase offset can be estimated using the zero-crossing position of the phase discrimination error curve.
[0128] Second, the gain calibration factor g can be calculated for the signal x3(k) using the signal power. o ;
[0129] Then, the estimated f o 、 and g o can be used to compensate the signal s3(n) to obtain the signal s4(n).
[0130] Furthermore, the signal s4(n) can be subjected to LMS (Least Mean Square) time-domain equalization to obtain the time-domain equalized signal s5(n).
[0131] Finally, the best sampling point can be extracted from the signal a5(n) and a decision can be made according to the modulation mode to finally obtain the demodulated symbol sequence sym(k), that is, the target synchronization signal.
[0132] It can be understood that in an alternative implementation manner, according to signals of different modulation modes, the phase between adjacent constellation points can be equally divided into Z = 8 parts, and the phase to be compensated can be calculated. Among them, i = 1,..., Z; then the phase is compensated to the signal x3(k) to obtain the compensated signal x 31 (k), that is, Finally, for the signal x 31 (k) Calculate the phase error evmErr(i). The specific calculation method is as follows: Figure 3 As shown (that is, for each i, corresponding calculations can be performed for each k respectively, and then the calculation results of each k are averaged to obtain a calculation result corresponding to i, namely evmErr(i)), where real
[0133] () means taking the real part, imag() means taking the imaginary part. Finally, the zero crossing position can be calculated based on the phase error evmErr(i) and the phase deviation can be estimated. like Figure 4 As shown (wherein, to determine whether M is less than or equal to 4, the BPSK signal, QPSK signal and 8PSK signal are analyzed differently).
[0134] It is understandable that, in an alternative implementation, the signal power p can be obtained by performing power calculation on the signal x3(k), that is, p=sum[abs(x3(k))] 2 , then, the gain calibration factor g can be calculated o , i.e. g o =1 / sqrt(p / K). Further, the signal to be compensated c(n) can be calculated, that is, Finally, the signal s3(n) can be compensated to obtain the signal s4(n), that is, s4(n)=s3(n)*c(n).
[0135] It should be further explained that the conventional frequency offset estimation algorithm generally requires first performing delayed conjugate multiplication on the signal x1(k) after the optimal sampling point, i.e., y1(k)=x1(k)*conj(x1(k-1)), and then calculating the Mth power of the signal, i.e., y2(k)=[y1(k)] M , then smooth y2(k) and take the angle, i.e. frequency deviation (L0 is the smoothing filter length). That is to say, the conventional frequency offset estimation algorithm uses the conjugate multiplication of the signal x1(k) to remove the influence of the phase offset on the frequency offset estimation, and uses the signal y2(k) smoothing filter to reduce the influence of noise on the frequency offset estimation (the larger L0 is, the better the smoothing effect is, but the more complicated the calculation is), while the frequency offset estimation algorithm provided in the embodiment of the present application directly uses the Mth power of the signal x1(k), and then calculates the power spectrum by Fourier transform, searches for the peak position on the power spectrum to calculate the frequency offset, and the phase offset and noise both reduce the influence on the frequency offset estimation after the Fourier transform, and the second frequency offset estimation can further improve the frequency offset estimation accuracy when the Fourier transform length is limited, and the performance and computational complexity can be balanced by configuring relevant parameters.
[0136] Combination Figure 5The embodiment of the present application also provides a signal synchronization device based on phase shift keying that can be applied to the above spectrum analyzer. The signal synchronization device based on phase shift keying can include a first frequency offset compensation module, a second frequency offset compensation module and a synchronization signal output module.
[0137] The first frequency offset compensation module is used to estimate the first frequency offset of the signal to be synchronized, obtain the first frequency offset corresponding to the signal to be synchronized, and perform frequency offset compensation on the signal to be synchronized based on the first frequency offset to obtain the first frequency offset compensation signal corresponding to the signal to be synchronized, wherein the first frequency offset is used to reflect the frequency offset of the signal to be synchronized. In the embodiment of the present application, the first frequency offset compensation module can be used to perform Figure 2 As shown in step S110, the relevant contents of the first frequency offset compensation module can refer to the above description of step S110.
[0138] The second frequency offset compensation module is used to perform a second frequency offset estimation on the first frequency offset compensation signal to obtain a second frequency offset corresponding to the signal to be synchronized, and perform frequency offset compensation on the signal to be synchronized based on the second frequency offset to obtain a second frequency offset compensation signal corresponding to the signal to be synchronized, wherein the second frequency offset is used to reflect the frequency offset of the signal to be synchronized. In the embodiment of the present application, the second frequency offset compensation module 0 can be used to perform Figure 2 As shown in step S120, the relevant contents of the second frequency offset compensation module can refer to the above description of step S120.
[0139] The synchronization signal output module is used to output the synchronization signal based on the second frequency offset compensation signal to obtain the target synchronization signal corresponding to the signal to be synchronized. In the embodiment of the present application, the synchronization signal output module can be used to perform Figure 2 As shown in step S130, the relevant contents of the synchronization signal output module can refer to the above description of step S130.
[0140] In summary, the signal synchronization method, device and spectrum analyzer based on phase shift keying provided by the present application firstly estimate the first frequency offset of the signal to be synchronized to obtain the first frequency offset corresponding to the signal to be synchronized, and compensate the frequency offset of the signal to be synchronized based on the first frequency offset to obtain the first frequency offset compensation signal corresponding to the signal to be synchronized; secondly, estimate the second frequency offset of the first frequency offset compensation signal to obtain the second frequency offset corresponding to the signal to be synchronized, and compensate the frequency offset of the signal to be synchronized based on the second frequency offset to obtain the second frequency offset compensation signal corresponding to the signal to be synchronized; then, output the synchronization signal based on the second frequency offset compensation signal to obtain the target synchronization signal corresponding to the signal to be synchronized. Based on the above content, since the frequency offset estimation is performed twice, the reliability of the obtained frequency offset is higher, so that the reliability of the frequency offset compensation based on the obtained frequency offset can also be higher, that is, the basis for outputting the synchronization signal (the second frequency offset compensation signal) is guaranteed to have a higher reliability, so that the reliability of the formed target synchronization signal is higher, thereby improving the problem of poor signal synchronization effect existing in the prior art.
[0141] In several embodiments provided in the embodiments of the present application, it should be understood that the disclosed device and method can also be implemented in other ways. The device and method embodiments described above are merely schematic, for example, the flowcharts and block diagrams in the accompanying drawings show the possible architecture, functions and operations of the device, method and computer program product according to multiple embodiments of the present application. In this regard, each box in the flowchart or block diagram can represent a module, a program segment or a part of a code, and the module, a program segment or a part of a code contains one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flowchart, and the combination of boxes in the block diagram and / or flowchart can be implemented with a dedicated hardware-based system that performs a specified function or action, or can be implemented with a combination of dedicated hardware and computer instructions.
[0142] In addition, the functional modules in the various embodiments of the present application may be integrated together to form an independent part, or each module may exist separately, or two or more modules may be integrated to form an independent part.
[0143] If the function is implemented in the form of a software function module and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the present application is essentially or the part that contributes to the prior art or the part of the technical solution can be embodied in the form of a software product, which is stored in a storage medium, including several instructions to enable a computer device (which can be a personal computer, an electronic device, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM, Read-Only Memory), a random access memory (RAM, Random Access Memory), a disk or an optical disk. It should be noted that, in this article, the term "include", "include" or any other variant thereof is intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements includes not only those elements, but also includes other elements that are not explicitly listed, or also includes elements inherent to such a process, method, article or device. Without more constraints, an element defined by the phrase "comprising a..." does not exclude the existence of other identical elements in the process, method, article or apparatus comprising the element.
[0144] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims
1. A signal synchronization method based on phase shift keying, characterized in that: include: Performing a first frequency offset estimation on the signal to be synchronized to obtain a first frequency offset corresponding to the signal to be synchronized, and performing frequency offset compensation on the signal to be synchronized based on the first frequency offset to obtain a first frequency offset compensation signal corresponding to the signal to be synchronized, wherein the first frequency offset is used to reflect the frequency offset of the signal to be synchronized; Performing a second frequency offset estimation on the first frequency offset compensation signal to obtain a second frequency offset corresponding to the signal to be synchronized, and performing frequency offset compensation on the signal to be synchronized based on the second frequency offset to obtain a second frequency offset compensation signal corresponding to the signal to be synchronized, wherein the second frequency offset is used to reflect the frequency offset of the signal to be synchronized; A synchronization signal is output based on the second frequency offset compensation signal to obtain a target synchronization signal corresponding to the signal to be synchronized.
2. The signal synchronization method based on phase shift keying according to claim 1, characterized in that: The step of estimating a first frequency offset of a signal to be synchronized to obtain a first frequency offset corresponding to the signal to be synchronized, and performing frequency offset compensation on the signal to be synchronized based on the first frequency offset to obtain a first frequency offset compensation signal corresponding to the signal to be synchronized includes: Extracting the best sampling point of the extracted initial signal, outputting the signal to be synchronized corresponding to the initial signal, performing signal exponentiation calculation on the signal to be synchronized, and outputting the exponentiation signal to be synchronized corresponding to the sampled signal to be synchronized; Performing Fourier transform on the power signal to be synchronized, outputting a spectrum signal to be synchronized corresponding to the power signal to be synchronized, performing power analysis processing on the spectrum signal to be synchronized, and outputting a first frequency deviation corresponding to the spectrum signal to be synchronized; Frequency offset compensation is performed on the power signal to be synchronized based on the first frequency offset to obtain a first frequency offset compensation signal corresponding to the signal to be synchronized.
3. The signal synchronization method based on phase shift keying according to claim 2, characterized in that: The step of performing Fourier transform on the power signal to be synchronized, outputting a spectrum signal to be synchronized corresponding to the power signal to be synchronized, performing power analysis processing on the spectrum signal to be synchronized, and outputting a first frequency deviation corresponding to the spectrum signal to be synchronized includes: Performing Fourier transform on the power signal to be synchronized, and outputting a frequency spectrum signal to be synchronized corresponding to the power signal to be synchronized; Performing power signal determination on the spectrum signal to be synchronized, outputting a power signal to be synchronized corresponding to the spectrum signal to be synchronized, and determining an index value corresponding to a power with a maximum value in the power signal to be synchronized to obtain a target index value; Based on the target index value and the index value with the maximum value in the sampled signal to be synchronized, the first frequency deviation corresponding to the spectrum signal to be synchronized is determined, wherein the first frequency deviation and the target index value have a positive correlation, and the first frequency deviation and the index value with the maximum value have a negative correlation.
4. The signal synchronization method based on phase shift keying according to claim 2, characterized in that: The step of performing frequency offset compensation on the power signal to be synchronized based on the first frequency offset to obtain a first frequency offset compensation signal corresponding to the signal to be synchronized includes: Determining a first frequency offset compensation rule; Performing frequency offset compensation on the to-be-synchronized power signal based on the first frequency offset compensation rule and the first frequency offset to obtain a first frequency offset compensation signal corresponding to the to-be-synchronized signal; The first frequency offset compensation rule includes: x 23 (k)=x2(k)*exp(-j*2π*f o1 *k); x 23 (k) is the first frequency offset compensation signal, x2(k) is the exponentiation signal to be synchronized, f o1 is the first frequency offset, and k is the symbol index.
5. The signal synchronization method based on phase shift keying according to claim 1, characterized in that: The step of estimating a second frequency offset on the first frequency offset compensation signal to obtain a second frequency offset corresponding to the signal to be synchronized, and performing frequency offset compensation on the signal to be synchronized based on the second frequency offset to obtain a second frequency offset compensation signal corresponding to the signal to be synchronized includes: Performing power calculation on the first frequency offset compensation signal to obtain a first power value; Based on the first power value, estimating a second frequency offset of the signal to be synchronized to obtain a second frequency offset corresponding to the signal to be synchronized; Frequency offset compensation is performed on the signal to be synchronized based on the second frequency offset to obtain a second frequency offset compensation signal corresponding to the signal to be synchronized.
6. The signal synchronization method based on phase shift keying according to claim 5, characterized in that: The step of estimating a second frequency offset of the signal to be synchronized based on the first power value to obtain a second frequency offset corresponding to the signal to be synchronized includes: Determine the current iteration offset value; Based on the current iterative offset value, respectively perform different offset processing on the current first frequency offset to form a current first intermediate frequency offset and a current second intermediate frequency offset; Based on the current first intermediate frequency offset and the current second intermediate frequency offset, respectively, frequency offset compensation is performed on the signal to be synchronized to obtain a current first intermediate frequency offset compensation signal and a current second intermediate frequency offset compensation signal, wherein the manner of performing frequency offset compensation on the signal to be synchronized is the same as the manner of performing frequency offset compensation on the signal to be synchronized based on the first frequency offset; Performing power calculation on the first intermediate frequency offset compensation signal and the second intermediate frequency offset compensation signal respectively to obtain corresponding first intermediate power value and second intermediate power value; Based on the current first power value, the current first intermediate power value, and the current second intermediate power value, updating the current first frequency offset to form an updated first frequency offset; Determine whether the current iteration offset value meets the predetermined target condition; When the current iterative offset value meets the target condition, determining a second frequency offset corresponding to the signal to be synchronized based on the updated first frequency offset; When the current iteration offset value does not meet the target condition, the current iteration offset value is updated to form an updated iteration offset value; Based on the updated iterative offset value, the step of performing different offset processing on the current first frequency offset based on the current iterative offset value to form the current first intermediate frequency offset and the current second intermediate frequency offset is executed again until the current iterative offset value meets the target condition.
7. The signal synchronization method based on phase shift keying according to claim 6, characterized in that: The step of updating the current first frequency offset based on the current first power value, the current first intermediate power value, and the current second intermediate power value to form an updated first frequency offset includes: Compare the current first power value, the current first intermediate power value, and the current second intermediate power value to determine the maximum power value; Based on the frequency deviation corresponding to the maximum power value, the current first frequency deviation is updated to form an updated first frequency deviation, wherein when the maximum power value is the current first power value, the updated first frequency deviation is the current first frequency deviation, when the maximum power value is the current first intermediate power value, the updated first frequency deviation is the current first intermediate frequency deviation, and when the maximum power value is the current second intermediate power value, the updated first frequency deviation is the current second intermediate frequency deviation.
8. The signal synchronization method based on phase shift keying according to claim 6, characterized in that: The step of determining whether the current iterative offset value meets a predetermined target condition includes: Determine the magnitude relationship between the current iterative offset value and a predetermined reference threshold; When the current iteration offset value is less than the reference threshold, determining that the current iteration offset value satisfies the target condition, and when the current iteration offset value is not less than the reference threshold, determining that the current iteration offset value does not satisfy the target condition; In which, the initial value of the iteration offset value is determined based on the number of symbol indexes of the signal to be synchronized, the reference threshold is negatively correlated with the number of symbol indexes of the signal to be synchronized, and after each update of the current iteration offset value, the updated iteration offset value is smaller than the current iteration offset value.
9. A signal synchronization device based on phase shift keying, characterized in that: include: A first frequency offset compensation module, configured to perform a first frequency offset estimation on a signal to be synchronized, obtain a first frequency offset corresponding to the signal to be synchronized, and perform frequency offset compensation on the signal to be synchronized based on the first frequency offset, to obtain a first frequency offset compensation signal corresponding to the signal to be synchronized, wherein the first frequency offset is used to reflect the frequency offset of the signal to be synchronized; A second frequency offset compensation module, used to perform a second frequency offset estimation on the first frequency offset compensation signal to obtain a second frequency offset corresponding to the signal to be synchronized, and perform frequency offset compensation on the signal to be synchronized based on the second frequency offset to obtain a second frequency offset compensation signal corresponding to the signal to be synchronized, wherein the second frequency offset is used to reflect the frequency offset of the signal to be synchronized; A synchronization signal output module is used to output a synchronization signal based on the second frequency offset compensation signal to obtain a target synchronization signal corresponding to the signal to be synchronized.
10. A spectrum analyzer, characterized in that: include: Memory for storing computer programs; A processor connected to the memory is used to execute a computer program stored in the memory to implement the phase shift keying based signal synchronization method as described in any one of claims 1 to 8.
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