Photoelectric sensor and forming method thereof

Abstract

The invention discloses a photoelectric sensor and a forming method thereof, and the method comprises the steps: forming an initial photosensitive wafer which comprises a substrate, the substrate is provided with an electric connection region, a plurality of photosensitive regions and isolation regions located between the photosensitive regions, and the substrate comprises a first surface and a second surface which are opposite to each other; the diode structures are positioned in the photosensitive regions; an electrical interconnection layer on the first surface; a deep trench isolation structure and an electric connection structure are formed in the isolation region and the electric connection region, the second surface exposes the deep trench isolation structure, and the electric connection structure is located between the deep trench isolation structure and the electric interconnection layer; and the deep trench isolation structure of the isolation region is electrically connected with the deep trench isolation structure of the electric connection region through the electric connection structure and the electric interconnection layer. According to the photoelectric sensor and the forming method thereof, the optical crosstalk between the adjacent photosensitive areas is reduced, the electric connection process and cost of the deep trench isolation structure are simplified, and the electric connection performance of the deep trench isolation structure is enhanced.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a photoelectric sensor and a method for forming the same. Background Art

[0002] A photoelectric sensor is a device that converts light signals into electrical signals. After absorbing the energy of incident photons, a corresponding photoelectric effect occurs, thereby detecting light signals. Currently, photoelectric sensors are widely used in cameras, distance measurement, optical equipment and other fields.

[0003] The part of the photoelectric sensor used to receive light signals is the pixel area, which includes several photosensitive structures. The more photons that irradiate each photosensitive structure, the greater the signal amplitude, the higher the photon detection efficiency (PDE), the better the optical sensitivity performance of the device, and the more comprehensive the electrical signal obtained, so that more detailed ranging and imaging information can be obtained in the end.

[0004] In addition, several photosensitive areas in the photoelectric sensor are isolated from each other through a deep trench isolation structure to avoid optical crosstalk between adjacent photosensitive areas. However, in the prior art, there is still a light-transmitting area at the bottom of the deep trench isolation structure between the photosensitive areas, which leads to the occurrence of optical crosstalk between adjacent photosensitive areas. In addition, the electrical connection process of the deep trench isolation structure is complex and costly, and the electrical connection performance needs to be improved. Summary of the invention

[0005] The technical problem solved by the present invention is to provide a photoelectric sensor and a method for forming the same, which reduces the optical crosstalk between adjacent photosensitive areas, simplifies the electrical connection process and cost of the deep trench isolation structure, and enhances the electrical connection performance of the deep trench isolation structure.

[0006] In order to solve the above technical problems, the technical solution of the present invention provides a photoelectric sensor, including: a substrate, the substrate including an electrical connection area, a plurality of photosensitive areas and an isolation area located between the photosensitive areas, and the substrate including a first surface and a second surface relative to each other; a diode structure located in each of the photosensitive areas; a deep trench isolation structure located in the isolation area and the electrical connection area, the first surface and the second surface exposing the deep trench isolation structure; an electrical interconnection layer located on the first surface; an electrical connection structure located between the deep trench isolation structure and the electrical interconnection layer, the deep trench isolation structure in the isolation area and the deep trench isolation structure in the electrical connection area are electrically connected through the electrical connection structure and the electrical interconnection layer.

[0007] Optionally, a projection pattern of the electrical connection structure on the first surface is a first pattern, a projection pattern of the deep trench isolation structure on the first surface is a second pattern, and the first pattern overlaps with the second pattern.

[0008] Optionally, the electrical connection structure is a conductive plug, a projection pattern of the conductive plug on the first surface is a first pattern, a projection pattern of the deep trench isolation structure on the first surface is a second pattern, and the first pattern is within the range of the second pattern.

[0009] Optionally, it further includes: a pad structure located on the surface of the deep trench isolation structure exposed by the second surface of the electrical connection area, wherein the pad structure is used to apply voltage to the deep trench isolation structure in the isolation area.

[0010] Optionally, it further includes: an interlayer dielectric layer located on the surface of the first surface, and the electrical interconnection layer and the electrical connection structure are located in the interlayer dielectric layer.

[0011] Optionally, it further includes: a logic wafer, wherein the logic wafer faces the first surface of the substrate.

[0012] Optionally, it also includes: a lens structure located on the second surface.

[0013] Correspondingly, the technical solution of the present invention also provides a method for forming a photoelectric sensor, comprising: forming an initial photosensitive wafer, the initial photosensitive wafer comprising: a substrate, the substrate having an electrical connection area, a plurality of photosensitive areas and an isolation area located between the photosensitive areas, and the substrate comprising a first surface and a second surface relative to each other; a diode structure located in each of the photosensitive areas; an electrical interconnection layer located on the first surface; forming a deep trench isolation structure and an electrical connection structure in the isolation area and in the electrical connection area, the deep trench isolation structure is exposed on the second surface, the electrical connection structure is located between the deep trench isolation structure and the electrical interconnection layer, and the deep trench isolation structure in the isolation area and the deep trench isolation structure in the electrical connection area are electrically connected through the electrical connection structure and the electrical interconnection layer.

[0014] Optionally, the method further includes: providing a logic wafer; bonding the first surface of the logic wafer facing the substrate to the initial photosensitive wafer.

[0015] Optionally, after the bonding, the electrical connection structure is formed.

[0016] Optionally, the method for forming the initial photosensitive wafer also includes: forming an interlayer dielectric layer on the surface of the first surface, and the electrical interconnection layer is formed in the interlayer dielectric layer; the method for forming the deep trench isolation structure and the electrical connection structure includes: forming deep trenches in the isolation area and the electrical connection area, and the deep trenches expose the surface of the interlayer dielectric layer; etching the interlayer dielectric layer at the bottom of the deep trench to form an electrical connection opening, and the electrical connection opening exposes the surface of the electrical connection layer; filling a shielding material layer in the electrical connection opening and the deep trench; and flattening the shielding material layer to form an electrical connection structure located in the electrical connection opening and a deep trench isolation structure located in the deep trench.

[0017] Optionally, the method for forming the electrical connection opening includes: forming a barrier layer on the second surface, the barrier layer having a mask opening, and the mask opening being located above the deep groove; using the barrier layer as a mask, etching the interlayer dielectric layer to form an electrical connection opening; in the etching process of forming the electrical connection opening, the ratio of the etching rate of the etching gas on the interlayer dielectric layer to the etching rate of the etching gas on the barrier layer is greater than 2:1.

[0018] Optionally, the material of the barrier layer includes one or more of titanium, titanium nitride, tantalum nitride and silicon nitride.

[0019] Optionally, after forming the deep trench and before forming the electrical connection opening, the method further includes: forming a filling dielectric layer on the second surface, wherein the ratio of the thickness of the filling dielectric layer to the thickness of the interlayer dielectric layer is greater than 1.5:1.

[0020] Optionally, the material filling the dielectric layer includes silicon oxide.

[0021] Optionally, the method for forming the electrical connection opening includes: forming an initial opening in the filling dielectric layer, wherein the initial opening exposes the deep trench; and etching the interlayer dielectric layer at the bottom of the deep trench using the filling dielectric layer as a mask to form the electrical connection opening.

[0022] Optionally, before the bonding, an electrical connection structure is formed on the first surface of the isolation region and the electrical connection region; after the bonding, a deep trench isolation structure is formed on the surface of the electrical connection structure.

[0023] Optionally, the deep trench isolation structures in the isolation region and in the electrical connection region are formed simultaneously.

[0024] Optionally, a pad structure is formed on the surface of the deep trench isolation structure exposed on the second surface of the electrical connection area, and the pad structure is used to apply voltage to the deep trench isolation structure in the isolation area.

[0025] Compared with the prior art, the technical solution of the embodiment of the present invention has the following beneficial effects:

[0026] In the method for forming a photoelectric sensor provided by the technical solution of the present invention, an electrical connection structure is formed between the deep trench isolation structure and the electrical interconnection layer, and the electrical connection structure is used as an extension of the deep trench isolation structure, thereby strengthening the isolation effect between adjacent photosensitive areas, preventing photons incident on the photosensitive area from passing through the bottom of the deep trench isolation structure and causing optical crosstalk, and reducing noise. At the same time, since the deep trench isolation structure of the isolation area is directly electrically connected to the deep trench isolation structure of the electrical connection area through the electrical connection structure and the electrical interconnection layer, the electrical connection path in the process of applying voltage to the deep trench isolation structure of the isolation area is simplified, the contact resistance is optimized, and the electrical performance is more stable.

[0027] Furthermore, a pad structure is formed on the surface of the deep trench isolation structure exposed on the second side of the electrical connection area, thereby applying a voltage to the deep trench isolation structure in the isolation area, wherein the deep trench isolation structure in the isolation area and the deep trench isolation structure in the electrical connection area are formed simultaneously, and the pad structure is directly formed on the exposed surface of the deep trench isolation structure, thereby eliminating the mask and process steps of opening the electrical connection area before forming the pad structure, thereby saving costs.

[0028] In the photoelectric sensor provided by the technical solution of the present invention, since there is an electrical connection structure between the deep trench isolation structure and the electrical interconnection layer, the electrical connection structure is used as an extension of the deep trench isolation structure, thereby strengthening the isolation effect between adjacent photosensitive areas, preventing the photons incident on the photosensitive area from passing through the bottom of the deep trench isolation structure and causing optical crosstalk, and reducing noise. At the same time, since the deep trench isolation structure of the isolation area is directly electrically connected to the deep trench isolation structure of the electrical connection area through the electrical connection structure and the electrical interconnection layer, the electrical connection path in the process of applying voltage to the deep trench isolation structure of the isolation area is simplified, the contact resistance is optimized, and the electrical performance is more stable. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figures 1 to 9 It is a structural schematic diagram of the formation process of a photoelectric sensor. DETAILED DESCRIPTION

[0030] As described in the background technology, the photoelectric sensor includes a plurality of photosensitive areas for receiving light signals and a deep trench isolation structure between adjacent photosensitive areas. The photosensitive areas are isolated from each other by the deep trench isolation structure to avoid the occurrence of optical crosstalk. However, in the prior art, there is still a light-transmitting area at the bottom of the deep trench isolation structure between the photosensitive areas, which leads to the occurrence of optical crosstalk between adjacent photosensitive areas. Secondly, when the photoelectric sensor is working, a negative potential is usually applied to the deep trench isolation structure so that the deep trench isolation structure absorbs positive charges, thereby reducing the dark current. However, due to the complex electrical connection process and high cost of the deep trench isolation structure, its electrical connection performance and the effect of reducing dark current need to be improved.

[0031] In order to solve the above technical problems, the technical solution of the present invention provides a method for forming a photoelectric sensor, wherein an electrical connection structure is formed between the deep trench isolation structure and the electrical interconnection layer, and the electrical connection structure is used as an extension of the deep trench isolation structure, thereby strengthening the isolation effect between adjacent photosensitive areas, preventing the photons incident on the photosensitive area from passing through the bottom of the deep trench isolation structure and causing optical crosstalk, and reducing noise. At the same time, since the deep trench isolation structure of the isolation area is directly electrically connected to the deep trench isolation structure of the electrical connection area through the electrical connection structure and the electrical interconnection layer, the electrical connection path in the process of applying voltage to the deep trench isolation structure of the isolation area is simplified, the contact resistance is optimized, and the electrical performance is more stable.

[0032] In order to make the above-mentioned objects, features and beneficial effects of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0033] Figures 1 to 9 Schematic diagram of the structure of the photoelectric sensor of the embodiment of the present invention.

[0034] Please refer to Figure 1 , forming an initial photosensitive wafer 110, the initial photosensitive wafer 110 includes: a substrate 100, the substrate 100 has an electrical connection area III, a plurality of photosensitive areas I and an isolation area II located between each photosensitive area I, and the substrate 100 includes a first surface 100a and a second surface 100b opposite to each other; a diode structure 103 located in each of the photosensitive areas I; and an electrical interconnection layer 108 located on the first surface 100a.

[0035] The material of the substrate 100 includes silicon, silicon germanium, silicon carbide, silicon on insulator (SOI), germanium on insulator (GOI), etc. Specifically, in this embodiment, the material of the substrate 100 is silicon.

[0036] In this embodiment, the photosensitive area I is used to form a photosensitive device to receive photons; the isolation area II is used to form an isolation structure to prevent optical crosstalk between device structures in different photosensitive areas I; the electrical connection area III is used to form an external electrical connection layer and a pad structure to connect an external circuit and apply voltage to the structure in the isolation area II or the photosensitive area I.

[0037] In this embodiment, the initial photosensitive wafer 110 further includes: an interlayer dielectric layer 120 located on the surface of the first surface 100 a , and the electrical interconnection layer 108 is located in the interlayer dielectric layer 120 .

[0038] Specifically, the method for forming the initial photosensitive wafer 110 includes: providing a substrate 100; forming a diode structure 103 in the photosensitive region I, wherein the first surface 100a of the substrate 100 exposes the diode structure 103; forming a first doping region 135 in the isolation region II; forming an interlayer dielectric layer 120 on the surface of the first surface 100a; and forming an electrical interconnection layer 108 in the interlayer dielectric layer 120. The first doping region 135 and the diode structure 103 are both connected to the electrical interconnection layer 108.

[0039] In this embodiment, the interlayer dielectric layer 120 includes: a first interlayer dielectric layer 120a located on the surface of the first surface 100a; a second interlayer dielectric layer 120b located on the surface of the first interlayer dielectric layer 120a; a first etch stop layer 120c located on the surface of the second interlayer dielectric layer 120b; a third interlayer dielectric layer 120d located on the surface of the first etch stop layer 120c; a second etch stop layer 120e located on the surface of the third interlayer dielectric layer 120d; and a fourth interlayer dielectric layer 120f located on the surface of the second etch stop layer 120e.

[0040] In this embodiment, the electrical interconnection layer 108 includes: a first sub-connection layer 106 located in the second interlayer dielectric layer 120b, and a second sub-connection layer 107 located in the first etch stop layer 120c and the third interlayer dielectric layer 120d.

[0041] The diode structure 103 , the first doped region 135 and the first sub-connection layer 106 are electrically connected via a first conductive plug 105 , and the first conductive plug 105 is located in the first interlayer dielectric layer 120 a .

[0042] In this embodiment, the first doping region 135 is connected to the diode structure 103, and the two have the same potential. The first doping region 135 contains P-type doping ions. The diode structure 103 includes a second doping region 102 and a third doping region 101 of opposite conductivity types, the second surface 100b exposes the second doping region 102, the second doping region 102 contains N-type doping ions, and the third doping region 101 contains P-type doping ions.

[0043] In this embodiment, the first sub-connection layer 106 and the second sub-connection layer 107 are located in the electrical connection area III, the photosensitive area I and the isolation area II. In addition, the first sub-connection layer 106 and the second sub-connection layer 107 located in the same area are interconnected.

[0044] Among them, at least one second sub-connection layer 107 in the isolation area II is interconnected with at least one second sub-connection layer 107 in the electrical connection area III, so that at least part of the first sub-connection layer 106 in the isolation area II is interconnected with at least part of the first sub-connection layer 106 in the electrical connection area III.

[0045] In this embodiment, the material of the first interlayer dielectric layer 120a includes silicon oxide or other oxides; the material of the second interlayer dielectric layer 120b includes silicon oxide or other oxides; the material of the third interlayer dielectric layer 120d includes silicon oxide or other oxides; the material of the fourth interlayer dielectric layer 120f includes silicon oxide or other oxides. The material of the first etch stop layer 120c includes silicon oxide or silicon nitride; the material of the second etch stop layer 120e includes silicon oxide or silicon nitride.

[0046] Please refer to Figure 2 , providing a logic wafer 113; bonding the logic wafer 113 facing the first surface 100 a of the substrate 100 to the initial photosensitive wafer 110, so that the logic wafer 113 is electrically connected to the initial photosensitive wafer 110.

[0047] In this embodiment, the logic wafer 113 has logic devices therein for controlling the photosensitive devices in the initial photosensitive wafer 110 .

[0048] Specifically, the logic wafer 113 includes: a device layer 111 and a fifth interlayer dielectric layer 112 located on the surface of the device layer 111. The bonding interface between the logic wafer 113 and the initial photosensitive wafer 110 is located at the interface between the fifth interlayer dielectric layer 112 and the fourth interlayer dielectric layer 120f.

[0049] After the logic wafer 113 is bonded to the initial photosensitive wafer 110 , the substrate 100 of the initial photosensitive wafer 110 is thinned.

[0050] Next, a deep trench isolation structure and an electrical connection structure are formed in the isolation region II and the electrical connection region III, the second surface 100b exposes the deep trench isolation structure, the electrical connection structure is located between the deep trench isolation structure and the electrical interconnection layer, and the deep trench isolation structure of the isolation region II and the deep trench isolation structure of the electrical connection region III are electrically connected through the electrical connection structure and the electrical interconnection layer 108.

[0051] Please refer to Figure 3 , an inverted pyramid groove 123 is formed on the surface of the isolation area II and the photosensitive area I; a deep trench 124 is formed in the isolation area II and the electrical connection area III, and the deep trench 124 exposes the surface of the interlayer dielectric layer 120.

[0052] In this embodiment, the deep trench 124 provides space for a deep trench isolation structure to be formed subsequently.

[0053] In this embodiment, the method for forming the deep trench 124 includes: forming a first mask layer (not shown) on the surface of the isolation region II and the electrical connection region III, the first mask layer exposing a portion of the surface of the isolation region II and the electrical connection region III; using the first mask layer as a mask, etching the isolation region II and the electrical connection region III to form a deep trench 124, the deep trench 124 exposing the surface of the first interlayer dielectric layer 120a.

[0054] The method for forming the inverted pyramid groove 123 includes: depositing an initial oxide layer (not shown) on the surface of the second surface 100b of the substrate 100; forming a photoresist layer (not shown) on the surface of the initial oxide layer; using the photoresist layer as a mask, etching the initial oxide layer to form a second mask layer, wherein the second mask layer exposes a portion of the isolation region II and a portion of the surface of the photosensitive region I; using the second mask layer as a mask, etching the isolation region II and the photosensitive region I to form the inverted pyramid groove 123; and removing the initial oxide layer. The process of etching the isolation region II and the photosensitive region I is a wet etching process, and the etching solution used is tetramethylammonium hydroxide.

[0055] Please refer to Figure 4 A composite dielectric layer 131 is formed on the sidewall of the inverted pyramid groove 123, the bottom of the deep trench 124 and the sidewall surface; a filling dielectric layer 130 is formed in the inverted pyramid groove 123 of the second surface 100b, and the filling dielectric layer 130 seals the top of each deep trench 124, and the filling dielectric layer 130 fills the inverted pyramid groove 123.

[0056] The composite dielectric layer 131 includes: a first oxide layer (not shown) located on the sidewalls of the inverted pyramid groove 123, the bottom and sidewall surfaces of the deep trench 124, a high dielectric constant material layer (not shown) located on the first oxide layer, and a second oxide layer (not shown) located on the surface of the high dielectric constant material layer.

[0057] In this embodiment, the material of the first oxide layer includes diphenylphosphine. The first oxide layer is used to repair the interface state of the deep trench 124. The material of the high dielectric constant material layer includes aluminum oxide, tantalum oxide or a combination of the two, and the high dielectric constant material layer is used to improve the electrical properties of the interface. The material of the second oxide layer includes silicon oxide or other oxides.

[0058] In this embodiment, the material of the filling dielectric layer 130 can close the top of the deep groove 124 faster and fill the inverted pyramid groove 123. Specifically, the material of the filling dielectric layer 130 includes silicon oxide, plasma enhanced tetraethyl orthosilicate (PETEOS) or other oxides. The filling dielectric layer 130 is located in the inverted pyramid groove 123, thereby forming an inverted pyramid structure (not shown) on the second surface 100b, which is located in the photon incident direction and can increase the optical transmittance of the photosensitive area I, thereby improving the photon detection efficiency.

[0059] In this embodiment, the filling dielectric layer 130 is also located on the surface of the electrical connection region III.

[0060] In this embodiment, after the filling dielectric layer 130 is formed, a planarization process is performed on the filling dielectric layer 130 .

[0061] In other embodiments, after forming the filling dielectric layer 130 , the planarization process may be omitted.

[0062] Please refer to Figure 5 , a barrier layer 140 is formed on the second surface 100b, the barrier layer 140 has a mask opening (not shown), and the mask opening exposes the surface of the filling dielectric layer 130 above the deep trench 124; using the barrier layer 140 as a mask, the seal at the top of the deep trench 124 is opened; and then the interlayer dielectric layer 120 at the bottom of the deep trench 124 is etched to form an electrical connection opening 142, and the electrical connection opening 142 exposes the surface of the electrical interconnection layer 108.

[0063] Among them, the etching process using the barrier layer 140 as a mask first opens the filling dielectric layer 130 that seals the top of the deep trench 124; secondly, using the barrier layer 140 as a mask, the interlayer dielectric layer 120 at the bottom of the deep trench 124 is etched until the electrical interconnection layer 108 is exposed, forming an electrical connection opening 142. The electrical connection opening 142 and the deep trench 124 are interconnected, and together define the formation space of the subsequent deep trench isolation structure. The electrical connection opening 142 expands the depth of the deep trench 124, which is conducive to the subsequent formation of a deep trench isolation structure with a better shielding effect.

[0064] In this embodiment, during the etching process for forming the electrical connection opening 142, the ratio of the etching rate of the etching gas on the interlayer dielectric layer 120 to the etching rate of the etching gas on the barrier layer 140 is greater than 2:1. Due to the large ratio, the barrier layer 140 can maintain its morphology and pattern better while etching the interlayer dielectric layer 120.

[0065] Specifically, in this embodiment, the material of the barrier layer 140 includes one or more of titanium, titanium nitride, tantalum nitride, and silicon nitride.

[0066] During the etching process, the filling dielectric layer 130 on the sidewall of the deep trench 124 is used to protect the morphology of the sidewall of the deep trench 124 from being affected by the etching process.

[0067] In another embodiment, the barrier layer may not be formed, and the thickness of the filling dielectric layer may be increased to assist the etching process of the electrical connection opening. After the filling dielectric layer is formed, a photoresist layer is formed on the surface of the filling dielectric layer; the filling dielectric layer is etched using the photoresist layer as a mask to form an initial opening, wherein the initial opening exposes the deep trench; then, the filling dielectric layer having the initial opening is used as a mask to etch the interlayer dielectric layer at the bottom of the deep trench until the surface of the electrical interconnection layer is exposed to form an electrical connection opening.

[0068] The ratio of the thickness of the filling dielectric layer to the thickness of the interlayer dielectric layer is greater than 1.5:1, and the filling dielectric layer has sufficient thickness, so that the filling dielectric layer can maintain a good pattern during etching of the interlayer dielectric layer.

[0069] In this embodiment, the electrical connection opening 142 exposes the first sub-connection layer 106 , and the etching process etches the first interlayer dielectric layer 120 a in the interlayer dielectric layer 120 .

[0070] In another embodiment, the electrical connection opening exposes the second sub-connection layer, and the etching process etches the first interlayer dielectric layer and the second interlayer dielectric layer in the interlayer dielectric layer.

[0071] In other embodiments, the electrical interconnection layer may include multiple sub-connection layers, and the electrical connection opening exposes any of the sub-connection layers. Accordingly, the etching process etches the corresponding structure in the interlayer dielectric layer so that the electrical connection opening exposes the sub-connection layer.

[0072] In this embodiment, the projection pattern of the electrical connection opening 142 on the first surface 100 a coincides with the projection pattern of the deep trench 124 on the first surface 100 a .

[0073] In other embodiments, the projection pattern of the electrical connection opening on the first surface is located within the range of the projection pattern of the deep groove on the first surface, and the electrical connection opening is a plurality of discrete plug-in through holes.

[0074] Please refer to Figure 6 , an adhesion layer (not shown) is deposited on the surface of the substrate 100 , the sidewalls of the deep trench 124 , and the sidewalls of the electrical connection opening 142 ; and a shielding material layer 141 is filled in the electrical connection opening 142 and the deep trench 124 .

[0075] In this embodiment, the material of the shielding material layer 141 includes tungsten. The shielding material layer 141 is also located on the surface of the barrier layer 140 on the filling dielectric layer 130 .

[0076] In this embodiment, the adhesion layer can prevent the diffusion of byproducts (such as fluoride) generated in the previous process. The material of the adhesion layer includes titanium, titanium nitride or a combination of the two.

[0077] Please refer to Figure 7 , the shielding material layer 141 is planarized until the surface of the filling dielectric layer 130 is exposed, so as to form an electrical connection structure 143 located in the electrical connection opening 142 and a deep trench isolation structure 145 located in the deep trench 124 .

[0078] In this embodiment, the deep trench isolation structure 145 is used to isolate the optical crosstalk between the photosensitive devices in different photosensitive areas I.

[0079] Since the electrical connection structure 143 is located between the deep trench isolation structure 145 and the electrical interconnection layer 108, the electrical connection structure 143 serves as an extension of the deep trench isolation structure 145, thereby enhancing the isolation effect between adjacent photosensitive areas I, preventing photons incident on the photosensitive area I from passing through the bottom of the deep trench isolation structure 145 into the adjacent photosensitive area I and causing optical crosstalk, thereby reducing noise.

[0080] In this embodiment, while forming the deep trench isolation structure 145, it also includes: forming a backside metal grid located on the deep trench isolation structure 145, the projection pattern of the backside metal grid (not shown) on the second surface 100b overlaps with the projection pattern of the deep trench isolation structure 145 on the second surface 100b, and the backside metal grid is used to prevent optical crosstalk between adjacent photosensitive areas I on the surface of the second surface 100b. The deep trench isolation structure 145 and the backside metal grid on its surface are formed simultaneously by the same deposition and etching process. The deep trench isolation structure is made of the same material as the backside metal grid.

[0081] In other embodiments, the height of the shielding material layer can be reduced by exposing and etching the shielding material layer, thereby exposing the surface of the filling dielectric layer. In the process of etching the shielding material layer to reduce its height, the deep trench isolation structure and the back metal shielding layer located on the deep trench isolation structure are formed at the same time, and the projection pattern of the back metal shielding layer on the second surface overlaps with the projection pattern of the deep trench isolation structure on the second surface.

[0082] Please refer to Figure 8 and Fig. 9 ,in, Fig. 9 for Figure 8 A top view of the deep trench isolation structure 145 (shown at P) in the electrical connection region III along the Q direction.

[0083] A pad structure 160 is formed on the surface of the deep trench isolation structure 145 exposed on the second surface 100 b of the electrical connection region III. The pad structure 160 is used to apply voltage to the deep trench isolation structure 145 of the isolation region II.

[0084] In this embodiment, the electrical connection structure 143 is located between the deep trench isolation structure 145 and the electrical interconnection layer 108, and the deep trench isolation structure 145 of the isolation region II and the deep trench isolation structure 145 of the electrical connection region III are electrically connected through the electrical connection structure 143 and the electrical interconnection layer 108. Therefore, by forming a passage through the deep trench isolation structure 145 of the electrical connection region III, the electrical connection structure 143 of the electrical connection region III, the electrical interconnection layer 108 of the electrical connection region III and the isolation region II, and the electrical connection structure 143 of the isolation region II and the deep trench isolation structure 145, when the pad structure 160 is connected to an external circuit, a voltage can be applied to the deep trench isolation structure 145 of the isolation region II through the pad structure 160 through the above passage, and a negative potential can be applied to the deep trench isolation structure 145, so that the sidewall of the deep trench isolation structure 145 absorbs positive charges, thereby effectively adjusting the interface state generated by the sidewall of the deep trench isolation structure 145, so as to achieve the effect of reducing dark current.

[0085] Among them, due to the existence of the electrical connection structure 143, the deep trench isolation structure 145 of the isolation area II and the deep trench isolation structure 145 of the electrical connection area III can be directly electrically connected through the electrical connection structure 143 and the electrical interconnection layer 108, which simplifies the electrical connection path in the process of applying voltage to the deep trench isolation structure 145 of the isolation area II, and each connection structure on the connection path can be made of metal material, thereby optimizing the contact resistance and making the electrical performance more stable.

[0086] Secondly, the deep trench isolation structure 145 in the isolation region II and the deep trench isolation structure 145 in the electrical connection region III are formed simultaneously, and the second surface 100b of the electrical connection region III directly exposes the surface of the deep trench isolation structure 145, so that the pad structure 160 is directly formed on the exposed surface of the deep trench isolation structure 145, thereby forming an electrical connection path from the pad structure 160 to the deep trench isolation structure 145 in the isolation region II, thereby eliminating the mask and process steps of opening the electrical connection region III before forming the pad structure 160, thereby saving costs.

[0087] In this embodiment, the pattern of the deep trench isolation structure 145 in the electrical connection region III is a grid shape, such as Fig. 9 The pattern of the deep trench isolation structure 145 in the electrical connection region III and the pattern of the deep trench isolation structure 145 in the isolation region II are simultaneously defined by the same mask. In other embodiments, the pattern of the deep trench isolation structure in the electrical connection region may also be defined according to device design requirements.

[0088] In this embodiment, the process of forming the pad structure 160 includes: depositing a pad material layer (not shown) on the surface of the substrate 100; patterning the pad material layer to form a pad structure 160, wherein the pad structure 160 is interconnected with the deep trench isolation structure 145 on the isolation region II. The material of the pad structure 160 includes aluminum.

[0089] After forming the pad structure 160, a passivation layer 148 is deposited on the surface of the pad structure 160. By exposing and etching the passivation layer 148, the surface of the pad structure 160 can be exposed, thereby opening the pad structure 160 to facilitate its connection with an external circuit.

[0090] In the present embodiment, a protection layer 147 is further formed on the surface of the deep trench isolation structure 145 in the isolation region II, so as to protect the deep trench isolation structure 145 from being affected by subsequent processes.

[0091] Next, a lens structure (not shown) is formed on the second surface 100 b .

[0092] In this embodiment, the projection pattern of the electrical connection structure 143 on the first surface 100a is a first pattern, and the projection pattern of the deep trench isolation structure 145 on the first surface 100a is a second pattern, and the first pattern and the second pattern overlap.

[0093] When the photoelectric sensor is working, the incident photon passes through the lens structure, passes through the inverted pyramid structure of the second surface 100b, enters the photosensitive area I, is received by the diode structure 103, and is then converted into an electrical signal. Wherein, due to the existence of the electrical connection structure 143, the electrical connection structure 143 can be used as an extension of the deep trench isolation structure 145. When the incident photon is directed to the deep trench isolation structure 145 on the isolation area II (as shown at X1), the photon partially reflected into the first interlayer dielectric layer 120a can be further blocked by the electrical connection structure 143 (as shown at X2), so that the photon continues to gather in the corresponding photosensitive area I, strengthens the isolation effect between adjacent photosensitive areas I, prevents the photon incident into the photosensitive area I from passing through the bottom of the deep trench isolation structure 145 and causing optical crosstalk, and reduces noise.

[0094] In other embodiments, the projection pattern of the electrical connection opening on the first surface is within the range of the projection pattern of the deep trench on the first surface, and the electrical connection opening is a plurality of discrete plug through holes. Therefore, the electrical connection structure formed in the electrical connection opening is a conductive plug, the projection pattern of the conductive plug on the first surface is a first pattern, the projection pattern of the deep trench isolation structure on the first surface is a second pattern, and the first pattern is within the range of the second pattern. The deep trench isolation structure of the isolation area and the deep trench isolation structure of the electrical connection area are electrically connected through the conductive plug and the electrical interconnection layer.

[0095] In this embodiment, the deep trench isolation structures 145 in the isolation region II and the electrical connection region III are formed simultaneously. In another embodiment, the deep trench isolation structures in the isolation region and the electrical connection region can be formed successively.

[0096] In this embodiment, after the initial photosensitive wafer 110 is bonded to the logic wafer 113 , the electrical connection opening 142 and the electrical connection structure 143 are formed.

[0097] In another embodiment, before the initial photosensitive wafer is bonded to the logic wafer, an electrical connection structure is pre-formed on the first surface of the isolation area and the electrical connection area of ​​the initial photosensitive wafer substrate, the electrical connection structure is connected to the electrical interconnection layer, and the electrical connection structure and the first conductive plug on the surface of the first sub-connection layer are formed simultaneously; after the initial photosensitive wafer is subsequently bonded to the logic wafer, a deep trench and a deep trench isolation structure are formed in the isolation area and the electrical connection area, the deep trench isolation structure is formed on the surface of the electrical connection structure, and the deep trench isolation structure in the isolation area and the deep trench isolation structure in the electrical connection area are electrically connected through the electrical connection structure and the electrical interconnection layer.

[0098] Correspondingly, an embodiment of the present invention further provides a photoelectric sensor formed by adopting the above method.

[0099] Please continue to refer to Figure 8 and Fig. 9The photoelectric sensor includes: a substrate 100, the substrate 100 includes an electrical connection area III, a plurality of photosensitive areas I and an isolation area II located between each photosensitive area I, and the substrate 100 includes a first surface 100a and a second surface 100b opposite to each other; a diode structure 103 located in each of the photosensitive areas I; a deep trench isolation structure 145 located in the isolation area II and the electrical connection area III, the first surface 100a and the second surface 100b exposing the deep trench isolation structure 145; an electrical interconnection layer 108 located on the first surface 100a; an electrical connection structure 143 located between the deep trench isolation structure 145 and the electrical interconnection layer 108, the deep trench isolation structure 145 of the isolation area II and the deep trench isolation structure 145 of the electrical connection area III are electrically connected through the electrical connection structure 143 and the electrical interconnection layer 108.

[0100] In this embodiment, the photoelectric sensor further includes: a logic wafer 113 , wherein the logic wafer 113 faces the first surface 100 a of the substrate 100 and is electrically connected to the initial photosensitive wafer 110 .

[0101] In this embodiment, the projection pattern of the electrical connection structure 143 on the first surface 100a is a first pattern, and the projection pattern of the deep trench isolation structure 145 on the first surface 100a is a second pattern, and the first pattern and the second pattern overlap.

[0102] In another embodiment, the electrical connection structure is a conductive plug, the projection pattern of the conductive plug on the first surface is a first pattern, the projection pattern of the deep trench isolation structure on the first surface is a second pattern, and the first pattern is within the range of the second pattern.

[0103] In this embodiment, the photosensor further includes: a pad structure 160 located on the surface of the deep trench isolation structure 145 exposed by the second surface 100b of the electrical connection region III, and the pad structure 160 is used to apply voltage to the deep trench isolation structure 145 of the isolation region II.

[0104] In this embodiment, the photoelectric sensor further includes: an interlayer dielectric layer 120 located on the surface of the first surface 100 a , and the electrical interconnection layer 108 and the electrical connection structure 143 are located in the interlayer dielectric layer 120 .

[0105] In this embodiment, the photoelectric sensor further includes: a lens structure located on the second surface 100b.

[0106] Among them, since there is an electrical connection structure 143 between the deep trench isolation structure 145 and the electrical interconnection layer 108, the electrical connection structure 143 is used as an extension of the deep trench isolation structure 145, thereby enhancing the isolation effect between adjacent photosensitive areas I, preventing photons incident on the photosensitive area I from passing through the bottom of the deep trench isolation structure 145 and causing optical crosstalk, thereby reducing noise.

[0107] At the same time, since the deep trench isolation structure 145 of the isolation area II is directly electrically connected to the deep trench isolation structure 145 of the electrical connection area III through the electrical connection structure 143 and the electrical interconnection layer 108, the electrical connection path in the process of applying voltage to the deep trench isolation structure 145 of the isolation area II is simplified, the contact resistance is optimized, and the electrical performance is made more stable.

[0108] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A photoelectric sensor, characterized in that: include: A substrate, the substrate comprising an electrical connection area, a plurality of photosensitive areas and an isolation area between the photosensitive areas, and the substrate comprising a first surface and a second surface opposite to each other; A diode structure located in each of the photosensitive regions; A deep trench isolation structure located in the isolation region and the electrical connection region, wherein the first surface and the second surface expose the deep trench isolation structure; an electrical interconnect layer located on the first side; The electrical connection structure is located between the deep trench isolation structure and the electrical interconnection layer. The deep trench isolation structure in the isolation area and the deep trench isolation structure in the electrical connection area are electrically connected through the electrical connection structure and the electrical interconnection layer.

2. The photoelectric sensor according to claim 1, characterized in that The projection pattern of the electrical connection structure on the first surface is a first pattern, the projection pattern of the deep trench isolation structure on the first surface is a second pattern, and the first pattern and the second pattern overlap.

3. The photoelectric sensor according to claim 1, wherein: The electrical connection structure is a conductive plug, the projection pattern of the conductive plug on the first surface is a first pattern, the projection pattern of the deep trench isolation structure on the first surface is a second pattern, and the first pattern is within the range of the second pattern.

4. The photoelectric sensor according to claim 1, wherein: Also includes: A pad structure is located on the surface of the deep trench isolation structure exposed by the second surface of the electrical connection area, and the pad structure is used to apply voltage to the deep trench isolation structure in the isolation area.

5. The photoelectric sensor according to claim 1, wherein: Also includes: An interlayer dielectric layer is located on the surface of the first surface, and the electrical interconnection layer and the electrical connection structure are located in the interlayer dielectric layer.

6. The photoelectric sensor according to claim 1, wherein: Also includes: A logic wafer faces the first surface of the substrate.

7. The photoelectric sensor according to claim 1, wherein: Also includes: A lens structure is located on the second surface.

8. A method for forming a photoelectric sensor, characterized in that: include: Forming an initial photosensitive wafer, the initial photosensitive wafer comprising: a substrate having an electrical connection area, a plurality of photosensitive areas and an isolation area between the photosensitive areas, and the substrate comprising a first surface and a second surface opposite to each other; a diode structure located in each of the photosensitive areas; and an electrical interconnection layer located on the first surface; A deep trench isolation structure and an electrical connection structure are formed in the isolation area and the electrical connection area, the second surface exposes the deep trench isolation structure, the electrical connection structure is located between the deep trench isolation structure and the electrical interconnection layer, and the deep trench isolation structure in the isolation area and the deep trench isolation structure in the electrical connection area are electrically connected through the electrical connection structure and the electrical interconnection layer.

9. The method for forming a photoelectric sensor according to claim 8, wherein: Also includes: Providing a logic wafer; bonding the first surface of the logic wafer facing the substrate to the initial photosensitive wafer.

10. The method for forming a photoelectric sensor according to claim 9, wherein: After the bonding, the electrical connection structure is formed.

11. The method for forming a photoelectric sensor according to claim 10, wherein: The method for forming the initial photosensitive wafer also includes: forming an interlayer dielectric layer on the surface of the first surface, and the electrical interconnection layer is formed in the interlayer dielectric layer; the method for forming the deep trench isolation structure and the electrical connection structure includes: forming deep trenches in the isolation area and the electrical connection area, and the deep trenches expose the surface of the interlayer dielectric layer; etching the interlayer dielectric layer at the bottom of the deep trench to form an electrical connection opening, and the electrical connection opening exposes the surface of the electrical connection layer; filling a shielding material layer in the electrical connection opening and the deep trench; and flattening the shielding material layer to form an electrical connection structure located in the electrical connection opening and a deep trench isolation structure located in the deep trench.

12. The method for forming a photoelectric sensor according to claim 11, wherein: The method for forming the electrical connection opening includes: forming a barrier layer on the second surface, the barrier layer having a mask opening, and the mask opening being located above the deep trench; using the barrier layer as a mask, etching the interlayer dielectric layer to form an electrical connection opening; during the etching process of forming the electrical connection opening, the ratio of the etching rate of the etching gas on the interlayer dielectric layer to the etching rate of the etching gas on the barrier layer is greater than 2:

1.

13. The method for forming a photoelectric sensor according to claim 12, wherein: The material of the barrier layer includes one or more of titanium, titanium nitride, tantalum nitride, and silicon nitride.

14. The method for forming a photoelectric sensor according to claim 11, wherein: After forming the deep trench and before forming the electrical connection opening, the method further includes: forming a filling dielectric layer on the second surface, wherein the ratio of the thickness of the filling dielectric layer to the thickness of the interlayer dielectric layer is greater than 1.5:

1.

15. The method for forming a photoelectric sensor according to claim 14, wherein: The material filling the dielectric layer includes silicon oxide.

16. The method for forming a photoelectric sensor according to claim 14, wherein: The method for forming the electrical connection opening includes: forming an initial opening in the filling dielectric layer, wherein the initial opening exposes the deep trench; and etching the interlayer dielectric layer at the bottom of the deep trench using the filling dielectric layer as a mask to form the electrical connection opening.

17. The method for forming a photoelectric sensor according to claim 9, wherein: Before the bonding, an electrical connection structure is formed on the first surface of the isolation region and the electrical connection region; after the bonding, a deep trench isolation structure is formed on the surface of the electrical connection structure.

18. The method for forming a photoelectric sensor according to claim 8, wherein: The deep trench isolation structures in the isolation region and the electrical connection region are formed simultaneously.

19. The method for forming a photoelectric sensor according to claim 8, wherein: A pad structure is formed on the surface of the deep trench isolation structure exposed on the second surface of the electrical connection area, and the pad structure is used to apply a voltage to the deep trench isolation structure in the isolation area.

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