Back contact solar cell, preparation method thereof, cell module and photovoltaic system
By depositing and processing the tunneled oxide layer, intrinsic polysilicon layer and BSG layer on the backlight surface of the back contact solar cell, the problems of complex preparation processes and leakage in the prior art are solved, and process simplification and cell efficiency are achieved.
Patent Information
- Application Number
- CN202411646947.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-18
- Publication Date
- 2025-02-28
AI Technical Summary
The existing back contact solar cells have complex preparation processes, high production costs, and serious leakage problems in the isolation area, which affects battery production efficiency.
By depositing the tunneled oxide layer, the intrinsic polysilicon layer and the BSG layer on the backlight surface of the semiconductor substrate in sequence, performing groove processing and element doping, and combining selective etching to remove the intrinsic polysilicon layer in the isolation region, a back contact structure is formed.
The preparation process is simplified, production costs are reduced, leakage risks in isolation areas are reduced, and the production efficiency of batteries is improved, which is suitable for large-scale mass production.
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Figure CN119545953A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of solar cells, and in particular to a back-contact solar cell and a preparation method thereof, a cell assembly, and a photovoltaic system. Background Art
[0002] Limited by the shading of the front metal electrode, the front cannot fully absorb light, thus affecting the efficiency of the battery. Therefore, as early as the 1970s, some scholars proposed back-contact solar cells (XBC). With the rapid development of TOPCon cells, TBC cells, which are superimposed with TOPCon and XBC technologies, have attracted widespread attention due to their greater potential for efficiency improvement. On the one hand, it benefits from its higher theoretical efficiency than traditional TOPCon cells, and on the other hand, there is no grid line blocking the front, so the appearance is better.
[0003] However, due to the complex preparation process and high production cost of TBC batteries, large-scale mass production is still not possible. At present, the preparation process of the back of TBC batteries involves a variety of combinations such as mask / laser and wet method. The process technology is difficult, and there are serious problems such as leakage between polysilicon of different polarities, which affects the production efficiency of batteries. Summary of the invention
[0004] The present invention aims to solve one of the technical problems in the related art to at least a certain extent. To this end, the present invention provides a back-contact solar cell and a method for preparing the same, wherein the back-contact solar cell has a simple preparation process and is easy to mass produce.
[0005] To this end, the first aspect of the present invention provides a method for preparing a back-contact solar cell, comprising:
[0006] Providing a semiconductor substrate, wherein the semiconductor substrate has a light-receiving surface and a backlight surface opposite to each other, and the backlight surface is divided into a first area, a second area, and an isolation area, wherein the isolation area separates the first area from the second area;
[0007] Forming a tunneling oxide layer, an intrinsic polysilicon layer and a BSG layer in sequence on a side of the backlight surface away from the semiconductor substrate;
[0008] removing a portion of the BSG layer corresponding to the second region so that the second region exposes the intrinsic polysilicon layer;
[0009] Performing a first doping treatment on the intrinsic polysilicon layer located in the second region to obtain a first doped layer;
[0010] Performing a second doping treatment on the intrinsic polysilicon layer located in the first region to obtain a second doped layer;
[0011] Selectively etching the first region, the second region and the isolation region to remove the remaining BSG layer and the intrinsic polysilicon layer and the tunnel oxide layer located in the isolation region;
[0012] The first doping layer and the second doping layer have opposite polarities.
[0013] The preparation method only requires that after depositing the tunnel oxide layer, the intrinsic polysilicon layer and the BSG layer, the BSG layer is grooved and doped with elements, and selective etching is performed based on the different corrosion resistance of the intrinsic polysilicon layer and the doped layer to the alkaline solution, and the intrinsic polysilicon layer between the isolation regions is removed to obtain the isolation region. The method is simple and easy to implement, and compared with the existing technology, it greatly shortens the process time and is conducive to mass production of batteries.
[0014] According to an embodiment of the present invention, the preparation method further comprises: removing a portion of the BSG layer corresponding to the second region by laser.
[0015] According to an embodiment of the present invention, the first doped layer includes a phosphorus-doped polysilicon layer, and the second doped layer includes a boron-doped polysilicon layer;
[0016] And / or, the boron doping concentration in the boron doped polysilicon layer is 10E21cm -3 -10E22cm -3 .
[0017] According to an embodiment of the present invention, the preparation method further comprises:
[0018] Performing phosphorus diffusion treatment on the intrinsic polysilicon layer located in the second region to obtain a phosphorus-doped polysilicon layer and a PSG layer;
[0019] And / or, the intrinsic polysilicon layer located in the first region is subjected to boron diffusion to obtain a boron-doped polysilicon layer.
[0020] According to an embodiment of the present invention, the preparation method further comprises: performing alkaline etching on the first region, the second region and the isolation region to remove the intrinsic polysilicon layer and the tunneling oxide layer located in the isolation region;
[0021] And / or, acid etching is performed on the first region, the second region and the isolation region to remove the PSG layer and the remaining BSG layer.
[0022] According to an embodiment of the present invention, the preparation method further comprises: forming an anti-reflection layer on the backlight surface of the semiconductor substrate after selectively etching the first region, the second region and the isolation region.
[0023] According to an embodiment of the present invention, the width of the first region is 300-350 μm;
[0024] And / or, the width of the isolation region is 30-60 μm;
[0025] And / or, the width of the second region is 450-500 μm.
[0026] A second aspect of the present invention provides a back-contact solar cell, comprising:
[0027] A semiconductor substrate, wherein the semiconductor substrate has a light-receiving surface and a backlight surface opposite to each other, wherein the backlight surface includes a first region, a second region and an isolation region, wherein the isolation region separates the first region from the second region;
[0028] A tunneling oxide layer and a second doping layer are sequentially stacked on the first region;
[0029] A tunneling oxide layer and a first doping layer are sequentially stacked on the second region;
[0030] The first doping layer and the second doping layer have opposite polarities.
[0031] Thus, a solar cell with a back contact structure is obtained, and the risk of leakage in the isolation region is reduced.
[0032] A third aspect of the present invention provides a battery assembly, comprising a back-contact solar cell obtained according to the preparation method described in the first aspect or the back-contact solar cell described in the second aspect.
[0033] A fourth aspect of the present invention provides a photovoltaic system, comprising the battery assembly described in the third aspect.
[0034] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS
[0035] The above and / or additional aspects and advantages of the present invention will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:
[0036] Figure 1 One of the structural schematic diagrams of the back contact solar cell preparation process provided by the present invention is shown;
[0037] Figure 2 The second structural schematic diagram of the back contact solar cell preparation process provided by the present invention is shown;
[0038] Figure 3 The third structural schematic diagram of the back contact solar cell preparation process provided by the present invention is shown;
[0039] Figure 4The fourth structural schematic diagram of the back contact solar cell preparation process provided by the present invention is shown;
[0040] Figure 5 The fifth structural schematic diagram of the back contact solar cell preparation process provided by the present invention is shown;
[0041] Figure 6 The sixth structural schematic diagram of the back contact solar cell preparation process provided by the present invention is shown.
[0042] Reference numerals:
[0043] Semiconductor substrate 1, light receiving surface 11, backlight surface 12, tunnel oxide layer 2, intrinsic polysilicon layer 3, BSG layer 4, phosphorus-doped polysilicon layer 5, PSG layer 6, boron-doped polysilicon layer 7.
[0044] The first region has a width w1, the second region has a width w2, and the isolation region has a width w3. DETAILED DESCRIPTION
[0045] The embodiments of the present invention are described in detail below. The embodiments described below are exemplary and are only used to explain the present invention, and should not be understood as limiting the present invention.
[0046] It should be understood that when an element or layer is referred to as "on ...", "adjacent to ...", "connected to" or "coupled to" other elements or layers, it can be directly on, adjacent to, connected to or coupled to other elements or layers, or there can be intervening elements or layers. On the contrary, when an element is referred to as "directly on ...", "directly adjacent to ...", "directly connected to" or "directly coupled to" other elements or layers, there is no intervening element or layer. It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the present disclosure, the first element, component, region, layer or part discussed below can be represented as the second element, component, region, layer or part. And when the second element, component, region, layer or part is discussed, it does not mean that the present disclosure necessarily has the first element, component, region, layer or part.
[0047] It should be noted that the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. Further, in the description of the present invention, unless otherwise specified, the meaning of "plurality" is two or more.
[0048] The endpoints and any values of the ranges disclosed in this article are not limited to the precise ranges or values, and these ranges or values should be understood to include values close to these ranges or values. For numerical ranges, the endpoint values of each range, the endpoint values of each range and the individual point values, and the individual point values can be combined with each other to obtain one or more new numerical ranges, which should be considered as specifically disclosed in this article.
[0049] In order to make the present invention more easily understood, certain technical and scientific terms are specifically defined below. Unless otherwise clearly defined elsewhere in this document, all other technical and scientific terms used herein have the meanings commonly understood by those skilled in the art to which the present invention belongs.
[0050] In this document, the terms “include” or “comprising” are open expressions, that is, including the contents specified in the present invention but not excluding other contents.
[0051] In the related art, back-contact solar cells are mostly prepared by laser doping. On the one hand, the presence of more grain boundaries in polysilicon causes uneven diffusion. On the other hand, laser doping will cause more damage and the process window is narrow. The back-contact structure is achieved by multiple depositions of polysilicon, diffusion, laser film opening, etc. The process is lengthy and not conducive to reducing costs, and the leakage problem in the isolation area is still significant. In addition, there is also a method of laser transferring phosphorus slurry and boron slurry to the substrate, and then isolating the n-region and p-region by laser grooving. However, this method has a high slurry cost and a complicated process. There is also a method of separately preparing multiple layers of mask layers and then removing them to achieve the purpose of patterning the n-region and the p-region. However, this method has a cumbersome multi-step mask and removal process, a high cost, and cannot be mass-produced. In addition, the problem of the interface between the n-region and the p-region is not considered. The present invention provides a method for preparing a back-contact solar cell. It only requires that after depositing a tunneling oxide layer, an intrinsic polysilicon layer and a BSG layer, the BSG layer is grooved and doped with elements, and selective etching is performed based on the different corrosion resistances of the intrinsic polysilicon layer and the phosphorus-doped polysilicon layer to alkaline solutions, and the intrinsic polysilicon layer between the isolation regions is removed to obtain the isolation region. The method is simple and easy to implement. Compared with the prior art, it greatly shortens the process time and is conducive to mass production of batteries. At the same time, since the intrinsic polysilicon is completely removed, there is no physical contact between the first region and the second region, so leakage can be avoided. In addition, even if the intrinsic polysilicon is not completely removed, its own conductivity is poor, which can play an isolation role and reduce the occurrence of leakage to a certain extent.
[0052] A first aspect of the present invention provides a method for preparing a back-contact solar cell, comprising:
[0053] (1) A semiconductor substrate 1 is provided, wherein the semiconductor substrate 1 has a light-receiving surface 11 and a backlight surface 12 opposite to each other, and the backlight surface 12 is divided into a first region, a second region, and an isolation region, wherein the isolation region separates the first region from the second region. Figure 1 shown.
[0054] According to a specific embodiment of the present invention, the semiconductor substrate 1 can be selected as a single crystal silicon substrate, and its doping type is not particularly limited. Those skilled in the art can select it according to actual needs. For example, the single crystal silicon substrate is an N-type doped silicon substrate, or a P-type doped silicon substrate. The semiconductor substrate 1 includes a light-receiving surface and a backlight surface, which are relatively distributed. The backlight surface of the semiconductor substrate 1 includes a first area, a second area and an isolation area, wherein the isolation area separates the first area from the second area. Among them, the relative position and relative size of each area are not particularly limited. Those skilled in the art can select it according to actual needs, for example Figure 1The first region is located on the left side of the second region, and the width w1 of the first region is 300-350μm, for example, the width w1 of the first region is 300μm, 310μm, 320μm, 330μm, 340μm, 350μm, etc.; the width w2 of the second region is 450-500μm, for example, 450μm, 460μm, 470μm, 480μm, 490μm, 500μm, etc.; the width w3 of the isolation region is 30-60μm, for example, the width w3 of the isolation region is 30μm, 40μm, 50μm, 60μm, etc. At the same time, the number of each region is not particularly limited, for example, the backlight of the semiconductor substrate 1 has two isolation regions.
[0055] (2) A tunneling oxide layer 2, an intrinsic polysilicon layer 3 and a BSG layer 4 are sequentially formed on the side of the backlight surface 12 away from the semiconductor substrate 1. Figure 2 shown.
[0056] The BSG layer can be used as a barrier layer for the subsequent first doping treatment to protect the second region from being affected by the first doping atoms, and can also be used as a doping source for the subsequent second doping.
[0057] According to a specific embodiment of the present invention, the material of the tunneling oxide layer 2 is not particularly limited, and those skilled in the art may select it according to actual needs. For example, the material of the tunneling oxide layer 2 is silicon oxide, preferably ultra-thin silicon oxide.
[0058] According to a specific embodiment of the present invention, the thicknesses of the tunneling oxide layer 2, the intrinsic polysilicon layer 3 and the BSG layer 4 are not specifically limited. For example, the thickness of the tunneling oxide layer 2 is 1.1-1.5nm, such as 1.1nm, 1.2nm, 1.3nm, 1.4nm, 1.5nm, etc.; the thickness of the intrinsic polysilicon layer 3 is 200-220nm, such as 200nm, 210nm, 220nm, etc.; the thickness of the BSG layer 4 is 80nm-90nm, such as 80nm, 85nm, 90nm, etc.
[0059] According to a specific embodiment of the present invention, the formation method of the tunneling oxide layer 2, the intrinsic polysilicon layer 3 and the BSG layer 4 is not particularly limited, and those skilled in the art can make a selection according to actual needs, for example, by depositing the tunneling oxide layer 2 and the intrinsic polysilicon layer 3 on the backlight surface by LPCVD (low pressure chemical vapor deposition), and by depositing the BSG (borosilicate glass) layer 4 by CVD (chemical vapor deposition).
[0060] (3) removing the portion of the BSG layer 4 corresponding to the second region so that the second region exposes the intrinsic polysilicon layer 3. Figure 3 shown.
[0061] According to a specific embodiment of the present invention, the method of removing part of the BSG layer is not particularly limited, for example, the BSG layer is grooved by laser.
[0062] (4) Performing a first doping treatment on the intrinsic polysilicon layer 3 located in the second region to obtain a first doped layer.
[0063] According to a specific embodiment of the present invention, the polarity of the first doped layer is not particularly limited, and can be selected as N-type or P-type, preferably N-type, such as a phosphorus-doped polysilicon layer. Specifically, the intrinsic polysilicon layer 3 located in the second region can be treated by phosphorus diffusion to form a phosphorus-doped polysilicon layer 5 and a PSG layer 6, such as Figure 4 shown.
[0064] According to a specific embodiment of the present invention, the phosphorus-doped polysilicon layer 5 and the PSG layer 6 can be formed by a conventional high-temperature diffusion process, and the first region is not affected by the BSG barrier.
[0065] According to a specific embodiment of the present invention, the thickness of the phosphorus-doped polysilicon layer 5 and the PSG layer 6 is not particularly limited. For example, the thickness of the phosphorus-doped polysilicon layer 5 is 200-260nm, such as 200nm, 210nm, 220nm, 230nm, 240nm, 250nm, 260nm, etc.; the thickness of the PSG layer 6 is 40-50nm, such as 40nm, 45nm, 50nm, etc.
[0066] (5) Performing a second doping treatment on the intrinsic polycrystalline silicon layer 3 located in the first region to obtain a second doped layer.
[0067] According to a specific embodiment of the present invention, the polarity of the second doping layer is not particularly limited, and can be selected as N-type or P-type, preferably P-type, such as a boron-doped polysilicon layer. Specifically, the intrinsic polysilicon layer 3 located in the first region can be subjected to boron diffusion treatment to form a boron-doped polysilicon layer 7, such as Figure 5 At the same time, because there is a BSG layer in this area, the boron element will diffuse into the intrinsic polysilicon after it is heated and melted, that is, the BSG layer can be used as a doping source for element doping in this step.
[0068] According to a specific embodiment of the present invention, the boron doping concentration in the boron doped polysilicon layer is 10E21cm -3 -10E22cm -3 At this time, there is a 30-60 μm intrinsic polysilicon layer in the structure, which serves as an isolation region between the first region and the second region.
[0069] According to a specific embodiment of the present invention, the thickness of the boron-doped polysilicon layer 7 is not particularly limited. For example, the thickness of the boron-doped polysilicon layer 7 is 200-260nm, such as 200nm, 210nm, 220nm, 230nm, 240nm, 250nm, 260nm, etc.
[0070] (6) Selectively etching the first region, the second region and the isolation region to remove the remaining BSG layer and the intrinsic polysilicon layer 3 and the tunneling oxide layer 2 located in the isolation region.
[0071] According to a specific embodiment of the present invention, when the intrinsic polysilicon layer located in the second region is subjected to phosphorus diffusion to obtain a phosphorus-doped polysilicon layer and a PSG layer, and the intrinsic polysilicon layer located in the first region is subjected to boron diffusion to obtain a boron-doped polysilicon layer, the PSG layer 6, the remaining BSG layer 4, the intrinsic polysilicon layer 3 and the tunneling oxide layer 2 located in the isolation region can be removed by selectively etching the first region, the second region and the isolation region. Figure 6 shown.
[0072] According to a specific embodiment of the present invention, selective etching is achieved based on the different alkali resistance of high-concentration boron-doped polysilicon and intrinsic polysilicon, thereby removing the intrinsic polysilicon layer 3 and the tunneling oxide layer of the isolation region in contact therewith while retaining the boron-doped polysilicon layer 7.
[0073] According to a specific embodiment of the present invention, the type of the alkaline solution is not particularly limited, and KOH, NaOH, TMAH (tetramethylammonium hydroxide) and the like may be selected.
[0074] According to a specific embodiment of the present invention, this step can also be performed by acid etching on the first region, the second region and the isolation region to remove the PSG layer and the remaining BSG layer. The type of acid solution used for acid etching is not particularly limited, and HCl, HF, etc. can be selected.
[0075] According to a specific embodiment of the present invention, the preparation method may further include: after removing the PSG layer 6, the remaining BSG layer 4, the intrinsic polysilicon layer 3 and the tunneling oxide layer 2 located in the isolation region, an anti-reflection layer is formed on the backlight surface of the semiconductor substrate. The material of the anti-reflection layer is not particularly limited, and silicon nitride, silicon oxynitride, etc. may be selected. The thickness of the anti-reflection layer is not particularly limited, and may be 40-80 nm, for example 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, etc.
[0076] According to an embodiment of the present invention, a second aspect of the present invention provides a back contact solar cell, characterized in that it comprises:
[0077] A semiconductor substrate, wherein the semiconductor substrate has a light-receiving surface and a backlight surface opposite to each other, wherein the backlight surface includes a first region, a second region and an isolation region, wherein the isolation region separates the first region from the second region;
[0078] A tunneling oxide layer and a second doping layer are sequentially stacked on the first region;
[0079] A tunneling oxide layer and a first doping layer are sequentially stacked on the second region;
[0080] The first doping layer and the second doping layer have opposite polarities.
[0081] According to a specific embodiment of the present invention, the semiconductor substrate may be a single crystal silicon substrate, and its doping type is not particularly limited. Personnel in the art may select it according to actual needs. For example, the single crystal silicon substrate is an N-type doped silicon substrate, or a P-type doped silicon substrate. The semiconductor substrate includes a light-receiving surface and a backlight surface, which are relatively distributed. The backlight surface of the semiconductor substrate includes a first region, a second region and a spacing region, wherein the spacing region separates the first region from the second region. Among them, the relative position and relative size of each region are not particularly limited. Personnel in the art may select it according to actual needs. For example, the width of the first region is 300-350μm, the width of the second region is 450-500μm, and the width of the isolation region is 30-60μm. At the same time, the number of each region is not particularly limited. For example, the backlight surface of the semiconductor substrate has two spacing regions.
[0082] According to a specific embodiment of the present invention, the material of the tunneling oxide layer is not particularly limited, and those skilled in the art can select it according to actual needs. For example, the material of the tunneling oxide layer is silicon oxide, preferably ultra-thin silicon oxide. The thickness thereof is also not specifically limited, for example, the thickness of the tunneling oxide layer is 1.1-1.5 nm, such as 1.1 nm, 1.2 nm, 1.3 nm, 1.4 nm, 1.5 nm, etc.
[0083] According to a specific embodiment of the present invention, the polarity of the first doping layer is opposite to that of the second doping layer. Preferably, the first doping layer is an N-type doped polysilicon layer, and the second doping layer is a P-type doped polysilicon layer. Specifically, the first doping layer is a phosphorus-doped polysilicon layer, and the second doping layer is a boron-doped polysilicon layer. The thickness thereof is not specifically limited, for example, the thickness of the first doping layer is 200-260 nm, and the thickness of the second doping layer is 200-260 nm.
[0084] According to a specific embodiment of the present invention, the back contact solar cell further includes:
[0085] An anti-reflection layer is arranged on a side of the boron-doped polysilicon layer away from the backlight surface, a surface of the isolation region, and a side of the phosphorus-doped polysilicon layer away from the backlight surface.
[0086] According to an embodiment of the present invention, a third aspect of the present invention provides a battery assembly, comprising a back-contact solar cell obtained according to the preparation method described in the first aspect or a back-contact solar cell described in the second aspect. The battery assembly has the same or similar beneficial effects as the back-contact solar cell, which will not be described in detail here.
[0087] According to an embodiment of the present invention, a fourth aspect of the present invention provides a photovoltaic system, comprising the battery assembly described in the third aspect. The photovoltaic system and the battery assembly have the same or similar beneficial effects, which will not be described in detail here.
[0088] The scheme of the present invention will be explained below in conjunction with the embodiments. It will be appreciated by those skilled in the art that the following embodiments are only used to illustrate the present invention and should not be considered as limiting the scope of the present invention. Where specific techniques or conditions are not indicated in the embodiments, the techniques or conditions described in the literature in this area or the product specifications are used. The reagents or instruments used are not indicated by the manufacturer and are all conventional products that can be obtained commercially.
[0089] Example 1
[0090] A method for preparing a back contact solar cell comprises the following steps:
[0091] (1) depositing a tunnel oxide layer and an intrinsic polysilicon layer on a silicon substrate in sequence by LPCVD, and then depositing a BSG layer by CVD, wherein the oxide layer is made of ultra-thin silicon oxide, and the thicknesses of the tunnel oxide layer, the intrinsic polysilicon layer, and the BSG layer are 1.2 nm, 200 nm, and 80 nm, respectively;
[0092] (2) laser grooving the BSG layer in the second region to form a laser grooving region;
[0093] (3) performing phosphorus diffusion treatment on the intrinsic polysilicon layer located in the second region to form a phosphorus-doped polysilicon layer and a PSG layer, wherein the phosphorus-doped polysilicon layer has a thickness of 220 nm and the PSG layer has a thickness of 50 nm;
[0094] (4) Laser doping is performed in the first region to form a boron-doped polysilicon layer in the first region, and the boron doping concentration is 2E22cm -3 , leaving 30 μm of the intrinsic polysilicon layer as an isolation region between the first region and the second region;
[0095] (5) The system is subjected to alkaline etching, with KOH as the alkaline solution, so as to remove the remaining intrinsic polysilicon layer and the tunnel oxide layer of the isolation region while retaining the boron-doped polysilicon layer, and then use the acidic solution HF to remove the PSG layer and the BSG layer, and finally deposit a 40nm anti-reflection layer.
[0096] Example 2
[0097] A method for preparing a back contact solar cell comprises the following steps:
[0098] (1) depositing a tunnel oxide layer and an intrinsic polysilicon layer on a silicon substrate in sequence by LPCVD, and then depositing a BSG layer by CVD, wherein the oxide layer is made of ultra-thin silicon oxide, and the thicknesses of the tunnel oxide layer, the intrinsic polysilicon layer, and the BSG layer are 1.3 nm, 220 nm, and 90 nm, respectively;
[0099] (2) laser grooving the BSG layer in the second region to form a laser grooving region;
[0100] (3) performing phosphorus diffusion treatment on the intrinsic polysilicon layer located in the second region to form a phosphorus-doped polysilicon layer and a PSG layer, wherein the phosphorus-doped polysilicon layer has a thickness of 200 nm and the PSG layer has a thickness of 40 nm;
[0101] (4) Laser doping is performed in the first region to form a boron-doped polysilicon layer in the first region, and the boron doping concentration is 5E22cm -3 , leaving 60 μm of the intrinsic polysilicon layer as an isolation region between the first region and the second region;
[0102] (5) The system is subjected to alkaline etching, and the alkaline solution is NaOH and TMAH, so as to remove the remaining intrinsic polysilicon layer and the tunnel oxide layer of the isolation area while retaining the boron-doped polysilicon layer, and then use an acidic solution such as HCl to remove the PSG layer and the BSG layer, and finally deposit an 80nm anti-reflection layer.
[0103] Comparative Example 1
[0104] A method for preparing a back contact solar cell comprises the following steps:
[0105] (1) A tunnel oxide layer and a boron-doped polysilicon layer are formed on a silicon substrate in sequence by LPCVD and high-temperature boron diffusion, and a BSG layer is formed on the surface, wherein the thicknesses of the tunnel oxide layer and the boron-doped polysilicon are 1.2 nm, 220 nm, and 50 nm, respectively;
[0106] (2) using laser etching of the n-region BSG layer and combining wet alkaline etching to remove the n-region boron-doped polysilicon layer, the alkaline etching solution may be one or more of KOH, NaOH or TMAH;
[0107] (3) forming a tunnel oxide layer and phosphorus-doped polysilicon by LPCVD and high-temperature phosphorus diffusion, and forming a PSG layer on the surface. The thicknesses of the tunnel oxide layer, phosphorus-doped polysilicon and PSG are 1.2 nm, 200 nm and 50 nm respectively;
[0108] (4) The ink mask is printed in the p-region and the isolation region, and the printing width is 60-120 μm wider than the p-region; the PSG layer, phosphorus-doped polysilicon and tunnel oxide layer in the area outside the ink are removed by wet alkaline etching. The BSG layer on the surface of the boron-doped polysilicon in the p-region is used as an etch stop layer for alkaline etching to protect the boron-doped polysilicon from being etched. Finally, the ink mask is cleaned and removed, and an 80 nm anti-reflection layer is deposited.
[0109] The open circuit voltage (Voc), short circuit current (Jsc), fill factor (Fill Factor), leakage current (IRev1), and photoelectric conversion efficiency (Efficiency) of the back-contact solar cells prepared in each embodiment and comparative example were tested respectively, and the results are shown in Table 1.
[0110] Table 1
[0111] <![CDATA[V OC (V)]]> <![CDATA[J SC (mA / cm 2 )]]> Fill Factor(%) IRev1 Efficiency(%) Example 1 731 42.31 82.21 2.14 25.44 Example 2 733 42.22 82.99 1.58 25.68 Comparative Example 1 732 42.20 82.17 6.74 25.39
[0112] The results show that compared with Comparative Example 1, the IRev1 value of the back-contact solar cell provided by the present invention is smaller, that is, the leakage current is less.
[0113] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, without contradiction.
[0114] Although the embodiments of the present invention have been shown and described above, it is to be understood that the above embodiments are exemplary and are not to be construed as limitations of the present invention. A person skilled in the art may change, modify, replace and vary the above embodiments within the scope of the present invention.
Claims
1. A method for preparing a back contact solar cell, characterized in that: include: Providing a semiconductor substrate, wherein the semiconductor substrate has a light-receiving surface and a backlight surface opposite to each other, and the backlight surface is divided into a first area, a second area, and an isolation area, wherein the isolation area separates the first area from the second area; Forming a tunneling oxide layer, an intrinsic polysilicon layer and a BSG layer in sequence on a side of the backlight surface away from the semiconductor substrate; removing a portion of the BSG layer corresponding to the second region so that the second region exposes the intrinsic polysilicon layer; Performing a first doping treatment on the intrinsic polysilicon layer located in the second region to obtain a first doped layer; Performing a second doping treatment on the intrinsic polysilicon layer located in the first region to obtain a second doped layer; Selectively etching the first region, the second region and the isolation region to remove the remaining BSG layer and the intrinsic polysilicon layer and the tunnel oxide layer located in the isolation region; The first doping layer and the second doping layer have opposite polarities.
2. The preparation method according to claim 1, characterized in that: The preparation method further includes: removing a portion of the BSG layer corresponding to the second region by laser.
3. The preparation method according to claim 1, characterized in that: The first doped layer comprises a phosphorus-doped polysilicon layer, and the second doped layer comprises a boron-doped polysilicon layer; And / or, the boron doping concentration in the boron doped polysilicon layer is 10E21cm -3 -10E22cm -3 .
4. The preparation method according to claim 1, characterized in that: The preparation method further comprises: Performing phosphorus diffusion treatment on the intrinsic polysilicon layer located in the second region to obtain a phosphorus-doped polysilicon layer and a PSG layer; And / or, the intrinsic polysilicon layer located in the first region is subjected to boron diffusion to obtain a boron-doped polysilicon layer.
5. The preparation method according to claim 4, characterized in that: The preparation method further comprises: performing alkaline etching on the first region, the second region and the isolation region to remove the intrinsic polysilicon layer and the tunnel oxide layer located in the isolation region; And / or, acid etching is performed on the first region, the second region and the isolation region to remove the PSG layer and the remaining BSG layer.
6. The preparation method according to claim 1, characterized in that: The preparation method further comprises: forming an anti-reflection layer on the backlight surface of the semiconductor substrate after selectively etching the first region, the second region and the isolation region.
7. The preparation method according to claim 1, characterized in that: The width of the first region is 300-350 μm; And / or, the width of the isolation region is 30-60 μm; And / or, the width of the second region is 450-500 μm.
8. A back contact solar cell, characterized in that: include: A semiconductor substrate, wherein the semiconductor substrate has a light-receiving surface and a backlight surface opposite to each other, wherein the backlight surface includes a first region, a second region and an isolation region, wherein the isolation region separates the first region from the second region; A tunneling oxide layer and a second doping layer are sequentially stacked on the first region; A tunneling oxide layer and a first doping layer are sequentially stacked on the second region; The first doping layer and the second doping layer have opposite polarities.
9. A battery assembly, characterized in that: It comprises a back-contact solar cell obtained according to the preparation method according to any one of claims 1 to 7 or a back-contact solar cell according to claim 8.
10. A photovoltaic system, characterized in that: A battery assembly comprising the battery assembly of claim 9.
Citation Information
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Back contact photovoltaic cell, preparation method thereof and cell assembly
CN120091650A