Display panel

Abstract

An embodiment of the present invention provides a display panel comprising: a substrate comprising a first region, a second region at least partially surrounding the first region, and an intermediate region between the first region and the second region; an insulating layer disposed on the substrate; a plurality of display elements disposed in the second area and each including a pixel electrode, a counter electrode, and an intermediate layer between the pixel electrode and the counter electrode; a groove disposed in the middle region; a thin film encapsulation layer covering the plurality of display elements and including an inorganic encapsulation layer and an organic encapsulation layer; and an inorganic layer disposed on the thin film encapsulation layer, in which at least one sub-layer included in the intermediate layer is broken by the groove, and the inorganic layer directly contacts the insulating layer across an edge of the at least one sub-layer located in the intermediate region and an edge of the inorganic encapsulation layer located in the intermediate region.

Description

[0001] This application is a divisional application of the invention patent application with the application date of November 13, 2019, application number 201980092094.0, and name “Display Panel”. Technical Field

[0002] One or more embodiments relate to a display panel having a first area inside a display area thereof and a display device including the display panel. Background Art

[0003] Recently, the use of display devices has been diversified. In addition, as display devices have become thinner and lighter, the scope of their use has expanded.

[0004] As the proportion of the display area in the display device has been expanded, various functions combined with or associated with the display device have been added. As a way to add various functions to the display device while expanding the display area, a display device having a display area in which various elements can be arranged is being studied. Summary of the invention

[0005] Technical issues

[0006] The present disclosure may provide a display panel having a first area in which various types of components may be arranged, and a display device including the display panel. However, this purpose is only an example and does not limit the scope of the present disclosure.

[0007] Solution to the problem

[0008] According to an embodiment, a display panel includes: a substrate including a first region, a second region at least partially surrounding the first region, and an intermediate region between the first region and the second region; an insulating layer disposed on the substrate; a plurality of display elements located in the second region and each including a pixel electrode, a counter electrode, and an intermediate layer between the pixel electrode and the counter electrode; a groove disposed in the intermediate region; a thin film encapsulation layer covering the plurality of display elements and including an inorganic encapsulation layer and an organic encapsulation layer; and an inorganic layer disposed on the thin film encapsulation layer, wherein at least one sublayer included in the intermediate layer is disconnected around the groove, and the inorganic layer directly contacts the insulating layer over an edge of the at least one sublayer located in the intermediate region and an edge of the inorganic encapsulation layer located in the intermediate region.

[0009] The insulating layer may include an inorganic insulating material. The counter electrode may be disconnected around the groove.

[0010] An edge of the at least one sub-layer, an edge of the counter electrode, and an edge of the inorganic encapsulation layer may be spaced apart from the first region.

[0011] A portion of the organic encapsulation layer may be in the groove.

[0012] The at least one sublayer may include at least one of a hole transport layer, a hole injection layer, an electron transport layer, and an electron injection layer.

[0013] The display panel may further include: a covering layer disposed under the inorganic layer and covering an edge of the at least one sub-layer and an edge of the inorganic encapsulation layer.

[0014] The cover layer may include an organic insulating material.

[0015] In a plan view, the cover layer may have an annular shape surrounding the first region.

[0016] An angle of an inclined surface of the cover layer covering an edge of the at least one sublayer and an edge of the inorganic encapsulation layer may be smaller than an angle of an inclined surface formed by an edge of the at least one sublayer and an edge of the inorganic encapsulation layer.

[0017] The display panel may further include: a transparent layer between the inorganic layer and the thin film encapsulation layer.

[0018] The thin film encapsulation layer may further include: an upper inorganic encapsulation layer disposed on the inorganic encapsulation layer, with the organic encapsulation layer between the upper inorganic encapsulation layer and the inorganic encapsulation layer, and an edge of the upper inorganic encapsulation layer may form a step with an edge of the inorganic encapsulation layer.

[0019] According to an embodiment, a display panel includes: a substrate including a first region, a second region at least partially surrounding the first region, and an intermediate region between the first region and the second region; an insulating layer disposed on the substrate; a plurality of display elements located in the second region and each including a pixel electrode, a counter electrode, and an intermediate layer between the pixel electrode and the counter electrode; a groove disposed in the intermediate region; a thin film encapsulation layer covering the plurality of display elements; and an inorganic layer disposed on the thin film encapsulation layer, wherein at least one sublayer included in the intermediate layer is disconnected around the groove, and the inorganic layer extends toward the first region over an edge of the at least one sublayer located in the intermediate region and an edge of the thin film encapsulation layer located in the intermediate region.

[0020] The thin film encapsulation layer may include a first inorganic encapsulation layer, an organic encapsulation layer on the first inorganic encapsulation layer, and a second inorganic encapsulation layer on the organic encapsulation layer, and the inorganic layer may directly contact the insulating layer across edges of the first and second inorganic encapsulation layers.

[0021] An edge of the organic encapsulating layer may be closer to the second region than an edge of the first inorganic encapsulating layer and an edge of the second inorganic encapsulating layer.

[0022] An edge of the second inorganic encapsulating layer may form a step with an edge of the first inorganic encapsulating layer.

[0023] The at least one sublayer may include at least one of a hole transport layer, a hole injection layer, an electron transport layer, and an electron injection layer.

[0024] The counter electrode may be disconnected around the groove, and an edge of the counter electrode may be spaced apart from the first region by a certain distance.

[0025] The inorganic layer may cover the edge of the counter electrode.

[0026] The display panel may further include: a covering layer covering an edge of the thin film encapsulation layer.

[0027] The capping layer may be between the edge of the thin film encapsulation layer and the inorganic layer.

[0028] When viewed from a direction perpendicular to the upper surface of the substrate, the cover layer may have a ring shape surrounding the first region.

[0029] When viewed from a direction perpendicular to an upper surface of the substrate, the cover layer may have an annular shape surrounding the first region, and the groove may be closer to the second region than the cover layer.

[0030] The display panel may further include: a transparent layer between the inorganic layer and the thin film encapsulation layer, and an edge of the transparent layer may be spaced apart from the first region.

[0031] The inorganic layer may cover the edges of the transparent layer.

[0032]

[0011] Further aspects, features and advantages in addition to those described above will become apparent from the accompanying drawings, the appended claims and the detailed description of the present disclosure.

[0033] Disclosure of beneficial effects

[0034] The display panel according to one or more embodiments can prevent external impurities such as moisture from damaging the display area around the first area. However, this effect is an example, and the effect according to the embodiment will be described in detail through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 is a perspective view schematically showing a display device according to an embodiment.

[0036] Figure 2 is a cross-sectional view briefly showing a display device according to an embodiment.

[0037] Figure 3 is a cross-sectional view briefly showing a display device according to another embodiment.

[0038] Figures 4a to 4d is a cross-sectional view schematically showing a display panel according to an embodiment.

[0039] Figure 5 is a plan view schematically showing a display panel according to an embodiment.

[0040] Figure 6 is an equivalent circuit diagram schematically showing a pixel of a display panel according to an embodiment.

[0041] Figure 7 is a plan view showing a portion of a display panel according to an embodiment.

[0042] Figure 8 is a cross-sectional view of a display panel according to an embodiment.

[0043] Figures 9a to 9d is a cross-sectional view illustrating a process of manufacturing a display panel with a groove as a focus according to an embodiment.

[0044] Fig.9e yes Figure 9d A variation of the embodiment of FIG.

[0045] Fig.10 yes Figure 8 An enlarged cross-sectional view of region X.

[0046] Fig.11 is a plan view showing elements arranged in a first area and a middle area of ​​a display panel according to an embodiment.

[0047] Fig.12 is a cross-sectional view of a display panel according to another embodiment.

[0048] Fig.13 is a cross-sectional view of a display panel according to another embodiment.

[0049] Fig.14 is a cross-sectional view of a display panel according to another embodiment.

[0050] Fig.15 is a cross-sectional view of a display panel according to another embodiment.

[0051] Fig.16 is a plan view of a display panel according to another embodiment.

[0052] Fig.17 is a plan view of a display panel according to another embodiment.

[0053] Fig.18 is a cross-sectional view of a display panel according to an embodiment. DETAILED DESCRIPTION

[0054] Because the present disclosure can have various modified embodiments, embodiments are shown in the drawings and described with respect to the embodiments. By referring to the embodiments described with reference to the drawings, the effects and features of the present disclosure and the methods for achieving them will be clear. However, the present disclosure can be implemented in many different forms and configurations and should not be construed as being limited to the embodiments set forth herein.

[0055] Hereinafter, embodiments will be described with reference to the accompanying drawings, wherein like reference numerals denote like elements throughout the present disclosure and repeated descriptions thereof will be omitted.

[0056] Although terms such as "first", "second", etc. may be used to describe various components, these components are not limited to the above terms. The above terms are only used to distinguish one component from another.

[0057] Unless the context clearly indicates otherwise, an expression used in the singular includes the expression in the plural.

[0058] It will be understood that the terms “comprises” and / or “comprising” used herein specify the presence of stated features or elements, but do not preclude the presence or addition of one or more other features or elements.

[0059] It will also be understood that when a layer, region or element is referred to as being "formed on" another layer, region or element, it can be directly or indirectly formed on the other layer, region or element. That is, for example, one or more intervening layers, regions or elements may be present therebetween.

[0060] In the drawings, the sizes of components in the drawings may be exaggerated or reduced for convenience of explanation. In other words, since the sizes and thicknesses of components in the drawings are arbitrarily shown for convenience of explanation, the following embodiments are not limited thereto.

[0061] When the embodiments can be implemented differently, the order of processes can be performed differently from the order described. For example, two consecutively described processes can be performed substantially simultaneously or in an order opposite to the order described.

[0062] It will be understood that when a layer, region, or component is referred to as being connected to another layer, region, or component, it may be directly or indirectly connected to the other layer, region, or component. That is, for example, there may be intermediate layers, regions, or components between them. For example, when layers, regions, elements, etc. are referred to as being "electrically connected," they may be directly electrically connected, or layers, regions, or elements may be indirectly electrically connected and there may be intermediate layers, regions, or elements, etc. between them.

[0063] Figure 1 is a perspective view schematically showing a display device according to an embodiment.

[0064] Reference Figure 1 The display device 1 includes a first area OA and a display area DA, which is a second area at least partially surrounding the first area OA. The display device 1 can provide an image by using light emitted from a plurality of pixels arranged in the display area DA. In some embodiments, Figure 1 1 and 2. The first area OA is shown to be arranged inside the display area DA, and the first area OA may be completely surrounded by the display area DA. The first area OA may be arranged with the following reference Figure 2 Describes the area of ​​the component.

[0065] The middle area MA as the third area is arranged between the first area OA and the display area DA as the second area, and the display area DA may be surrounded by the outer area PA as the fourth area. The middle area MA and the outer area PA may be a kind of non-display area in which pixels are not arranged. The middle area MA may be completely surrounded by the display area DA, and the display area DA may be completely surrounded by the outer area PA.

[0066] In the following description, an organic light-emitting display is described as an example of a display device 1 according to an embodiment, but the display device according to the present disclosure is not limited thereto. In another embodiment, various types of display devices (such as an inorganic light-emitting display (or an inorganic electroluminescent (EL) display), a quantum dot light-emitting display, etc.) may be used. For example, the emission layer of the display element provided in the display device 1 may include an organic material, an inorganic material, a quantum dot, an organic material and a quantum dot, or an inorganic material and a quantum dot.

[0067] exist Figure 1 In the embodiment, one first area OA is provided and the first area OA is substantially circular, but the present disclosure is not limited thereto. The number of first areas OA may be two or more, and the shape of each first area OA may be changed in various ways (such as circular, elliptical, polygonal, star-shaped, diamond-shaped, etc.).

[0068] Figure 2 is a diagram briefly showing the embodiment of the invention. Figure 1 A cross-sectional view of the display device taken along line II-II' in FIG. Figure 3 is a cross-sectional view briefly showing a display device according to another embodiment.

[0069] Reference Figure 2 , the display device 1 may include a display panel 10, an input sensing layer 40 and an optical functional layer 50 arranged on the display panel 10, and these elements may be covered by a window 60. The display device 1 may be various electronic devices such as a mobile phone, a notebook computer, and a smart watch.

[0070] The display panel 10 may display an image. The display panel 10 includes pixels arranged in a display area DA. Each of the pixels may include a display element and a pixel circuit connected to the display element. The display element may include an organic light emitting diode, an inorganic light emitting diode, a quantum dot light emitting diode, or the like.

[0071] The input sensing layer 40 may obtain coordinate information according to an external input (e.g., a touch event). The input sensing layer 40 may include a sensing electrode (or a touch electrode) and a trace connected to the sensing electrode. The input sensing layer 40 may be arranged on the display panel 10. The input sensing layer 40 may sense an external input in a mutual capacitance method or / and a self-capacitance method.

[0072] The input sensing layer 40 may be directly formed on the display panel 10 or may be separately formed and then bonded to the display panel 10 through an adhesive layer such as an optically clear adhesive (OCA). For example, the input sensing layer 40 may be continuously formed after a process of forming the display panel 10 is performed, in which case the adhesive layer may not be located between the input sensing layer 40 and the display panel 10. Figure 2 It is shown that the input sensing layer 40 is arranged between the display panel 10 and the optical functional layer 50 , but in another embodiment, the input sensing layer 40 may be arranged on the optical functional layer 50 .

[0073] The optical functional layer 50 may include an anti-reflection layer. The anti-reflection layer may reduce the reflectivity of light (external light) incident from the outside through the window 60 toward the display panel 10. The anti-reflection layer may include a retarder and a polarizer. The retarder may be a film-type retarder or a liquid crystal coating retarder, and may include a λ / 2 retarder and / or a λ / 4 retarder. The polarizer may also be a film-type polarizer or a liquid crystal coating polarizer. The film-type polarizer may include a stretchable synthetic resin film, and the liquid crystal coating polarizer may include liquid crystals arranged in a specific arrangement. Each of the retarder and the polarizer may also include a protective film. The retarder and the polarizer itself or the protective film may correspond to the base layer of the anti-reflection layer.

[0074] In another embodiment, the anti-reflection layer may include a black matrix and a color filter. The color filter may be arranged by considering the color of the light emitted from each of the pixels of the display panel 10. Each of the color filters may include a red, green or blue pigment or dye. Optionally, in addition to the above-mentioned pigment or dye, each of the color filters may also include quantum dots. Optionally, some of the color filters may not include the above-mentioned pigment or dye, and may include scattering particles such as titanium oxide.

[0075] In another embodiment, the anti-reflection layer may include a destructive interference structure. The destructive interference structure may include a first reflective layer and a second reflective layer arranged on different layers from each other. The first reflected light and the second reflected light respectively reflected by the first reflective layer and the second reflective layer may destructively interfere with each other, and thus, the external light reflectivity may be reduced.

[0076] The optical function layer 50 may include a lens layer. The lens layer may improve the emission efficiency of light emitted from the display panel 10, or may reduce color deviation. The lens layer may include a layer having a concave lens shape or a convex lens shape, and / or may include a plurality of layers having different refractive indices from each other. The optical function layer 50 may include both the anti-reflection layer and the lens layer described above, or may include one of them.

[0077] The display panel 10, the input sensing layer 40 and / or the optical function layer 50 may include an opening. In an embodiment, Figure 2 The display panel 10, the input sensing layer 40, and the optical function layer 50 are shown to include first to third openings 10H, 40H, and 50H, respectively, wherein the first to third openings 10H, 40H, and 50H overlap each other. The first to third openings 10H, 40H, and 50H may be positioned to correspond to the first area OA. In another embodiment, at least one of the display panel 10, the input sensing layer 40, and the optical function layer 50 may not include an opening. For example, one or two of the display panel 10, the input sensing layer 40, and the optical function layer 50 may not include an opening. Optionally, as Figure 3 As shown in , the display panel 10 , the input sensing layer 40 , and the optical function layer 50 may not include openings.

[0078] The first area OA may be a component area (eg, a sensor area, a camera area, a speaker area, etc.) in which components 20 for adding various functions to the display device 1 are arranged. Figure 2 As shown in FIG. 1 , the component 20 may be within the first to third openings 10H, 40H, and 50H. Figure 3 As shown in , the component 20 may be disposed below the display panel 10 .

[0079] Component 20 may include electronic components. For example, component 20 may be an electronic component that uses light or sound. For example, the electronic component may include a sensor that uses light (such as an infrared sensor), a camera that receives light and captures an image, a sensor that outputs and senses light or sound to measure distance or recognize fingerprints, a small lamp that outputs light, a speaker that outputs sound, and the like. In the case of an electronic component that uses light, light of various bands (such as visible light, infrared light, and ultraviolet light) can be used. In the case of an electronic component that uses sound, sound of an ultrasonic band or other various frequency bands can be used. In some embodiments, the first area OA may correspond to a transmission area, and light or / and sound output from component 20 to the outside or traveling from the outside toward the electronic component may pass through the transmission area.

[0080] In another embodiment, when the display device 1 is used as a smart watch or a dashboard of a vehicle, the component 20 may be an element such as a clock hand or a needle indicating information (e.g., the speed of the vehicle, etc.). When the display device 1 includes a clock hand or a dashboard for a vehicle, the component 20 may pass through the window 60 and be exposed to the outside, and the window 60 may include an opening corresponding to the first area OA.

[0081] As described above, the assembly 20 may include an element (or elements) associated with the function of the display panel 10, or may include elements such as accessories that improve the aesthetics of the display panel 10. Although not described in detail in FIG. Figure 2 and Figure 3 , but a layer including OCA or the like may be between the window 60 and the optical functional layer 50 .

[0082] Figures 4a to 4d is a cross-sectional view schematically showing a display panel according to an embodiment.

[0083] Reference Figure 4a The display panel 10 includes a display layer 200 disposed on a substrate 100. The substrate 100 may include a glass material or a polymer resin. The substrate 100 may be formed in multiple layers. For example, Figure 4a As shown in the enlarged view of FIG. 1 , the substrate 100 may include a first base layer 101 , a first barrier layer 102 , a second base layer 103 , and a second barrier layer 104 .

[0084] Each of the first base layer 101 and the second base layer 103 may include a polymer resin. For example, the first base layer 101 and the second base layer 103 may include a polymer resin such as polyethersulfone (PES), polyarylate (PAR), polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyimide (PI), polycarbonate, cellulose triacetate (TAC), cellulose acetate propionate (CAP), etc. The polymer resin may be transparent.

[0085] Each of the first barrier layer 102 and the second barrier layer 104 may be a barrier layer that prevents penetration of foreign substances, and may include a material such as silicon nitride (SiN x , x>0) and silicon oxide (SiO x , x>0) of a single layer or multiple layers of inorganic material.

[0086] The display layer 200 includes a plurality of pixels. The display layer 200 may include a display element layer 200A and a pixel circuit layer 200B, wherein the display element layer 200A includes a display element arranged for each pixel, and the pixel circuit layer 200B includes a pixel circuit arranged for each pixel and an insulating layer. Each pixel circuit may include a thin film transistor and a storage capacitor, and each of the display elements may include an organic light emitting diode (OLED).

[0087] The display element of the display layer 200 may be covered with an encapsulation member such as a thin film encapsulation layer 300, and the inorganic layer 520 may be arranged on the thin film encapsulation layer 300. The inorganic layer 520 may cover the edge (or end) of the thin film encapsulation layer 300 in the middle area MA. The inorganic layer 520 may extend further toward the first area OA than the edge of the thin film encapsulation layer 300 in the middle area MA, and contact a layer arranged below the edge of the thin film encapsulation layer 300. The inorganic layer 520 may include an inorganic insulating material, and the inorganic insulating material may include, for example, silicon nitride, silicon oxide, silicon oxynitride, and the like.

[0088] When the display panel 10 includes a multi-layer substrate and a thin film encapsulation layer, the flexibility of the display panel 10 may be improved. The display panel 10 may include a first opening 10H penetrating the display panel 10. The first opening 10H may be located in the first area OA, in which case the first area OA may be an opening area.

[0089] Figure 4a The substrate 100, the thin film encapsulation layer 300 and the inorganic layer 520 are shown to include through holes 100H, 300H and 520H, respectively, and the through holes 100H, 300H and 520H correspond to the first opening 10H of the display panel 10. The display layer 200 may further include a through hole 200H corresponding to the first area OA.

[0090] In another embodiment, if Figure 4b As shown in , the substrate 100 may not include a through hole corresponding to the first area OA. The display element layer 200A may not be located in the first area OA, and the pixel circuit layer 200B may be arranged in the first area OA. The thin film encapsulation layer 300 may include a through hole 300H corresponding to the first area OA. Figure 4bAs shown in FIG. 5 , the inorganic layer 520 may include a through hole 520H corresponding to the first area OA, or as shown in FIG. Figure 4c As shown in , the inorganic layer 520 may cover the first area OA without a through hole.

[0091] Figures 4a to 4c 200A is not arranged in the first area OA, but the present disclosure is not limited thereto. Figure 4d As shown in , the auxiliary display element layer 200C may be located in the first area OA. The auxiliary display element layer 200C may include a display element having a structure different from the display element of the display element layer 200A and / or operating in a manner different from the display element of the display element layer 200A. In an embodiment, each pixel of the display element layer 200A may include an effective organic light emitting diode, and the auxiliary display element layer 200C may include a pixel including an invalid organic light emitting diode. When the auxiliary display element layer 200C includes an invalid organic light emitting diode as a display element, the elements constituting the pixel circuit may not be below the display element. For example, even if a transistor and a storage capacitor are arranged for each pixel, the portion of the pixel circuit layer 200B located below the auxiliary display element layer 200C may not have a transistor and a storage capacitor.

[0092] In another embodiment, the auxiliary display element layer 200C may have a display element of the same type as the display element of the display element layer 200A (e.g., an inactive organic light emitting diode), but the pixel circuits thereunder may have different structures from each other. For example, the pixel circuits below the auxiliary display element layer 200C (e.g., a pixel circuit having a light shielding film between the substrate and the transistor) may include a different structure from the pixel circuits below the display element layer 200A. Alternatively, the display elements of the auxiliary display element layer 200C may be operated according to control signals different from the control signals of the display elements of the display element layer 200A.

[0093] Components that do not require relatively high transmittance (e.g., infrared sensors, etc.) may be arranged in the first area OA in which the auxiliary display element layer 200C is arranged. In this case, the first area OA may be a component area and an auxiliary display area. The display element layer 200A may be covered with a thin film encapsulation layer 300, and the inorganic layer 520 may cover the thin film encapsulation layer 300. The inorganic layer 520 may extend farther than the thin film encapsulation layer 300 in the middle area MA. The inorganic layer 520 may also cover the auxiliary display element layer 200C of the first area OA. Although not shown, the encapsulation layer covering the auxiliary display element layer 200C may be arranged between the auxiliary display element layer 200C and the inorganic layer 520, and the encapsulation layer on the auxiliary display element layer 200C and the thin film encapsulation layer 300 on the display element layer 200A may have the same structure as each other or different structures from each other.

[0094] Figure 5 is a plan view schematically showing a display panel according to an embodiment, Figure 6 is an equivalent circuit diagram schematically showing a pixel of a display panel according to an embodiment.

[0095] Reference Figure 5 , the display panel 10 may include a display area DA, a first area OA, a middle area MA, and an outer area PA. Figure 5 The substrate 100 of the display panel 10 is shown. For example, the substrate 100 may have a display area DA, a first area OA, a middle area MA, and an outer area PA. Alternatively, the substrate 100 may have areas corresponding to the first area OA, the middle area MA, and the outer area PA of the display panel 10, respectively.

[0096] The display panel 10 may include a plurality of pixels P arranged in a display area DA. Figure 6 As shown in , each of the pixels P may include a pixel circuit PC and an organic light emitting diode OLED as a display element connected to the pixel circuit PC. The pixel circuit PC may include a first thin film transistor T1, a second thin film transistor T2, and a storage capacitor Cst. For example, each of the pixels P may emit one of red light, green light, and blue light through the organic light emitting diode OLED, or may emit one of red light, green light, blue light, and white light through the organic light emitting diode OLED.

[0097] The second thin film transistor T2 as a switching thin film transistor is connected to the scan line SL and the data line DL, and can transfer the data voltage received from the data line DL to the first thin film transistor T1 according to the switching voltage received from the scan line SL. The storage capacitor Cst is connected to the second thin film transistor T2 and the driving voltage line PL, and can store a voltage corresponding to a voltage difference between the data voltage received from the second thin film transistor T2 and the first power voltage ELVDD applied to the driving voltage line PL.

[0098] The first thin film transistor T1 as a driving thin film transistor is connected to the driving voltage line PL and the storage capacitor Cst, and can control the driving current flowing from the driving voltage line PL to the organic light emitting diode OLED corresponding to the voltage stored in the storage capacitor Cst. The organic light emitting diode OLED can emit light with brightness according to the driving current. The counter electrode (e.g., cathode) of the organic light emitting diode OLED can receive the second power voltage ELVSS.

[0099] although Figure 6 The pixel circuit PC is shown to include two thin film transistors and one storage capacitor, but the present disclosure is not limited thereto. The number of thin film transistors and / or the number of storage capacitors may vary according to the design of the pixel circuit PC.

[0100] Refer again Figure 5 , the middle area MA may surround the first area OA. The middle area MA is an area in which a display element such as an organic light emitting diode emitting light is not arranged, and a signal line configured to provide a signal to the pixels P arranged around the first area OA may pass through the middle area MA. A scan driver 1100 configured to provide a scan signal to each of the pixels P, a data driver 1200 configured to provide a data signal to each of the pixels P, and a main power line (not shown) configured to provide a first power voltage and a second power voltage, etc. may be arranged in the outer area PA. Figure 5 The data driver 1200 is shown to be arranged adjacent to one side of the substrate 100. However, according to another embodiment, the data driver 1200 may be arranged on a flexible printed circuit board (FPCB) electrically connected to a pad (also referred to as a "pad") arranged at one side of the display panel 10.

[0101] Figure 7 is a plan view showing part of a display panel according to an embodiment, and shows a signal line located in a middle area.

[0102] Reference Figure 7, the pixels P are arranged in the display area DA around the first area OA. The pixels P may be spaced apart from each other relative to the first area OA. In a plan view, the pixels P may be arranged above the first area OA and below the first area OA, and the pixels P may be arranged on each of the left and right sides of the first area OA.

[0103] Traces adjacent to the first area OA from among traces configured to supply signals to pixels P may bypass the first area OA. Some of the data lines DL from among the data lines passing through the display area DA may extend in the y-direction as a whole to provide data signals to pixels P arranged above and below the first area OA, and may bypass along the edge of the first area OA in the middle area MA. In a plan view, some of the scan lines SL from among the scan lines passing through the display area DA may extend in the x-direction as a whole to provide scan signals to pixels P arranged at the left and right sides of the first area OA, and may bypass along the edge of the first area OA in the middle area MA. Figure 7 , portions bent along the edge of the first area OA correspond to the detour portion SL-C of the scan line SL and the detour portion DL-C of the data line DL, respectively. The detour portion SL-C of the scan line SL and the extension portion SL-E of the scan line SL passing through the display area DA may be formed as a single body on the same layer. The detour portion DL-C of the data line DL and the extension portion DL-E of the data line DL passing through the display area DA may be formed on different layers from each other and may be electrically connected to each other through the contact hole CNT.

[0104] Figure 8 According to the embodiment along Figure 7 A cross-sectional view of the display panel taken along line VIII-VIII' in FIG. Figures 9a to 9d yes Figure 8 A cross-sectional view of a region IX in FIG. 1 and illustrating a manufacturing process of a display panel with a groove as a focus according to an embodiment, Fig.9e Shows Figure 9d A variation of the embodiment, Fig.10 yes Figure 8 An enlarged cross-sectional view of region X in FIG. Fig.11 is a plan view showing elements arranged in a first area and a middle area of ​​a display panel according to an embodiment, Fig.12 is a cross-sectional view of a display panel according to another embodiment. For ease of description, Fig.11 The groove G, the partition wall 510, the organic encapsulation layer 320, and the cover layer 530 among the elements of the display panel are shown.

[0105] Reference Figure 8 The display area DA of the substrate 100 may include a polymer resin. In the embodiment, as described above with reference to Figure 4a As described, the substrate 100 may include a multi-layer structure.

[0106] The buffer layer 201 may be formed on the substrate 100 to prevent impurities from penetrating into the semiconductor layer Act of the thin film transistor TFT. The buffer layer 201 may include an inorganic insulating material such as silicon nitride, silicon oxynitride, and silicon oxide, and may be a single layer or multiple layers including the above inorganic insulating material.

[0107] The pixel circuit PC may be disposed on the buffer layer 201. The pixel circuit PC includes a thin film transistor TFT and a storage capacitor Cst. The thin film transistor TFT may include a semiconductor layer Act, a gate electrode GE, a source electrode SE, and a drain electrode DE. Figure 8 The thin film transistor TFT shown in FIG. 1 may correspond to the thin film transistor TFT shown in FIG. Figure 6 In the present embodiment, a top gate transistor (wherein the gate electrode GE is arranged above the semiconductor layer Act with the gate insulating layer 203 therebetween) is shown, but according to another embodiment, the thin film transistor TFT may be a bottom gate transistor.

[0108] The semiconductor layer Act may include polycrystalline silicon. Alternatively, the semiconductor layer Act may include amorphous silicon, an oxide semiconductor, an organic semiconductor, etc. The gate electrode GE may include a low-resistance metal material. The gate electrode GE may include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and may include a single layer or multiple layers including the above materials.

[0109] The gate insulating layer 203 between the semiconductor layer Act and the gate electrode GE may include an inorganic insulating material such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, etc. The gate insulating layer 203 may be a single layer or multiple layers including the above materials.

[0110] Each of the source electrode SE and the drain electrode DE may include a material having relatively good conductivity. Each of the source electrode SE and the drain electrode DE may include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and may include a single layer or multiple layers including the above materials. In an embodiment, each of the source electrode SE and the drain electrode DE may have a multilayer structure of Ti / Al / Ti.

[0111] The storage capacitor Cst may include a lower electrode CE1 and an upper electrode CE2 stacked on each other with the first interlayer insulating layer 205 therebetween. The storage capacitor Cst may be stacked with the thin film transistor TFT. In this regard, Figure 8It is shown that the gate electrode GE of the thin film transistor TFT is the lower electrode CE1 of the storage capacitor Cst. In another embodiment, the storage capacitor Cst may not overlap with the thin film transistor TFT. The storage capacitor Cst may be covered by the second interlayer insulating layer 207. The upper electrode CE2 may include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and may be a single layer or multiple layers including the above materials.

[0112] Each of the first and second interlayer insulating layers 205 and 207 may include an inorganic insulating material such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium oxide, tantalum oxide, and hafnium oxide. Each of the first and second interlayer insulating layers 205 and 207 may be a single layer or multiple layers including the above materials.

[0113] The pixel circuit PC including the thin film transistor TFT and the storage capacitor Cst may be covered with a planarization insulating layer 209. The planarization insulating layer 209 may include an approximately flat top surface. The planarization insulating layer 209 may include an organic material, such as a general polymer (such as polymethyl methacrylate (PMMA) or polystyrene (PS)), a polymer derivative with a phenolic group, an acryl polymer, an imide polymer, an aryl ether polymer, an amide polymer, a fluorine polymer, a paraxylene polymer, a vinyl alcohol polymer, and any blend thereof. In an embodiment, the planarization insulating layer 209 may include polyimide. Alternatively, the planarization insulating layer 209 may include an inorganic insulating material, or may include an inorganic insulating material and an organic insulating material.

[0114] The pixel electrode 221 may be formed on the planarization insulating layer 209. The pixel electrode 221 may include a conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In 2 O 3 ), indium gallium oxide (IGO) or aluminum zinc oxide (AZO). In another embodiment, the pixel electrode 221 may include a reflective layer including silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr) or any mixture thereof. In another embodiment, the pixel electrode 221 may also include ITO, IZO, ZnO or In on / under the reflective layer. 2 O 3 The formed layer.

[0115] The pixel defining layer 211 may be formed on the pixel electrode 221. The pixel defining layer 211 includes an opening and may cover the edge of the pixel electrode 221, and the upper surface of the pixel electrode 221 is exposed through the opening. The pixel defining layer 211 may include an organic insulating material. Alternatively, the pixel defining layer 211 may include an inorganic insulating material, such as silicon nitride (SiN x ), silicon oxynitride (SiON) or silicon oxide (SiO x ). Optionally, the pixel defining layer 211 may include an organic insulating material and an inorganic insulating material.

[0116] The intermediate layer 222 may include an emission layer 222b. The intermediate layer 222 may include a first functional layer 222a disposed below the emission layer 222b and / or a second functional layer 222c disposed above the emission layer 222b. The emission layer 222b may include a polymer or a low molecular weight organic material that emits color light.

[0117] The first functional layer 222a may be a single layer or a multilayer. For example, when the first functional layer 222a is formed of a polymer material, the first functional layer 222a may include a hole transport layer (HTL) having a single layer structure, and may be formed of poly (3,4-ethylenedioxythiophene) (PEDOT) or polyaniline (PANI). When the first functional layer 222a is formed of a low molecular weight material, the first functional layer 222a may include a hole injection layer (HIL) and a hole transport layer (HTL).

[0118] The second functional layer 222c may be optional. For example, when the first functional layer 222a and the emission layer 222b are formed of a polymer material, it is desirable to form the second functional layer 222c. The second functional layer 222c may be a single layer or a multilayer. The second functional layer 222c may include an electron transport layer (ETL) and / or an electron injection layer (EIL).

[0119] The emission layer 222b of the intermediate layer 222 may be arranged for each pixel in the display area DA. The emission layer 222b may be patterned to correspond to the pixel electrode 221 exposed through the opening of the pixel defining layer 211. Unlike the emission layer 222b, the first functional layer 222a and the second functional layer 222c of the intermediate layer 222 may be in the intermediate area MA and the display area DA.

[0120] The counter electrode 223 may include a conductive material having a low work function. For example, the counter electrode 223 may include a (semi) transparent layer including silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca) or any alloy thereof. Optionally, the counter electrode 223 may also include an ITO layer, an IZO layer, a ZnO layer or an Indium ion layer on the (semi) transparent layer including the above materials. 2 O 3 The counter electrode 223 may be formed in the middle area MA and the display area DA. The middle layer 222 and the counter electrode 223 may be formed by thermal evaporation.

[0121] The capping layer 230 may be located on the counter electrode 223. For example, the capping layer 230 may include lithium fluoride (LiF) and may be formed by thermal evaporation. The capping layer 230 may be omitted.

[0122] The spacer 213 may be disposed on the pixel defining layer 211. The spacer 213 may include an organic insulating material such as polyimide. Alternatively, the spacer 213 may include an inorganic insulating material such as silicon nitride or silicon oxide, or may include an organic insulating material and an inorganic insulating material.

[0123] The spacer 213 may include a material different from that of the pixel defining layer 211. Alternatively, the spacer 213 and the pixel defining layer 211 may include the same material, in which case the pixel defining layer 211 and the spacer 213 may be formed together in a mask process using a half-tone mask, etc. As an example, each of the pixel defining layer 211 and the spacer 213 may include polyimide.

[0124] The organic light emitting diode OLED is covered with a thin film encapsulation layer 300. The thin film encapsulation layer 300 may include at least one organic encapsulation layer and at least one inorganic encapsulation layer, and Figure 8 It is shown that the thin film encapsulation layer 300 includes a first inorganic encapsulation layer 310 and a second inorganic encapsulation layer 330 and an organic encapsulation layer 320 therebetween. In another embodiment, the number of organic encapsulation layers, the number of inorganic encapsulation layers, and the stacking order may be changed.

[0125] Each of the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may include one or more inorganic materials from aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and silicon oxynitride. Each of the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may be a single layer or multiple layers including the above materials. The organic encapsulation layer 320 may include a polymer material. The polymer material may include an acryl resin, an epoxy resin, polyimide, polyethylene, and the like. The first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may have different thicknesses from each other. The thickness of the first inorganic encapsulation layer 310 may be greater than the thickness of the second inorganic encapsulation layer 330. For example, the thickness of the first inorganic encapsulation layer 310 may be about 1 μm, and the thickness of the second inorganic encapsulation layer 330 may be about 0.7 μm. Alternatively, the thickness of the second inorganic encapsulating layer 330 may be greater than the thickness of the first inorganic encapsulating layer 310 , or the thicknesses of the first inorganic encapsulating layer 310 and the second inorganic encapsulating layer 330 may be equal to each other.

[0126] Reference Figure 8 The middle area MA of FIG. 1 , the groove G having an undercut shape is located in the middle area MA. Figure 8 It is shown that one groove G is arranged in the middle area MA, but in another embodiment, two or more grooves may be arranged in the middle area MA.

[0127] The sublayer of the inorganic material of the organic light emitting diode OLED (eg, the intermediate layer 222) may be disconnected around the groove G in the intermediate area MA. In an embodiment, the groove G may be formed using at least two layers or more including materials different from each other, and in this regard, Figure 9a The metal layer 400A and the first interlayer insulating layer 205 and the second interlayer insulating layer 207 on the metal layer 400A are shown.

[0128] Reference Figure 9a , a hole H is formed by removing a portion of the first interlayer insulating layer 205 and a portion of the second interlayer insulating layer 207 on the metal layer 400A, and the metal layer 400A may be removed through the hole H. The metal layer 400A may be removed by an etching process, and when the metal layer 400A is removed, a first hole h1 having a relatively large width is formed where the metal layer 400A is located, as shown in FIG. Figure 9b The groove G may be formed by spatially connecting the first hole h1 to the second hole h2 formed on the first hole h1, and the second hole h2 may correspond to the reference Figure 9aThe second hole h2 has a smaller width than the first hole h1, and the groove G may include a pair of tips PT (or eaves structures) protruding toward the center of the groove G. The unremoved metal material portion 400 (or residue) of the metal layer 400A may remain in the first hole h1, as shown in FIG. Figure 9b In this regard, Figure 9b The metal material portion 400 is shown disposed below the edge (eg, a pair of tips PT) of the first hole h1. In another embodiment, the entire metal layer 400A may be removed, in which case, Figure 9b Differently, the metal material portion 400 may not be in the groove G. Figure 9a The metal layer 400A and the gate electrode GE are described to include the same material and may be formed in the same process. For example, the metal layer 400A may include molybdenum (Mo).

[0129] Thereafter, in the process of forming the intermediate layer 222, a portion of the intermediate layer 222 (e.g., the first and second functional layers 222a and 222c) is disconnected around the groove G. The thickness t1 of the metal layer 400A corresponds to the depth of the first hole h1 forming the groove G, and the thickness t1 of the metal layer 400A may be greater than the sum t2 of the thicknesses of the first and second functional layers 222a and 222c disconnected around the groove G, the counter electrode 223, and the capping layer 230.

[0130] The first functional layer 222a and the second functional layer 222c may be formed to completely cover the display area DA and the middle area MA, and may be disconnected by a groove G having an undercut structure. Similar to the first functional layer 222a and the second functional layer 222c, the counter electrode 223 and the cap layer 230 including LiF may be formed on the first functional layer 222a and the second functional layer 222c by thermal evaporation, and the counter electrode 223 and the cap layer 230 may be disconnected by the groove G having an undercut structure. The organic material included in the display panel may provide a path for moisture penetration. The first functional layer 222a and the second functional layer 222c include organic materials, and thus may provide a path for moisture penetration therethrough. However, according to an embodiment, as described with reference to Figure 8 as well as Figures 9a to 9c As described, the first functional layer 222 a and the second functional layer 222 c are disconnected around the groove G, and thus, moisture may be prevented from penetrating through the first functional layer 222 a and / or the second functional layer 222 c .

[0131] Reference Figure 9d and Fig.9eAfter forming the first functional layer 222a, the second functional layer 222c, the counter electrode 223 and the cap layer 230, the first inorganic encapsulation layer 310 is formed. Depending on the formation conditions of the first inorganic encapsulation layer 310, etc., the first inorganic encapsulation layer 310 may be disconnected around the groove G (such as Figure 9d ), or may be formed continuously to completely cover the inner surface of the groove G (as shown in Fig.9e ). The groove G may be at least partially filled with the organic encapsulation layer 320. The organic encapsulation layer 320 is located at one side of the partition wall 510. For example, an edge of the organic encapsulation layer 320 may be located at one side of the partition wall 510 adjacent to the display area DA (eg, at Figure 8 on the right side of the middle partition wall 510). Figure 8 It is shown that there is one partition wall 510 , but in another embodiment, the display panel 10 may include two or more partition walls 510 .

[0132] Reference Figure 8 as well as Figures 9a to 9e , describes that the metal layer 400A and the gate electrode GE are arranged on the same layer, but the present disclosure is not limited thereto. In another embodiment, Figure 9a The position of the metal layer 400A may be changed in various ways (such as on the substrate 100 , the buffer layer 201 , or the first interlayer insulating layer 205 ), and thus, the depth of the groove G may be changed in various ways.

[0133] Refer again Figure 8 , the edge of each of the first and second functional layers 222a and 222c, the counter electrode 223, and the capping layer 230 may be spaced apart from the first area OA by a certain distance. Similarly, the edge of each of the first and second inorganic encapsulating layers 310 and 330 on the counter electrode 223 may be spaced apart from the first area OA by a certain distance.

[0134] The inorganic layer 520 may be on the thin film encapsulation layer 300 and may be formed as a single body to completely cover the display area DA and the middle area MA. In an area of ​​the middle area MA adjacent to the first area OA, the inorganic layer 520 may directly contact the inorganic insulating layer (e.g., the second interlayer insulating layer 207) below the thin film encapsulation layer 300. In other words, the above-mentioned area adjacent to the first area OA corresponds to a contact area CA between the inorganic layer 520 and the second interlayer insulating layer 207 disposed below the thin film encapsulation layer 300. In the contact area CA, the inorganic layer 520 and the second interlayer insulating layer 207 including a relatively moisture-resistant inorganic material are in direct contact with each other, and thus, moisture may be prevented from being introduced in a direction parallel to the above-mentioned contact surface (or in a lateral, horizontal, or vertical direction). Figure 8 penetration in the x-direction).

[0135] The inorganic layer 520 may include an inorganic insulating material. For example, the inorganic layer 520 may include silicon nitride, silicon oxide, and / or silicon oxynitride, and may be a single layer or a multilayer.

[0136] During the formation process of the inorganic layer 520, when the height difference between the upper surface of the second interlayer insulating layer 207 and the upper surface of the thin film encapsulation layer 300 (for example, the upper surface of the second inorganic encapsulation layer 330) is large, the inorganic layer 520 may be disconnected due to the step between the upper surface of the second interlayer insulating layer 207 and the upper surface of the thin film encapsulation layer 300. The disconnected portion of the inorganic layer 520 may provide a path through which moisture may penetrate, and therefore, in order to prevent this, a cover layer 530 covering the step may be further disposed.

[0137] Reference Figure 8 and Fig.10 , the stacked body ST stacked on the second interlayer insulating layer 207 may include first and second functional layers 222a and 222c, a counter electrode 223, a capping layer 230, and first and second inorganic encapsulating layers 310 and 330. According to an embodiment, as described above, the second functional layer 222c and / or the capping layer 230 may be omitted.

[0138] The edge of the stack ST is spaced a certain distance from the first area OA, and the edge of the thin film encapsulation layer 300 (for example, the edge of the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330) is also spaced a certain distance from the first area OA. During the manufacturing process, the stack ST can be completely formed to cover the display area DA and the middle area MA. After the thin film encapsulation layer 300 is formed, a photoresist can be formed on the second inorganic encapsulation layer 330, and the portion of the stack ST corresponding to the contact area CA can be removed by patterning using the photoresist as a mask. The edges of the stack ST may have substantially the same pattern. For example, in a cross-sectional view, the edges of the stack ST may be located on substantially the same line.

[0139] One side of the stack ST may have a first slope α. Here, the first slope α may represent an angle formed by a virtual line VS1 and a bottom surface of the stack ST (or an upper surface of a second interlayer insulating layer below the stack ST), wherein the virtual line VS1 connects an end point pt1 of an uppermost layer (e.g., a second inorganic encapsulation layer) of the stack ST to an end point pt2 of a lowermost layer (e.g., a first functional layer) of the stack ST. For example, the first slope α may have an angle in a range between about 60 degrees and about 80 degrees (e.g., about 70 degrees).

[0140] The cover layer 530 may cover the edge of the stack body ST. The side surface of the cover layer 530 covering the inclined surface of the stack body ST may have a second slope β. The second slope β may represent an angle formed by a virtual line VS2 contacting the edge of the cover layer 530 and the bottom surface of the cover layer 530 (or the upper surface of the second interlayer insulating layer below the cover layer 530). The second slope β may be smaller than the first slope α. For example, the second slope β may be in a range between about 55 degrees and about 65 degrees, or about 60 degrees or less. The cover layer 530 may include an organic insulating material.

[0141] The inorganic layer 520 may cover the entire middle area MA across the edge of the stack body ST and the edge of the capping layer 530 , and as described above, may directly contact the inorganic insulating layer (eg, the second interlayer insulating layer 207 ) in the contact area CA.

[0142] When Figure 8 When the display panel 10 shown in FIG. 1 includes a first opening 10H corresponding to the first area OA, each of the substrate 100 and the layers on the substrate 100 (e.g., several layers from the buffer layer 201 to the inorganic layer 520) may include a hole corresponding to the first opening 10H. The substrate 100 may include a through hole 100H corresponding to the first opening 10H, and an edge 520E of the inorganic layer 520 may be located on the same vertical line as the first edge 100E of the substrate 100 defining the through hole 100H.

[0143] Figure 8 The cross-sectional structure shown in FIG. 1 may correspond to the structure surrounding the first opening 10H and / or the first area OA. Fig.11 As shown in FIG. 1 , in a plan view, the groove G of the middle area MA may have an annular shape surrounding the first area OA. Similarly, each of the partition wall 510 and the cover layer 530 may have an annular shape surrounding the first area OA. Figure 8 The detour portion SL-C of the scan line SL and the detour portion DL-C of the data line DL shown in FIG. 1 may be between the groove G and the first edge 100E of the substrate 100 . Figure 8 The detour portion SL-C of the scan line SL and the detour portion DL-C of the data line DL shown in FIG. 1 correspond to the above reference numerals. Figure 7 The detour portion SL-C of the scan line SL and the detour portion DL-C of the data line DL are described.

[0144] exist Figure 8 In FIG. 1 , it is shown that the display panel 10 includes a first opening 10H corresponding to the first area OA, but in another embodiment, as shown in FIG. Fig.12 As shown in , the display panel 10 ′ may not include the first opening 10H.

[0145] Reference Fig.12 , the portion of the substrate 100 corresponding to the first area OA may not be removed. In addition, the portion of the stacked body from the buffer layer 201 to the second interlayer insulating layer corresponding to the first area OA may not be removed. Fig.12 The contact area CA between the inorganic layer 520 and the second interlayer insulating layer 207 shown in FIG. Figure 8 The contact area CA between the inorganic layer 520 and the second interlayer insulating layer 207 is large. Fig.12 As shown in FIG. 5 , the inorganic layer 520 may contact the second interlayer insulating layer 207 in the first area OA. Fig.12 As shown in the above reference Figure 4d As described, a display element having a different structure from the organic light emitting diode arranged in the display area DA or a display element operating in a different manner from the organic light emitting diode arranged in the display area DA may be arranged in the first area OA.

[0146] Fig.13 is a cross-sectional view schematically showing a display panel according to another embodiment.

[0147] In addition to the display panel 10 ″ further including a transparent layer 450 between the inorganic layer 520 and the thin film encapsulation layer 300, Fig.13 The features of the display panel 10" shown in FIG. 1 are similar to those of the above referenced Figure 8 The features of the display panel 10 described are the same.

[0148] In order to form the contact area CA between the inorganic layer 520 and the second interlayer insulating layer 207 as the insulating layer below the thin film encapsulation layer 300, it is necessary to remove the stacked body ST formed in the middle area MA before forming the inorganic layer 520 (see FIG. Fig.10 The removal process may be performed by using a photoresist including an organic material as a mask, in which case, when a transparent inorganic film that is not an organic material is used as a mask, the transparent inorganic film remains on the second inorganic encapsulation layer 330 as it is, and thus a transparent layer 450 may be formed.

[0149] The transparent layer 450 is an inorganic film and may include a transparent conductive oxide such as indium zinc oxide (IZO). Alternatively, the transparent layer 450 may include a light-transmitting metal thin film. The edge of the transparent layer 450 and the edge of the second inorganic encapsulation layer 330 may be located on substantially the same line.

[0150] Fig.13The display panel 10″ is shown to include a first opening 10H corresponding to the first area OA, and each of the substrate 100 and the layers on the substrate 100 (for example, several layers from the buffer layer 201 to the inorganic layer 520) also includes a hole corresponding to the first opening 10H, but the present disclosure is not limited thereto. Fig.13 The structure described can also be applied to the above reference Fig.12 The described display panel 10 ′ and embodiments derived therefrom are also included in the embodiments of the present disclosure.

[0151] Fig.14 is a cross-sectional view schematically showing a display panel according to another embodiment, Fig.15 is a cross-sectional view schematically showing a display panel according to another embodiment.

[0152] In addition to the fact that the capping layer 530 is not disposed between the inorganic layer 520 and the thin film encapsulation layer 300 and the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 form a step, Fig.14 The display panel 10'' shown in FIG. 1 has the same Figure 8 The same features as those of the display panel 10 described above.

[0153] Reference Fig.14 , an edge 330E of the second inorganic encapsulation layer 330 may be located on the upper surface of the first inorganic encapsulation layer 310. The edge 330E of the second inorganic encapsulation layer 330 may be closer to the display area DA side than the edge 310E of the first inorganic encapsulation layer 310, and the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may form a step.

[0154] Reference Fig.14 In the enlarged view of the first inorganic encapsulation layer 310, the first step formed by the upper surface of the first inorganic encapsulation layer 310 relative to the upper surface of the second interlayer insulating layer 207 and the second step formed by the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 are arranged in a stepped shape, so the inorganic layer 520 may not be broken. In this case, a cover layer may not be provided between the inorganic layer 520 and the thin film encapsulation layer 300.

[0155] Reference Fig.14 The structures and features described herein may also be applied to the above-mentioned Fig.12 and Fig.13 The display panels 10' and 10' described above, and the embodiments according to them and the embodiments derived therefrom are included in the embodiments of the present disclosure. For example, Fig.15 As shown in the display panel 10″″, the inorganic layer 520 may extend toward the first area OA through the edge of the thin film encapsulation layer 300 (eg, the edge of the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330), and the cover layer 530 (see Figure 8 etc.) may not be between the thin film encapsulation layer 300 and the inorganic layer 520. Fig.15 As shown in the enlarged view of , the edges of the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may be located on substantially the same inclined surface, and no step may be formed between them. The inorganic layer 520 may cover the end of the stacked body ST disposed thereunder (e.g., the inclined surface of the stacked body ST) and contact the upper surface of the second interlayer insulating layer 207 disposed under the stacked body ST.

[0156] Fig.16 and Fig.17 is a plan view schematically showing a display panel according to another embodiment.

[0157] Reference Fig.16 , the display area DA may include a first display area DA1 and second to fifth display areas DA2, DA3, DA4, and DA5 respectively arranged at edges of the first display area DA1. Fig.16 In the figure, for the convenience of description, the boundaries between the first display area DA1 and each of the second to fifth display areas DA2, DA3, DA4 and DA5 are indicated by dotted lines, but the non-display area is not between the first display area DA1 and each of the second to fifth display areas DA2, DA3, DA4 and DA5.

[0158] like Fig.16 As shown in , the first area OA may be located in the first display area DA1. Fig.17 As shown in , the first area OA may be located in the second display area DA2 and may be located at the edge of the second display area DA2. The first area OA located at the edge of the second display area DA2 may not be completely surrounded by the second display area DA2 as a display area, but may be partially surrounded by the second display area DA2. For example, the outer area PA may be above the first area OA, and the outer area PA and the middle area MA may be connected to each other.

[0159] Fig.16 and Fig.17 Each of the second to fifth display areas DA2, DA3, DA4, and DA5 of the display panel 10 may be curved relative to the first display area DA1, and a three-dimensional display panel 10 is provided. The shape of the three-dimensional display panel 10 is not limited to Fig.16 and Fig.17 In another embodiment, the display panel may be implemented to have various three-dimensional shapes (such as a football shape, a pyramid shape, etc.).

[0160] Fig.18is a cross-sectional view of a display panel according to an embodiment, in which an outer area and a display area are shown.

[0161] Fig.18 The display area DA and the above reference Figure 8 The display area DA described has the same structure. Fig.18 The outer groove OG is disposed in the outer region PA, and the outer groove OG can disconnect (or separate) an organic material layer (e.g., an organic material included in a stacked body (e.g., a stacked body of a pixel electrode, an intermediate layer, and a counter electrode) forming an organic light emitting diode). The outer groove OG and the reference Figures 9a to 9d or Fig.9e The groove G described above can be formed by the same process, and according to the process of forming the outer groove OG, the metal material portion 1400 (or the residue) can be disposed inside the outer groove OG (e.g., under the eaves). The structure of the first inorganic encapsulation layer 310 and / or the structures of the first functional layer 222a, the second functional layer 222c, the counter electrode 223, and the cap layer 230 disconnected relative to the outer groove OG are the same as those described above with reference to Figure 8 , Figures 9a to 9d or / and Fig.9e The structure described is the same.

[0162] The outer partition wall 1510 may be disposed in the outer area PA. During the manufacturing process of the organic encapsulation layer 320, the flow of the monomer may be controlled by the outer partition wall 1510, and the thickness of the organic encapsulation layer 320 may be controlled. In a plan view, for example, when viewed from a direction perpendicular to the substrate 100, the outer partition wall 1510 may completely surround the display area DA.

[0163] In order to prevent the inorganic layer 520 formed on the stack of the first functional layer 222a, the second functional layer 222c, the counter electrode 223, the cap layer 230, the first inorganic encapsulation layer 310, and the second inorganic encapsulation layer 330 extending toward the outer edge of the substrate 100 through the external partition wall 1510 from being disconnected due to a step formed by the above stack and the insulating layer (e.g., the second interlayer insulating layer 207) below the stack, an external cover layer 1530 may be provided. The external cover layer 1530 may have the same material and / or the same structure as the above cover layer 530.

[0164] Fig.18The structure of the elements arranged in the outer area PA (e.g., the outer groove OG, the outer partition wall 1510, the outer cover layer 1530, and the laminate covered with the outer cover layer 1530) is shown to be the same as or similar to the structure of the groove G, the partition wall 510, the cover layer 530, and the laminate covered with the cover layer 530, but the embodiment is not limited thereto. In another embodiment, the structure of the outer groove OG, the outer partition wall 1510, the outer cover layer 1530, and the laminate covered with the outer cover layer 1530 arranged in the outer area PA is the same as that of the laminate covered with the outer cover layer 1530 described above with reference to FIG. Fig.13 or Fig.14 The structures of the described groove G, the partition wall 510, the cover layer 530, and the laminated body covered with the cover layer 530 are substantially the same or similar.

[0165] As described above, the present disclosure is described with reference to the embodiments shown in the accompanying drawings, but this is only an example, and it will be understood by those skilled in the art that various modifications and variations of the embodiments are feasible. Therefore, the true technical protection scope of the present disclosure should be determined by the technical spirit of the attached claims.

Claims

1. A display panel, comprising: A substrate, comprising a first surface and a second surface opposite to the first surface, wherein the substrate has a through hole extending from the first surface to the second surface; an insulating layer on the first surface of the substrate; a plurality of display elements on the insulating layer, the display elements defining a display area; A thin film encapsulation layer, on the plurality of display elements, the thin film encapsulation layer comprising an inorganic encapsulation layer and an organic encapsulation layer; as well as A transparent layer is on the thin film encapsulation layer.

2. The display panel according to claim 1, wherein: The transparent layer includes a transparent conductive oxide or a light-transmitting metal film.

3. The display panel according to claim 1, further comprising: The groove is located in a middle area between the through hole and the display area of ​​the substrate.

4. The display panel according to claim 3, wherein: One of the plurality of display elements includes a pixel electrode, a counter electrode, and an intermediate layer between the pixel electrode and the counter electrode, and At least one sub-layer included in the intermediate layer includes a plurality of portions separated from each other by the grooves.

5. The display panel according to claim 1, further comprising: The inorganic layer is disposed on the transparent layer and includes an inorganic insulating material.

6. The display panel according to claim 5, wherein: The first edge of the transparent layer is located between the display area and the through hole of the substrate, and The inorganic layer extends beyond the first edge of the transparent layer toward the through hole of the substrate.

7. The display panel according to claim 6, further comprising: A covering layer covers the first edge of the transparent layer.

8. The display panel according to claim 6, wherein: In a cross-sectional view, a first edge of the inorganic encapsulation layer is aligned with the same line as the first edge of the transparent layer.

9. The display panel according to claim 6, wherein: A portion of the inorganic layer and a portion of the insulating layer are in direct contact with each other in an intermediate region between the through hole of the substrate and the display region.

10. The display panel according to claim 9, further comprising: a partition wall in the intermediate region and surrounding the through hole of the substrate, and Wherein, the transparent layer is overlapped with the partition wall.

11. An electronic device, comprising: A display panel comprising an opening area and a display area at least partially surrounding the opening area; as well as component, overlapping with the opening area of ​​the display panel, The display panel includes: a substrate including a first surface and a second surface opposite to the first surface, the substrate having a through hole extending from the first surface to the second surface, wherein the through hole corresponds to the opening area of ​​the display panel; an insulating layer on the first surface of the substrate; a plurality of display elements on the insulating layer, the display elements being arranged in the display area; a thin film encapsulation layer on the plurality of display elements, the thin film encapsulation layer including an inorganic encapsulation layer and an organic encapsulation layer; and a transparent layer on the thin film encapsulation layer.

12. The electronic device according to claim 11, wherein: The transparent layer includes a transparent conductive oxide or a light-transmitting metal film.

13. The electronic device according to claim 11, wherein: The display panel further includes a groove located in a middle area between the through hole of the substrate and the display area.

14. The electronic device according to claim 13, wherein: One of the plurality of display elements includes a pixel electrode, a counter electrode, and an intermediate layer between the pixel electrode and the counter electrode, and At least one sub-layer included in the intermediate layer includes a plurality of portions separated from each other by the grooves.

15. The electronic device according to claim 11, wherein: The display panel further includes an inorganic layer disposed on the transparent layer and including an inorganic insulating material.

16. The electronic device according to claim 15, wherein: The first edge of the transparent layer is located between the display area and the through hole of the substrate, and The inorganic layer extends beyond the first edge of the transparent layer toward the through hole of the substrate.

17. The electronic device according to claim 16, wherein: The display panel further includes a covering layer covering the first edge of the transparent layer.

18. The electronic device according to claim 16, wherein: In a cross-sectional view, a first edge of the inorganic encapsulation layer is aligned with the same line as the first edge of the transparent layer, and The inorganic layer extends beyond the first edge of the transparent layer and the first edge of the inorganic encapsulation layer toward the through hole of the substrate, so that a portion of the inorganic layer is in direct contact with a portion of the insulating layer.

19. The electronic device according to claim 18, wherein: The display panel further includes a partition wall disposed in a middle region between the through hole of the substrate and the display region, and The partition wall surrounds the through hole of the substrate.

20. The electronic device according to claim 11, wherein: The components include sensors, cameras, speakers or lights.

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