Electronic circuit module

Abstract

An electronic circuit module (10) is mounted on a motherboard (91) provided with a power supply source. An electronic circuit module (10) is provided with: a photoelectric conversion unit (40) that converts an optical signal and an electric signal; a processor unit (20) that performs arithmetic processing using the electrical signal; a power conversion unit (50) that converts power from a power supply source and supplies power to the photoelectric conversion unit (40) and the processor unit (20); and a package substrate (60) on which the photoelectric conversion unit (40), the processor unit (20), and the power conversion unit (50) are mounted. The photoelectric conversion unit (40), the processor unit (20), and the power conversion unit (50) are connected only by a conductor pattern formed on the package substrate (60).

Description

Technical Field

[0001] The present invention relates to an electronic circuit module including a photoelectric conversion unit for converting an optical signal and an electric signal, a processor unit, and a power conversion unit. Background Art

[0002] Patent Document 1 describes a circuit unit including an optical package element, a processor element, an electronic device, an electronic circuit element, and an interposer. The optical package element and the processor element are connected via the electronic device and the electronic circuit element in the interposer.

[0003] Patent Document 1: U.S. Patent Application Publication No. 2021 / 0091056

[0004] However, the conventional device disclosed in Patent Document 1 may be insufficient in terms of information transmission efficiency and power supply efficiency. Summary of the invention

[0005] Therefore, an object of the present invention is to provide an electronic circuit module capable of achieving high information transmission efficiency and high power supply efficiency.

[0006] The electronic circuit module of the embodiment of the present invention is an electronic circuit module mounted on a motherboard having a power supply source. The electronic circuit module includes: a photoelectric conversion unit that converts an optical signal and an electric signal; a processor unit that performs arithmetic processing using the electric signal; a power conversion unit that converts electric power from the power supply source and supplies electric power to the photoelectric conversion unit and the processor unit; and a package substrate on which the photoelectric conversion unit, the processor unit, and the power conversion unit are mounted. The photoelectric conversion unit, the processor unit, and the power conversion unit are connected only by a conductor pattern formed on the package substrate.

[0007] In this structure, the photoelectric conversion unit and the processor unit are connected not through the motherboard but only through the conductor pattern formed on the package substrate. As a result, the information transmission efficiency is improved. In addition, the photoelectric conversion unit, the processor unit, and the power conversion unit are connected not through the motherboard but only through the conductor pattern formed on the package substrate, so the power supply efficiency from the power conversion unit to the photoelectric conversion unit and the processor unit is improved.

[0008] According to the present invention, high information transmission efficiency and high power supply efficiency can be achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 This is a functional block diagram showing an example of the circuit configuration of the electronic circuit module according to the first embodiment.

[0010] Figure 2 It is a side view showing the structure of the electronic circuit module according to the first embodiment.

[0011] Figure 3 This is a side view showing a state where the electronic circuit module according to the first embodiment is mounted on a motherboard.

[0012] Figure 4 It is a side view showing the structure of an electronic circuit module according to the second embodiment.

[0013] Figure 5 It is a side view showing the structure of an electronic circuit module according to a third embodiment.

[0014] Figure 6 (A) is a plan view showing the structure of an electronic circuit module according to a fourth embodiment, Figure 6 (B) is Figure 6 (A) A-A' side view, Figure 6 (C) is Figure 6 BB' cross-sectional view of (A).

[0015] Figure 7 (A) is a diagram showing an example of a wiring pattern of a data communication system in an electronic circuit module according to a fourth embodiment, Figure 7 (B) is a diagram showing an example of a wiring pattern of a power supply system in the electronic circuit module according to the fourth embodiment.

[0016] Figure 8 (A) is a plan view showing the structure of an electronic circuit module according to a fifth embodiment, Figure 8 (B) is a diagram showing an example of a wiring pattern of a data communication system in an electronic circuit module according to the fifth embodiment, Figure 8 (C) is a diagram showing an example of a wiring pattern of a power supply system in an electronic circuit module according to the fifth embodiment.

[0017] Fig. 9 (A) is a plan view showing the structure of an electronic circuit module according to a sixth embodiment, Fig. 9 (B) is a diagram showing an example of a wiring pattern of a data communication system in an electronic circuit module according to the sixth embodiment, Fig. 9 (C) is a diagram showing an example of a wiring pattern of a power supply system in an electronic circuit module according to the sixth embodiment.

[0018] Fig.10 (A) is a plan view showing the structure of an electronic circuit module according to a seventh embodiment, Fig.10 (B) is a diagram showing an example of a wiring pattern of a data communication system in an electronic circuit module according to the seventh embodiment, Fig.10(C) is a diagram showing an example of a wiring pattern of a power supply system in an electronic circuit module according to the seventh embodiment.

[0019] Fig.11 (A) Fig.11 (B) is a plan view showing the structure of the electronic circuit module according to the eighth embodiment.

[0020] Fig.12 (A) is a diagram showing an example of a wiring pattern of a data communication system in an electronic circuit module according to an eighth embodiment, Fig.12 (B) is a diagram showing an example of a wiring pattern of a power supply system in the electronic circuit module according to the eighth embodiment.

[0021] Fig.13 (A) is a plan view showing the structure of an electronic circuit module according to a ninth embodiment, Fig.13 (B) Fig.13 (C) means Fig.13 (A) is a diagram showing various examples of the CC' cross section.

[0022] Fig.14 (A) is a diagram showing an example of a wiring pattern of a data communication system in an electronic circuit module according to a ninth embodiment, Fig.14 (B) is a diagram showing an example of a wiring pattern of a power supply system in the electronic circuit module of the ninth embodiment. DETAILED DESCRIPTION

[0023] [First embodiment]

[0024] An electronic circuit module according to a first embodiment of the present invention will be described with reference to the drawings. Figure 1 This is a functional block diagram showing an example of the circuit configuration of the electronic circuit module according to the first embodiment. Figure 2 It is a side view showing the structure of the electronic circuit module according to the first embodiment. Figure 3 FIG. 2 is a side view showing a state where the electronic circuit module of the first embodiment is mounted on a motherboard. Figure 2 , Figure 3 In FIG. 1 , the wiring pattern formed in the substrate is also indicated by a solid line.

[0025] (Circuit Structure of Electronic Circuit Module 10)

[0026] like Figure 1 As shown, the electronic circuit module 10 includes a processor unit 20 , a memory 30 , a photoelectric conversion unit 40 , and a power conversion unit 50 .

[0027] The processor unit 20 is connected to the memory 30 through the information processing bus Lpm. The processor unit 20 is connected to the photoelectric conversion unit 40 through the data transmission line Lop. The photoelectric conversion unit 40 is connected to the outside through the optical waveguide OTL.

[0028] The processor unit 20 performs a predetermined operation process on the electric signal inputted through the data transmission line Lop from the photoelectric conversion unit 40. At this time, the processor unit 20 performs the operation process using the memory 30 connected via the information processing bus Lpm.

[0029] The processor unit 20 outputs the operation result using an electrical signal, and inputs it to the photoelectric conversion unit 40 through the data transmission line Lop.

[0030] The photoelectric conversion unit 40 converts the optical signal input from the optical waveguide OTL into an electrical signal, and outputs it to the processor unit 20 through the data transmission line Lop. In addition, the photoelectric conversion unit 40 converts the electrical signal input from the processor unit 20 through the data transmission line Lop into an optical signal, and outputs it to the outside through the optical waveguide OTL.

[0031] The power conversion unit 50 is connected to the processor unit 20 via a processor power supply line Lpwp, is connected to the memory 30 via a memory power supply line Lpwm, and is connected to the photoelectric conversion unit 40 via a photoelectric conversion unit power supply line Lpwo.

[0032] The power conversion unit 50 converts input power from an external power source (a motherboard described later) into power for the processor unit 20 , the memory 30 , and the photoelectric conversion unit 40 , and supplies the power to these.

[0033] By using optical signals in this way, the speed of information transmission can be increased compared to the case where all signals are made into electrical signals.

[0034] (Structure of Electronic Circuit Module 10)

[0035] like Figure 2 As shown, the electronic circuit module 10 includes a processor unit 20 , a memory 30 , a photoelectric conversion unit 40 , a power conversion unit 50 , and a package substrate 60 .

[0036] The processor unit 20, the memory 30, the photoelectric conversion unit 40, and the power conversion unit 50 are each a mounted electronic component, and are provided with a housing of a predetermined shape and a plurality of terminal conductors. Functional parts for implementing the respective units are formed in the housing. The plurality of terminal conductors are arranged in a predetermined pattern on the bottom surface of the housing.

[0037] The package substrate 60 includes a first substrate 61 and a second substrate 62. The first substrate 61 and the second substrate 62 are flat plates. For example, the plane area of ​​the second substrate 62 (in Figure 2 , Figure 3 The area observed in the z-axis direction of the substrate 61 is smaller than the plane area of ​​the first substrate 61. Furthermore, the plane area of ​​the first substrate 61 and the plane area of ​​the second substrate 62 are smaller than the plane area of ​​the motherboard 91 on which the electronic circuit module 10 is mounted.

[0038] The processor unit 20 , the memory 30 , and the photoelectric conversion unit 40 are mounted on the surface of the second substrate 62 .

[0039] The data transmission line Lop connecting the processor unit 20 and the photoelectric conversion unit 40 is composed only of a conductor pattern formed on the second substrate 62. In other words, the data transmission line Lop is not formed by the motherboard 91 on which the electronic circuit module 10 is mounted. As a result, the data transmission line Lop can be shortened. Therefore, the transmission loss and delay of the data transmission line Lop can be reduced.

[0040] Similarly, the information processing bus Lpm connecting the processor unit 20 and the memory 30 is also composed of only a conductor pattern formed on the second substrate 62, just like the data transmission line Lop. In other words, the information processing bus Lpm is not formed by the motherboard 91 on which the electronic circuit module 10 is mounted. As a result, the information processing bus Lpm can be shortened. Therefore, the transmission loss and delay of the information processing bus Lpm can be reduced.

[0041] Furthermore, the processor unit 20 and the photoelectric conversion unit 40 are preferably arranged close to each other. Furthermore, the distance between the processor unit 20 and the photoelectric conversion unit 40 is preferably as short as possible. For example, the processor unit 20 and the photoelectric conversion unit 40 are preferably arranged at positions as close as possible in terms of the accuracy of pattern formation of the second substrate 62 and the accuracy of mounting the processor unit 20 and the photoelectric conversion unit 40. For example, the distance may be less than the length of the long side of the processor unit 20 and the photoelectric conversion unit 40, more preferably less than 1 / 2 of the long side, and less than the length of the short side. If the processor unit 20 and the photoelectric conversion unit 40 are square in a plan view, the distance may be less than one side, preferably less than one half of one side.

[0042] In this way, the physical distance between the processor unit 20 and the photoelectric conversion unit 40 is shortened, thereby making it easy to shorten the data transmission line Lop.

[0043] Furthermore, it is preferable that the conductor pattern constituting the data transmission line Lop is formed on the surface of the second substrate 62. Thus, the data transmission line Lop does not have a portion extending in the thickness direction of the second substrate 62, and thus transmission loss and delay can be reduced.

[0044] In addition, the data transmission line Lop can connect the processor unit 20 and the photoelectric conversion unit 40 with the shortest distance in a plan view. Specifically, for example, the conductor patterns constituting the data transmission line Lop can be conductor patterns that connect the terminals of the processor unit 20 and the terminals of the photoelectric conversion unit 40 with straight lines in a plan view. Thus, the transmission loss and delay of the data transmission line Lop can be further reduced.

[0045] Moreover, similar to the relationship between the processor unit 20 and the photoelectric conversion unit 40, the processor unit 20 and the memory 30 are preferably arranged close to each other, and the information processing bus Lpm is also preferably short like the data transmission line Lop. Thus, the transmission loss and transmission delay between the processor unit 20 and the memory 30 can be suppressed.

[0046] In addition, it is preferred that the wiring density of the conductor pattern of the second substrate 62 is high. Thus, the number of conductor patterns per unit area can be increased. Therefore, the degree of freedom of the wiring pattern of the data transmission line Lop between the processor unit 20 and the photoelectric conversion unit 40 and the information processing bus Lpm connecting the processor unit 20 and the memory 30 is improved, and it is easy to form the conductor pattern connecting them shorter.

[0047] Furthermore, the second substrate 62 is connected to the motherboard 91 (see Figure 3 ) is formed of a material with low loss of high-frequency signals (for example, a material whose main material is Si or a resin such as a dielectric with a low dielectric loss tangent). This further suppresses the transmission loss based on the data transmission line Lop and the transmission loss based on the information processing bus Lpm.

[0048] In addition, a processor power supply line Lpwp, a memory power supply line Lpwm, and a photoelectric conversion unit power supply line Lpwo are formed on the second substrate 62. The processor power supply line Lpwp, the memory power supply line Lpwm, and the photoelectric conversion unit power supply line Lpwo penetrate the second substrate 62 in the thickness direction. The processor power supply line Lpwp connects the electrode on the surface of the second substrate 62 where the processor unit 20 is mounted and the processor power supply terminal on the back of the second substrate 62. The memory power supply line Lpwm connects the electrode on the surface of the second substrate 62 where the memory 30 is mounted and the memory power supply terminal on the back of the second substrate 62. The photoelectric conversion unit power supply line Lpwo connects the electrode on the surface of the second substrate 62 where the photoelectric conversion unit 40 is mounted and the photoelectric conversion unit power supply terminal on the back of the second substrate 62.

[0049] It is preferred that these processor power supply lines Lpwp, memory power supply lines Lpwm, and photoelectric conversion unit power supply lines Lpwo are as straight as possible. In other words, it is preferred that they are formed so that most of the parts extending in the thickness direction of the second substrate 62 are formed. The thickness of the second substrate 62 is significantly smaller than other dimensions, so by having such a structure, the power supply distance can be shortened. Therefore, the reduction in power supply efficiency is suppressed. In addition, it is preferred that the parts extending in the thickness direction of the processor power supply lines Lpwp, memory power supply lines Lpwm, and photoelectric conversion unit power supply lines Lpwo have a larger cross-sectional area than the data transmission lines Lop and the information processing bus Lpm. As a result, the power supply efficiency is improved.

[0050] The second substrate 62 and the power conversion unit 50 are mounted on the surface of the first substrate 61 .

[0051] A plurality of power supply lines Lpw are formed on the first substrate 61. The plurality of power supply lines Lpw are conductor patterns connected to electrodes mounted with the power conversion unit 50, electrodes mounted with processor power supply terminals of the second substrate 62, electrodes mounted with memory power supply terminals, and electrodes mounted with photoelectric conversion unit power supply terminals.

[0052] With this structure, the power supply from the power conversion unit 50 to the processor unit 20 can be completed through the conductor pattern (power supply line Lpw) in the first substrate 61 which is smaller than the motherboard 91 and the conductor pattern (processor power supply line Lpwp) extending in the thickness direction of the second substrate 62. Thus, the electronic circuit module 10 can efficiently supply power to the processor unit 20.

[0053] Similarly, the power supply from the power conversion unit 50 to the photoelectric conversion unit 40 can be completed through the conductor pattern (power supply line Lpw) in the first substrate 61 which is smaller than the motherboard 91 and the conductor pattern (power supply line Lpwo for the photoelectric conversion unit) extending in the thickness direction of the second substrate 62. Thus, the electronic circuit module 10 can efficiently supply power to the photoelectric conversion unit 40.

[0054] Similarly, the power supply from the power conversion unit 50 to the memory 30 can be completed through the conductor pattern (power supply line Lpw) in the first substrate 61 which is smaller than the motherboard 91 and the conductor pattern (memory power supply line Lpwm) extending in the thickness direction of the second substrate 62. Thus, the electronic circuit module 10 can efficiently supply power to the memory 30.

[0055] In addition, the second substrate 62 and the power conversion unit 50 are mounted adjacent to each other. In other words, no other mounted electronic components are mounted between the second substrate 62 and the power conversion unit 50. In addition, the second substrate 62 and the power conversion unit 50 are arranged close to each other. For example, the distance between the processor unit 20 and the power conversion unit 50 of the second substrate 62 can be less than the length of the long side of the processor unit 20 and the power conversion unit 50, more preferably less than 1 / 2 of the long side and less than the length of the short side. If the processor unit 20 and the power conversion unit 50 are square in a plan view, the distance is less than one side, preferably less than one half of one side.

[0056] This can shorten the distance of power supply from the power conversion unit 50 to the processor unit 20 , the memory 30 , and the photoelectric conversion unit 40 , thereby suppressing a decrease in power supply efficiency.

[0057] The first substrate 61 is formed of a material that is easy to obtain and manufacture compared to the second substrate 62 .

[0058] A plurality of external connection terminals BP61 are formed on the back surface of the first substrate 61 .

[0059] It is preferred that the width and cross-sectional area of ​​the plurality of power supply lines Lpw are as large as possible. Thus, a decrease in power supply efficiency is suppressed. In particular, in this structure, there is no conductor pattern of the data communication system in the first substrate 61, and only a plurality of power supply lines Lpw are formed. Therefore, the wiring and shape of the plurality of power supply lines Lpw are easily made into the prescribed wiring and shape. That is, compared with the case where the plurality of power supply lines Lpw are formed on the same substrate (e.g., motherboard) as the conductor pattern of the data communication system as in the past, it is easy to increase the width and cross-sectional area and shorten the length. Therefore, the electronic circuit module 10 can realize a power supply line Lpw with high power supply efficiency.

[0060] In particular, low voltage and high current are required for the processor unit 20. Therefore, the power supply line Lpw from the power conversion unit 50 to the processor unit 20 and the processor power supply line Lpwp are short, so that the electronic circuit module 10 can supply power more efficiently.

[0061] In addition, the power supply line Lpw extends linearly from the power conversion unit 50 to the processor unit 20 in a direction perpendicular to the thickness direction of the first substrate 61, and the processor power supply line Lpwp extends linearly in the thickness direction of the second substrate 62, thereby making the line connecting the power conversion unit 50 and the processor unit 20 the shortest distance. As a result, the power transmission loss can be further suppressed, and the electronic circuit module 10 can supply power more efficiently.

[0062] A power input line 652 is formed on the first substrate 61. The power input line 652 connects the electrode on which the power conversion unit 50 is installed and the external connection terminal BP61 for power input. The power input line 652 is shaped to extend in the thickness direction of the first substrate 61. It is preferred that the power input line 652 is as straight as possible. In other words, it is preferred that they are formed so that most of the parts extending in the thickness direction of the first substrate 61 are formed. The thickness of the first substrate 61 is significantly smaller than other dimensions, so by having such a structure, the power supply distance can be shortened. Therefore, the reduction in the efficiency of power input from the outside is suppressed. In addition, it is preferred that the cross-sectional area of ​​the part extending in the thickness direction of the power input line 652 is larger. As a result, the efficiency of power input from the outside is improved.

[0063] With such a structure, the electronic circuit module 10 can achieve high information transmission efficiency and high power supply efficiency.

[0064] Moreover, if Figure 3 As shown, the electronic circuit module 10 of such a configuration is mounted on a motherboard 91. The motherboard 91 includes a power supply for converting power from a commercial power supply or the like into DC power, and the electronic circuit module 10 is powered from the power supply through a power line 92P of the motherboard 91.

[0065] In addition, a plurality of mounting pads 93 are formed on the surface of the motherboard 91 , and a plug mechanism 94 is provided.

[0066] The plurality of external connection terminals BP61 of the electronic circuit module 10 abut against the plurality of mounting pads 93 of the motherboard 91. In this state, the plug mechanism 94 presses and fixes the electronic circuit module 10 to the surface of the motherboard 91. Thus, the electronic circuit module 10 and the motherboard 91 are stably connected electrically and mechanically.

[0067] Alternatively, the electronic circuit module 10 may be mounted on the motherboard 91 using a conductive bonding material such as solder. However, the above-mentioned plug mechanism 94 facilitates installation and replacement of the electronic circuit module 10. In addition, in this embodiment, the plug mechanism 94 is used, but other structures may be used as long as the electronic circuit module 10 is detachably fixed to the motherboard 91.

[0068] In the electronic circuit module 10, the processor unit 20, the memory 30, the photoelectric conversion unit 40, and the power conversion unit 50 are mounted by solder or the like, but they may also be detachably mounted using a plug mechanism 94 or the like. Furthermore, the structure for fixing the second substrate 62 to the first substrate 61 may also be detachably mounted using a plug mechanism 94 or the like.

[0069] In the above-described embodiment, the processor unit 20 and the photoelectric conversion unit 40 are connected only by the conductor pattern in the electronic circuit module 10. However, the processor unit 20 may be connected together with the photoelectric conversion unit 40 in the electronic circuit module 10 and other photoelectric conversion units supplementarily mounted on the motherboard 91.

[0070] Similarly, in the above-mentioned embodiment, the processor unit 20 and the power conversion unit 50 are connected only by the conductor pattern in the electronic circuit module 10. However, the processor unit 20 may be connected to other power conversion units supplementarily mounted on the motherboard 91 together with the power conversion unit 50 in the electronic circuit module 10.

[0071] Furthermore, in the above-described embodiment, the photoelectric conversion unit 40 and the power conversion unit 50 are connected only by the conductor pattern in the electronic circuit module 10. However, the photoelectric conversion unit 40 may be connected to other power conversion units supplementarily mounted on the motherboard 91 together with the power conversion unit 50 in the electronic circuit module 10.

[0072] [Second embodiment]

[0073] An electronic circuit module according to a second embodiment of the present invention will be described with reference to the drawings. Figure 4 It is a side view showing the structure of an electronic circuit module according to the second embodiment.

[0074] like Figure 4 As shown, the electronic circuit module 10A of the second embodiment is different from the electronic circuit module 10 of the first embodiment in that it has a heat dissipation mechanism. The other structures of the electronic circuit module 10A are the same as those of the electronic circuit module 10, and the description of the same parts is omitted.

[0075] The electronic circuit module 10A includes a heat sink 71 and a thermally conductive gel 710. The heat sink 71 is a flat plate made of a material with high thermal conductivity such as metal. The heat sink 71 overlaps the processor unit 20, the memory 30, the photoelectric conversion unit 40, and the power conversion unit 50 in a plan view.

[0076] The heat sink 71 is connected to the processor unit 20 , the memory 30 , the photoelectric conversion unit 40 , and the power conversion unit 50 via the thermally conductive gel 710 .

[0077] With such a structure, the electronic circuit module 10 can effectively release heat from the processor unit 20 , the memory 30 , the photoelectric conversion unit 40 , and the power conversion unit 50 to the outside.

[0078] In addition, the thermally conductive gel 710 can be omitted. However, in the case where the top surface of the heat dissipation object is not the same surface (for example, in Figure 4 Even in the case where the top surface of the power conversion unit 50 is lower than the other top surfaces, the common heat sink 71 can be connected to the multiple units using a higher heat conduction path.

[0079] In the above description, the heat sink 71 is shared by the processor unit 20, the memory 30, the photoelectric conversion unit 40, and the power conversion unit 50, but a heat sink may be provided for each unit separately. In the case of separate installation, it is preferred that at least the processor unit 20 and the power conversion unit 50, which generate high amounts of heat, have a heat sink.

[0080] However, by using the common heat sink 71 , the number of components of the electronic circuit module 10A can be reduced, and the heat dissipation area can be easily increased.

[0081] [Third Embodiment]

[0082] An electronic circuit module according to a third embodiment of the present invention will be described with reference to the drawings. Figure 5 It is a side view showing the structure of an electronic circuit module according to a third embodiment.

[0083] like Figure 5 As shown, the electronic circuit module 10B of the third embodiment is different from the electronic circuit module 10 of the first embodiment in the configuration of the power supply system. The other configurations of the electronic circuit module 10B are the same as those of the electronic circuit module 10, and descriptions of the same parts are omitted.

[0084] The electronic circuit module 10B includes a package substrate 60B. The package substrate 60B includes a first substrate 61B and a second substrate 62 .

[0085] The first substrate 61B is made of the same material as the first substrate 61 of the first embodiment. The plane area of ​​the first substrate 61B is substantially the same as the plane area of ​​the second substrate 62. A plurality of power conversion units 51B are mounted on the back surface of the first substrate 61B, that is, on the surface of the first substrate 61B opposite to the surface on which the second substrate 62 is mounted.

[0086] A plurality of power conversion units 51B are provided according to the power supply target. The electronic circuit module 10B includes a power conversion unit 51B for the memory 30 , a power conversion unit 51B for the processor unit 20 , and a power conversion unit 51B for the photoelectric conversion unit 40 .

[0087] An external power supply connector 52 is mounted on the back surface of the first substrate 61B. An external power supply cable PL is connected to the external power supply connector 52. Thus, power is supplied from the outside to the electronic circuit module 10B.

[0088] Here, in a plan view of the electronic circuit module 10B, the arrangement region of the plurality of power conversion units 51B overlaps with the arrangement region of the processor unit 20 , the memory 30 , and the photoelectric conversion unit 40 .

[0089] Therefore, the electronic circuit module 10B can have a smaller plane area than the electronic circuit module 10 .

[0090] In addition, Figure 5 In the structure of , a method of connecting to a motherboard using a connector or the like is shown. However, a structure may also be adopted in which a plurality of terminal electrodes are formed on the side end of the package substrate 60B and the plurality of terminal electrodes are inserted into the connector of the motherboard.

[0091] The electronic circuit module 10B includes a heat sink 71B, a heat sink 72B, a thermally conductive gel 710B, and a thermally conductive gel 720B.

[0092] The heat sink 71B is thermally connected to the processor unit 20, the memory 30, and the photoelectric conversion unit 40 via the thermally conductive gel 710B. Thus, the processor unit 20, the memory 30, and the photoelectric conversion unit 40 efficiently dissipate heat.

[0093] The heat sink 72B is thermally connected to the plurality of power conversion units 51B via the thermally conductive gel 720B, so that the plurality of power conversion units 51B can efficiently dissipate heat.

[0094] Furthermore, in this structure, the processor unit 20 and the plurality of power conversion units 51B, which have a relatively high heat generation, are provided with heat sinks 71B and 72B separately. As a result, the electronic circuit module 10B can achieve a higher heat dissipation efficiency. In addition, the heat sink 71B and the heat sink 72B are arranged on different sides via the package substrate 60B. As a result, the heat of the heat sink 71B and the heat of the heat sink 72B are unlikely to be combined, and the heat dissipation effect of the electronic circuit module 10B is improved.

[0095] Furthermore, the electronic circuit module 10B does not need to be mounted on the motherboard 91 , and thus can cope with more usage modes.

[0096] [Fourth Embodiment]

[0097] An electronic circuit module according to a fourth embodiment of the present invention will be described with reference to the drawings. Figure 6 (A) is a plan view showing the structure of an electronic circuit module according to a fourth embodiment, Figure 6 (B) is Figure 6 (A) A-A' side view, Figure 6 (C) is Figure 6 BB' cross-sectional view of (A). Figure 7(A) is a diagram showing an example of a wiring pattern of a data communication system in an electronic circuit module according to a fourth embodiment, Figure 7 (B) is a diagram showing an example of a wiring pattern of a power supply system in the electronic circuit module according to the fourth embodiment.

[0098] In addition, the components in the embodiments after this embodiment (the fourth embodiment) are the same as those in the first embodiment described above except for the contents re-shown below, and the description of these parts is omitted. In addition, in the embodiments after this embodiment, the terminals of the components are omitted from the illustration.

[0099] like Figure 6 (A) Figure 6 (B) Figure 6 As shown in (C), the electronic circuit module 10C includes a plurality of processor units 20, a plurality of memories 30, a plurality of photoelectric conversion units 40, a power conversion unit 50, and a package substrate 60C.

[0100] The plurality of processor units 20, the plurality of memories 30, the plurality of photoelectric conversion units 40, and the power conversion unit 50 are mounted on the first surface (surface) of the package substrate 60C. That is, the plurality of processor units 20, the plurality of memories 30, the plurality of photoelectric conversion units 40, and the power conversion unit 50 are mounted on a common package substrate 60C. The package substrate 60C is formed of a material having a lower loss of high-frequency signals than the motherboard 91 at least in the mounting region of the plurality of processor units 20, the plurality of memories 30, and the plurality of photoelectric conversion units 40.

[0101] The second surface (rear surface) of the package substrate 60C is mounted on the motherboard 91 .

[0102] A plurality of processor units 20 are arranged in the center of the first surface. A plurality of memories 30 and a power conversion unit 50 are arranged in a first direction (x-axis direction in the figure) parallel to the first surface, sandwiching the arrangement area of ​​the plurality of processor units 20. The arrangement area of ​​the plurality of processor units 20 is adjacent to and close to the arrangement area of ​​the plurality of memories 30. The arrangement area of ​​the plurality of processor units 20 is adjacent to and close to the power conversion unit 50.

[0103] The plurality of photoelectric conversion units 40 are arranged in a second direction (y-axis direction in the figure) parallel to the first surface and orthogonal to the first direction (x-axis direction in the figure) so as to sandwich the arrangement area of ​​the plurality of processor units 20. The arrangement area of ​​the plurality of processor units 20 is adjacent to and close to the plurality of photoelectric conversion units 40.

[0104] Through such a structure, Figure 7As shown in (A), the electronic circuit module 10C can shorten the data transmission line Lop (the line connecting the plurality of processor units 20 and the plurality of photoelectric conversion units 40). In addition, the electronic circuit module 10C can make the wiring of the data transmission line Lop simple and easy to complete. Therefore, the electronic circuit module 10C can suppress the transmission loss and delay based on the data transmission line Lop.

[0105] In addition, the electronic circuit module 10C can shorten the information processing bus Lpm (the line connecting the plurality of processor units 20 and the plurality of memories 30). In addition, the electronic circuit module 10C can make the wiring of the information processing bus Lpm simple and easy to complete. Therefore, the electronic circuit module 10C can suppress the transmission loss and delay based on the information processing bus Lpm.

[0106] And, if Figure 7 As shown in (B), the electronic circuit module 10C can shorten the processor power supply line Lpwp, the memory power supply line Lpwm, and the photoelectric conversion unit power supply line Lpwo from the power conversion unit 50, and can achieve a simple structure. Therefore, the electronic circuit module 10C can improve the power supply efficiency.

[0107] In this configuration, the plurality of memories 30 and the power conversion unit 50 are separated with the arrangement area of ​​the plurality of processor units 20 sandwiched therebetween. Thus, the electronic circuit module 10C can suppress the overlap of power supply noise to the plurality of memories 30.

[0108] [Fifth Embodiment]

[0109] An electronic circuit module according to a fifth embodiment of the present invention will be described with reference to the drawings. Figure 8 (A) is a plan view showing the structure of an electronic circuit module according to a fifth embodiment, Figure 8 (B) is a diagram showing an example of a wiring pattern of a data communication system in an electronic circuit module according to the fifth embodiment, Figure 8 (C) is a diagram showing an example of a wiring pattern of a power supply system in an electronic circuit module according to the fifth embodiment.

[0110] like Figure 8 (A) Figure 8 (B) Figure 8 As shown in (C), the electronic circuit module 10D of the fifth embodiment is different from the electronic circuit module 10C of the fourth embodiment in the arrangement pattern and wiring pattern of each component. The other structures of the electronic circuit module 10D are the same as those of the electronic circuit module 10C, and the description of the same parts is omitted.

[0111] The plurality of memories 30 are arranged on both sides of the package substrate 60D in the first direction (the x-axis direction in the figure) with the arrangement area of ​​the plurality of processor units 20 sandwiched in the middle. The plurality of photoelectric conversion units 40 are arranged on both sides of the package substrate 60D in the second direction (the y-axis direction in the figure) with the arrangement area of ​​the plurality of processor units 20 sandwiched in the middle.

[0112] The plurality of power conversion units 50 are arranged at corners of an outer shape formed by the arrangement of the plurality of memories 30 and the plurality of photoelectric conversion units 40 .

[0113] The plurality of processor units 20 and the plurality of memories 30 are adjacent to and close to each other in the first direction. The plurality of processor units 20 and the plurality of photoelectric conversion units 40 are adjacent to and close to each other in the second direction.

[0114] Through such a structure, Figure 8 As shown in (B), the electronic circuit module 10D can shorten the data transmission line Lop and the information processing bus Lpm. In addition, the electronic circuit module 10D can make the wiring of the data transmission line Lop and the information processing bus Lpm simple and easy to complete. Therefore, the electronic circuit module 10D can suppress the transmission loss and delay based on the data transmission line Lop and the information processing bus Lpm.

[0115] In addition, the plurality of power conversion units 50 are adjacent to or close to the processor unit 20, the memory 30, and the photoelectric conversion unit 40, respectively. Figure 8 As shown in (C), the electronic circuit module 10D can shorten the processor power supply line Lpwp, the memory power supply line Lpwm, and the photoelectric conversion unit power supply line Lpwo from the power conversion unit 50, and can achieve a simple structure. Therefore, the electronic circuit module 10D can improve the power supply efficiency.

[0116] In addition, the area efficiency of the plurality of processor units 20, the plurality of memories 30, the plurality of photoelectric conversion units 40, and the plurality of power conversion units 50 relative to the package substrate 60D is good. Therefore, the electronic circuit module 10D can be miniaturized.

[0117] In addition, the plurality of power conversion units 50 are arranged at the corners of the arrangement area of ​​the plurality of processor units 20, the plurality of memories 30, and the plurality of photoelectric conversion units 40. Therefore, the influence of the heat of the plurality of power conversion units 50 on the plurality of processor units 20 is suppressed, and the electronic circuit module 10D can easily release the heat to the outside.

[0118] [Sixth Embodiment]

[0119] An electronic circuit module according to a sixth embodiment of the present invention will be described with reference to the drawings. Fig. 9(A) is a plan view showing the structure of an electronic circuit module according to a sixth embodiment, Fig. 9 (B) is a diagram showing an example of a wiring pattern of a data communication system in an electronic circuit module according to the sixth embodiment, Fig. 9 (C) is a diagram showing an example of a wiring pattern of a power supply system in an electronic circuit module according to the sixth embodiment.

[0120] like Fig. 9 (A) Fig. 9 (B) Fig. 9 As shown in (C), the electronic circuit module 10E of the sixth embodiment differs from the electronic circuit module 10C of the fourth embodiment in the arrangement pattern and wiring pattern of each component. The other structures of the electronic circuit module 10E are the same as those of the electronic circuit module 10C, and the description of the same parts is omitted.

[0121] The plurality of memories 30 are arranged on both sides of the package substrate 60E in the first direction (the x-axis direction of the figure) with the arrangement area of ​​the plurality of processor units 20 sandwiched in the middle. The plurality of photoelectric conversion units 40 are arranged on both sides of the package substrate 60E in the second direction (the y-axis direction of the figure) with the arrangement area of ​​the plurality of processor units 20 sandwiched in the middle.

[0122] The plurality of power conversion units 50E1 are disposed between the plurality of memories 30 arranged along the second direction, adjacent to and close to each other. The plurality of power conversion units 50E2 are disposed between the plurality of photoelectric conversion units 40 arranged along the first direction, adjacent to and close to each other.

[0123] The plurality of processor units 20 and the plurality of memories 30 are adjacent and close in the first direction. The plurality of processor units 20 and the plurality of photoelectric conversion units 40 are adjacent and close in the second direction. The plurality of processor units 20 and the plurality of power conversion units 50E1 are adjacent and close in the first direction. The plurality of processor units 20 and the plurality of power conversion units 50E2 are adjacent and close in the second direction.

[0124] Through such a structure, Fig. 9 As shown in (B), the electronic circuit module 10E can shorten the data transmission line Lop and the information processing bus Lpm. In addition, the electronic circuit module 10E can make the wiring of the data transmission line Lop and the information processing bus Lpm simple and easy to complete. Therefore, the electronic circuit module 10E can suppress the transmission loss and delay based on the data transmission line Lop and the information processing bus Lpm.

[0125] In addition, the plurality of power conversion units 50E1 and 50E2 are adjacent to or close to the processor unit 20, the memory 30, and the photoelectric conversion unit 40, respectively. Fig. 9As shown in (C), the electronic circuit module 10E can shorten the processor power supply line Lpwp, memory power supply line Lpwm, and photoelectric conversion unit power supply line Lpwo from the power conversion units 50E1 and 50E2, and can achieve a simple structure. Therefore, the electronic circuit module 10E can improve the power supply efficiency.

[0126] In addition, in this structure, the symmetry of the arrangement of the plurality of memories 30, the plurality of photoelectric conversion units 40, and the plurality of power conversion units 50E1 and 50E2 is good. The electronic circuit module 10E can realize a structure in which the wiring patterns of the data transmission line Lop, the information processing bus Lpm, the processor power supply line Lpwp, the memory power supply line Lpwm, and the photoelectric conversion unit power supply line Lpwo are easily designed.

[0127] In addition, the plurality of memories 30 are arranged on both sides of the power conversion unit 50E1, and the plurality of photoelectric conversion units 40 are arranged on both sides of the power conversion unit 50E2. Thus, the electronic circuit module 10E can symmetrically supply power to the plurality of memories 30 and the plurality of photoelectric conversion units 40.

[0128] Furthermore, the electronic circuit module 10E can separate and divide the power supply from the power conversion unit 50E1 to the plurality of memories 30 and the power supply from the power conversion unit 50E2 to the plurality of photoelectric conversion units 40. Thus, the electronic circuit module 10E can suppress interference between these power supply lines (the memory power supply line Lpwm and the photoelectric conversion unit power supply line Lpwo).

[0129] Furthermore, the electronic circuit module 10E can separate the photoelectric conversion unit power supply line Lpwo from other power supply lines, and can suppress superposition of noise on the photoelectric conversion unit power supply line Lpwo.

[0130] [Seventh Embodiment]

[0131] An electronic circuit module according to a seventh embodiment of the present invention will be described with reference to the drawings. Fig.10 (A) is a plan view showing the structure of an electronic circuit module according to a seventh embodiment, Fig.10 (B) is a diagram showing an example of a wiring pattern of a data communication system in an electronic circuit module according to the seventh embodiment, Fig.10 (C) is a diagram showing an example of a wiring pattern of a power supply system in an electronic circuit module according to the seventh embodiment.

[0132] like Fig.10 (A) Fig.10 (B) Fig.10As shown in (C), the electronic circuit module 10F of the seventh embodiment differs from the electronic circuit module 10C of the fourth embodiment in the arrangement pattern and wiring pattern of each component. The other structures of the electronic circuit module 10F are the same as those of the electronic circuit module 10C, and the description of the same parts is omitted.

[0133] The power conversion unit 50 is disposed at the center of the first surface of the package substrate 60F. The plurality of processor units 20 are disposed at positions surrounding the power conversion unit 50. The plurality of processor units 20 are adjacent to and close to the power conversion unit 50.

[0134] The plurality of memories 30 are arranged on both sides of the package substrate 60F in the first direction (the x-axis direction of the figure) with the power conversion unit 50 and the arrangement area of ​​the plurality of processor units 20 sandwiched between them. The plurality of photoelectric conversion units 40 are arranged on both sides of the package substrate 60F in the second direction (the y-axis direction of the figure) with the power conversion unit 50 and the arrangement area of ​​the plurality of processor units 20 sandwiched between them.

[0135] The plurality of processor units 20 and the plurality of memories 30 are adjacent to and close to each other in the first direction. The plurality of processor units 20 and the plurality of photoelectric conversion units 40 are adjacent to and close to each other in the second direction.

[0136] Through such a structure, Fig. 9 As shown in (B), the electronic circuit module 10F can shorten the data transmission line Lop and the information processing bus Lpm. In addition, the electronic circuit module 10F can make the wiring of the data transmission line Lop and the information processing bus Lpm simple and easy to complete. Therefore, the electronic circuit module 10F can suppress the transmission loss and delay based on the data transmission line Lop and the information processing bus Lpm.

[0137] In addition, in this structure, the configuration of multiple memories 30, multiple photoelectric conversion units 40, and multiple power conversion units 50 is symmetrical. As a result, the electronic circuit module 10E can realize a structure that is easy to design the wiring pattern of the data transmission line Lop and the information processing bus Lpm. In addition, by locating the power conversion unit 50 in the center, it is possible to achieve diversity in the wiring pattern of the processor power supply line Lpwp, the memory power supply line Lpwm, and the photoelectric conversion unit power supply line Lpwo. That is, according to the power supply specifications of the multiple memories 30, the multiple photoelectric conversion units 40, and the multiple power conversion units 50, the power supply lines for them can be made independent or shared. When making them different lines, the electronic circuit module 10F can improve the power quality for the multiple memories 30, the multiple photoelectric conversion units 40, and the multiple power conversion units 50. When each power supply line is shared, the electronic circuit module 10F can reduce the space for power supply and can achieve miniaturization.

[0138] In addition, in this configuration, the power conversion unit 50 is adjacent to and close to the plurality of processor units 20. Therefore, the electronic circuit module 10F can shorten the processor power supply line Lpwp and improve the power supply efficiency to the plurality of processor units 20.

[0139] [Eighth Embodiment]

[0140] An electronic circuit module according to an eighth embodiment of the present invention will be described with reference to the drawings. Fig.11 (A) Fig.11 (B) is a plan view showing the structure of the electronic circuit module of the eighth embodiment, Fig.11 (A) indicates the first surface side, Fig.11 (B) indicates the second surface side. Fig.12 (A) is a diagram showing an example of a wiring pattern of a data communication system in an electronic circuit module according to an eighth embodiment, Fig.12 (B) is a diagram showing an example of a wiring pattern of a power supply system in the electronic circuit module according to the eighth embodiment.

[0141] like Fig.11 (A) Fig.11 As shown in (B), the electronic circuit module 10G of the eighth embodiment is different from the electronic circuit module 10C of the fourth embodiment in the arrangement pattern and wiring pattern of each component. The other structures of the electronic circuit module 10G are the same as those of the electronic circuit module 10C, and the description of the same parts is omitted.

[0142] The plurality of processor units 20 are arranged at the center of the first surface of the package substrate 60G. The plurality of memories 30 are arranged on both sides of the package substrate 60G in the first direction (the x-axis direction of the figure) with the arrangement area of ​​the plurality of processor units 20 sandwiched in the middle. The plurality of photoelectric conversion units 40 are arranged on both sides of the package substrate 60G in the second direction (the y-axis direction of the figure) with the arrangement area of ​​the plurality of processor units 20 sandwiched in the middle.

[0143] The plurality of processor units 20 and the plurality of memories 30 are adjacent to and close to each other in the first direction. The plurality of processor units 20 and the plurality of photoelectric conversion units 40 are adjacent to and close to each other in the second direction.

[0144] The power conversion unit 50 is disposed on the second surface of the package substrate 60G. The power conversion unit 50 overlaps with the processor units 20, the memories 30, and the photoelectric conversion units 40 when viewed in a direction perpendicular to the first and second surfaces (z-axis direction in the figure).

[0145] Through such a structure, Fig.12 As shown in (A), the electronic circuit module 10G can shorten the data transmission line Lop and the information processing bus Lpm. In addition, the electronic circuit module 10G can make the wiring of the data transmission line Lop and the information processing bus Lpm simple and easy to complete. Therefore, the electronic circuit module 10G can suppress the transmission loss and delay based on the data transmission line Lop and the information processing bus Lpm.

[0146] In addition, in this structure, the processor power supply line Lpwp, the memory power supply line Lpwm, and the photoelectric conversion unit power supply line Lpwo are formed by a conductor pattern extending in the thickness direction of the package substrate 60G. As a result, the electronic circuit module 10G can form the processor power supply line Lpwp, the memory power supply line Lpwm, and the photoelectric conversion unit power supply line Lpwo shorter. Therefore, the electronic circuit module 10G can improve the power supply efficiency.

[0147] Furthermore, in this structure, it is possible to increase the area of ​​the power conversion unit 50. Therefore, the electronic circuit module 10G can improve the degree of freedom in designing the power conversion unit 50.

[0148] [Ninth Embodiment]

[0149] An electronic circuit module according to a ninth embodiment of the present invention will be described with reference to the drawings. Fig.13 (A) is a plan view showing the structure of an electronic circuit module according to a ninth embodiment, Fig.13 (B) Fig.13 (C) means Fig.13(A) is a diagram of various different examples of the CC' section. In addition, Fig.13 (A) shows a state where the heat sink and the thermally conductive gel are removed. Fig.14 (A) is a diagram showing an example of a wiring pattern of a data communication system in an electronic circuit module according to a ninth embodiment, Fig.14 (B) is a diagram showing an example of a wiring pattern of a power supply system in the electronic circuit module of the ninth embodiment.

[0150] like Fig.13 (A) Fig.13 (B) Fig.13 As shown in (C), the electronic circuit module 10H of the ninth embodiment differs from the electronic circuit module 10C of the fourth embodiment in the arrangement pattern and wiring pattern of each component. The other structures of the electronic circuit module 10H are the same as those of the electronic circuit module 10C, and the description of the same parts is omitted.

[0151] The processor units 20 are arranged at the center of the first surface of the package substrate 60H. The photoelectric conversion units 40 are arranged around the arrangement area of ​​the processor units 20. The arrangement area of ​​the processor units 20 and the photoelectric conversion units 40 are adjacent and close to each other in a direction parallel to the first surface.

[0152] The plurality of power conversion units 50 are arranged at corners of an outer shape formed by the arrangement of the plurality of photoelectric conversion units 40 .

[0153] The memory 30 is arranged above the plurality of processor units 20 so as to overlap with the arrangement area of ​​the plurality of processor units 20. In other words, the memory 30 is arranged at a position facing the package substrate 60H across the plurality of processor units 20. The memory 30 and the plurality of processor units 20 are adjacent and close to each other in a direction perpendicular to the first surface.

[0154] Through such a structure, Fig.14 As shown in (A), the electronic circuit module 10H can shorten the data transmission line Lop and the information processing bus Lpm. In addition, in the electronic circuit module 10H, the main wiring directions of the data transmission line Lop and the information processing bus Lpm are orthogonal, and the wiring becomes easy, resulting in that each wiring can be shortened. Therefore, the electronic circuit module 10H can suppress the transmission loss and delay based on the data transmission line Lop and the information processing bus Lpm.

[0155] In addition, the plurality of power conversion units 50 are adjacent to or close to the processor unit 20, the memory 30, and the photoelectric conversion unit 40, respectively, when the electronic circuit module 10H is viewed from above. Fig.14As shown in (B), the electronic circuit module 10H can shorten the processor power supply line Lpwp, the memory power supply line Lpwm, and the photoelectric conversion unit power supply line Lpwo from the power conversion unit 50, and can realize a simple structure. Therefore, the electronic circuit module 10H can improve the power supply efficiency.

[0156] In addition, in this structure, it is possible to increase the plane area of ​​the memory 30. Therefore, the electronic circuit module 10H can increase the capacity of the memory 30 without increasing the overall shape.

[0157] In addition, if Fig.13 (B) Fig.13 As shown in (C), in this structure, the structure of the heat sink can be appropriately adjusted by adjusting the height of the plurality of photoelectric conversion units 40.

[0158] exist Fig.13 In the case of (B), the height of the photoelectric conversion unit 40 is substantially the same as the height of the processor unit 20 and the height of the memory 30. In this case, the electronic circuit module 10H includes a heat sink 71H. The heat sink 71H overlaps with the plurality of photoelectric conversion units 40 and the memory 30, and is thermally connected to the plurality of photoelectric conversion units 40 and the memory 30 via the thermally conductive gel 710H.

[0159] exist Fig.13 In the case of (C), the height of the photoelectric conversion unit 40 is substantially the same as the height of the processor unit 20. In this case, the electronic circuit module 10H includes a heat sink 71H and a heat sink 72H. The heat sink 71H overlaps with the memory 30 and is thermally connected to the memory 30 via the thermally conductive gel 710H. The heat sink 72H overlaps with the plurality of photoelectric conversion units 40 and is thermally connected to the plurality of photoelectric conversion units 40 via the thermally conductive gel 720H.

[0160] <1>

[0161] An electronic circuit module is mounted on a motherboard having a power supply source, and comprises:

[0162] A photoelectric conversion unit converts optical signals and electrical signals;

[0163] A processor unit, which uses the electrical signal to perform calculations;

[0164] a power conversion unit that converts the power from the power supply source and supplies the power to the photoelectric conversion unit and the processor unit; and

[0165] A packaging substrate is provided with the photoelectric conversion unit, the processor unit, and the power conversion unit.

[0166] The photoelectric conversion unit, the processor unit, and the power conversion unit are connected only through a conductor pattern formed on the package substrate.

[0167] <2>

[0168] The electronic circuit module according to <1>, wherein:

[0169] The above-mentioned packaging substrate has:

[0170] A first substrate, on which the power conversion unit is mounted; and

[0171] The second substrate, on which the photoelectric conversion unit and the processor unit are mounted, is mounted on the first substrate.

[0172] <3>

[0173] An electronic circuit module is mounted on a motherboard having a power supply source, and comprises:

[0174] A photoelectric conversion unit converts optical signals and electrical signals;

[0175] A processor unit, which uses the electrical signal to perform calculations;

[0176] a power conversion unit that converts the power from the power supply source and supplies the power to the photoelectric conversion unit and the processor unit; and

[0177] The package substrate, on which the photoelectric conversion unit, the processor unit, and the power conversion unit are mounted, has a portion having a lower loss of high-frequency signals than the motherboard.

[0178] <4>

[0179] The electronic circuit module according to <3>, wherein:

[0180] The above-mentioned packaging substrate has:

[0181] A first substrate, on which the power conversion unit is mounted; and

[0182] The second substrate is mounted with the photoelectric conversion unit and the processor unit, and is mounted on the first substrate.

[0183] The loss of the high-frequency signal of the first substrate is lower than the loss of the high-frequency signal of the motherboard.

[0184] <5>

[0185] The electronic circuit module according to any one of <1> to <4>, wherein:

[0186] The photoelectric conversion unit and the processor unit are supplied with power from the common power conversion unit.

[0187] <6>

[0188] The electronic circuit module according to <5>, wherein:

[0189] The photoelectric conversion unit and the processor unit are supplied with power from the one power conversion unit.

[0190] <7>

[0191] The electronic circuit module according to any one of <1> to <6>, wherein:

[0192] The photoelectric conversion unit and the processor unit are thermally connected to a shared heat sink.

[0193] <8>

[0194] The electronic circuit module according to <7>, wherein:

[0195] The photoelectric conversion unit, the processor unit, and the power conversion unit are thermally connected to the shared heat sink.

[0196] <9>

[0197] The electronic circuit module according to any one of <1> to <8>, wherein:

[0198] The package substrate is detachably mounted on the motherboard.

[0199] <10>

[0200] The electronic circuit module according to <9>, wherein:

[0201] The package substrate includes a plug mechanism on a mounting surface facing the motherboard.

[0202] <11>

[0203] The electronic circuit module according to <9> or <10>, wherein:

[0204] At least one of the photoelectric conversion unit, the processor unit, and the power conversion unit is mounted on the package substrate in a detachable manner.

[0205] <12>

[0206] The electronic circuit module according to any one of <1> to <4>, wherein:

[0207] A memory connected to the processor unit is provided,

[0208] The photoelectric conversion unit, the processor unit, the power conversion unit, and the memory are mounted on the first surface of the packaging substrate.

[0209] The processor unit is arranged at the center of the first surface.

[0210] The memory and the power conversion unit are arranged in a first direction parallel to the first surface with the processor unit sandwiched between them.

[0211] The plurality of photoelectric conversion units are arranged in a second direction that is parallel to the first surface and perpendicular to the first direction, with the processor unit sandwiched therebetween.

[0212] <13>

[0213] The electronic circuit module according to any one of <1> to <4>, wherein:

[0214] A memory connected to the processor unit is provided,

[0215] The photoelectric conversion unit, the processor unit, the power conversion unit, and the memory are mounted on the first surface of the packaging substrate.

[0216] The processor unit is arranged at the center of the first surface.

[0217] The plurality of memories are arranged in a first direction parallel to the first surface, sandwiching the processor unit.

[0218] The plurality of photoelectric conversion units are arranged in a second direction parallel to the first surface and perpendicular to the first direction, sandwiching the processor unit.

[0219] The plurality of power conversion units are arranged at corners of an outer shape formed by the arrangement of the plurality of memories and the plurality of photoelectric conversion units.

[0220] <14>

[0221] The electronic circuit module according to any one of <1> to <4>, wherein:

[0222] A memory connected to the processor unit is provided,

[0223] The photoelectric conversion unit, the processor unit, the power conversion unit, and the memory are mounted on the first surface of the packaging substrate.

[0224] The processor unit is arranged at the center of the first surface.

[0225] The plurality of memories are arranged in a first direction parallel to the first surface, sandwiching the processor unit.

[0226] The plurality of photoelectric conversion units are arranged in a second direction parallel to the first surface and perpendicular to the first direction, sandwiching the processor unit.

[0227] The plurality of power conversion units are disposed between the plurality of memories and between the plurality of photoelectric conversion units.

[0228] <15>

[0229] The electronic circuit module according to any one of <1> to <4>, wherein:

[0230] A memory connected to the processor unit is provided,

[0231] The photoelectric conversion unit, the processor unit, the power conversion unit, and the memory are mounted on the first surface of the packaging substrate.

[0232] The power conversion unit is arranged at the center of the first surface.

[0233] The plurality of processor units are arranged at positions surrounding the power conversion unit.

[0234] The plurality of memories are arranged in a first direction parallel to the first surface, sandwiching the processor unit and the power conversion unit.

[0235] The plurality of photoelectric conversion units are arranged in a second direction that is parallel to the first surface and perpendicular to the first direction, sandwiching the processor unit and the power conversion unit.

[0236] <16>

[0237] The electronic circuit module according to any one of <1> to <4>, wherein:

[0238] A memory connected to the processor unit is provided,

[0239] The photoelectric conversion unit, the processor unit, and the memory are mounted on the first surface of the packaging substrate.

[0240] The power conversion unit is mounted on the second surface of the packaging substrate.

[0241] When viewed in a direction perpendicular to the first surface and the second surface,

[0242] At least a portion of the power conversion unit overlaps with the photoelectric conversion unit, the processor unit, and the memory.

[0243] <17>

[0244] The electronic circuit module according to any one of <1> to <4>, wherein:

[0245] A memory connected to the processor unit is provided,

[0246] The photoelectric conversion unit, the processor unit, and the power conversion unit are mounted on the first surface of the packaging substrate.

[0247] The processor unit is arranged at the center of the first surface.

[0248] The plurality of photoelectric conversion units are arranged at positions surrounding the processor unit.

[0249] The plurality of power conversion units are arranged at corners of an outer shape formed by the arrangement of the plurality of photoelectric conversion units.

[0250] The memory overlaps with the processor unit when viewed in a direction perpendicular to the first surface, and is arranged at a position facing the package substrate with the processor unit interposed therebetween.

[0251] Description of Reference Numerals

[0252] 10, 10A, 10B, 10C, 10D, 10E, 10F, 10G, 10H…electronic circuit module; 20…processor unit; 30…memory; 40…photoelectric conversion unit; 50, 51B, 50E1, 50E2…power conversion unit; 52…connector for external power supply; 60, 60B, 60C, 60D, 60E, 60F, 60G, 60H…package substrate; 61, 61B…first substrate; 62…second substrate; 71, 71B, 71H, 72B, 72H…dispersion Hot plate; 91…motherboard; 92P…power line; 93…mounting pad; 94…plug mechanism; 652…power input line; 710, 710B, 710H, 720B, 720H…heat conduction gel; BP61…external connection terminal; Lop…data transmission line; Lpm…information processing bus; Lpw…power supply line; Lpwm…power supply line for memory; Lpwo…power supply line for photoelectric conversion unit; Lpwp…power supply line for processor; OTL…optical waveguide; PL…power cable.

Claims

1. An electronic circuit module mounted on a motherboard having a power supply source, wherein: have: A photoelectric conversion unit converts optical signals and electrical signals; A processor unit, which performs computation using the electrical signal; a power conversion unit that converts power from the power supply source and supplies power to the photoelectric conversion unit and the processor unit; and a packaging substrate on which the photoelectric conversion unit, the processor unit, and the power conversion unit are mounted, The photoelectric conversion unit, the processor unit, and the power conversion unit are connected only through a conductor pattern formed on the package substrate.

2. The electronic circuit module according to claim 1, wherein: The packaging substrate comprises: a first substrate on which the power conversion unit is mounted; and The second substrate, on which the photoelectric conversion unit and the processor unit are mounted, is mounted on the first substrate.

3. An electronic circuit module mounted on a motherboard having a power supply source, wherein: have: A photoelectric conversion unit converts optical signals and electrical signals; A processor unit, which performs computation using the electrical signal; a power conversion unit that converts power from the power supply source and supplies power to the photoelectric conversion unit and the processor unit; as well as The package substrate, on which the photoelectric conversion unit, the processor unit, and the power conversion unit are mounted, has a portion having a lower loss of high-frequency signals than the motherboard.

4. The electronic circuit module according to claim 3, wherein: The packaging substrate comprises: a first substrate on which the power conversion unit is mounted; and A second substrate is mounted with the photoelectric conversion unit and the processor unit, and the second substrate is mounted on the first substrate. The loss of the high frequency signal of the first substrate is lower than the loss of the high frequency signal of the motherboard.

5. The electronic circuit module according to any one of claims 1 to 4, wherein: The photoelectric conversion unit and the processor unit are supplied with power from the common power conversion unit.

6. The electronic circuit module according to claim 5, wherein: The photoelectric conversion unit and the processor unit are supplied with power from the one power conversion unit.

7. The electronic circuit module according to any one of claims 1 to 4, wherein: The photoelectric conversion unit and the processor unit are thermally connected to a shared heat sink.

8. The electronic circuit module according to claim 7, wherein: The photoelectric conversion unit, the processor unit, and the power conversion unit are thermally connected to the shared heat sink.

9. The electronic circuit module according to any one of claims 1 to 4, wherein: The package substrate is detachably mounted on the motherboard.

10. The electronic circuit module according to claim 9, wherein: The package substrate includes a plug mechanism on a mounting surface facing the motherboard.

11. The electronic circuit module according to claim 9, wherein: At least one of the photoelectric conversion unit, the processor unit, and the power conversion unit is mounted on the package substrate in a detachable structure.

12. The electronic circuit module according to any one of claims 1 to 4, wherein: A memory connected to the processor unit is provided, The photoelectric conversion unit, the processor unit, the power conversion unit, and the memory are mounted on the first surface of the packaging substrate. The processor unit is arranged at the center of the first surface. The memory and the power conversion unit are arranged in a first direction parallel to the first surface with the processor unit sandwiched therebetween. The plurality of photoelectric conversion units are arranged in a second direction that is parallel to the first surface and perpendicular to the first direction, sandwiching the processor unit.

13. The electronic circuit module according to any one of claims 1 to 4, wherein: A memory connected to the processor unit is provided, The photoelectric conversion unit, the processor unit, the power conversion unit, and the memory are mounted on the first surface of the packaging substrate. The processor unit is arranged at the center of the first surface. The plurality of memories are arranged in a first direction parallel to the first surface with the processor unit sandwiched between them. The plurality of photoelectric conversion units are arranged in a second direction parallel to the first surface and orthogonal to the first direction, sandwiching the processor unit. The plurality of power conversion units are arranged at corners of an outer shape formed by the arrangement of the plurality of memories and the plurality of photoelectric conversion units.

14. The electronic circuit module according to any one of claims 1 to 4, wherein: A memory connected to the processor unit is provided, The photoelectric conversion unit, the processor unit, the power conversion unit, and the memory are mounted on the first surface of the packaging substrate. The processor unit is arranged at the center of the first surface. The plurality of memories are arranged in a first direction parallel to the first surface with the processor unit sandwiched between them. The plurality of photoelectric conversion units are arranged in a second direction parallel to the first surface and orthogonal to the first direction, sandwiching the processor unit. The plurality of power conversion units are arranged between the plurality of memories and between the plurality of photoelectric conversion units.

15. The electronic circuit module according to any one of claims 1 to 4, wherein: A memory connected to the processor unit is provided, The photoelectric conversion unit, the processor unit, the power conversion unit, and the memory are mounted on the first surface of the packaging substrate. The power conversion unit is arranged at the center of the first surface, The plurality of processor units are arranged at positions surrounding the power conversion unit. The plurality of memories are arranged in a first direction parallel to the first surface, sandwiching the processor unit and the power conversion unit. The plurality of photoelectric conversion units are arranged in a second direction that is parallel to the first surface and perpendicular to the first direction, sandwiching the processor unit and the power conversion unit.

16. The electronic circuit module according to any one of claims 1 to 4, wherein: A memory connected to the processor unit is provided, The photoelectric conversion unit, the processor unit, and the memory are mounted on the first surface of the packaging substrate. The power conversion unit is mounted on the second surface of the packaging substrate. When viewed in a direction perpendicular to the first surface and the second surface, At least a portion of the power conversion unit overlaps with the photoelectric conversion unit, the processor unit, and the memory.

17. The electronic circuit module according to any one of claims 1 to 4, wherein: A memory connected to the processor unit is provided, The photoelectric conversion unit, the processor unit, and the power conversion unit are mounted on the first surface of the packaging substrate. The processor unit is arranged at the center of the first surface. The plurality of photoelectric conversion units are arranged at positions surrounding the processor unit. The plurality of power conversion units are arranged at corners of an outer shape formed by the arrangement of the plurality of photoelectric conversion units. The memory overlaps with the processor unit when viewed in a direction perpendicular to the first surface, and is arranged at a position facing the package substrate with the processor unit interposed therebetween.

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