Automatic testing device, system and method for QFN (Quad Flat No-lead) packaged microwave integrated chip

Abstract

The invention provides an automatic testing device, system and method for a QFN packaging type microwave integrated chip, and the device comprises a testing assembly which comprises a switching matrix switch and a plurality of testing interfaces connected with the switching matrix switch, and the switching matrix switch is used for switching the connection between the plurality of testing interfaces and a to-be-tested chip; the control assembly is connected with the test assembly and is used for controlling the switching matrix switch to switch connection between the plurality of connection test interfaces and a chip to be tested so as to enable the chip to be tested to output a test microwave signal when the chip to be tested is connected with the test interfaces; the mounting seat is used for mounting the test assembly and the control assembly, the test device can control the matrix change-over switch to be connected with the target test interface and the target pin based on the test item information and the pin information of the to-be-tested chip, and therefore the test efficiency is improved.

Description

Technical Field

[0001] The present application relates to the field of chip testing technology, and in particular to an automatic testing device, system and method for QFN packaged microwave integrated chips. Background Art

[0002] Common microwave integrated chips are packaged in QFN (Quad Flat No-lead Package). When performing performance tests on microwave integrated chips, it is necessary to design a test device equipped with different corresponding signal interfaces according to the project test type. In addition, since different microwave integrated chips have different pin definitions, the signal interface of the test device needs to be customized or adjusted according to the pin definition of each chip. Therefore, the diversity of test items and the differences in chip pin definitions have jointly led to a significant increase in the complexity of test device design, which in turn seriously hinders the improvement of test efficiency. Summary of the invention

[0003] In view of this, the purpose of the present application is to propose an automatic testing device, system and method for QFN-packaged microwave integrated chips, so as to solve the problem that the existing automatic testing device for QFN-packaged microwave integrated chips needs to be customized according to the diversity of test items and chip pin definitions, resulting in a decrease in test efficiency.

[0004] Based on the above purpose, the present application provides an automatic testing device for QFN packaged microwave integrated chips, comprising:

[0005] A test component, comprising a switching matrix switch and a plurality of test interfaces connected to the switching matrix switch, wherein the switching matrix switch is used to switch the connection between the plurality of test interfaces and the chip to be tested;

[0006] A control component connected to the test component, used to control the switching matrix switch to switch the connection between the plurality of connection test interfaces and the chip to be tested, so that the chip to be tested outputs a test microwave signal when connected to the test interface;

[0007] The mounting seat is used for mounting the test component and the control component.

[0008] Optionally, the test interface includes a control signal interface, a power signal interface, and a serial-parallel timing control interface.

[0009] Optionally, the control component includes a control module, and the control module includes a programmable control signal module, an adjustable voltage power supply module and an adjustable timing configuration module;

[0010] The programmable control signal module is connected to the switching matrix switch and the control signal interface;

[0011] The adjustable voltage power supply module is connected to the power signal interface;

[0012] The adjustable timing configuration module is connected to the serial-parallel timing control interface.

[0013] Optionally, a mounting groove is provided on the mounting seat, and the test component and the control component are both installed in the mounting groove.

[0014] Optionally, the test component also includes a test base plate, the test interface is installed on the test base plate, the control component also includes a control base plate, the control module is installed on the control base plate, the control base plate is connected to the mounting groove, and the test base plate is located above the mounting base plate.

[0015] Based on the same inventive concept, the present disclosure also provides an automatic testing system for QFN packaged microwave integrated chips, comprising any of the automatic testing devices described above;

[0016] An analysis instrument, the analysis instrument is used to obtain the test microwave signal output by the chip to be tested and analyze it to obtain microwave test data;

[0017] The host computer interaction platform is connected to the control module through a serial communication interface to issue operation instructions to the control module. The host computer interaction platform adopts SCPI instructions to connect to the analysis instrument through a network port to analyze, integrate and save the microwave test data from the analysis instrument.

[0018] Optionally, the analysis instrument includes a vector network analyzer and a phase noise analyzer, and the test interface also includes a radio frequency signal interface. The vector network analyzer is connected to the radio frequency signal interface to input an initial microwave signal to the chip to be tested through the radio frequency signal interface. The vector network analyzer and the phase noise analyzer are both connected to the chip to be tested through an SMA interface to obtain the test microwave signal output by the test chip and analyze it to obtain microwave test data.

[0019] Based on the same inventive concept, the present disclosure also provides an automatic testing method for a QFN packaged microwave integrated chip, which is applied to the above-mentioned control component, and the method comprises:

[0020] Obtain the test item information and pin information of the chip to be tested;

[0021] Determining a target test interface among a plurality of test interfaces based on the test item information;

[0022] Determine a target pin among multiple pins of the chip to be tested based on the test item information and the pin information of the chip to be tested;

[0023] Controlling the switching matrix switch to connect the target test interface with the target pin;

[0024] A test signal corresponding to the test item information is sent to the chip under test via the target test interface, so that the chip under test switches a working state based on the test signal.

[0025] Optionally, the target test interface is a control signal interface, and the test signal is a different electrical signal;

[0026] The sending a test signal corresponding to the test item information to the chip under test via the target test interface includes:

[0027] Inputting different electrical signals to the chip under test via the control signal interface to control the chip under test to achieve microwave attenuation and amplification working states;

[0028] The target test interface is a power signal interface, and the test signal is a signal of different voltages;

[0029] The sending a test signal corresponding to the test item information to the chip under test via the target test interface includes:

[0030] Input different voltage signals to the chip to be tested via the power signal interface;

[0031] The target test interface is a serial-parallel timing control interface, and the test signal is a signal with different timing information.

[0032] The sending a test signal corresponding to the test item information to the chip under test via the target test interface includes:

[0033] Signals with different timing information are input to the chip under test via the serial-parallel timing control interface to change the specific working state of the chip under test.

[0034] Optionally, the method is applied to the above automatic test system, characterized in that the method comprises the following steps:

[0035] Placing the chip to be tested in the test assembly;

[0036] The host computer interaction platform sends the test item information and pin information of the chip to be tested to the control component;

[0037] The control component controls the matrix switch to connect the target test interface and the target pin based on the test item information and the pin information of the chip under test, and sends a test signal corresponding to the test item information to the chip under test via the target test interface;

[0038] The host computer interactive platform controls the vector network analyzer to send an initial microwave test signal to the chip under test through the radio frequency signal interface;

[0039] The chip to be tested switches its working state based on the test signal and outputs a test microwave signal;

[0040] The vector network analyzer and the phase noise analyzer obtain the test microwave signal output from the chip to be tested and analyze it to obtain output microwave test data;

[0041] The host computer interaction platform analyzes, integrates and stores the microwave test data from the analytical instrument, and the microwave test data is displayed through the display screen of the host computer interaction platform.

[0042] As can be seen from the above, the automatic test device integrates a variety of test interfaces, which include a switching matrix switch, a control signal interface, a power signal interface, and a serial-parallel timing control interface. The test device switches the connection between the control signal interface, the power signal interface, or the serial-parallel timing control interface and the chip to be tested by switching the matrix switch, so as to flexibly respond to the diversified test requirements required by different chips to be tested, without the need to design a separate test device for each chip; when the pin definitions of the chip to be tested are different, the test item information and pin information of the chip to be tested are input into the control component, and based on the test item information and pin information of the chip to be tested, the control component controls the matrix switching switch to connect the target test interface and the target pin, thereby realizing automatic adjustment of the chip pin configuration, avoiding the tedious process of manually adjusting the connection between the target chip pin and the target test interface, reducing the complexity of the test device design, and improving the test efficiency.

[0043] The test device in the present application combines the test component with the control component to achieve an integrated test and control design, and has the advantages of miniaturization and portability. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] In order to more clearly illustrate the technical solutions in the present application or related technologies, the drawings required for use in the embodiments or related technical descriptions are briefly introduced below. Obviously, the drawings described below are only embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0045] Figure 1 This is a schematic diagram of the structure of the test component and the control component of the embodiment of the present application.

[0046] Figure 2 This is a flow chart of an automatic testing method for a control component according to an embodiment of the present application;

[0047] Figure 3This is a flow chart of an automatic testing method applied to an automatic testing system according to an embodiment of the present application.

[0048] Figure numerals: 1. test component; 11. test interface; 12. test base plate; 2. control component; 21. control module; 22. control base plate; 3. mounting seat; 31. mounting slot; 4. chip to be tested; 5. PCB board. DETAILED DESCRIPTION

[0049] In order to make the objectives, technical solutions and advantages of the present application more clearly understood, the present application is further described in detail below in combination with specific embodiments and with reference to the accompanying drawings.

[0050] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present application should be the usual meanings understood by people with ordinary skills in the field to which the present application belongs. The "first", "second" and similar words used in the embodiments of the present application do not represent any order, quantity or importance, but are only used to distinguish different components. "Including" or "comprising" and similar words mean that the elements or objects appearing in front of the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0051] Based on the background, in the field of microwave technology, microwave integrated chips are core components, and the stability and reliability of their performance are crucial to the operation of the entire system. These chips are usually packaged in QFN (Quad Flat No-lead Package), which is widely favored for its compact structure, good heat dissipation and high electrical performance. However, in the production and development of microwave integrated chips, performance testing is an indispensable part, and the design of the test device has become a problem that needs to be solved urgently.

[0052] When performing performance tests on microwave integrated chips, the design of the test device needs to closely match the specific requirements of the test items. Due to the different functions and performances of microwave integrated chips, the test items also present diverse characteristics. For example, some test items need to measure the gain and phase characteristics of the chip, while others need to test its noise figure and output power, etc. In order to meet these different test requirements, the test device needs to be equipped with different signal interfaces, such as RF signal interface, control signal interface and power signal interface, etc. The existing test devices have poor versatility, which leads to reduced test efficiency.

[0053] In addition, since different microwave integrated chips have unique pin definitions, the signal interface of the test device also needs to be customized or adjusted according to the pin layout of each chip. This means that every time a new microwave integrated chip needs to be tested, the designers of the test device need to redesign or adjust the signal interface to adapt to the pin definition of the chip. This customized design not only increases the design cost and time of the test device, but also further reduces the test efficiency.

[0054] In summary, the diversity of test items and the differences in chip pin definitions have led to a significant increase in the complexity of the design of microwave integrated chip test devices. This not only increases the test cost and time, but also seriously hinders the improvement of test efficiency. Therefore, the present application designs an automatic test device for QFN packaged microwave integrated chips, which improves the versatility of the test device by integrating multiple test interfaces 11 and controlling the switching matrix switch through the control component 2 to achieve automatic connection between the target chip pin and the target test interface 11, thereby improving the test efficiency of different microwave chips.

[0055] The embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0056] An automatic test device for QFN packaged microwave integrated chips, such as Figure 1 As shown, including:

[0057] The test assembly 1 comprises a switching matrix switch and a plurality of test interfaces 11 connected to the switching matrix switch, wherein the switching matrix switch is used to switch the connection between the plurality of test interfaces 11 and the chip to be tested 4;

[0058] A control component 2, connected to the test component 1, for controlling the switching matrix switch to switch the connection between the plurality of connection test interfaces 11 and the chip under test 4, so that the chip under test 4 outputs a test microwave signal when connected to the test interface 11;

[0059] The mounting seat 3 is used for mounting the test component 1 and the control component 2 .

[0060] In addition, the test interface 11 includes a control signal interface, a power signal interface, and a serial-parallel timing control interface.

[0061] Specifically, the test component 1 is one of the core components of the automatic test device. The test component 1 includes multiple test interfaces 11. The test interface 11 includes the control signal interface, the power signal interface, and the serial-parallel timing control interface. The above test interface 11 is the main test interface 11 of the microwave chip test device to meet the different test requirements of various chips. The chip to be tested 4 and the test interface 11 are both installed on the PCB board 5. The test interface 11 is connected to different pins of the chip to be tested 4 through the circuit on the PCB board 5. The circuit on the PCB board 5 has low resistance and capacitance characteristics, which can reduce the attenuation and interference in the signal transmission process between the test interface 11 and the pins of the chip to be tested 4.

[0062] In this embodiment, the automatic testing device integrates multiple testing interfaces 11, which include a switching matrix switch, a control signal interface, a power signal interface, and a serial-parallel timing control interface. The testing device switches the connection between the control signal interface, the power signal interface, or the serial-parallel timing control interface and the chip to be tested 4 by switching the matrix switch, so as to flexibly respond to the diverse testing requirements required by different chips to be tested 4. There is no need to design a separate testing device for each microwave chip, thereby improving the testing efficiency.

[0063] In some embodiments, Figure 1 As shown, the mounting seat 3 is provided with a mounting groove 31 , and the test component 1 and the control component 2 are both mounted in the mounting groove 31 .

[0064] In addition, the test assembly 1 also includes a test base plate 12, the test interface 11 is installed on the test base plate 12, the control module 21 also includes a control base plate 22, the control module 21 is installed on the control base plate 22, the control base plate 22 is connected to the mounting groove 31, and the test base plate 12 is located above the control base plate 22.

[0065] Specifically, the mounting seat 3 is a cubic structure, and the mounting groove 31 is formed by opening downward from the upper surface of the mounting seat 3, and is a square groove. The square groove is relatively regular, which is convenient for installing the test component 1 and the control component 2. In addition, the chip to be tested 4 and the test interface 11 are both installed on the PCB board 5, and the PCB board 5 is installed on the test base board 12. The test interface 11 is evenly distributed on both sides of the chip to be tested 4, which is convenient for connecting the test interface 11 with the pins of the chip to be tested 4.

[0066] Furthermore, the control base plate 22 and the test base plate 12 are both connected to the mounting seat 3 in a detachable manner, specifically, a snap-on connection or a bolt connection can be adopted. Regardless of the connection method adopted, the control base plate 22 and the test base plate 12 must be firmly connected to the mounting seat 3, and the detachability facilitates the control base plate 22 and the test base plate 12 to be removed from the mounting seat 3 to adjust the module installed on the base plate. In addition, the four corners of the test base plate 12 are mounted on the four corners of the mounting seat 3, and the lower surface of the test base plate 12 is flush with the upper surface of the mounting seat 3.

[0067] In this embodiment, the mounting groove 31 provides a mounting position for the test component 1 and the control component 2, and the test component 1 and the control component 2 are layered and compactly mounted in the mounting groove 31, saving the mounting space, thereby facilitating the miniaturization design of the mounting seat 3 and making it easy to carry. The test base plate 12 is located above the control base plate 22, that is, the test component 1 is located above the control component 2, so that the test component 1 is exposed, thereby facilitating the installation of the chip 4 to be tested on the test component 1.

[0068] In some embodiments, Figure 1 As shown, the control component 2 includes a control module 21, and the control module 21 includes a programmable control signal module, an adjustable voltage power supply module and an adjustable timing configuration module;

[0069] The programmable control signal module is connected to the switching matrix switch and the control signal interface;

[0070] The adjustable voltage power supply module is connected to the power signal interface;

[0071] The adjustable timing configuration module is connected to the serial-parallel timing control interface.

[0072] Specifically, the programmable control signal module is connected to the switching matrix switch to input a connection signal between the test interface 11 and the pins of the chip to be tested 4 to the switching matrix switch;

[0073] The programmable control signal module is connected to the control signal interface, and different electrical signals are input to the chip under test 4 via the control signal interface to control the chip under test 4 to achieve microwave attenuation and amplification working states;

[0074] The adjustable voltage power supply module is connected to the power signal interface to input different voltage signals to the chip 4 under test;

[0075] The adjustable timing configuration module is connected to the serial-parallel timing control interface to input signals with different timing information to the chip under test 4 .

[0076] In this embodiment, the programmable control signal module controls the switching matrix switch to switch the connection between the chip to be tested 4 and the test interface 11. In addition, the programmable control signal module can also select and input different types of electrical signals through the test interface 11 to the chip to be tested 4 to control the chip to be tested 4 to achieve microwave attenuation and amplification working states, so that the test scenario is more diversified and can meet different test requirements; the adjustable voltage power supply module can accurately provide different voltage signals and provide different voltage environments for the chip to be tested to meet various test requirements of the chip to be tested; the adjustable timing configuration module can send different timing signals to ensure that the chip to be tested 4 can operate according to a predetermined timing during the test process. In summary, the control module 21 integrates multiple functions, including signal input, voltage regulation and timing control, which can meet the needs of complex test scenarios and improve test efficiency.

[0077] For the convenience of description, the above device is described in terms of functions divided into various modules. Of course, when implementing the present application, the functions of each module can be implemented in the same or multiple software and / or hardware.

[0078] Based on the same inventive concept, corresponding to any of the above embodiments, the present application also provides an automatic testing system for QFN packaged microwave integrated chips, including the above automatic testing device;

[0079] An analysis instrument, which is used to obtain the test microwave signal output by the chip 4 to be tested and analyze it to obtain microwave test data;

[0080] The host computer interaction platform is connected to the control module 21 through a serial communication interface to issue operation instructions to the control module 21. The host computer interaction platform uses SCPI instructions to connect to the analysis instrument through a network port to analyze, integrate and save the microwave test data from the analysis instrument.

[0081] In this embodiment, the analytical instrument can accurately obtain the test microwave signal output by the chip 4 to be tested, and analyze it to obtain microwave test data. The analytical instrument enables the system to quickly and accurately evaluate the performance of the chip, thereby improving the test efficiency; the host computer interactive platform is connected to the control module 21 through the serial communication interface, and can easily issue operating instructions to achieve comprehensive control of the test process. At the same time, it uses SCPI instructions to connect to the analytical instrument through the network port, and can efficiently analyze, integrate and save the microwave test data from the analytical instrument, which provides great convenience for recording and querying test results.

[0082] In summary, the system realizes the automated testing of QFN packaged microwave integrated chips by integrating automatic testing equipment, analytical instruments and host computer interaction platform, reduces the reliance on manual operation and improves testing efficiency and accuracy.

[0083] Optionally, the analysis instrument includes a vector network analyzer and a phase noise analyzer, and the test interface 11 also includes a radio frequency signal interface. The vector network analyzer is connected to the radio frequency signal interface to input an initial microwave signal to the chip to be tested 4 through the radio frequency signal interface. The vector network analyzer and the phase noise analyzer are both connected to the chip to be tested 4 through an SMA interface to obtain the test microwave signal output by the test chip and analyze it to obtain microwave test data.

[0084] In this embodiment, the vector network analyzer is mainly used to measure the transmission and reflection characteristics of microwave signals, while the phase noise analyzer focuses on measuring the phase stability of the signal. By using the vector network analyzer and the phase noise analyzer, a comprehensive test of the different microwave characteristics of the chip can be achieved, thereby meeting diverse testing needs.

[0085] Based on the same inventive concept, corresponding to any of the above-mentioned automatic testing device embodiments, the present application also provides an automatic testing method for QFN packaged microwave integrated chips, which is applied to the control component 2, such as Figure 2 As shown, the method includes:

[0086] S101: Acquire test item information and pin information of the chip to be tested 4;

[0087] S102: determining a target test interface 11 among a plurality of test interfaces 11 based on the test item information;

[0088] S103: determining a target pin among multiple pins of the chip to be tested 4 based on the test item information and the pin information of the chip to be tested 4;

[0089] S104: Control the switching matrix switch to connect the target test interface 11 and the target pin;

[0090] S105 : Sending a test signal corresponding to the test item information to the chip under test 4 via the target test interface 11 , so that the chip under test 4 switches a working state based on the test signal.

[0091] In addition, the target test interface 11 is a control signal interface, and the test signal is a different electrical signal;

[0092] The sending of the test signal corresponding to the test item information to the chip under test 4 via the target test interface 11 includes:

[0093] Inputting different electrical signals to the chip under test 4 via the control signal interface to control the chip under test 4 to achieve microwave attenuation and amplification working states;

[0094] The target test interface 11 is a power signal interface, and the test signal is a signal of different voltages;

[0095] The sending of the test signal corresponding to the test item information to the chip under test 4 via the target test interface 11 includes:

[0096] Input different voltage signals to the chip to be tested 4 via the power signal interface;

[0097] The target test interface 11 is a serial-parallel timing control interface, and the test signal is a signal with different timing information.

[0098] The sending of the test signal corresponding to the test item information to the chip under test 4 via the target test interface 11 includes:

[0099] Signals with different timing information are input to the chip under test 4 via the serial-parallel timing control interface to change the specific working state of the chip under test.

[0100] In this embodiment, the control component 2 is one of the core components in the automatic testing device. The control component 2 can determine the target test interface 11 and the target chip pin according to the acquired test item information and chip pin information, and control the matrix switching switch to connect the target test interface 11 and the target chip pin, thereby avoiding the tedious process of manually adjusting the connection between the target chip pin and the target test interface 11, reducing the complexity of the test device design, and improving the test efficiency. In addition, the control module 21 integrates multiple functions, including signal input, voltage regulation and timing control, which can meet the needs of complex test scenarios and improve the test efficiency.

[0101] Based on the same inventive concept, corresponding to any of the above-mentioned automatic test system embodiments, the present application also provides an automatic test method for QFN packaged microwave integrated chips, such as Figure 3 As shown, the method comprises the following steps:

[0102] S201: placing the chip to be tested 4 in the test assembly 1;

[0103] Specifically, the chip to be tested 4 is placed on a PCB board on the test assembly 1, and the PCB board is designed with a circuit layout that matches the pins of the chip to be tested 4. The pins of the chip to be tested 4 are connected to the corresponding test interface 11 through the circuit on the PCB. In addition, the chip to be tested 4 is fixed and accurately placed by a fixture device or an automatic alignment device to ensure that the electrical connection between the chip to be tested 4 and the test interface 11 is good and stable.

[0104] S202: the host computer interaction platform sends the test item information and pin information of the chip to be tested 4 to the control component 2;

[0105] Specifically, the host computer interaction platform is a computer configured with dedicated test software. Test item information and pin information are usually input into the computer by the user. After receiving the user's instructions, the computer sends specific test items and chip pin information about the chip to be tested to the control component.

[0106] S203: The control component 2 controls the matrix switch to connect the target test interface 11 and the target pin based on the test item information and the pin information of the chip under test 4, and sends a test signal corresponding to the test item information to the chip under test 4 via the target test interface 11;

[0107] Specifically, the control component 2 determines the target test interface 11 among the multiple test interfaces 11 based on the test project information, and determines the target pin among the multiple pins of the chip to be tested 4 based on the test project information and the pin information of the chip to be tested 4, and then controls the switching matrix switch to connect the target test interface 11 with the target pin, and sends a test signal corresponding to the test project information to the chip to be tested 4 via the target test interface 11.

[0108] Furthermore, the target test interface 11 includes a control signal interface, a power signal interface, and a serial-parallel timing control interface; since the test item information and pin definitions of different chips to be tested are different, the control component determines the chip pin that matches the test interface based on the test item information, and determines the target pin based on the information on the pin definition.

[0109] S204: The host computer interaction platform controls the vector network analyzer to send an initial microwave test signal to the chip under test 4 through the radio frequency signal interface;

[0110] Specifically, the host computer interaction platform (i.e., a computer configured with dedicated test software) sends instructions to the vector network analyzer according to the user's preset test requirements. This instruction contains detailed parameters of the initial microwave test signal, such as the signal's frequency range, power level, etc. The selection of these parameters is based on the expected operating frequency band and performance requirements of the chip 4 to be tested to ensure that the test can accurately evaluate the performance of the chip.

[0111] S205: the chip under test 4 switches the working state based on the test signal and outputs a test microwave signal;

[0112] Specifically, the chip under test 4 will output a corresponding test microwave signal according to the received test signal after being processed by its internal complex and precise circuits.

[0113] Furthermore, when the chip under test 4 receives the test signals from the test component, these signals are first captured by the input interface on the chip. Then, the signals pass through the signal paths inside the chip, which may include various functional modules such as amplifiers, filters, mixers, oscillators, etc. Each module performs specific processing on the signal and then outputs the corresponding microwave test signal.

[0114] S206: The vector network analyzer and the phase noise analyzer obtain the test microwave signal output from the chip to be tested 4 and analyze it to obtain output microwave test data;

[0115] Specifically, the vector network analyzer and the phase noise analyzer respectively capture the test microwave signal output by the chip under test 4 and perform in-depth analysis. The vector network analyzer is mainly used to measure parameters such as frequency response, gain, and phase, while the phase noise analyzer focuses on evaluating the phase stability of the signal. These instruments transmit the analyzed output microwave test data to the host computer interaction platform through an internal interface.

[0116] S207: The host computer interaction platform analyzes, integrates and saves the microwave test data from the analysis instrument, and the microwave test data is displayed through the display screen of the host computer interaction platform.

[0117] Specifically, after receiving the data from the test instrument, the host computer interactive platform integrates, analyzes and processes the data using built-in algorithms to generate detailed test reports. These reports include various performance indicators of the chip under test, comparison of test results with standard values, possible fault point analysis, etc. Finally, the test data and analysis results are intuitively displayed to the tester through the display screen of the host computer interactive platform, which makes it easy for the tester to quickly understand the performance status of the chip under test and make further decisions based on it.

[0118] In this embodiment, the method sends the test item information and pin information of the chip to be tested 4 to the control component 2 through the host computer interaction platform, and the control component 2 controls the matrix switching switch to connect the target test interface 11 and the target pin based on the test item information and pin information of the chip to be tested 4, and sends the test signal corresponding to the test item information to the chip to be tested 4 via the target test interface 11; thus, the tester can input the test item information and chip pin information of the chip to be tested 4 to the host computer interaction platform, and the system automatically completes the precise connection of the test interface 11 and the output of the test signal. Using a high-precision vector network analyzer and phase noise analyzer, the system can capture and analyze the test microwave signal output by the chip to be tested 4, and generate detailed output microwave test data. These data are deeply analyzed, integrated and saved via the host computer interaction platform, and presented to the tester through an intuitive display screen. This method not only simplifies the test process, but also improves the efficiency of the test.

[0119] It should be noted that the method of the embodiment of the present application can be performed by a single device, such as a computer or server. The method of this embodiment can also be applied to a distributed scenario and completed by multiple devices cooperating with each other. In the case of such a distributed scenario, one of the multiple devices can only perform one or more steps in the method of the embodiment of the present application, and the multiple devices will interact with each other to complete the described method.

[0120] It should be noted that the above describes some embodiments of the present application. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in an order different from that in the above embodiments and still achieve the desired results. In addition, the processes depicted in the accompanying drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0121] It is understandable that before using the technical solutions of each embodiment of the present disclosure, the type, scope of use, usage scenarios, etc. of the personal information involved will be informed to the user in an appropriate manner, and the user's authorization will be obtained.

[0122] For example, in response to receiving an active request from a user, a prompt message is sent to the user to clearly remind the user that the operation requested to be performed will require obtaining and using the user's personal information. Thus, the user can independently choose whether to provide personal information to software or hardware such as an electronic device, application, server, or storage medium that performs the operation of the technical solution of the present disclosure according to the prompt message.

[0123] As an optional but non-limiting implementation, in response to receiving the user's active request, the prompt information may be sent to the user in the form of a pop-up window, in which the prompt information may be presented in text form. In addition, the pop-up window may also carry a selection control for the user to choose "agree" or "disagree" to provide personal information to the electronic device.

[0124] It is understandable that the above notification and the process of obtaining user authorization are merely illustrative and do not constitute a limitation on the implementation of the present disclosure. Other methods that meet relevant laws and regulations may also be applied to the implementation of the present disclosure.

[0125] A person skilled in the art should understand that the discussion of any of the above embodiments is merely illustrative and is not intended to imply that the scope of the present application is limited to these examples. In line with the concept of the present application, the technical features in the above embodiments or different embodiments may be combined, the steps may be implemented in any order, and there are many other variations of the different aspects of the embodiments of the present application as described above, which are not provided in detail for the sake of simplicity.

[0126] In addition, to simplify the description and discussion, and in order not to make the embodiments of the present application difficult to understand, the known power supply / ground connection with the integrated circuit (IC) chip and other components may or may not be shown in the provided drawings. In addition, the device can be shown in the form of a block diagram to avoid making the embodiments of the present application difficult to understand, and this also takes into account the fact that the details of the implementation of these block diagram devices are highly dependent on the platform to be implemented in the embodiments of the present application (that is, these details should be fully within the scope of understanding of those skilled in the art). In the case of elaborating specific details (e.g., circuits) to describe exemplary embodiments of the present application, it is obvious to those skilled in the art that the embodiments of the present application can be implemented without these specific details or when these specific details are changed. Therefore, these descriptions should be considered to be illustrative rather than restrictive.

[0127] Although the present application has been described in conjunction with specific embodiments of the present application, many replacements, modifications and variations of these embodiments will be apparent to those skilled in the art from the foregoing description. For example, other memory architectures (e.g., dynamic RAM (DRAM)) may use the embodiments discussed.

[0128] The embodiments of the present application are intended to cover all such substitutions, modifications and variations that fall within the broad scope of the present application. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the embodiments of the present application should be included in the protection scope of the present application.

Claims

1. An automatic testing device for QFN packaged microwave integrated chips, characterized in that: include: A test assembly (1) comprises a switching matrix switch and a plurality of test interfaces (11) connected to the switching matrix switch, wherein the switching matrix switch is used to switch the connection between the plurality of test interfaces (11) and a chip to be tested (4); A control component (2) connected to the test component (1) and used for controlling the switching matrix switch to switch the connection between the plurality of connection test interfaces (11) and the chip to be tested (4), so that the chip to be tested (4) outputs a test microwave signal when connected to the test interface (11); The mounting seat (3) is used for mounting the test component (1) and the control component (2).

2. The automatic testing device for QFN packaged microwave integrated chip according to claim 1, characterized in that: The test interface (11) comprises a control signal interface, a power signal interface, and a serial-parallel timing control interface.

3. The automatic testing device for QFN packaged microwave integrated chip according to claim 2, characterized in that: The control component (2) comprises a control module (21), and the control module (21) comprises a programmable control signal module, an adjustable voltage power supply module and an adjustable timing configuration module; The programmable control signal module is connected to the switching matrix switch and the control signal interface; The adjustable voltage power supply module is connected to the power signal interface; The adjustable timing configuration module is connected to the serial-parallel timing control interface.

4. The automatic testing device for QFN packaged microwave integrated chip according to claim 1, characterized in that: The mounting seat (3) is provided with a mounting groove (31), and the test component (1) and the control component (2) are both mounted in the mounting groove (31).

5. The automatic testing device for QFN packaged microwave integrated chip according to claim 4, characterized in that: The test assembly (1) further comprises a test base plate (12), the test interface (11) being mounted on the test base plate (12), the control assembly (2) further comprises a control base plate (22), the control module (21) being mounted on the control base plate (22), the control base plate (22) being connected to the mounting groove (31), and the test base plate (12) being located above the control base plate (22).

6. An automatic test system for QFN packaged microwave integrated chips, characterized in that: An automatic testing device comprising any one of claims 1 to 5; An analysis instrument, the analysis instrument is used to obtain a test microwave signal output by the chip to be tested (4) and analyze it to obtain microwave test data; A host computer interaction platform is connected to the control module (21) via a serial communication interface to issue an operation instruction to the control module (21); the host computer interaction platform is connected to the analysis instrument via a network port using SCPI instructions to analyze, integrate and save microwave test data from the analysis instrument.

7. The automatic test system for QFN packaged microwave integrated chips according to claim 6, characterized in that: The analysis instrument comprises a vector network analyzer and a phase noise analyzer, the test interface (11) further comprises a radio frequency signal interface, the vector network analyzer is connected to the radio frequency signal interface so as to input an initial microwave signal to the chip to be tested (4) through the radio frequency signal interface, and the vector network analyzer and the phase noise analyzer are both connected to the chip to be tested (4) through an SMA interface so as to obtain a test microwave signal output by the test chip and analyze and obtain microwave test data.

8. An automatic testing method for QFN packaged microwave integrated chips, characterized in that: Applied to the control component (2) according to claims 1 to 5, the method comprises: Obtaining test item information and pin information of the chip to be tested (4); Determining a target test interface (11) among a plurality of test interfaces (11) based on the test item information; Determining a target pin among a plurality of pins of the chip to be tested (4) based on the test item information and the pin information of the chip to be tested (4); Controlling the switching matrix switch to connect the target test interface (11) and the target pin; A test signal corresponding to the test item information is sent to the chip under test (4) via the target test interface (11), so that the chip under test (4) switches the working state based on the test signal.

9. The automatic testing method for QFN packaged microwave integrated chip according to claim 8, characterized in that: The target test interface (11) is a control signal interface, and the test signal is a different electrical signal; The sending of a test signal corresponding to the test item information to the chip under test (4) via the target test interface (11) comprises: Inputting different electrical signals to the chip to be tested (4) via the control signal interface to control the chip to be tested (4) to achieve microwave attenuation and amplification working states; The target test interface (11) is a power signal interface, and the test signal is a signal of different voltages; The sending of a test signal corresponding to the test item information to the chip under test (4) via the target test interface (11) comprises: Inputting different voltage signals to the chip to be tested (4) via the power signal interface; The target test interface (11) is a serial-parallel timing control interface, and the test signal is a signal with different timing information. The sending of a test signal corresponding to the test item information to the chip under test (4) via the target test interface (11) comprises: Signals with different timing information are input into the chip to be tested (4) via the serial-parallel timing control interface to change the specific working state of the chip.

10. An automatic testing method for QFN packaged microwave integrated chips, applied to the automatic testing system of claim 7, characterized in that: The method comprises the following steps: Placing a chip to be tested (4) in the test assembly (1); The host computer interaction platform sends the test item information and pin information of the chip to be tested (4) to the control component (2); The control component (2) controls the matrix switch to connect the target test interface (11) and the target pin based on the test item information and the pin information of the chip to be tested (4), and sends a test signal corresponding to the test item information to the chip to be tested (4) via the target test interface (11); The host computer interactive platform controls the vector network analyzer to send an initial microwave test signal to the chip to be tested (4) through the radio frequency signal interface; The chip to be tested (4) outputs a test microwave signal based on the test signal; The vector network analyzer and the phase noise analyzer obtain a test microwave signal output from the chip to be tested (4) and analyze the signal to obtain output microwave test data; The host computer interaction platform analyzes, integrates and stores the microwave test data from the analytical instrument, and the microwave test data is displayed through the display screen of the host computer interaction platform.

Images