Current sampling circuit for RDS temperature compensation
By setting the temperature coefficients of resistors R1 and R3, the temperature compensation for the power tube is achieved, and the problem that power tubes cannot be effectively compensated under external conditions in the prior art is solved, and the accuracy of current sampling and temperature compensation effect are improved.
Patent Information
- Application Number
- CN202411953356.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-27
- Publication Date
- 2025-03-04
AI Technical Summary
The existing RDS-based current sampling circuit cannot effectively achieve temperature compensation when the power tube is externally installed, resulting in a decrease in sampling accuracy and an increase in circuit complexity.
By setting the temperature coefficients of resistors R1 and R3, the total temperature coefficients of the power tube and the current sampling circuit are as small as possible, thereby achieving temperature compensation for RDS. The circuit includes a current sampling unit and a loop regulating unit, which is simple and independent, without the need for additional auxiliary circuits.
It is realized that the sampling coefficient is matched and adjusted according to the temperature characteristics of different power tubes without adding additional circuits, which improves the accuracy of current sampling and temperature compensation effect, and reduces the chip area and cost.
Smart Images
Figure CN119561528A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of integrated circuits, and in particular to a current sampling circuit (CurrentSense) based on RDS, especially for applications where a power tube is external and a small sampling temperature drift is required. Background Art
[0002] With the development of complementary metal oxide semiconductor (CMOS) integrated circuit technology, electronic products are increasingly used in daily life and have become an indispensable part of various fields. The development goal of the increasingly miniaturized CMOS integrated circuit chip determines that low power consumption and high integration have become the important directions for the development of CMOS integrated circuits.
[0003] Current sampling circuits are used in a variety of power management ICs. Unlike traditional current sampling circuits, they can effectively compensate for the temperature characteristics of power MOS and can be designed specifically according to the MOS characteristics under different processes. They are more flexible and have wider compatibility.
[0004] RDS refers to the on-resistance between the drain and source of the power MOS tube when it is on. The traditional sampling circuit architecture based on RDS is as follows: Figure 1 and Figure 2 As shown, Figure 1 It is the most common sampling circuit, which consists of N-type current mirror SENSE circuit M1 and M2, error amplifier EA, adjustment tube M5, P-type current mirror output circuit M3 and M4; N-type current mirror SENSE circuit generally requires M2 and M1 device characteristics to be consistent, which can well offset the temperature and process deviation of the power tube, and then use EA with low offset and high gain for loop feedback to maintain the drain voltage of the SENSE tube and the power tube consistent, ensuring the accuracy of the SENSE result. Although this circuit is used in many power management chips and has a good sampling effect, it must be applied to the built-in power tube to ensure that M2 and M1 in the circuit match at the design end. When the power tube is external, the temperature and process cannot be matched, and it cannot play an effective compensation effect.
[0005] Figure 2It is an RDS current sampling circuit for external power tubes, consisting of a zero-temperature sampling resistor R1, an error amplifier EA, N-type adjustable current mirrors M2 and M3 (used in conjunction with a digital encoder), P-type current mirrors M4 and M5, and an output zero-temperature resistor R2. The current information is extracted through the zero-temperature resistor R1 and the MOS tube M2. The adjustable current mirrors of M2 and M3 are composed of multiple independent current mirrors. The ratio of M2 to M3 is adjusted according to the system temperature, thereby controlling the current flowing through M3, M4, and M5, and finally achieving the sampling result V SENSE Although the architecture is like this, the presented circuit cannot achieve the temperature compensation effect independently, and it needs to be used together with the temperature sampling circuit, the sampled analog-to-digital conversion circuit, the digital encoding circuit, etc., and the temperature compensation effect depends on the adjustment accuracy of the current mirror. The specific implementation requires high supporting resources and the overall complexity of the circuit is large, which is not conducive to chip area reduction and cost reduction. Summary of the invention
[0006] The present invention aims to overcome at least one defect of the above-mentioned prior art and provides a current sampling circuit with RDS temperature compensation for use in a power management system. The circuit sets resistors R1 and R3 with required temperature coefficients according to the temperature coefficient of the power tube so that the total temperature coefficient of the power tube and the current sampling circuit is as small as possible, thereby satisfying the temperature compensation effect of RDS. Not only can the sampling of internal and external power tubes MOS be realized, but the circuit is also streamlined and independent and does not require additional auxiliary circuits.
[0007] The technical solution adopted by the present invention is: Provided is a current sampling circuit with RDS temperature compensation, which is used to compensate for the temperature characteristics of a power MOS tube M1. The circuit comprises a current sampling unit and a loop adjustment unit. The current sampling unit comprises a resistor R1, and the loop adjustment unit comprises an operational amplifier EA1, a power MOS tube M2 and a resistor R3. One end of the resistor R1 is used to be connected to the drain of the power MOS tube M1, and the other end of the resistor R1 is connected to the reverse end of the operational amplifier EA1 and the source of the power MOS tube M2. The positive end of the operational amplifier EA1 is used to be connected to the source of the power MOS tube M1, and the output end of the operational amplifier EA1 is connected to the gate of the power MOS tube M2. After the drain of the power MOS tube M2 is connected to one end of the resistor R3, the output end is used as the output end of the current sampling circuit, and the output voltage V SENSE , the other end of the resistor R3 is grounded; the temperature coefficients of the power MOS tube M1, the resistor R1 and the resistor R3 satisfy K1-K2+K3=expected value, where K1 is the temperature coefficient of the power MOS tube M1, K2 is the temperature coefficient of the resistor R1, and K3 is the temperature coefficient of the resistor R3, and the expected value is (0±set deviation value).
[0008] Preferably, the current sampling unit further includes a resistor R2 which is the same as the resistor R1 , and the positive terminal of the operational amplifier EA1 is connected to the source of the power MOS tube M1 through the resistor R2 .
[0009] Preferably, the current sampling circuit further includes a current source, the input end of the current source is used to be connected to the power supply voltage VCC, and the output end of the current source is connected to the output end of the current sampling circuit; the temperature coefficient of the current source is:
[0010] Among them, I M1 Represents the current flowing through the power MOS tube M1, R DS_ON Characterizes the on-resistance of the power MOS tube M1, I b Characterizes the current of the current source.
[0011] Preferably, the current source comprises an operational amplifier EA2, a resistor R4 and a first current mirror; the positive terminal of the operational amplifier EA2 is used to access the reference voltage V REF , the reverse end of the operational amplifier EA2 is connected to one end of the resistor R4, the output end of the operational amplifier EA2 and the second end of the first current mirror; the first end of the first current mirror is used to be connected to the power supply voltage VCC, and the third end of the first current mirror is connected to the output end of the current sampling circuit as the output end of the current source; the other end of the resistor R4 is grounded; the temperature coefficient of the resistor R4 is: .
[0012] Preferably, the current of the first current mirror is a PMOS type current mirror, and the current ratio is 1:1.
[0013] Preferably, when the power MOS tube M2 is a PMOS tube, one end of the resistor R3 is directly connected to the drain of the power MOS tube M2; when the power MOS tube M2 is an NMOS tube, one end of the resistor R3 is connected to the drain of the power MOS tube M2 through a second current mirror.
[0014] Preferably, the current of the second current mirror is a PMOS type current mirror, and the current ratio is 1:1.
[0015] Compared with the prior art, the beneficial effects of the present invention are as follows: the present invention sets a resistor with a required temperature coefficient according to the temperature coefficient of the power tube, so that the total temperature coefficient of the power tube and the current sampling circuit is as small as possible, thereby satisfying the temperature compensation effect for RDS, and the temperature coefficient of current sampling can be flexibly designed, and the sampling coefficient can be matched and adjusted according to the temperature characteristics of different power tubes without adding additional circuits; the circuit is streamlined and independent, and does not require additional auxiliary circuits to sample current information with high accuracy and achieve a better temperature compensation effect, thereby greatly reducing the chip area and reducing costs; the present invention is more flexible in application scenarios, not only suitable for low-power power management ICs with built-in power tubes, but also suitable for high-power power management ICs with external power tubes; the process requirements are low, the entire circuit only needs resistors and MOS, and attention needs to be paid to the withstand voltage selection of MOS tubes and resistors under high voltage, no compensation is required, and no stability requirements are required. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] Figure 1 is a circuit diagram of an existing traditional current sampling circuit; Figure 2 A circuit diagram of an improved RDS temperature compensation current sampling circuit in the prior art; Figure 3 A circuit diagram of a current sampling circuit for RDS temperature compensation according to the present invention; Figure 4 Another circuit diagram of the current sampling circuit for RDS temperature compensation according to the present invention; Figure 5 Another circuit diagram of the current sampling circuit for RDS temperature compensation according to the present invention; Figure 6 Another circuit diagram of the current sampling circuit with RDS temperature compensation according to the present invention. DETAILED DESCRIPTION
[0017] The present invention and its beneficial effects will be further described in detail below in conjunction with specific implementations and the accompanying drawings, but the specific implementations of the present invention are not limited thereto.
[0018] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.
[0019] In this embodiment, a current sampling circuit with RDS temperature compensation is provided, which is used to compensate for the temperature characteristics of the power MOS tube M1, including a current sampling unit and a loop adjustment unit. The current sampling unit includes a resistor R1, and the loop adjustment unit includes an operational amplifier EA1, a power MOS tube M2 and a resistor R3; one end of the resistor R1 is used to be connected to the drain of the power MOS tube M1, and the other end of the resistor R1 is connected to the reverse end of the operational amplifier EA1 and the source of the power MOS tube M2; the positive end of the operational amplifier EA1 is used to be connected to the source of the power MOS tube M1, the output end of the operational amplifier EA1 is connected to the gate of the power MOS tube M2, and the drain of the power MOS tube M2 is connected to one end of the resistor R3, which serves as the output end of the current sampling circuit, and the output voltage V SENSE , the other end of the resistor R3 is grounded; the temperature coefficients of the power MOS tube M1, the resistor R1 and the resistor R3 satisfy K1-K2+K3=expected value, where K1 is the temperature coefficient of the power MOS tube M1, K2 is the temperature coefficient of the resistor R1, and K3 is the temperature coefficient of the resistor R3, and the expected value is (0±set deviation value).
[0020] Specifically, Figure 3 As shown, in order to further improve the accuracy of current sampling, the current sampling unit further includes a resistor R2 which is the same as the resistor R1 , and the positive terminal of the operational amplifier EA1 is connected to the source of the power MOS tube M1 through the resistor R2 .
[0021] In the specific implementation process, the expected value is zero, but due to differences in process, component characteristics, etc., it may be possible that adjusting the temperature coefficients of resistors R1 and R3 still cannot correct the overall temperature characteristics to 0 (that is, the expected value is 0). Therefore, in the present invention, within a certain deviation range, it can be considered that the same correction effect exists. The deviation range can be set as needed, for example, ±0.5m / ℃.
[0022] The principle of the circuit of the present invention is as follows: Figure 3 As shown in FIG. 1 , the optimized current sampling circuit mainly consists of two parts. The first part is the current sampling unit of the power MOS tube M1. When the power MOS tube M1 is turned on, the voltage information at both ends of the power MOS tube M1 is directly sampled. The sampling voltage V DS_ON =I M *R DS_ON , where I M is the current flowing through the power MOS tube M1, R DS_ON is the impedance of the power MOS tube M1 when it is turned on; because the R DS_ON Generally, it presents a positive temperature coefficient. In order to offset this temperature characteristic, the two ends of the power MOS tube M1 are connected to the input end of the operational amplifier EA1 through resistors R1 and R2 (R1=R2) with certain positive temperature characteristics.
[0023] The second part is the loop adjustment unit, in which the resistor R1 is connected to the reverse end of the operational amplifier EA1, the resistor R2 is connected to the same end of the operational amplifier EA1, the output of the operational amplifier EA1 is connected to the power MOS tube M2 (PMOS), the source end of the power MOS tube M2 is connected to the reverse end of the operational amplifier EA1 to form a feedback loop, and the other end of the power MOS tube M2 is connected to the resistor R3. At this time, the voltage at the same end of the operational amplifier EA1 is the S end voltage V of the power MOS tube M1 EA+ =VS, the reverse terminal voltage of op amp EA1 is V EA- =I M1 *R DS_ON , where the resistor R1 and the resistor R2 are guaranteed to be matched in the circuit design. When the loop of the operational amplifier EA1 is stable, the voltages at its in-phase and reverse ends are equal. At this time, it can be concluded that the voltage across the resistor R1 is I M1 *R DS_ON , then the current I flowing through the resistor R1 R1 =I M1 *R DS_ON / R1. Finally, the current on the resistor R1 is equal to the current on the power MOS tube M2 and also equal to the current on the resistor R3, so the required current information can be obtained through the voltage on the resistor R3. like Figure 4 As shown, it is another specific circuit diagram of the current sampling circuit described in this embodiment. In this embodiment, the temperature coefficient K2 and K3 compensation of the resistors R2 and R3 still cannot meet the demand, and the optimization is carried out. The current source is introduced for further temperature correction, and the application range of the circuit is further expanded; the current sampling circuit also includes a current source, the input end of the current source is used to connect to the power supply voltage VCC, and the output end of the current source is connected to the output end of the current sampling circuit; the temperature coefficient of the current source is:
[0024] Among them, I M1 Represents the current flowing through the power MOS tube M1, R DS_ON Characterizes the on-resistance of the power MOS tube M1, I b Characterizes the current of the current source.
[0025] In a specific embodiment, Figure 5 As shown, the current source includes an operational amplifier EA2, a resistor R4 and a first current mirror; the positive terminal of the operational amplifier EA2 is used to access the reference voltage V REF, the reverse end of the operational amplifier EA2 is connected to one end of the resistor R4, the output end of the operational amplifier EA2 and the second end of the first current mirror; the first end of the first current mirror is used to be connected to the power supply voltage VCC, and the third end of the first current mirror is connected to the output end of the current sampling circuit as the output end of the current source; the other end of the resistor R4 is grounded; the temperature coefficient of the resistor R4 is: .
[0026] The current of the first current mirror is a PMOS type current mirror, including a PMOS tube M3 and a PMOS tube M4, the current ratio is 1:1, the resistor R4 is connected to the PMOS tube M4, the PMOS tube M4 and the PMOS tube M3 are matched current mirrors, and the output end of the PMOS tube PMOS tube M3 is connected to the resistor R3. REF Independent of temperature, the current I on resistor R4 R4 =V REF / R4, the current on the PMOS tube M3 is equal to the current on the PMOS tube M4 and also equal to the current on the resistor R4. Combined with the second part, the final sampling output is the voltage of the combination of the current on the power MOS tube M2 and the current on the PMOS tube M3 on the resistor R3. The output circuit not only realizes the sampling of current information, temperature compensation of sampling results, and conversion of sampling current to voltage, but also outputs the voltage V SENSE Provides a more flexible DC voltage point, making subsequent applications more convenient.
[0027] To make it clearer, Figure 5 Taking the circuit of as an example, the specific working principle of the circuit of the present invention is described from two aspects: 1. Current sampling principle The current sampling principle of the circuit is described from the aspects of voltage and current. After the VG-VS voltage of the power MOS tube M1 meets the M1 conduction condition, the current I flowing through M1 M1 Its on-resistance R DS_ON Generates the corresponding voltage V DS =I M1 *R DS_ON Generally, at a specific temperature and VG-VS voltage, R DS_ON Determined to be constant, so the measured current I M1 =V DS / R DS_ON Through V DS Voltage linear replacement. V DS The voltages at both ends are connected to the two ends of the op amp EA1 through R1 and R2 respectively, where R2 is connected to the same-direction end of the op amp and is a fixed voltage V EA+ =V S, R1 is connected to the reverse end of the op amp EA1. When the EA1 loop is regulated and stabilized, the voltages at the two input terminals of the op amp are equal. That is, the voltage across the resistor R1 is equal to the voltage across the M1. DS =V R1 , then the current I flowing through R1 R1 =I M1 *R DS_ON / R1 can linearly reflect the current information flowing through RDS, and finally flows out through M2 tube I R1 =I M2 .
[0028] Reference voltage V REF After passing through EA2, a corresponding current I is generated on resistor R4 R4 =V REF / R4, the current flows through M4, and then flows out through the current mirror composed of M4 and M3, then I M3 =I R4 .
[0029] The drain end of the adjustment tube M2 and the drain end of the current mirror M3 are connected to the resistor R3, and the other end of R3 is grounded. That is, IM2 and IM3 combine together on R3 to produce the final output sampling voltage drop, and the voltage V generated on R3 R3 =I M2 *R3+I M3 *R3=V SENSE , where I M3 *R3 represents the output DC operating point.
[0030] According to the above combined formula: (1) From this we can get: (2) Formula (2) can be written as: (3) Where V DC It is the sampled output DC operating point voltage. When designing, the VREF voltage or the resistance values of resistors R3 and R4 can be adjusted according to specific needs to obtain the final target value, which determines V SENSE The minimum value of the sampling voltage. S Represents the entire sampling coefficient, which needs to be based on V in the design SENSE Maximum voltage V SENSE_MAX , and the maximum current I flowing through the external power tube MOS M1_MAX , finally determine K S The limit value of K S The values are subject to the following constraints: (4) In the design, when R DS_ON 、V DC 、V SENSE_MAX ,I M1_MAX After the indicators are confirmed, the sampling slope can be adjusted by selecting appropriate resistors R1 and R3 to obtain the final K S value.
[0031] In the specific design, R1=R2, M3 and M4 are equal and matched; Figure 6 Except for the M1 tube, the withstand voltage of all other devices is consistent with the EA withstand voltage value.
[0032] 2. Temperature compensation principle The temperature compensation mechanism of the circuit and the selection of the optimal value are described from the perspective of temperature drift. The core of the present invention is to ensure the stability of the temperature characteristics of the entire sampling circuit. The temperature drift of the power MOS tube is optimally compensated by selecting resistors R1, R2, R3, and R4 with different temperature coefficients according to the temperature coefficient of the power MOS tube M1.
[0033] Specifically, the on-resistance of the power MOS tube M1 has an obvious positive temperature characteristic, and the common process is generally around +4.5m / ℃. Here, the temperature coefficient of the M1 tube is K1, and the actual impedance of the M1 tube after considering the temperature change is R DS_ON (1+K1).
[0034] Similarly, R1, R2, R3, and R4 in the circuit will actually present different temperature characteristics. Here, the temperature coefficients of R1 and R2 are K2, the temperature coefficient of R3 is K3, and the temperature coefficient of R4 is K4. Then, the actual impedance of R1 (because R1=R2, it will be uniformly represented by R1 below) after considering the temperature change is R1 (1+K2), the actual impedance of R3 after considering the temperature change is R3 (1+K3), and the actual impedance of R4 after considering the temperature change is R4 (1+K4).
[0035] The temperature coefficient of the final sampling voltage result is K TT , then the output sampling voltage after considering the temperature characteristics can be adjusted by formula (2) as follows: (5) In order to make the temperature coefficient analysis and calculation more convenient, the overall temperature coefficient of the equation before the plus sign on the right side of the equal sign in equation (5) is K TS The temperature coefficient of the equation after the plus sign on the right side of the equal sign is K TD , then formula (5) can be written as: (6) The goal of temperature compensation is formula (6) = formula (5) = formula (2), that is, KTT = 0, which determines the parameter selection of K2, K3, and K4 respectively.
[0036] Based on the above explanation, we conduct a specific calculation and analysis of the coefficients. First, we organize the formula before the plus sign on the right side of formula (5): (7) K TS The conditions that need to be met are: (8) Then we can get K TS =K1-K2+K3.
[0037] Based on the above analysis, we can further organize the equation after the plus sign on the right side of equation (5): (9) K TD The conditions that need to be met are: (10) Then we can get K TD =K3-K4.
[0038] Furthermore, combining formula (10), formula (8), formula (6) and the final overall temperature compensation target K TT =0, the following equations can be combined: (11) After sorting, we can get: (12) Specifically, according to the final compensation target K TT =0, combined with formula (12), the selection basis of the temperature coefficients K2, K3, K4 of the resistors R1, R2, R3, R4 is as follows: ① When K TS =K1-K2+K3=0: If K2 and K3 just satisfy the relationship K1=K2-K3, the temperature coefficients of the resistors R1, R2, and R3 can be selected directly based on this relationship. In this case, if you want to satisfy formula (12), then K TD K must also be satisfied TD =0, that is, K TD =K3-K4=0, K4=K3, the temperature coefficient of resistor R4 can be selected to be consistent with R3.
[0039] ② When K TS =K1-K2+K3≠0: In the actual circuit design process, if there is no resistor that can satisfy K1=K2-K3, K4 is needed to adjust the front end K TS After making compensation fine-tuning, formula (12) can be rearranged to obtain: (13) Therefore, when designing temperature compensation, try to select the temperature that satisfies K TS =K1-K2+K3=0 for the resistors R1, R2, and R3. In this case, the type of R4 can be directly selected to be the same as that of R3, which reduces the design difficulty. TS =K1-K2+K3≠0, the temperature coefficient K4 of resistor R4 can be further designed by formula (13).
[0040] Specifically, in the design, according to the temperature coefficient K1 of different external power tubes MOS, the temperature coefficients of resistors R1, R2, and R3 are selected first according to the analysis process of step 9 above, and finally the temperature coefficient of resistor R4 is selected to combine the total temperature coefficient K as small as possible. TT .
[0041] The above description of the present invention is specifically applied to high-end MOS sampling, and the current can be directly used when it flows from the D terminal to the S terminal. Figure 3 If the low-end power MOS is sampled in actual application and the current flows from the S terminal to the D terminal, the above invention needs to be fine-tuned, such as Figure 6 shown. The source VS of M1 is grounded, M2 is regulated by NMOS, the S end of M2 is still connected to the reverse end of EA, the D end of M2 is connected to M3, M3 and M4 are 1:1 current mirrors, the output D end of M4 is connected to the resistor R3, and the reference voltage V REF It is connected to the same direction end of EA, the reverse end and output end of EA are connected to resistor R4, the output end of EA is connected to current mirror M6, and M5 is connected to resistor R3 after being mirrored by M6.
[0042] The specific working principle is: After the VG-VS voltage meets the M1 conduction condition, the reverse current IM1 flowing through M1 and its conduction impedance R DS_ON Generate the corresponding voltage VDS=-I M1 *R DS_ON (Negative means current flows from the lower end of M1 to the upper end). Generally, at a specific temperature and VG-VS voltage, R DS_ON Determined to be constant, so the measured current I M1 =-V DS / R DS_ON Through V DS Voltage linear substitution.
[0043] V DS The voltages at both ends are connected to the two ends of the op amp through R1 and R2 respectively, where R2 is connected to the same-direction end of the op amp for a fixed voltage V EA+ =GND, R1 is connected to the reverse end of the op amp, and when the EA loop is adjusted and stabilized, the voltages at the two input terminals of the op amp are equal. That is, the voltage across the resistor R1 is equal to the voltage across M1. DS =V R1 , then the current I flowing through R1 R1 =-I M1 *R DS_ON / R1 (negative means the current flows from the right end of R1 to the left end) can linearly reflect the current information flowing through RDS, and finally flows out through M2 tube I R1 =I M2 .
[0044] The drain end of the adjustment tube M2 is connected to the current mirror M3, and M4 is connected to the resistor R3 after mirroring the current of M3. The other end of R3 is grounded, that is, I M2 =I M3 =I M4 =I R3 When the current from M4 flows through R3, a corresponding voltage V is generated on R3. R3 =I M4 *R3.
[0045] The reference voltage VREF generates a corresponding current I on the resistor R4 after passing through EA. R4 =V REF / R4, the current flows through M / 6, and then flows out through the current mirror composed of M6 and M5, then I M5 =I R4 .
[0046] The drain end of the current mirror M4 and the drain end of the current mirror M5 are both connected to the resistor R3, and the other end of R3 is grounded. M4 and I M5 The voltage V generated on R3 is combined to form the final output sampling voltage drop. R3 =I M4 *R3+I M5 *R3=V SENSE .
[0047] The final sampling output voltage relationship is: (14) This is consistent with the previous formula (2).
[0048] Similarly, the sampling expression after considering the temperature characteristics is consistent with formula (5). Therefore, the temperature compensation parameter design method can also refer to formula (12) and step 9 above for selection. Figure 6When using the structure shown in the figure, it is necessary to note that M3 and M4 need to be fully matched, M5 and M6 need to be fully matched, R1 and R2 need to have equal and matched resistance values, and the reference voltage VREF selects a zero temperature drift voltage.
[0049] The description of the above embodiments is only used to help understand the inventive concept of the present application and is not intended to limit the present invention. For ordinary technicians in this technical field, any modifications, equivalent substitutions, improvements, etc. made without departing from the principles of the present invention should be included in the scope of protection of the present invention.
Claims
1. A current sampling circuit with RDS temperature compensation, used to compensate the temperature characteristics of a power MOS tube M1, comprising a current sampling unit and a loop adjustment unit, characterized in that: The current sampling unit includes a resistor R1, and the loop adjustment unit includes an operational amplifier EA1, a power MOS tube M2 and a resistor R3; one end of the resistor R1 is used to connect to the drain of the power MOS tube M1, and the other end of the resistor R1 is connected to the reverse end of the operational amplifier EA1 and the source of the power MOS tube M2; the positive end of the operational amplifier EA1 is used to connect to the source of the power MOS tube M1, the output end of the operational amplifier EA1 is connected to the gate of the power MOS tube M2, and the drain of the power MOS tube M2 is connected to one end of the resistor R3, which serves as the output end of the current sampling circuit, and the output voltage V SENSE , the other end of the resistor R3 is grounded; the temperature coefficients of the power MOS tube M1, the resistor R1 and the resistor R3 satisfy (K1-K2+K3)=expected value, where K1 is the temperature coefficient of the power MOS tube M1, K2 is the temperature coefficient of the resistor R1, and K3 is the temperature coefficient of the resistor R3. The expected value is (0±set deviation value).
2. The current sampling circuit according to claim 1, characterized in that: The current sampling unit further includes a resistor R2 which is the same as the resistor R1 , and the positive terminal of the operational amplifier EA1 is connected to the source of the power MOS tube M1 through the resistor R2 .
3. The current sampling circuit according to claim 1 or 2, characterized in that: The current sampling circuit further includes a current source, the input end of the current source is used to be connected to the power supply voltage VCC, and the output end of the current source is connected to the output end of the current sampling circuit; the temperature coefficient of the current source is: Among them, I M1 Represents the current flowing through the power MOS tube M1, R DS_ON Characterizes the on-resistance of the power MOS tube M1, I b Characterizes the current of the current source.
4. The current sampling circuit according to claim 3, characterized in that: The current source includes an operational amplifier EA2, a resistor R4 and a first current mirror; the positive terminal of the operational amplifier EA2 is used to connect to the reference voltage V REF , the reverse end of the operational amplifier EA2 is connected to one end of the resistor R4, the output end of the operational amplifier EA2 and the second end of the first current mirror; the first end of the first current mirror is used to be connected to the power supply voltage VCC, and the third end of the first current mirror is connected to the output end of the current sampling circuit as the output end of the current source; the other end of the resistor R4 is grounded; the temperature coefficient of the resistor R4 is: 。 5. The current sampling circuit according to claim 4, characterized in that: The current of the first current mirror is a PMOS type current mirror, and the current ratio is 1:
1.
6. The current sampling circuit according to claim 1, characterized in that: When the power MOS tube M2 is a PMOS tube, one end of the resistor R3 is directly connected to the drain of the power MOS tube M2; when the power MOS tube M2 is an NMOS tube, one end of the resistor R3 is connected to the drain of the power MOS tube M2 through the second current mirror.
7. The current sampling circuit according to claim 6, characterized in that: The current of the second current mirror is a PMOS type current mirror, and the current ratio is 1:1.