Backside illuminated CMOS image sensor
By setting a stress relief slot in the metal wire of the back-illuminated CMOS image sensor, the bubble-like defect problem caused by stress accumulation in the groove is solved, and the reliability and quality of the sensor are improved.
Patent Information
- Application Number
- CN202411734431.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2022-09-21
- Publication Date
- 2025-03-04
AI Technical Summary
In the back-illuminated CMOS image sensor, the grooves between metal wires are prone to bubble-like defects, resulting in poor reliability and quality of the sensor.
At least part of the metal wire is provided with a stress relief slot that exposes the isolation dielectric layer to share and relieve stress from the metal wire pointing to both sides of the grooves to reduce stress accumulation in the grooves.
It effectively reduces the chance of bubble-shaped defects, improves the reliability and quality of the back-illuminated CMOS image sensor, and meets the requirements of reliability testing.
Smart Images
Figure CN119562623A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor technology, and in particular to a back-illuminated CMOS image sensor. Background Art
[0002] CMOS image sensors are divided into front-illuminated (FSI) and back-illuminated (BSI) according to the direction of incident light. In back-illuminated CMOS image sensors, light is incident from the back of the sensor and can enter the photoelectric sensing area (i.e., pixel) in the substrate more directly than front-illuminated ones, reducing light loss. In the same unit time, a single pixel can obtain more light energy, which significantly improves the image quality. Therefore, BSI technology has brought the sensitivity of CMOS imaging to a new level.
[0003] In a manufacturing process of a back-illuminated CMOS image sensor, an isolation dielectric layer is deposited on the back of a thinned substrate, and a metal grid (BMG) and metal wires are formed on the isolation dielectric layer, and a pad connection area process (pad open) is performed. The metal wires are solid lines. However, after performing a reliability test of a corresponding sensor under high temperature simulation of service life, it was found that bubble defects (such as Figure 1 The reliability test cannot be passed, indicating that the reliability and quality of the sensor with the corresponding structure are poor. Summary of the invention
[0004] In order to avoid bubble defects in grooves between metal wires and improve the quality and reliability of a back-illuminated CMOS image sensor, the present invention provides a back-illuminated CMOS image sensor.
[0005] The back-illuminated CMOS image sensor provided by the present invention comprises:
[0006] A pixel substrate, wherein the pixel substrate has a plurality of photoelectric sensing regions, each of the photoelectric sensing regions being used to sense light entering from the back side of the pixel substrate;
[0007] an isolation dielectric layer, covering the back side of the pixel substrate; and
[0008] The metal wires are arranged on the back side of the pixel substrate with the isolation dielectric layer in between, wherein at least part of the metal wires have stress release slots exposing the isolation dielectric layer, and the stress release slots are inserted into the lines of the metal wires but do not isolate the metal wires.
[0009] Optionally, the back-illuminated CMOS image sensor comprises:
[0010] A deep groove is arranged on the back side of the pixel substrate, the deep groove is used to isolate the light entering the adjacent photoelectric sensing area, and the isolation dielectric layer fills the deep groove and covers the back side of the pixel substrate outside the deep groove.
[0011] Optionally, the isolation dielectric layer includes:
[0012] a high dielectric constant layer, conformally covering the inner surface of the deep trench and the back surface of the pixel substrate outside the deep trench; and
[0013] An oxide layer is stacked on the high dielectric constant layer and fills the deep trench, wherein the oxide layer has a flat upper surface.
[0014] Optionally, the back-illuminated CMOS image sensor comprises:
[0015] A metal grid is arranged on the back side of the pixel substrate corresponding to the deep groove and separated by the isolation dielectric layer.
[0016] Optionally, the metal grid and the metal wire include tungsten or aluminum.
[0017] Optionally, the pixel substrate includes a pixel area and a peripheral area, and the metal wire is arranged corresponding to the peripheral area.
[0018] Optionally, the width of the metal wire is 5 μm to 250 μm.
[0019] Optionally, the cross-sectional shape of the stress relief slot is a triangle, a quadrilateral, a pentagon, a hexagon, a circle or an ellipse.
[0020] Optionally, the metal wire is isolated by a groove exposing the isolation dielectric layer, the groove separates the metal wire, and the width of at least part of the groove is less than or equal to 15 μm; the stress relief slot is arranged in the metal wire on the side of the groove.
[0021] In the back-illuminated CMOS image sensor provided by the present invention, the metal wire is arranged on the back side of the pixel substrate with an isolation dielectric layer in between, and at least part of the metal wire has a stress release slot exposing the isolation dielectric layer. The stress release slot can effectively share and release the stress in the direction of the grooves on both sides directed from the metal wire, reduce the stress accumulation in the grooves, reduce the probability of bubble defects, and help meet the reliability test requirements; and the setting of the stress release slot reduces the density of the metal material on the back side of the sensor, which can reduce the stress generated by the metal material on the pixel substrate as a whole, avoid the pixel substrate from warping upward, and help improve the quality and reliability of the back-illuminated CMOS image sensor. BRIEF DESCRIPTION OF THE DRAWINGS
[0022] Figure 1 This is a photo of a back-illuminated CMOS image sensor that produced bubble-like defects in the grooves of adjacent metal conductors after a high-temperature simulated service life reliability test.
[0023] Figure 2 A schematic diagram of the stress near the metal wire in a back-illuminated CMOS image sensor.
[0024] Figure 3 FIG. 4 is a schematic cross-sectional structural diagram of a back-illuminated CMOS image sensor according to an embodiment of the present invention.
[0025] Figure 4 FIG. 4 is a schematic cross-sectional view of a stress relief slot in a metal wire in a back-illuminated CMOS image sensor according to an embodiment of the present invention.
[0026] Figure 5 FIG. 4 is a schematic diagram of stress near a metal wire in a back-illuminated CMOS image sensor according to an embodiment of the present invention.
[0027] Description of reference numerals:
[0028] 10, 100 - pixel base; 101 - photoelectric sensing area; 102 - substrate; 103 - interconnection layer; 104 - deep groove; 11, 110 - isolation dielectric layer; 111 - high dielectric constant layer; 112 - oxide layer; 12, 120 - metal wire; 12a, 121 - groove; 122 - stress relief slot; 130 - metal grid; 20 - gap. DETAILED DESCRIPTION
[0029] The back-illuminated CMOS image sensor of the present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. The advantages and features of the present invention will become clearer according to the following description. It should be understood that the drawings in the specification are all in a very simplified form and are not in precise proportions, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.
[0030] After conducting a high-temperature simulated service life reliability test on a conventional back-illuminated CMOS image sensor, further testing revealed that bubble defects (such as Figure 1 The position indicated by the dotted circle in the middle shows that the reliability and quality of the corresponding sensor are poor.
[0031] Figure 2 This is a schematic diagram of the stress near the metal wire in a back-illuminated CMOS image sensor. Figure 2The metal wire 12 is usually formed by depositing a metal layer on the back side of the pixel substrate 10 and partially etching the metal layer. An isolation dielectric layer 11 is provided between the metal layer and the back side of the pixel substrate 10, and each of the metal wires 12 is isolated by a groove 12a exposing the isolation dielectric layer 11, that is, the groove 12a is located on both sides of each metal wire 12 and between the metal wires 12. However, studies have found that after the metal wire 12 (especially the metal wire 12 with a larger width and / or thickness) is formed, the stress on the back side of the pixel substrate 10 is increased, and the pixel substrate 10 and the back dielectric layer 11 in the groove 12a area are subjected to stress in the direction from the metal wire 12 to the groove 12a (such as Figure 2 As shown by the thick straight arrow, the back dielectric layer 11 in the groove 12a is separated from the back of the pixel substrate 10 under the stress compression, forming a gap 20, which is shown as follows Figure 1 The bubble defect shown.
[0032] The embodiment of the present invention relates to a back-illuminated CMOS image sensor, which is easy to generate Figure 1 The back-illuminated CMOS image sensor with bubble defects shown reduces stress accumulation in the groove, can avoid the bubble defects, and improve the quality and reliability of the back-illuminated CMOS image sensor.
[0033] Figure 3 FIG. 1 is a schematic cross-sectional view of a back-illuminated CMOS image sensor according to an embodiment of the present invention. Figure 3 A back-illuminated CMOS image sensor according to an embodiment of the present invention comprises a pixel substrate 100, an isolation dielectric layer 110 and a metal wire 120; wherein the pixel substrate 100 has a plurality of photoelectric sensing regions 101, each of the photoelectric sensing regions 101 is used to sense light entering from the back side of the pixel substrate 100, the isolation dielectric layer 110 covers the back side of the pixel substrate 100, the metal wire 120 is arranged on the back side of the pixel substrate 100 with the isolation dielectric layer 110 spaced therebetween, wherein at least a portion of the metal wire 120 has a stress release slot 122 exposing the isolation dielectric layer 110.
[0034] The pixel substrate 100 includes a substrate 102 and an interconnection layer 103. The substrate 102 may include materials such as silicon, germanium, silicon germanium, silicon carbide, gallium oxide, gallium arsenide, gallium phosphide, indium phosphide, indium arsenide or indium antimonide, or may also include other materials, such as GaAsP, AlInAs, AlGaAs, GaInAs, GaInP or GaInAsP, or may also be a combination of the above materials. A plurality of photoelectric sensing regions 101 may be formed in the substrate 102 by ion implantation from the front side of the substrate 102, and each of the photoelectric sensing regions 101 corresponds to a pixel for sensing light entering from the back side of the pixel substrate 100. The photoelectric sensing region 101 may include a photodiode. It is understood that only a partial number of photoelectric sensing regions 101 are shown in the accompanying drawings. The interconnection layer 103 is formed on the front side of the substrate 102, and may be a multi-layer interconnection layer. The interconnect layer 103 may include multiple layers of patterned conductive layers and conductive plugs separated by dielectric materials, which provide interconnections between various doped regions, circuits, and input / outputs of the back-illuminated CMOS image sensor.
[0035] From the cross section of the pixel substrate 100, it includes a pixel region I and a peripheral region II. The pixel region I is a region where the above-mentioned multiple photoelectric sensing regions 101 are arranged. The peripheral region II is arranged outside the pixel region I and is used to form peripheral components of the back-illuminated CMOS image sensor, such as components for realizing logical functions. The interconnection layer 103 can span the pixel region I and the peripheral region II. A TSV via (not shown) can also be formed in the substrate 102 of the peripheral region II, and the TSV via can be connected to the conductive layer in the interconnection layer 103.
[0036] The isolation dielectric layer 110 covers the back of the pixel substrate 100, and can isolate the substrate 102 from the structure formed on the back of the pixel substrate 100. In addition, in order to isolate the light entering each photoelectric sensing area 101 and avoid crosstalk, optionally, a deep groove 104 is formed in the pixel substrate 100, and the deep groove 104 is arranged on the back of the pixel substrate 100 to separate the light entering the adjacent photoelectric sensing area 101. The isolation dielectric layer 110 fills the deep groove 104 and covers the back of the pixel substrate 100 outside the deep groove 104. The isolation dielectric layer 110 can span the pixel area I and the peripheral area II.
[0037] In this embodiment, the isolation dielectric layer 110 includes a high dielectric constant layer 111 (HiK film), and the high dielectric constant layer 111 conformally covers the inner surface of the deep trench 104 and the back surface of the pixel substrate 100 outside the deep trench 104. The dielectric constant of the high dielectric constant layer 111 is higher than that of silicon oxide, for example, more than 3.9. The material of the high dielectric constant layer 111 may include Al2 O 3 、 2 O 5 、ZrO 2 , LaO, BaZrO, AlO, HfZrO, HfZrON, HfLaO, HfSiON, HfSiO, LaSiO, AlSiO, HfTaO, HfTiO, (Ba,Sr)TiO 3 (BST), Si 3 N 4 、TiO 2 , nitride oxide or at least one of other suitable materials, the thickness of which ranges for example to The high dielectric constant layer 111 has the function of absorbing the surface charges on the back side of the pixel substrate 100, which helps to reduce the “white pixel” defect.
[0038] The isolation dielectric layer 110 may further include an oxide layer 112 covering the high dielectric constant layer 111, such as a buffer oxide layer (BFOX). The oxide layer 112 is stacked on the high dielectric constant layer 111 and fills the deep trench 104. The oxide layer 112 has a flat upper surface (here, the upper surface of the oxide layer 112 refers to a side surface away from the pixel substrate 100). The oxide layer 112 may include silicon oxide.
[0039] Reference Figure 3 , the metal wire 120 is arranged on the back side of the pixel substrate 100 with the isolation dielectric layer 110 between them. The metal wire 120 can be used to connect the metal layer of the pixel area I or the connection end of the electronic components in the back-illuminated CMOS image sensor. The metal wire 120 can be connected to the interconnection layer 103 through the TSV via. In this embodiment, the metal wire 120 is arranged corresponding to the peripheral area II and is located on the isolation dielectric layer 110. Each metal wire 120 is isolated by a groove 121 exposing the isolation dielectric layer 110. As an example, the width of the groove 121 is 2.5μm to 50μm, and the width of the metal wire 120 is 5μm to 250μm.
[0040] In this embodiment, at least part of the metal wires 120 are provided with stress release slots 122, which are inserted into the lines of the metal wires 120 but do not separate the metal wires 120, and are therefore different from the grooves 121. For example, when the width of the grooves 121 between the metal wires 120 is less than 15 μm, it is easier to generate the following stress release slots 122: Figure 1The bubble-shaped defects shown in the figure are eliminated, so stress release slots 122 can be set in the metal wires 120 on both sides of the grooves 121 with a width of less than 15 μm. However, it is not limited to this. In one embodiment, the stress release slots 122 can be set in each metal wire 120 on the back of the pixel substrate 100 in the peripheral area II, and multiple stress release slots 122 can be set in each metal wire 120, and multiple stress release slots 122 can also be evenly distributed in each metal wire 120. The stress release slots 122 can be formed when the metal layer forming the metal wire 120 is patterned, and the stress release slots penetrate the metal layer to expose the isolation dielectric layer 110.
[0041] Figure 4 FIG. 1 is a schematic cross-sectional view of a stress relief slot in a metal wire in a back-illuminated CMOS image sensor according to an embodiment of the present invention. Figure 4 As an example, the cross-sectional shape of the stress release slot 122 may be a triangle, a quadrilateral, a pentagon, a hexagon, a circle, an ellipse, etc. The cross-sectional shape of the stress release slot 122 may also be an irregular shape.
[0042] Figure 5 FIG. 1 is a schematic diagram of stress near a metal wire in a back-illuminated CMOS image sensor according to an embodiment of the present invention. Figure 5 By providing the stress release slot 122, the stress generated by the metal wire 120 (as shown by the thick straight arrow) is released and blocked to a certain extent in the metal wire 120, so that the stress accumulated in the groove 121 on both sides of the metal wire is reduced, thereby reducing the risk of the aforementioned bubble-like defects in the groove 121, which helps to meet the reliability test requirements. In addition, the provision of the stress release slot 122 reduces the density of the metal material on the back of the sensor, which can reduce the stress generated by the metal material on the pixel substrate 100 as a whole, avoid the pixel substrate 100 from warping upward, and help improve the quality and reliability of the back-illuminated CMOS image sensor.
[0043] Reference Figure 3In some embodiments, the back-illuminated CMOS image sensor further includes a metal grid 130 (Backside Metal Grid, BMG), which is arranged corresponding to the deep trench 104 of the pixel area I and is arranged on the back side of the pixel substrate 100 with the isolation dielectric layer 110 interposed therebetween. The function of the metal grid 130 is to isolate the light rays irradiated from the back side to the photoelectric sensing areas 101 in the pixel substrate 100 from each other, thereby reducing crosstalk. Optionally, the metal wire 120 can be formed by the same patterning process as the metal grid 130. The metal grid 130 and the metal wire 120 can include the same metal material. The material of the metal wire 120 can include at least one of a single metal (such as copper, nickel, zinc, tin, silver, gold, tungsten, magnesium, tantalum, titanium, molybdenum, platinum, aluminum, hafnium, ruthenium, etc.) and an alloy (such as a copper alloy or an aluminum alloy, etc.). Further, the material of the metal wire 120 can include tungsten or aluminum. In this embodiment, the material of the metal wire is tungsten.
[0044] Optionally, the back-illuminated CMOS image sensor of the embodiment of the present invention may further include a dielectric layer (not shown) disposed on the back side of the pixel substrate 100, the dielectric layer may cover the metal wire 120 and the metal grid 130, and the dielectric layer may fill the stress release slot 122 and the grooves 121 on both sides of the metal wire 120. The dielectric layer may include one or a combination of dielectric materials such as silicon oxide, silicon nitride or oxynitride, and may also include borophosphosilicate glass (BPSG), undoped silicate glass (USG), spin-on glass (SOG), tetraethyl orthosilicate (TEOS), high-density plasma CVD (HDP-CVD) oxide or other suitable materials.
[0045] In the back-illuminated CMOS image sensor provided by the present invention, the metal wire 120 is arranged on the back side of the pixel substrate 100 with the isolation dielectric layer 110 in between, and at least part of the metal wire 120 has a stress release slot 122 exposing the isolation dielectric layer 110. The stress release slot 122 can effectively share and release the stress in the direction from the metal wire 120 to the grooves 121 on both sides, reduce the stress concentration in the grooves 121, reduce the probability of the above-mentioned bubble defects, and help meet the reliability test requirements; and the provision of the stress release slot 122 reduces the density of the metal material on the back side of the sensor, which can reduce the stress generated by the metal material on the pixel substrate 100 as a whole, avoid the pixel substrate 100 from warping upward, and help improve the quality and reliability of the back-illuminated CMOS image sensor.
[0046] The above description is only a description of the preferred embodiment of the present invention, and is not any limitation on the scope of rights of the present invention. Any technical personnel in this field can make possible changes and modifications to the technical solution of the present invention by using the methods and technical contents disclosed above without departing from the spirit and scope of the present invention. Therefore, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention shall fall within the protection scope of the technical solution of the present invention.
Claims
1. A back-illuminated CMOS image sensor, characterized in that: include: A pixel substrate, wherein the pixel substrate has a plurality of photoelectric sensing regions, each of the photoelectric sensing regions being used to sense light entering from the back side of the pixel substrate; An isolation dielectric layer covering the back side of the pixel substrate; as well as The metal wires are arranged on the back side of the pixel substrate with the isolation dielectric layer in between, wherein at least part of the metal wires have stress release slots exposing the isolation dielectric layer, and the stress release slots are inserted into the lines of the metal wires but do not isolate the metal wires.
2. The back-illuminated CMOS image sensor according to claim 1, wherein: include: A deep groove is arranged on the back side of the pixel substrate, the deep groove is used to isolate the light entering the adjacent photoelectric sensing area, and the isolation dielectric layer fills the deep groove and covers the back side of the pixel substrate outside the deep groove.
3. The back-illuminated CMOS image sensor according to claim 2, wherein: The isolation dielectric layer comprises: a high dielectric constant layer, conformally covering the inner surface of the deep trench and the back surface of the pixel substrate outside the deep trench; and An oxide layer is stacked on the high dielectric constant layer and fills the deep trench, wherein the oxide layer has a flat upper surface.
4. The back-illuminated CMOS image sensor according to claim 2, wherein: include: A metal grid is arranged on the back side of the pixel substrate corresponding to the deep groove and separated by the isolation dielectric layer.
5. The back-illuminated CMOS image sensor according to claim 4, wherein: The metal grid and the metal wire include the same metal material.
6. The back-illuminated CMOS image sensor according to claim 1, wherein: The material of the metal wire includes tungsten or aluminum.
7. The back-illuminated CMOS image sensor according to claim 1, wherein: The pixel substrate includes a pixel area and a peripheral area, and the metal wire is arranged corresponding to the peripheral area.
8. The back-illuminated CMOS image sensor according to claim 1, wherein: The width of the metal wire is 5 μm to 250 μm.
9. The back-illuminated CMOS image sensor according to claim 1, wherein: The cross-sectional shape of the stress release slot is a triangle, a quadrilateral, a pentagon, a hexagon, a circle or an ellipse.
10. The back-illuminated CMOS image sensor according to any one of claims 1 to 9, characterized in that: The metal wire is isolated by a trench exposing the isolation dielectric layer, the trench isolates the metal wire, and the width of at least a portion of the trench is less than or equal to 15 μm; The stress release slot is arranged in the metal wire on the side of the groove.