Process for improving P-N junction of solar cell, PERC cell and manufacturing method of PERC cell

Abstract

The invention provides an improvement process of a solar cell P-N junction, a PERC cell and a manufacturing method of the PERC cell, and the improvement process comprises the steps: firstly removing a PSG layer after a silicon wafer is used for manufacturing a selective emitter, and then carrying out the oxidation growth of an oxidation protection layer, thereby enabling a dead layer on the surface of the P-N junction to be thinned, improving and optimizing the P-N junction, and improving the performance of the PERC cell. And recombination of diffused photoelectrons on the surface of the cell is effectively reduced. According to the manufacturing method, on the basis of the improved technology, secondary cleaning is carried out to remove the oxidation winding plating layer on the back face, the oxidation protection layer on the front face is reserved, and then the subsequent coating procedure and the subsequent electrode procedure are carried out. A diffusion oxide layer removing process is formed by firstly removing a PSG layer, then oxidizing and carrying out secondary cleaning, and finally, the photoelectric efficiency of the surface is improved. According to the secondary cleaning, not only is the oxidized winding plating layer on the back removed, but also the existing pollution of the battery piece can be cleaned before film coating, and the reworking procedure of the battery piece does not need to be additionally added.

Description

Technical Field

[0001] The invention belongs to the field of solar cells, and relates to an improvement process of a solar cell PN junction, a PERC cell and a manufacturing method thereof. Background Art

[0002] With the continuous development of solar energy technology, the conversion efficiency of crystalline silicon solar cells is required to be higher and higher. PERC cells (Passivated Emitter and Rear Cell) are the most widely produced and applied mainstream cell structure. They effectively reduce photoelectric losses by attaching a dielectric passivation layer on the back of the cell, thereby improving the photoelectric conversion efficiency of photovoltaic cells by about 1%.

[0003] The existing production process of PERC solar cells with high conversion efficiency is: cleaning and texturing → diffusion → SE laser doping (selective emitter, SE) → oxidation → PSG (phosphosilicate glass) removal → alkali polishing → annealing → coating → window opening → electrode printing. Compared with the conventional PERC process, this process can achieve a certain improvement in conversion efficiency, but there is still a lot of room for improvement. Therefore, researchers are constantly optimizing the preparation process of solar cells to improve the conversion efficiency as much as possible.

[0004] As a feasible method, high square resistance and dense grid have gradually become a new development trend in the manufacture of high-efficiency batteries. It reduces the series resistance by increasing the number of main grid lines. High resistance refers to a large diffusion square resistance. The larger the diffusion square resistance, the fewer minority carriers recombine on the surface, the larger the short-circuit current, and thus the higher the photoelectric conversion efficiency. Usually, when pursuing high square resistance, the battery preparation process will be significantly affected by factors such as source concentration, reaction temperature, and reaction time, which are all likely to cause problems such as poor uniformity and thick recombination area, which in turn affects the state of the PN junction, thereby affecting the improvement of battery efficiency. Therefore, how to obtain a good battery PN junction under the condition of high square resistance and dense grid is a technical problem that this method needs to face.

[0005] In the current manufacturing of PERC solar cells, there is still the problem of secondary contamination, which usually occurs during the process of SE laser doping to the coating, thus affecting the state of the PN junction, hindering the full play of the high square resistance dense grid effect, and easily making the battery performance substandard and reducing the yield rate. In the existing technology, these defective pieces are often reworked.

[0006] CN112951946A discloses a rework process of a PERC reworked cell, comprising: cleaning the PERC reworked cell with a cleaning solution to remove dirt on the surface of the PERC reworked cell; cleaning the cleaned PERC reworked cell again with an acid solution to remove a surface oxide layer of the PERC reworked cell; placing the PERC reworked cell with the surface oxide layer removed in a circulation device to produce a PERC solar cell using a PERC preparation process;

[0007] CN113659040A discloses a PERC solar cell alkali polishing defective wafer processing process, comprising collecting alkali polishing defective wafers, depositing silicon dioxide on the front side of the alkali polishing defective wafers; performing a back side PSG removal process on the alkali polishing defective wafers; performing an alkali polishing process on the alkali polishing defective wafers;

[0008] The above process requires additional rework procedures and processes in the normal PERC manufacturing process, which makes the whole process complicated and cumbersome, and increases the cost, and is not suitable for mass production. Therefore, it is necessary to develop a new process solution that can take into account the application of high square resistance grid and contamination rework treatment to achieve further improvement of PERC cell efficiency. Summary of the invention

[0009] In view of the problems existing in the prior art, the purpose of the present invention is to provide an improved process for the PN junction of a solar cell, a PERC cell and a manufacturing method thereof. The improved process first removes the PSG layer after the selective emitter is made on the silicon wafer, and then oxidizes and grows an oxidation protection layer, which can make the dead layer on the surface of the PN junction thinner, thereby improving and optimizing the PN junction and effectively reducing the recombination of photoelectrons on the surface of the cell after diffusion. The manufacturing method, based on the improved process, performs a secondary cleaning to remove the oxide coating on the back, but retains the oxide protection layer on the front, and then implements the subsequent coating process and electrode process. A de-diffusion oxide layer process is formed by first removing the PSG layer, then oxidizing and cleaning it twice, and finally improving the surface photoelectric efficiency. The secondary cleaning not only removes the oxide coating on the back, but also cleans the existing contamination of the cell before coating, without adding an additional rework process for the cell.

[0010] To achieve this object, the present invention adopts the following technical solutions:

[0011] In a first aspect, the present invention provides a process for improving a PN junction of a solar cell, comprising the following steps:

[0012] After the silicon wafer is phosphorus diffused and the selective emitter is made, the PSG layer on one side of the selective emitter is removed, and then the surface after the PSG layer is removed is oxidized to grow an oxidation protection layer.

[0013] Different from the prior art which first oxidizes and then removes PSG after making the selective emitter, the improved process of the present invention first removes the PSG layer after making the selective emitter on the silicon wafer, and then oxidizes and grows an oxidation protection layer, which can make the dead layer on the surface of the PN junction thinner, thereby improving and optimizing the PN junction and effectively reducing the recombination of photoelectrons on the surface of the battery after diffusion.

[0014] On the basis of the improved process, a manufacturing method of PERC cells can be further formed. In the manufacturing method, the double-sided PSG layer is first removed, then oxidized, and then the oxide coating on the back is removed, but the oxide protective layer on the front is retained, so that the front is not corroded during alkaline polishing, and the oxide protective layer on the front is removed during the pickling process after alkaline polishing. After this process, a certain thickness of the PN junction dead layer can be removed, and the square resistance will be improved. This method is also suitable for the manufacture of low square resistance silicon wafers. Among them, the process of removing the oxide coating on the back also realizes the cleaning of the existing contamination of the cell before coating, without adding an additional rework process for the cell. Therefore, the process of removing the oxide coating on the back is equivalent to "secondary cleaning", and the silicon wafer is effectively cleaned again before coating to remove the pollution problems caused by the preparation process. The present invention constitutes a de-diffusion oxide layer process by first removing the PSG layer, then oxidizing and cleaning it twice, and finally improves the surface photoelectric efficiency.

[0015] The following are preferred technical solutions of the present invention, but are not intended to be limitations of the technical solutions provided by the present invention. Through the following technical solutions, the technical objectives and beneficial effects of the present invention can be better achieved and realized.

[0016] As a preferred technical solution of the present invention, the temperature of the phosphorus diffusion is 800°C to 900°C, for example, 800°C, 810°C, 820°C, 830°C, 840°C, 850°C, 860°C, 870°C, 880°C, 890°C or 900°C, but is not limited to the listed values, and other unlisted values ​​within the above numerical range are also applicable.

[0017] Preferably, the raw materials for phosphorus diffusion include POCl3, N2 and O2.

[0018] Preferably, the method for making the selective emitter comprises: performing laser propulsion according to a target printed pattern.

[0019] Preferably, the equipment for removing the PSG layer comprises a tank cleaning machine and / or a chain cleaning machine.

[0020] Preferably, the remover used to remove the PSG layer includes HF acid.

[0021] Preferably, the oxidation method comprises: passing oxygen through the surface from which the oxidation protective layer has been removed, and oxidizing at 620-720°C, for example, 620°C, 630°C, 640°C, 650°C, 660°C, 670°C, 680°C, 690°C, 700°C, 710°C or 720°C, etc., but is not limited to the listed values, and other values ​​not listed within the above numerical range are also applicable.

[0022] The present invention preferably uses oxygen for oxidation. The flow rate of oxygen has little effect on the oxidation process, but it is necessary to ensure that a specific oxidation temperature is reached and that the redistribution of the diffusion junction area is not affected.

[0023] In a second aspect, the present invention provides a method for manufacturing a PERC cell, wherein the manufacturing method adopts the improved process of the solar cell PN junction described in the first aspect, and the manufacturing method comprises the following steps:

[0024] The silicon wafer is sequentially textured, phosphorus-expanded, the front selective emitter is made, the double-sided PSG is removed, oxidation is performed, the back oxide coating is removed, the back alkali polishing is performed, annealing, back passivation, double-sided coating, back windowing is performed, and double-sided electrodes are made to obtain a PERC cell.

[0025] Compared with the existing PERC battery process, the present invention only adds one de-diffusion oxide layer process, and then undergoes secondary oxidation cleaning to thin the dead layer on the surface of the PN junction, thereby reducing the recombination of photoelectrons on the battery surface after diffusion, and improving the surface photoelectric conversion efficiency. In addition, this process can directly achieve or be equivalent to product rework after making a selective emitter and before plating PECVD film, without the need for other rework and cleaning processes, and has strong compatibility.

[0026] As a preferred technical solution of the present invention, the double-sided texturing method includes pre-cleaning the original silicon wafer, and then treating it in a NaOH solution with a concentration of 0.5-1.5wt% at a temperature of 75-85°C, such as 75°C, 76°C, 77°C, 78°C, 79°C, 80°C, 81°C, 82°C, 83°C, 84°C or 85°C, to generate a pyramid velvet surface, such as 0.5wt%, 0.6wt%, 0.7wt%, 0.8wt%, 0.9wt%, 1wt%, 1.1wt%, 1.2wt%, 1.3wt%, 1.4wt% or 1.5wt%, etc., but is not limited to the listed values, and other values ​​not listed within the above numerical range are also applicable.

[0027] Preferably, the pre-cleaning agent for the pre-cleaning comprises a mixed solution of hydrogen peroxide and a weak base.

[0028] Preferably, after the pyramid velvet surface is generated, the silicon wafer is sequentially subjected to alkali washing, acid washing, water washing and drying.

[0029] Preferably, the pickling agent for pickling comprises a mixed acid solution of HF and HCl.

[0030] As a preferred technical solution of the present invention, the equipment for removing the back oxide coating includes a chain cleaning machine;

[0031] Preferably, the remover for removing the back oxide coating includes HF acid.

[0032] Preferably, the equipment used for the back alkali polishing comprises a trough-type alkali polishing machine.

[0033] Preferably, an alkali polishing additive is added during the alkali polishing of the back side to protect the oxidation protection layer on the front side.

[0034] The present invention does not limit the alkali polishing liquid and additives for alkali polishing. Exemplarily, the alkali polishing liquid is KOH and / or NaOH solution.

[0035] Preferably, the temperature of the back alkali polishing is 60-70°C, for example, 60°C, 61°C, 62°C, 63°C, 64°C, 65°C, 66°C, 67°C, 68°C, 69°C or 70°C, but is not limited to the listed values, and other unlisted values ​​within the above numerical range are also applicable.

[0036] Preferably, after the back alkali polishing is completed and before the annealing, alkali washing, acid washing, water washing and drying after slow pulling are carried out in sequence.

[0037] Preferably, the annealing temperature is 650-750°C, for example 650°C, 660°C, 670°C, 680°C, 690°C, 700°C, 710°C, 720°C, 730°C, 740°C or 750°C, but is not limited to the listed values, and other unlisted values ​​within the above numerical range are also applicable.

[0038] Preferably, the annealing is performed in an oxygen-containing atmosphere.

[0039] As a preferred technical solution of the present invention, the back passivation includes forming an Al2O3 layer on the back side.

[0040] Preferably, the raw materials for forming the Al2O3 layer are trimethylaluminum (TMA) and N2O.

[0041] Preferably, the temperature for forming the Al2O3 layer is 360-400°C, for example, 360°C, 365°C, 370°C, 375°C, 380°C, 385°C, 390°C, 385°C or 400°C, but is not limited to the listed values, and other unlisted values ​​within the above numerical range are also applicable.

[0042] Preferably, the double-sided coating includes forming an anti-reflection film on the front side and forming a passivation film on the back side.

[0043] Preferably, the anti-reflection film includes a silicon nitride layer (SiN) and / or a silicon oxynitride layer (SiON).

[0044] Preferably, the passivation film includes a silicon nitride layer.

[0045] Preferably, the silicon nitride layer includes a Si3N4 layer.

[0046] Preferably, the double-sided coating method includes PECVD.

[0047] As a preferred technical solution of the present invention, the method of opening a window on the back side includes laser opening.

[0048] Preferably, the object with a window on the back side includes a passivation film on the back side.

[0049] Preferably, the method of making the double-sided electrode comprises screen printing.

[0050] Preferably, the sintering temperature for making double-sided electrodes is 700-900°C, for example 700°C, 720°C, 740°C, 760°C, 780°C, 800°C, 820°C, 840°C, 860°C, 880°C or 900°C, but is not limited to the listed values, and other unlisted values ​​within the above numerical range are also applicable.

[0051] As a preferred technical solution of the present invention, the manufacturing method further includes sequentially performing efficiency test sorting, EL confirmation, packaging and statistics on the obtained PERC cells.

[0052] As a preferred technical solution of the present invention, the manufacturing method comprises the following steps:

[0053] (1) Texturing: The original silicon wafer cut to the target size is pre-cleaned with a mixture of hydrogen peroxide and weak alkali, and then a pyramid velvet surface is formed in a 0.5-1.5wt% NaOH solution at 75-85°C, followed by alkaline washing, HF and HCl mixed acid washing, water washing and drying;

[0054] (2) Phosphorus diffusion: insert the textured silicon wafer into a quartz boat and send it into a furnace tube. After POCl3, N2, and O2 are introduced, the temperature is raised to 800℃~900℃ for phosphorus diffusion.

[0055] (3) Making a front selective emitter: Make a selective emitter on the front side of the diffused silicon wafer according to the target printed pattern using a laser propulsion method;

[0056] (4) Removal of double-sided PSG: After the selective emitter is fabricated, the silicon wafer is washed with 4-6 wt% HF acid to remove the front and back phosphorus silicon glass, and then washed and dried;

[0057] (5) Oxidation: After removing the double-sided PSG, the silicon wafer is inserted into a quartz boat and sent into an oxidation furnace. Pure oxygen is introduced and the temperature is raised to 620-720°C to oxidize the front side of the silicon wafer and re-grow an oxide protection layer.

[0058] (6) Removal of the back oxide coating: The re-oxidized silicon wafer is passed through a chain cleaning machine and 4-6 wt% HF acid is used to remove the back oxide coating;

[0059] (7) Back side alkali polishing: The silicon wafer with the back side oxide coating removed is sent to a tank alkali polishing machine. Alkali polishing additives are added to the alkali polishing tank to protect the front side oxide protective layer. The back side is polished at 60-70°C, and then alkali-washed, acid-washed, washed with water, slowly pulled and dried.

[0060] (8) Annealing: The back-alkaline polished silicon wafer is inserted into a quartz boat and sent into the furnace tube again for oxygen annealing at 650-750°C;

[0061] (9) Back passivation: The annealed silicon wafer is inserted into a graphite boat, trimethylaluminum and N2O are passed through the back of the silicon wafer to form an A2O3 layer at a temperature of 360-400°C;

[0062] (10) Double-sided coating: The silicon wafer is then fed into a PECVD furnace tube, and SiH4, NH3, and N2O are used to generate a silicon nitride layer on the back side to form a passivation film, and a multi-layer silicon nitride layer and / or silicon oxynitride layer is generated on the front side to form an anti-reflection film;

[0063] (11) Opening windows on the back and making double-sided electrodes: Use a laser to open laser holes in the passivation film on the back of the silicon wafer, screen-print the front and back electrodes, and metallize them at a sintering temperature of 700 to 900°C to form ohmic contacts to obtain a PERC cell;

[0064] (12) The obtained PERC cells are tested for sorting efficiency and EL confirmation by the sorting machine. After reaching 100, they are packaged and the quantity and output are counted.

[0065] In a third aspect, the present invention provides a PERC cell obtained according to the manufacturing method described in the second aspect.

[0066] Compared with the prior art solutions, the present invention has at least the following beneficial effects:

[0067] The improved process of the present invention removes the PSG layer first after the selective emitter is made on the silicon wafer, and then oxidizes and grows the oxide protective layer, which can make the dead layer on the surface of the PN junction thinner, thereby improving and optimizing the PN junction and effectively reducing the recombination of photoelectrons on the surface of the battery after diffusion. The manufacturing method, based on the improved process, performs secondary cleaning to remove the oxide coating on the back, but retains the oxide protective layer on the front, and then implements the subsequent alkali polishing process. By first removing the PSG layer, then oxidizing and cleaning it twice, a de-diffusion oxide layer process is formed, and finally the surface photoelectric efficiency is improved. The secondary cleaning not only removes the oxide coating on the back, but also cleans the existing contamination of the battery cell before coating, without adding an additional rework process for the battery cell. BRIEF DESCRIPTION OF THE DRAWINGS

[0068] Figure 1 It is a schematic flow chart of the manufacturing method of the PERC battery of Example 1. DETAILED DESCRIPTION

[0069] The technical solution of the present invention is further described below in conjunction with the accompanying drawings and through specific implementation methods. It should be understood by those skilled in the art that the embodiments are only to help understand the present invention and should not be regarded as specific limitations of the present invention.

[0070] Example 1

[0071] This embodiment provides a method for manufacturing a PERC cell. The flowchart of the manufacturing method is as follows: Figure 1 As shown, the manufacturing method comprises the following steps:

[0072] (1) Double-sided texturing: The cut raw silicon wafer is pre-cleaned with a mixture of hydrogen peroxide and weak alkali, and then a pyramid velvet surface is formed in a 0.8 wt% NaOH solution at 80°C, followed by alkaline washing, HF and HCl mixed acid washing, water washing and drying;

[0073] (2) Double-sided phosphorus diffusion: insert the textured silicon wafer into a quartz boat and send it into a furnace tube. After POCl3, N2, and O2 are introduced, the temperature is raised to 840°C for phosphorus diffusion, and the sheet resistance is controlled at 200±10ohm / □;

[0074] (3) Making a front selective emitter: Print the pattern on the diffused silicon wafer according to the later needs, and use laser propulsion to make a selective emitter on the front side of the silicon wafer;

[0075] (4) Removal of double-sided PSG: After the SE is completed, the silicon wafer is washed with 5wt% HF acid to remove the front and back phosphorus silicon glass, and then washed and dried;

[0076] (5) Double-sided oxidation: After removing the double-sided PSG, the silicon wafer is inserted into a quartz boat and sent into an oxidation furnace. Pure oxygen is introduced and the temperature is raised to 680°C to oxidize the front side of the silicon wafer and re-grow an oxide protection layer.

[0077] (6) Removal of back oxide coating (secondary cleaning): The re-oxidized silicon wafer is cleaned by a chain cleaning machine with 3 wt% HF acid to remove the back oxide coating;

[0078] (7) Back side alkali polishing: The silicon wafer with the back side oxide coating removed is sent to a tank alkali polishing machine. Alkali polishing additives are added to the alkali polishing tank to protect the front side oxide protective layer. The back side is polished at 65°C, and then alkali washed, acid washed, washed with water, slowly pulled and dried.

[0079] (8) Annealing: The back-alkaline polished silicon wafer is placed in a quartz boat and sent back into the furnace tube for oxygen annealing at 700°C.

[0080] (9) Back passivation: The annealed silicon wafer is inserted into a graphite boat, trimethylaluminum and N2O are passed through the back of the silicon wafer to form an Al2O3 layer at 380°C;

[0081] (10) Double-sided coating: The silicon wafer is then sent into a PECVD furnace tube, and SiH4, NH3, and N2O are used to generate a Si3N4 layer on the back side to form a passivation film, and a multi-layer SiN and SiON anti-reflection film is generated on the front side;

[0082] (11) Opening windows on the back and making double-sided electrodes: Use a laser to open laser holes in the passivation film on the back of the silicon wafer and print the front and back electrodes. Metallize them at a sintering temperature of around 800°C to form ohmic contacts and obtain a PERC cell.

[0083] Example 2

[0084] This embodiment provides a method for manufacturing a PERC battery. Except for adjusting the oxidation temperature from 680° C. to 600° C. in step (5), other conditions of the manufacturing method are exactly the same as those of Embodiment 1.

[0085] Example 3

[0086] This embodiment provides a method for manufacturing a PERC battery. Except for adjusting the oxidation temperature from 680° C. to 620° C. in step (5), other conditions of the manufacturing method are exactly the same as those of Embodiment 1.

[0087] Example 4

[0088] This embodiment provides a method for manufacturing a PERC battery. Except for adjusting the oxidation temperature from 680° C. to 720° C. in step (5), other conditions of the manufacturing method are exactly the same as those of Embodiment 1.

[0089] Example 5

[0090] This embodiment provides a method for manufacturing a PERC battery. Except for adjusting the oxidation temperature from 680° C. to 740° C. in step (5), other conditions of the manufacturing method are exactly the same as those of Embodiment 1.

[0091] Comparative Example 1

[0092] This comparative example provides a method for manufacturing a PERC cell, the manufacturing method comprising the following steps:

[0093] (1) Texturing: The cut raw silicon wafer is pre-cleaned with a mixture of hydrogen peroxide and weak alkali, and then a pyramid velvet surface is formed in a 0.8 wt% NaOH solution at 80°C, followed by alkaline washing, HF and HCl mixed acid washing, water washing and drying;

[0094] (2) Diffusion: Insert the textured silicon wafer into a quartz boat and send it into a furnace tube. After POCl3, N2, and O2 are introduced, the temperature is raised to 840°C for phosphorus diffusion, and the sheet resistance is controlled at 200±10ohm / □;

[0095] (3) SE: Print the pattern on the diffused silicon wafer according to the later needs, and use laser propulsion to make a selective emitter on the front side of the silicon wafer;

[0096] (4) Oxidation: Insert the silicon wafer after SE into a quartz boat and send it into an oxidation furnace. Pass pure oxygen and heat it to 680°C to oxidize the front side of the silicon wafer and re-grow an oxide protective layer.

[0097] (5) Removal of PSG on the back side: The re-oxidized silicon wafer is passed through a chain cleaning machine and 5 wt% HF is used to remove the back side phosphosilicate glass layer;

[0098] (6) Alkali polishing: The silicon wafer with the back oxide layer removed is sent to a tank-type alkaline polishing machine. Alkaline polishing additives are added to the alkaline polishing tank to protect the front oxide layer. The back is polished at 65°C, and then alkaline, acid and water washing are performed, and then slowly pulled and dried.

[0099] (7) Annealing: After the back side of the wafer has been alkali-polished, insert the quartz boat into the furnace tube again and perform oxygen annealing at 700°C;

[0100] (8) Back passivation: The annealed silicon wafer is inserted into a graphite boat, and TMA (trimethylaluminum) and N2O are passed through the back of the silicon wafer to form an Al2O3 layer at 380°C.

[0101] (9) PECVD coating of front and back films: normally fed into the PECVD furnace tube, SiH4, NH3, and N2O are used to generate a Si3N4 passivation layer on the back and an anti-reflection film composed of multiple layers of SiN and SiON on the front;

[0102] (10) Laser window opening + screen printing: A laser is used to open laser holes on the back of Si3N4 and print the front and back electrodes. The cells are then metallized at a sintering temperature of around 800°C to form ohmic contacts and obtain a PERC cell.

[0103] Comparative Example 2:

[0104] This comparative example provides a method for manufacturing a PERC cell, the manufacturing method comprising the following steps:

[0105] (1) Texturing: The cut raw silicon wafer is pre-cleaned with a mixture of hydrogen peroxide and weak alkali, and then a pyramid velvet surface is formed in a 0.8 wt% NaOH solution at 80°C, followed by alkaline washing, HF and HCl mixed acid washing, water washing and drying;

[0106] (2) Diffusion: Insert the textured silicon wafer into a quartz boat and send it into a furnace tube. After POCl3, N2, and O2 are introduced, the temperature is raised to 840°C for phosphorus diffusion, and the sheet resistance is controlled at 200±10ohm / □;

[0107] (3) SE: Print the pattern on the diffused silicon wafer according to the later needs, and use laser propulsion to make a selective emitter on the front side of the silicon wafer;

[0108] (4) Oxidation: Insert the silicon wafer after SE into a quartz boat and send it into an oxidation furnace. Pass pure oxygen and heat it to 680°C to oxidize the front side of the silicon wafer and re-grow an oxide protective layer.

[0109] (5) Removal of PSG on the back side: The silicon wafer after primary oxidation is passed through a chain cleaning machine and 5 wt% HF is used to remove the back side phosphosilicate glass layer;

[0110] (6) Alkali polishing: The silicon wafer with the back oxide layer removed is sent to a tank-type alkaline polishing machine. Alkaline polishing additives are added to the alkaline polishing tank to protect the front oxide layer. The back is polished at 65°C, and then alkaline, acid and water washing are performed, and then slowly pulled and dried.

[0111] (7) Reoxidation: After the back side of the wafer has been alkaline polished, insert the quartz boat into the furnace tube and oxidize it again at 680°C;

[0112] (8) Secondary cleaning + back polishing: The silicon wafers after secondary oxidation are passed through a chain cleaning machine, then alkaline cleaning, HF cleaning, and drying.

[0113] (9) Annealing: After the second cleaning, the wafer is placed in a quartz boat and sent back into the furnace tube for oxygen annealing at 700°C.

[0114] (10) Back passivation: The annealed silicon wafer is inserted into a graphite boat, and TMA (trimethylaluminum) and N2O are passed through the back of the silicon wafer to form an Al2O3 layer at 380°C.

[0115] (11) PECVD coating of front and back films: normally fed into the PECVD furnace tube, SiH4, NH3, and N2O are used to generate a Si3N4 layer on the back side to form a passivation film, and a multi-layer SiN and SiON anti-reflection film is generated on the front side;

[0116] (12) Laser window opening + screen printing: Use a laser to open laser holes on Si3N4 and print the front and back electrodes. Metallize at a sintering temperature of around 800°C to form an ohmic contact to obtain a PERC battery.

[0117] The PERC cells obtained in the embodiment and the comparative example were tested for sorting efficiency and EL confirmation by the sorting machine. After reaching 100, they were packaged and the quantity and output were counted.

[0118] 3000 pieces of Example 1 and Comparative Examples 1-2 were produced with the same raw materials, and the square resistance of each stage was randomly inspected by NAPSON square resistance tester; and the conversion efficiency was compared by Halm test (test temperature 25±3℃, light intensity 1000±50w / ㎡), and the results are shown in Table 1 and Table 2.

[0119] Table 1

[0120]

[0121] Note: The calculation formula for unevenness in Table 1 is (MAX-MIN) / 2 times the average value; “ / ” means that this result is not required in the column;

[0122] Table 2

[0123]

[0124] It can be seen from Table 1 and Table 2 that:

[0125] Example 1 adopts the manufacturing method of the PERC battery described in the present invention. The square resistance before phosphorus diffusion (before diffusion) is 185-205 ohm / □, and is increased to 216-238 ohm / □ after annealing, an increase of nearly 30 points. The conversion efficiency is increased by 0.02% to 0.04% compared with the control example.

[0126] Comparative Example 1 adopts the conventional PERC production process, and the front resistance of the diffusion front is also controlled at 185-205ohm / □, and 205-227ohm / □ after annealing, which is about 10 points smaller than that of Example 1; Comparative Example 2 has a front resistance of 186-206ohm / □, which is increased to 213-241ohm / □ after annealing, which is slightly higher than Example 1 by about 3 points, but the uniformity is poor, and the FF of the produced battery is not as good as that of Example 1.

[0127] 3000 pieces of Examples 2-5 were produced with the same raw materials, and the square resistance at each stage was sampled and the conversion efficiency was compared. The results are shown in Tables 3 and 4.

[0128] Table 3

[0129]

[0130] Note: The calculation formula for unevenness in Table 3 is (MAX-MIN) / 2 times the average value; “ / ” means that this result is not required in the column;

[0131] Table 4

[0132]

[0133] It can be seen from Table 3 and Table 4 that:

[0134] As the oxidation temperature increases after PSG removal, the square resistance increase value increases slightly, but the non-uniformity becomes higher. At the same time, in terms of electrical performance, the open circuit voltage (Uoc) increases slightly with the increase in temperature, but the fill factor (FF) decreases slightly, and the overall conversion efficiency (Eta) is lower than that of Example 1.

[0135] The present invention illustrates the detailed structural features of the present invention through the above embodiments, but the present invention is not limited to the above detailed structural features, that is, it does not mean that the present invention must rely on the above detailed structural features to be implemented. Those skilled in the art should understand that any improvement of the present invention, equivalent replacement of the components selected by the present invention, addition of auxiliary components, selection of specific methods, etc., all fall within the protection scope and disclosure scope of the present invention.

[0136] The preferred embodiments of the present invention are described in detail above. However, the present invention is not limited to the specific details in the above embodiments. Within the technical concept of the present invention, a variety of simple modifications can be made to the technical solution of the present invention, and these simple modifications all belong to the protection scope of the present invention.

[0137] It should also be noted that the various specific technical features described in the above specific embodiments can be combined in any suitable manner without contradiction. In order to avoid unnecessary repetition, the present invention will not further describe various possible combinations.

[0138] In addition, various embodiments of the present invention may be arbitrarily combined, and as long as they do not violate the concept of the present invention, they should also be regarded as the contents disclosed by the present invention.

Claims

1. A process for improving the PN junction of a solar cell, characterized in that: The steps include: After the silicon wafer is phosphorus diffused and the selective emitter is made, the PSG layer on one side of the selective emitter is removed, and then the surface after the PSG layer is removed is oxidized to grow an oxidation protection layer.

2. The improved process according to claim 1, characterized in that: The temperature of the phosphorus diffusion is 800°C to 900°C; Preferably, the raw materials for phosphorus diffusion include POCl3, N2 and O2; Preferably, the method for making the selective emitter comprises: laser propulsion according to a target printed pattern; Preferably, the equipment for removing the PSG layer comprises a tank cleaning machine and / or a chain cleaning machine; Preferably, the remover for removing the PSG layer comprises HF acid; Preferably, the oxidation method comprises: passing oxygen gas to the surface from which the oxidation protection layer has been removed, and performing oxidation at 620-720°C.

3. A method for manufacturing a PERC cell, characterized in that: The manufacturing method adopts the improvement process of the solar cell PN junction according to claim 1 or 2, and the manufacturing method comprises the following steps: The silicon wafer is sequentially textured, phosphorus-expanded, the front selective emitter is made, the double-sided PSG is removed, oxidation is performed, the back oxide coating is removed, the back alkali polishing is performed, annealing, back passivation, double-sided coating, back windowing is performed, and double-sided electrodes are made to obtain a PERC cell.

4. The manufacturing method according to claim 3, characterized in that: The double-sided texturing method comprises pre-cleaning the original silicon wafer, and then treating it in a NaOH solution with a temperature of 75-85° C. and a concentration of 0.5-1.5 wt % to generate a pyramid texturing surface; Preferably, the pre-cleaning agent comprises a mixed solution of hydrogen peroxide and weak alkali; Preferably, after the pyramid velvet surface is generated, the silicon wafer is sequentially subjected to alkali washing, acid washing, water washing and drying; Preferably, the pickling agent for pickling comprises a mixed acid solution of HF and HCl.

5. The manufacturing method according to claim 3 or 4, characterized in that: Equipment for removing backside oxide coating includes chain cleaning machine; Preferably, the remover for removing the back oxide coating comprises HF acid; Preferably, the equipment used for the back alkali polishing comprises a trough-type alkali polishing machine; Preferably, an alkali polishing additive is added during the alkali polishing of the back side to protect the oxidation protection layer on the front side; Preferably, the temperature of the back alkali polishing is 60-70°C; Preferably, the annealing temperature is 650-750°C; Preferably, the annealing is performed in an oxygen-containing atmosphere.

6. The manufacturing method according to any one of claims 3 to 5, characterized in that: The back passivation includes forming an Al2O3 layer on the back side; Preferably, the raw materials for forming the Al2O3 layer are trimethylaluminum and N2O; Preferably, the temperature for forming the Al2O3 layer is 360-400°C; Preferably, the double-sided coating includes forming an anti-reflection film on the front side and a passivation film on the back side; Preferably, the anti-reflection film comprises a silicon nitride layer and / or a silicon oxynitride layer; Preferably, the passivation film comprises a silicon nitride layer; Preferably, the double-sided coating method includes PECVD.

7. The manufacturing method according to any one of claims 3 to 6, characterized in that: The back side windowing method includes laser opening; Preferably, the object with a window on the back side includes a passivation film on the back side; Preferably, the method of making the double-sided electrode comprises screen printing; Preferably, the sintering temperature for making the double-sided electrode is 700-900°C.

8. The manufacturing method according to any one of claims 3 to 6, characterized in that: The manufacturing method further includes sequentially performing efficiency test sorting, EL confirmation, packaging and statistics on the obtained PERC cells.

9. The manufacturing method according to any one of claims 3 to 8, characterized in that: The manufacturing method comprises the following steps: (1) Texturing: The original silicon wafer cut to the target size is pre-cleaned with a mixture of hydrogen peroxide and weak alkali, and then a pyramid velvet surface is formed in a 0.5-1.5wt% NaOH solution at 75-85°C, followed by alkaline washing, HF and HCl mixed acid washing, water washing and drying; (2) Phosphorus diffusion: insert the textured silicon wafer into a quartz boat and send it into a furnace tube. After POCl3, N2, and O2 are introduced, the temperature is raised to 800℃~900℃ for phosphorus diffusion. (3) Making a front selective emitter: Make a selective emitter on the front side of the diffused silicon wafer according to the target printed pattern using a laser propulsion method; (4) Removal of double-sided PSG: After the selective emitter is fabricated, the silicon wafer is washed with 4-6 wt% HF acid to remove the front and back phosphorus silicon glass, and then washed and dried; (5) Oxidation: After removing the double-sided PSG, the silicon wafer is inserted into a quartz boat and sent into an oxidation furnace. Pure oxygen is introduced and the temperature is raised to 620-720°C to oxidize the front side of the silicon wafer and re-grow an oxide protection layer. (6) Removal of the back oxide coating: The re-oxidized silicon wafer is passed through a chain cleaning machine and 4-6 wt% HF acid is used to remove the back oxide coating; (7) Back side alkali polishing: The silicon wafer with the back side oxide coating removed is sent to a tank alkali polishing machine. Alkali polishing additives are added to the alkali polishing tank to protect the front side oxide protective layer. The back side is polished at 60-70°C, and then alkali-washed, acid-washed, washed with water, slowly pulled and dried. (8) Annealing: The back-alkaline polished silicon wafer is inserted into a quartz boat and sent into the furnace tube again for oxygen annealing at 650-750°C; (9) Back passivation: The annealed silicon wafer is inserted into a graphite boat, trimethylaluminum and N2O are passed through the back of the silicon wafer to form an A2O3 layer at a temperature of 360-400°C; (10) Double-sided coating: The silicon wafer is then fed into a PECVD furnace tube, and SiH4, NH3, and N2O are used to generate a silicon nitride layer on the back side to form a passivation film, and a multi-layer silicon nitride layer and / or silicon oxynitride layer is generated on the front side to form an anti-reflection film; (11) Opening windows on the back and making double-sided electrodes: Use a laser to open laser holes in the passivation film on the back of the silicon wafer, screen-print the front and back electrodes, and metallize them at a sintering temperature of 700 to 900°C to form ohmic contacts to obtain a PERC cell; (12) The obtained PERC cells are tested for sorting efficiency and EL confirmation by the sorting machine. After reaching 100, they are packaged and the quantity and output are counted.

10. A PERC battery, characterized in that: Obtained according to the manufacturing method according to any one of claims 3 to 9.

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