Class-II superlattice device containing Al layer and construction method thereof
By constructing Class II superlattice devices with Al-layer in Class II superlattice infrared detectors and adopting specific surface treatment steps, the lateral drilling problem caused by the Al-containing barrier layer after acid treatment is solved, and the stability and performance of the device are improved.
Patent Information
- Application Number
- CN202411575333.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-06
- Publication Date
- 2025-03-04
AI Technical Summary
After the Al barrier layer containing Al in the existing Class II superlattice infrared detector is treated with acid, Al reacts to form lateral drilling, reducing the photosensitive area of the entire photosensitive source, resulting in the device performance not reaching the theoretical predicted value.
By constructing Class II superlattice devices containing Al layer, the Al-containing layer is grown on Class II superlattice materials using molecular beam epitaxial and chemical vapor deposition technologies, and the hard masks are grown in combination with PECVD, ICPCVD or ALD technology, and the hard masks are removed through dry etching, alkali treatment, dry removal of hard masks and acid treatment are formed to form a stable device structure to avoid lateral drilling.
It effectively avoids the increase in surface area caused by lateral drilling and corrosion, reduces the generation of sidewall leakage current, improves the stability and yield of the device, reduces the surface leakage current, and improves the performance of the device.
Smart Images
Figure CN119562634A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of micro-nano processing of semiconductor devices, and in particular to a type II superlattice device containing an Al layer and a construction method thereof. Background Art
[0002] As the third generation of semiconductor materials, the type II superlattice material has the advantage of a precisely adjustable wide response band. Its valence band top and conduction band bottom can be adjusted independently, which provides the possibility for the development of new barrier layer material structures. Type II superlattice materials can suppress Auger recombination by adjusting the band structure. The electron effective mass of type II superlattice materials is large, which can reduce the tunneling current. In addition, the growth uniformity of type II superlattice is good. It uses the relatively mature molecular beam epitaxy technology and is based on the growth of group III-V materials. Its growth rate depends on the impact rate of group III elements and does not change with the growth temperature and beam ratio, so better uniformity can be achieved.
[0003] An important reason why the performance of the current type II superlattice infrared detector has not reached the theoretical prediction value is the high dark current. The dark current is mainly divided into two parts: bulk dark current and surface leakage current. In order to reduce the bulk dark current, the Al-containing barrier layer is generally designed based on the material structure design to effectively reduce the generation-recombination current and tunneling current. However, the Al-containing barrier layer will introduce new problems in the process. For example Figure 1 As shown, in the process, acid treatment is usually performed after dry etching. During the acid treatment, the reaction with Al will form lateral drilling and reduce the photosensitive area of the entire photosensitive source, such as Figure 1 As shown, in worse cases, the entire table will fall off and the device will eventually be scrapped. Summary of the invention
[0004] The purpose of the present invention is to provide a method for constructing a type II superlattice device containing an Al layer, in view of the fact that after the Al barrier layer in the type II superlattice infrared detector existing in the prior art is treated with acid, the Al reacts to form lateral etching to reduce the photosensitivity area of the entire photosensitive source.
[0005] Another object of the present invention is to provide a type II superlattice device containing an Al layer constructed by the construction method.
[0006] The technical solution adopted to achieve the purpose of the present invention is:
[0007] A method for constructing a type II superlattice device containing an Al layer comprises the following steps:
[0008] Step 1: constructing a type II superlattice material epitaxial wafer containing an Al layer by using a molecular beam epitaxy device or a chemical vapor deposition device, cleaning the surface of the type II superlattice material epitaxial wafer containing an Al layer by using an organic solvent (acetone, isopropanol, anhydrous ethanol, etc.), and observing the surface defects and contamination by using a microscope;
[0009] Step 2, growing a hard mask on the type II superlattice material epitaxial wafer containing the Al layer by PECVD, ICPCVD or ALD to obtain an epitaxial wafer containing a hard mask;
[0010] Step 3, transferring the etching pattern to the surface of the epitaxial wafer containing the hard mask through steps such as photoresist, hard film, exposure, and development;
[0011] Step 4, etching the epitaxial wafer in step 3 through a hard mask opening by ICP or RIE equipment, and transferring the photolithography pattern to the hard mask;
[0012] Step 5, dry-etching the epitaxial wafer in step 4 to obtain a groove with a three-dimensional structure;
[0013] Step 6, treating the trench in step 5 with an alkali, then removing the hard mask by a dry process, and finally performing an acid treatment;
[0014] Step 7, after the acid treatment is completed, a passivation layer is grown in the groove treated in step 6;
[0015] Step 8, etching the designated area of the passivation layer to expose the epitaxial wafer material itself, and then growing metal in the exposed area of the material to obtain the Al-containing type II superlattice device.
[0016] In the above technical solution, the material of the Al-containing layer is one or more of AlAsSb, AlSb or InAs / GaSb / AlSb.
[0017] In the above technical solution, the type II superlattice material is one or more of InAs, GaSb, InSb, and GaAs.
[0018] In the above technical solution, the hard mask is SiO x or SiN x .
[0019] In the above technical solution, in step 3, the etching pattern is transferred to the surface of the epitaxial wafer containing the hard mask and then the surface photoresist is removed by an organic solvent.
[0020] In the above technical solution, the photoresist is removed by the following method: placing the epitaxial wafer containing the hard mask in acetone for 2-3 times of ultrasonic treatment for 5 minutes each time, and placing it in isopropanol for 1-3 times of ultrasonic treatment for 5 minutes each time, and then spraying the entire surface of the epitaxial wafer with anhydrous ethanol and blowing it dry with a nitrogen gun.
[0021] In the above technical solution, the alkaline solution components of the alkali treatment in step 5 include one or more of NH4OH, NaOH, and NaClO, and the acidic solution of the acid treatment includes one or more of HCl, CH3COOH, and C6H8O7.
[0022] In the above technical solution, the reaction gas for removing the hard mask in a dry manner in step 6 is a F-based gas, preferably CF4, C4F8 or CHF3.
[0023] In the above technical solution, the metal in step 8 includes one or more of Ti, Pt, Pd, and Au.
[0024] Another aspect of the present invention provides a type II superlattice device containing an Al layer, which is constructed by the construction method.
[0025] Compared with the prior art, the present invention has the following beneficial effects:
[0026] 1. The construction method of the present invention can effectively avoid the increase of surface area due to lateral drilling, thereby reducing the generation of sidewall leakage current. It can reduce the dangling bonds formed by dry etching, make the surface smoother, and make the table morphology more complete, thereby improving the passivation effect, reducing surface leakage current, and improving the stability of the device.
[0027] 2. The construction method of the present invention can effectively reduce table loss and improve the yield rate of the device. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] Figure 1 This is a schematic diagram of the effect after treatment with existing surface treatment technology;
[0029] Figure 2 This is a schematic diagram of the peeling effect of the countertop after being treated with the existing surface treatment technology;
[0030] Figure 3 It is a schematic diagram of the effect of growing materials on a substrate sheet;
[0031] Figure 4 This is a schematic structural diagram of a type II superlattice device containing an Al layer obtained by constructing Example 1 of the present invention;
[0032] Figure 5 IV test curve of the device prepared by the existing construction method;
[0033] Figure 6 This is the IV test curve of the Al-layer-containing type II superlattice device of the present invention.
[0034] 1-GaSb substrate; 2-GaSb buffer layer; 3-Al-containing barrier layer; 4-N-type type II superlattice contact layer; 5-type II superlattice light absorption layer; 6-P-type type II superlattice contact layer, 7-Al-containing layer after drilling; 8-mesa groove; 9-normal Al-containing layer. DETAILED DESCRIPTION
[0035] The present invention is further described in detail below in conjunction with specific embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.
[0036] Unless otherwise specified, the experimental methods used in the present invention are all conventional methods.
[0037] Unless otherwise specified, the materials, reagents, etc. used in the present invention can be obtained from commercial sources.
[0038] First, several terms involved in the present invention are introduced and explained:
[0039] Superlattice: Two materials with good lattice matching are grown periodically and repeatedly, with the thickness of each layer being on the order of several nanometers.
[0040] Dangling bonds: Since the atomic layer on the surface of the crystal ends abruptly at the surface, each atom in the outermost layer has an unpaired electron, which forms an unsaturated chemical bond, namely a dangling bond. This bond state makes the surface atoms more active because they are eager to form paired electrons with other atoms to achieve a more stable electronic configuration.
[0041] Lateral drilling: refers to the process in which lateral etching damage occurs while the trench is being etched downward during the etching process, which results in the trench not being a standard deep trench etch.
[0042] Sidewall passivation: The dangling bonds exposed in the trench due to etching are bonded to the corresponding atoms to form a stable structure. It usually refers to growing a dielectric film layer on the sidewall to cover the exposed material surface.
[0043] The present invention adjusts the surface treatment steps after the formation of the mesa, treats the side wall dangling bonds with an alkaline solution, removes the hard mask by dry method, and then treats the side wall of the mesa with an acidic solution, thereby reducing the generation ratio of the side wall dangling bonds and avoiding the drilling of the Al-containing layer. The specific steps are as follows:
[0044] Step 1, growing an Al layer on a substrate material of a type II superlattice material by conventional methods and equipment such as molecular beam epitaxy equipment or chemical vapor deposition equipment to obtain a type II superlattice material epitaxial wafer containing an Al layer, wherein the material containing the Al layer is one or more of AlAsSb, AlSb or InAs / GaSb / AlSb, and the type II superlattice material is one or more of InAs, GaSb, InSb, and GaAs, and then cleaning the material surface of the type II superlattice material epitaxial wafer containing the Al layer by an organic solvent (acetone, isopropanol, anhydrous ethanol, etc.), and observing the surface defects and contamination by a microscope;
[0045] Step 2, growing a hard mask on the surface of the type II superlattice material epitaxial wafer containing an Al layer by PECVD, ICPCVD or ALD to obtain an epitaxial wafer containing a hard mask, wherein the hard mask is SiO x or SiN x ;
[0046] Step 3, photolithography the surface of the epitaxial wafer containing the hard mask through the steps of coating, hardening, exposure, and development, and then placing the epitaxial wafer containing the hard mask in acetone for 3 times of ultrasonic treatment for 5 minutes each time, and placing it in isopropanol for 3 times of ultrasonic treatment for 5 minutes each time, and then spraying the entire surface of the epitaxial wafer with anhydrous ethanol and blowing it dry with a nitrogen gun.
[0047] Step 4, etching the hard mask on the surface of the epitaxial wafer containing the hard mask by ICP or RIE equipment, and then removing the photoresist on the surface by an organic solvent;
[0048] Step 5, etching the epitaxial wafer obtained in step 4 by dry etching to form a groove with a three-dimensional structure;
[0049] Step 6, soaking the epitaxial wafer in step 5 in an alkaline solution to treat the exposed groove surface, then rinsing with deionized water, drying with a nitrogen gun, and then removing the remaining hard mask on the surface by dry method. In this step, the whole wafer is exposed to a dry etching chamber. At this time, while the hard mask on the top is etched, the plasma of the F-based gas will also react with the side wall of the groove to form a passivation layer to protect the side wall. Then, soak the epitaxial wafer in an acidic solution for surface treatment, then rinse with deionized water, and dry with a nitrogen gun. At this time, the Al layer is a normal Al-containing layer 9, while the Al-containing layer 7 after being etched by the existing method will appear after being etched;
[0050] Step 7, growing a 700nm passivation layer by PECVD ICPCVD or ALD, at which point the surface of the epitaxial wafer and the inside of the trench are all covered by the passivation layer;
[0051] Step 8, performing window lithography on the surface of the epitaxial wafer through the steps of photoresist, hardening, exposure, and development to expose the designated area, and then depositing metal electrodes in the exposed area, depositing metal Ti 100nm, Pt 200nm, and Au 100nm in sequence to obtain the Al-containing layer type II superlattice device.
[0052] Example
[0053] Step 1, a P-type GaSb buffer layer 2, a P-type type II superlattice contact layer 6, a type II superlattice light absorption layer 5, an Al-containing barrier layer 3, an N-type type II superlattice contact layer 4, and a cap layer are sequentially grown on a GaSb substrate 1 by a molecular beam epitaxy device. Figure 3 The complete structure epitaxial wafer shown in the figure. The surface state of the epitaxial wafer (native defects and whether there is contamination on the surface) was observed under a microscope, and acetone was ultrasonicated for 3 times for 5 minutes each time, isopropanol was ultrasonicated for 3 times for 5 minutes each time, and anhydrous ethanol was ultrasonicated for 3 times for 5 minutes each time, and then adsorbed on a vacuum adsorption platform and anhydrous ethanol was sprayed on the surface of the epitaxial wafer with a spray gun. After removal, it was placed on a dust-free cloth and blown dry with a nitrogen gun.
[0054] Step 2: Use PECVD to grow 500nm silicon oxide as a hard mask. The pre-vacuum chamber is broken, and then the epitaxial wafer in step 1 is placed in the tray of the pre-vacuum chamber to evacuate and run the growth recipe. When the vacuum reaches 0mT, the tray is automatically transferred to the main chamber to start growing silicon oxide. The growth temperature is 280℃, the growth time is 15min, the main reaction gas is SiH430sccm, N2O500sccm, and the reaction power is 35W.
[0055] Step 3, perform photolithography on the epitaxial wafer with the hard mask grown, with the thickness of the photoresist being 7 μm, the groove width being 2 μm, and the hard film being hardened for 20 minutes.
[0056] Step 4, dry-etch the hard mask opening, break the vacuum in the dry etcher pre-evacuation chamber, then put the epitaxial wafer with the photolithography pattern into the pre-evacuation chamber for evacuation, and after the vacuum reaches 0mT, transfer it to the main chamber for etching, the etching time is 3min, the main etching gas is CHF330sccm, at this time, while the hard mask on the top is etched, the plasma of the F-based gas will also react with the side wall of the groove to form a passivation layer to protect the side wall. Then remove the photoresist on the surface of the epitaxial wafer, ultrasonicate acetone 2 times for 5min, ultrasonicate isopropanol 1 time for 5min, then adsorb on the vacuum adsorption platform, spray the entire epitaxial wafer surface with anhydrous ethanol and blow dry with a nitrogen gun, at this time, the hard mask on the surface of the epitaxial wafer has the photolithography pattern.
[0057] Step 5, dry-etch the epitaxial wafer material to form a mesa groove 8. After breaking the vacuum in the pre-evacuation chamber of the dry etcher, transfer the epitaxial wafer in step 6 into the pre-evacuation chamber and run the etching program. During the etching process, observe the element energy spectrum intensity curve and stop etching when the lower electrode contact layer is reached. The etching gas is Cl25 sccm, Ar 30 sccm, the etching time is 7min 35s, the RF power is 200W, and the ICP power is 250W.
[0058] Step 6, prepare an alkaline solution, NaOH:H2O 100ml:40ml, put the epitaxial wafer in step 6 in a basket and soak it in the alkaline solution and float it up and down for 5 minutes, then take it out, rinse it with deionized water for 2 minutes and blow it dry with a nitrogen gun. Use a film thickness meter to measure the remaining hard mask thickness of 350nm. Remove the surface hard mask by dry method, break the vacuum in the pre-vacuum chamber, and then place the wafer in the pre-vacuum chamber for vacuum. Then select the etching program to start etching, the etching time is 3min 30s, the etching gas CHF3 flow rate is 50sccm, and the etching power is 200W. After the etching program is completed, it is transferred back to the pre-vacuum chamber. After breaking the vacuum and taking it out, observe under a microscope that there is no hard mask residue on the surface. Prepare an acid solution, HCl:H2O 40ml:480ml. Place the epitaxial wafer with the surface hard mask removed by dry method in a basket and soak it in the acid solution for 1 minute. Take it out, rinse it with deionized water for 2 minutes, and blow it dry with a nitrogen gun. The epitaxial wafer is as follows: Figure 4 shown.
[0059] Step 7, use PECVD to grow a 500nm passivation layer. The pre-vacuum chamber is broken, and then the epitaxial wafer is placed in the tray of the pre-vacuum chamber to evacuate and run the growth recipe. When the vacuum reaches 0mT, the tray is automatically transferred to the main chamber to start growing silicon oxide. The growth temperature is 280℃, the growth time is 15min, the main reaction gas is SiH430sccm, N2O 500sccm, and the reaction power is 35W.
[0060] Step 8, then window lithography, through the steps of coating, pre-baking, exposure, development, etc., the designated position of the epitaxial wafer is opened for the deposition of metal electrodes. Metal electrodes are grown, Ti 200nm, Pt 100nm, Au 100nm. After that, the epitaxial wafer after metal growth is peeled off. The purpose of this step is to grow the metal electrode at the designated position to form a device and obtain a type II superlattice device containing an Al layer.
[0061] The prepared Al-layer type II superlattice device and the device prepared by conventional method were placed in the vacuum chamber of a low-temperature probe station for variable area IV testing. The results are as follows: Figure 5 As shown in the figure, the device prepared by conventional method has an average magnitude of 10 -3, and the uniformity is poor, the dark current curve is discrete, and the variable area test regularity is poor, the lowest is 100 micron array, such as Figure 6 As shown, the Al-containing type II superlattice device prepared by the present invention has an average order of magnitude of 10 -4 , the lowest can be less than 10 -5 , and the uniformity is good, and it gradually decreases according to different area sizes.
[0062] The above is only a preferred embodiment of the present invention. It should be pointed out that, for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principle of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.
Claims
1. A method for constructing a type II superlattice device containing an Al layer, characterized in that: The following steps are involved: Step 1, constructing a type II superlattice material epitaxial wafer containing an Al layer; Step 2, growing a hard mask on the type II superlattice material epitaxial wafer containing the Al layer to obtain an epitaxial wafer containing the hard mask; Step 3, transferring the etching pattern onto the surface of the epitaxial wafer containing the hard mask; Step 4, performing hard mask opening etching on the epitaxial wafer in step 3, and transferring the photolithography pattern to the hard mask; Step 5, dry-etching the epitaxial wafer in step 4 to obtain a groove with a three-dimensional structure; Step 6, treating the trench in step 5 with an alkali, then removing the hard mask by a dry process, and finally performing an acid treatment; Step 7, after the acid treatment is completed, a passivation layer is grown in the groove treated in step 6; Step 8, etching the designated area of the passivation layer to expose the epitaxial wafer material itself, and then growing metal in the exposed area of the material to obtain the Al-containing type II superlattice device.
2. The method for constructing a type II superlattice device containing an Al layer according to claim 1, characterized in that: The material of the Al-containing layer is one or more of AlAsSb, AlSb or InAs / GaSb / AlSb.
3. The method for constructing a type II superlattice device containing an Al layer according to claim 1, characterized in that: Type II superlattice materials are one or more of InAs, GaSb, InSb, and GaAs.
4. The method for constructing a type II superlattice device containing an Al layer according to claim 1, characterized in that: The hard mask is SiO x or SiN x .
5. The method for constructing a type II superlattice device containing an Al layer according to claim 1, characterized in that: In step 3, the etching pattern is transferred to the surface of the epitaxial wafer containing the hard mask and then the surface photoresist is removed by an organic solvent.
6. The method for constructing a type II superlattice device containing an Al layer according to claim 5, characterized in that: The photoresist is removed by the following method: the epitaxial wafer containing the hard mask is placed in acetone for 2-3 times of ultrasonic treatment, each time for 5 minutes, and is placed in isopropanol for 1-3 times of ultrasonic treatment, each time for 5 minutes, and then anhydrous ethanol is sprayed on the entire surface of the epitaxial wafer and blown dry with a nitrogen gun.
7. The method for constructing a type II superlattice device containing an Al layer according to claim 1, characterized in that: The alkaline solution components of the alkali treatment in step 5 include one or more of NH4OH, NaOH, and NaClO, and the acidic solution components of the acid treatment include one or more of HCl, CH3COOH, and C6H8O7.
8. The method for constructing a type II superlattice device containing an Al layer according to claim 1, characterized in that: The reaction gas for removing the hard mask in a dry process in step 6 is a F-based gas, preferably CF4, C4F8 or CHF3.
9. The method for constructing a type II superlattice device containing an Al layer according to claim 1, characterized in that: In step 8, the metal includes one or more of Ti, Pt, Pd, and Au.
10. A type II superlattice device containing an Al layer, characterized in that: The method is constructed by any one of claims 1 to 9.