Solar cell, preparation method thereof and photovoltaic module

Abstract

The invention provides a solar cell and a preparation method thereof, and a photovoltaic module, the solar cell comprises a silicon substrate, and the back surface of the silicon substrate comprises first doped regions and second doped regions which are alternately arranged along the horizontal direction of the silicon substrate; the first doped region comprises a P-type doped layer, the back surface of the P-type doped layer is provided with an electrode grid line, and the doping concentration of the first doped region is 1 * 10 < 17 > atom / cm < 3 > to 1 * 10 < 19 > atom / cm < 3 >; the second doped region comprises an N-type doped layer, the back surface of the N-type doped layer is provided with an electrode grid line, and the doping concentration of the second doped region is 1 * 10 < 17 > atom / cm < 3 > to 1 * 10 < 19 > atom / cm < 3 >; and the first passivation layer is positioned on the surfaces of the P-type doped layer and the N-type doped layer. According to the invention, the structural complexity of the solar cell is reduced, and the yield of the solar cell is improved.

Description

Technical Field

[0001] The present application relates to the field of solar cells, and in particular to a solar cell and a preparation method thereof, and a photovoltaic module. Background Art

[0002] In the current industrialized BC solar cell process, it is necessary to deposit a tunnel interface passivation film layer and a doped polysilicon layer. The process is relatively complicated and not conducive to the control of cell yield, which indirectly increases the commercialization cost of BC solar cells. Summary of the invention

[0003] In order to solve the above technical problems, the present application discloses a solar cell and a preparation method thereof, and a photovoltaic module to simplify the process flow of BC solar cells and improve the product yield of BC solar cells.

[0004] In a first aspect, the present application provides a solar cell, comprising:

[0005] A silicon substrate, wherein the back side of the silicon substrate comprises a first doping region and a second doping region alternately arranged in a horizontal direction of the silicon substrate;

[0006] The first doping region corresponds to a P-type doping layer, wherein an electrode gate line is disposed on the back of the P-type doping layer, and the doping concentration of the first doping region is 1×10 17 atom / cm 3 ~1×10 19 atom / cm 3 ;

[0007] The second doping region corresponds to an N-type doping layer, wherein an electrode grid line is provided on the back of the N-type doping layer, and the doping concentration of the second doping region is 1×10 17 atom / cm 3 ~1×10 19 atom / cm 3 ;

[0008] A first passivation layer is located on surfaces of the P-type doping layer and the N-type doping layer.

[0009] In some embodiments of the present application, the junction depth of the P-type doping layer is 0.5 μm to 1 μm, and the junction depth of the N-type doping layer is 0.5 μm to 1 μm.

[0010] In some embodiments of the present application, the solar cell further includes a silver-silicon alloy layer, wherein the silver-silicon alloy layer is located between the P-type doped layer and the electrode grid line, and / or the silver-silicon alloy layer is located between the N-type doped layer and the electrode grid line.

[0011] In some embodiments of the present application, a width of the first doping region and / or the second doping region is 200 μm to 500 μm.

[0012] In some embodiments of the present application, an isolation region is provided between adjacent first doping regions and second doping regions, and a width of the isolation region is 10 μm to 40 μm.

[0013] In some embodiments of the present application, the electrode grid lines include fine grids, and the width of the fine grids is 10 μm to 50 μm.

[0014] In some embodiments of the present application, a height difference between an upper surface of the first doping region and an upper surface of the second doping region is H, and 0.5 μm≤H≤5 μm.

[0015] In some embodiments of the present application, the solar cell further includes a second passivation layer, a first anti-reflection layer and a second anti-reflection layer, the second passivation layer is located on the front side of the silicon substrate and in contact with the silicon substrate, the first anti-reflection layer is located on the surface of the first passivation layer, and the second anti-reflection layer is located on the surface of the second passivation layer.

[0016] In a second aspect, the present application provides a method for preparing a solar cell, the method comprising:

[0017] Providing a silicon substrate, and forming a P-type doping layer on the back side of the silicon substrate;

[0018] Performing a first laser grooving process on a side of the silicon substrate having the P-type doping layer to form a first doping region and a second doping region that are staggered and parallel to each other, and exposing the bottom of the second doping region to the silicon substrate;

[0019] Forming an N-type doping layer at the bottom of the second doping region, and performing a second laser grooving process to form an isolation region between the adjacent first doping region and the second doping region;

[0020] Forming a first passivation layer at least on the back side of the silicon substrate, applying electrode slurry to the first doping region and the second doping region, and pre-sintering to prepare first doping region electrode grid lines and second doping region electrode grid lines, wherein the electrode grid lines include fine grids;

[0021] Laser irradiation is performed on a first laser processed area of ​​the first doping region and / or a second laser processed area of ​​the second doping region, and a reverse bias voltage is applied to the first doping region and the second doping region during the irradiation process, wherein the first laser processed area and the second laser processed area include fine gates.

[0022] In some embodiments of the present application, the junction depth of the formed P-type doped layer is greater than 0.5 μm;

[0023] And / or, the junction depth of the formed N-type doped layer is greater than 0.5 μm.

[0024] In some embodiments of the present application, in the first laser grooving process, the energy density of the laser is 100 mJ / cm 2 ~500mJ / cm 2 , the laser overlap rate is 1% to 70%;

[0025] In the second laser grooving process, the energy density of the laser is 50 mJ / cm 2 ~300mJ / cm 2 The overlap rate of the laser is 1% to 40%.

[0026] In some embodiments of the present application, the laser irradiation process includes:

[0027] When the first laser processing area is subjected to laser irradiation, scanning irradiation is performed along the length extension direction of the fine grid in the first laser processing area;

[0028] When the second laser processing area is laser irradiated, scanning irradiation is performed along the length extension direction of the fine grid in the second laser processing area, and the distance between the edge of the first laser processing area and / or the second laser processing area and the fine grid is 150μm to 200μm.

[0029] In some embodiments of the present application, the process of applying a reverse bias voltage includes:

[0030] When the first laser processing area is subjected to laser irradiation, a first reverse bias voltage is applied to the first doping area and the second doping area;

[0031] When the second laser processing area is irradiated with laser, a second reverse bias voltage is applied to the first doping region and the second doping region, and the polarities of the first reverse bias voltage and the second reverse bias voltage are opposite.

[0032] In some embodiments of the present application, the electrode grid line further includes a main grid, and fine grids belonging to the same electrode region are connected to the main grid through the electrode region; a plurality of probe contact points are arranged at intervals along the length direction of the main grid, and the probe contact points are used to electrically connect to an external probe, and the process of applying a reverse bias voltage includes:

[0033] When the fine grid of each electrode region is subjected to laser irradiation, all the probe contact points of each electrode region are electrically connected to the external probe;

[0034] When the fine grid of each electrode region is laser irradiated, the first probe contact point of each electrode region is electrically connected to the external probe, and the first probe contact point is a probe contact point with the shortest distance to the edge of the solar cell among the probe contact points of each electrode region.

[0035] In some embodiments of the present application, the process of applying a reverse bias voltage includes:

[0036] The polarities of the first reverse bias voltage and the second reverse bias voltage are switched by switching the polarity of the voltage between the probe of the first doping region and the probe of the second doping region.

[0037] In some embodiments of the present application, the pre-sintering temperature is 500° C. to 700° C., and the pre-sintering time is 30 s to 120 s.

[0038] In some embodiments of the present application, the reverse bias voltage has a voltage range of 10V to 20V and a current density of 100A / cm 2 ~10000A / cm 2 .

[0039] In some embodiments of the present application, after preparing the first doping region electrode grid line and the second doping region electrode grid line, the method further includes:

[0040] An anti-reflection layer is formed on the front side and / or the back side of the solar cell.

[0041] In a third aspect, the present application provides a photovoltaic module, wherein the photovoltaic module comprises a solar cell prepared by the preparation method as described in the first aspect, or the photovoltaic module comprises the solar cell as described in the second aspect.

[0042] Compared with the prior art, this application has at least the following beneficial effects:

[0043] The present application provides a solar cell and a preparation method thereof, and a photovoltaic module, wherein the solar cell comprises a silicon substrate, the back side of the silicon substrate comprises a first doping region and a second doping region arranged alternately in the horizontal direction of the silicon substrate, the first doping region corresponds to a P-type doping layer, the second doping region corresponds to an N-type doping layer, the surfaces of the P-type doping layer and the N-type doping layer have a first passivation layer, and the doping concentration of the first doping region is 1×10 17 atom / cm 3 ~1×10 19 atom / cm 3 , the doping concentration of the second doping region is 1×10 17 atom / cm 3 ~1×10 19 atom / cm 3Compared with the existing BC solar cells, the BC solar cells of the present application eliminate the tunneling interface passivation film layer and the doped polysilicon layer structure, thereby eliminating the deposition steps of these two layers, greatly simplifying the process flow, improving the product yield, and having a lower industrial process cost; in addition, the BC cell structure in the present application is combined with laser induced sintering treatment, and the BC cell prepared has a lower series resistivity. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0045] Figure 1 This is a schematic diagram of the structure of a solar cell in one embodiment of the present application;

[0046] Figure 2a This is a schematic structural diagram of a silver-silicon alloy layer in one embodiment of the present application;

[0047] Figure 2b This is a schematic structural diagram of a silver-silicon alloy layer in another embodiment of the present application;

[0048] Figure 3a This is a schematic diagram of the structure of a solar cell in another embodiment of the present application;

[0049] Figure 3b This is a schematic diagram of the structure of a solar cell in another embodiment of the present application;

[0050] Figure 4 This is a schematic diagram of the structure of a silicon substrate after boron diffusion in one embodiment of the present application;

[0051] Figure 5 This is a schematic diagram of the structure of a silicon substrate after a first laser grooving process in one embodiment of the present application;

[0052] Figure 6 This is a schematic diagram of the structure of a silicon substrate after phosphorus diffusion in one embodiment of the present application;

[0053] Figure 7 This is a schematic diagram of the structure of a silicon substrate after the second laser grooving process in one embodiment of the present application;

[0054] Figure 8a A schematic diagram of a laser irradiation path in one embodiment of the present application;

[0055] Figure 8bThis is a schematic diagram of a first doping region and a second doping region in one embodiment of the present application;

[0056] Figure 8c Schematic diagram of the first laser processing area and / or the second laser processing area.

[0057] Explanation of the figure marks: silicon substrate-1, P-type doped layer-2, N-type doped layer-3, silver-silicon alloy layer-4, electrode grid line-5, laser-6, probe-7, first doped region-8, second doped region-9, BSG layer-21, PSG layer-31, isolation region-32, first passivation layer-41, second passivation layer-42, main gate-51, fine gate-52, probe contact point-531, first anti-reflection layer-81, second anti-reflection layer-82, back side-101, front side-102. DETAILED DESCRIPTION

[0058] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0059] In the present application, the terms "upper", "lower", "left", "right", "front", "back", "top", "bottom", "inner", "outer", "vertical", "horizontal", "lateral", "longitudinal" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the drawings. These terms are mainly used to better describe the present application and its embodiments, and are not used to limit the indicated devices, elements or components to have a specific orientation, or to be constructed and operated in a specific orientation.

[0060] In addition, some of the above terms may be used to express other meanings in addition to indicating orientation or positional relationship. For example, the term "on" may also be used to express a certain dependency or connection relationship in some cases. For those of ordinary skill in the art, the specific meanings of these terms in this application can be understood according to specific circumstances.

[0061] In addition, the terms "installed", "set", "provided with", "connected", and "connected" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral structure; it can be a mechanical connection, or an electrical connection; it can be a direct connection, or an indirect connection through an intermediate medium, or it can be an internal connection between two devices, elements, or components. For those of ordinary skill in the art, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0062] In addition, the terms "first", "second", etc. are mainly used to distinguish different devices, elements or components (the specific types and structures may be the same or different), and are not used to indicate or imply the relative importance and quantity of the indicated devices, elements or components. Unless otherwise specified, "plurality" means two or more.

[0063] The technical solution of the present application will be further described below in conjunction with embodiments and drawings.

[0064] In a first aspect, the present application provides a solar cell, such as Figure 1 As shown, it includes a silicon substrate 1, and the back side 101 of the silicon substrate 1 includes a first doping region and a second doping region alternately arranged in the horizontal direction of the silicon substrate 1; the first doping region corresponds to a P-type doping layer 2, wherein an electrode gate line 5 is provided on the back side of the P-type doping layer 2, and the front side of the P-type doping layer 2 is in direct contact with the silicon substrate 1, and the doping concentration of the first doping region is 1×10 17 atom / cm 3 ~1×10 19 atom / cm 3 The second doping region includes an N-type doping layer 3, wherein the back of the N-type doping layer 3 is also provided with an electrode gate line 5, and the front of the N-type doping layer 3 is in direct contact with the silicon substrate 1. The doping concentration of the second doping region is 1×10 17 atom / cm 3 ~1×10 19 atom / cm 3 The first passivation layer 41 is located on the surface of the P-type doping layer 2 and the N-type doping layer 3 , that is, the surface of the P-type doping layer 2 and the N-type doping layer 3 both have the first passivation layer 41 .

[0065] The solar cell of the present application is a BC solar cell. Compared with the existing BC solar cell, the BC solar cell of the present application eliminates the tunneling interface passivation film layer and the doped polysilicon layer structure, thereby eliminating the deposition steps of these two layers. Therefore, the cell structure and preparation process are simpler, with lower industrialization cost and broader industrial application prospects. In addition, the inventors have found that most of the dirt is caused by the uneven phenomenon in the deposition process of the doped polysilicon layer. Since the present application eliminates the doped polysilicon layer, the entire process is shorter, and the risk of pollution can be reduced during the production process. The solar cell is less susceptible to pollution during the manufacturing process, the cell is cleaner, and the series resistivity is also improved. In addition, by regulating the doping concentration of the first doping region and the second doping region within the above range, the present application can reduce the carrier recombination loss caused by excessive doping concentration while ensuring the built-in electric field required for separating photogenerated carriers.

[0066] In an optional embodiment, the junction depth of the P-type doped layer is 0.5 μm to 1 μm, and the junction depth of the N-type doped layer is 0.5 μm to 1 μm. In this way, while establishing the built-in electric field required for separating photogenerated carriers, it is beneficial to reduce the doping concentration of the P-type doped layer or the N-type doped layer, reduce the recombination loss of carriers, and thus improve the photoelectric conversion efficiency of the BC solar cell.

[0067] In an optional embodiment, the solar cell further comprises a silver-silicon alloy layer, the silver-silicon alloy layer is located between the P-type doped layer and the electrode grid line, and / or the silver-silicon alloy layer is located between the N-type doped layer and the electrode grid line. Figure 2a As shown, the silver-silicon alloy layer 4 is located between the P-type doped layer 2 and the electrode grid line 5, and the electrode grid line 5 partially has the silver-silicon alloy layer 4, and the silver-silicon alloy layer 4 is inserted into the P-type doped layer 2; and / or, as Figure 2b As shown, the silver-silicon alloy layer 4 is located between the N-type doped layer 3 and the electrode grid line 5, and the electrode grid line 5 partially has the silver-silicon alloy layer 4, and the silver-silicon alloy layer 4 is inserted into the N-type doped layer 3. In this way, a gold semi-contact region with relatively high conductivity can be formed between the P-type doped layer and / or the N-type doped layer and the electrode grid line, which is beneficial to the extraction of photogenerated carriers, thereby reducing the current transmission loss in the gold semi-contact region, and because the P-type doped layer and / or the N-type doped layer adopts a lower doping concentration, the atomic doping concentration of the doped region can be reduced while ensuring the built-in electric field required to separate the photogenerated carriers.

[0068] In an optional implementation, the width of the first doping region and / or the second doping region is 200 μm to 500 μm.

[0069] In an optional embodiment, an isolation region is provided between adjacent first doped regions and second doped regions, and a width of the isolation region is 10 μm to 40 μm. In this way, the insulation performance between the first doped region and the second doped region can be ensured, while the problem of low photogenerated carrier collection efficiency caused by excessive width of the isolation region can be avoided.

[0070] In an optional embodiment, the electrode grid lines include fine grids, and the width of the fine grids is 10 μm to 50 μm. In this way, the solar cell can collect current more completely and the increase in manufacturing cost due to too many grid lines can be avoided.

[0071] In an alternative embodiment, see Figure 1, the height difference between the upper surface of the first doping region and the upper surface of the second doping region is H, 0.5μm≤H≤5μm. When H is too large, it indicates that the height difference between the first doping region and the second doping region is too large, and the polishing amount of the silicon substrate is large, thereby reducing the thickness of the silicon substrate corresponding to the second doping region, which is not conducive to the silicon substrate fully absorbing the incident sunlight; when H is too small, it indicates that the height difference between the first doping region and the second doping region is too small, which means that when removing the first doping region corresponding to the second doping region, it may be impossible to completely remove the first doping region, especially when using thermal diffusion to prepare a PN junction by diffusing boron atoms on a silicon substrate, the thickness of the doping region formed by boron diffusion is usually thicker, and it is necessary to remove the thicker silicon substrate material in the first doping region corresponding to the second doping region to reduce the influence of the first doping atoms on the second doping region.

[0072] In an alternative embodiment, see Figure 3a The solar cell further comprises a second passivation layer 42, a first anti-reflection layer 81 and a second anti-reflection layer 82, the second passivation layer 42 is located on the front side of the silicon substrate 1 and in contact with the silicon substrate 1, the first anti-reflection layer 81 is located on the surface of the first passivation layer 41, and the second anti-reflection layer 82 is located on the surface of the second passivation layer 42. The solar cell of the present application is a BC solar cell with excellent photoelectric conversion efficiency.

[0073] In a second aspect, the present application provides a method for preparing a solar cell, comprising the following steps:

[0074] Step A, providing a silicon substrate, and forming a P-type doped layer on the back side of the silicon substrate;

[0075] Step B: Performing a first laser grooving process on one side of the silicon substrate having the P-type doping layer to form a first doping region and a second doping region that are staggered and parallel to each other, and removing a certain thickness of the first doping region in the area corresponding to the second doping region by wet etching, so that the doping concentration of the silicon substrate surface corresponding to the second doping region after the wet etching process is 1×10 17 atom / cm 3 ~1×10 19 atom / cm 3 .

[0076] Step C, forming an N-type doping layer at the bottom of the second doping region, and performing a second laser grooving process on the P-type doping layer or the N-type doping layer, or a region near the interface between the P-type doping layer and the N-type doping layer, so as to form an isolation region between the adjacent first doping region and the second doping region;

[0077] It should be noted that, in another implementation, Figure 3bAs shown, an isolation region may not be set between the P-type doped layer and the N-type doped layer; the role of the isolation region is to reduce the direct recombination loss of hole carriers and electron carriers near the interface between the P-type doped layer and the N-type doped layer, but since the isolation region has a certain width, it means that hole carriers and electron carriers can only be collected after experiencing a transport distance corresponding to the width of the isolation region, which will further reduce the collection probability of hole carriers and electron carriers. Therefore, whether to set an isolation region between the P-type doped layer and the N-type doped layer in this application is not an inevitable process choice.

[0078] Step D, forming a first passivation layer at least on the back side of the silicon substrate, coating the electrode slurry on the first doping region and the second doping region, and pre-sintering to prepare the first doping region electrode grid line and the second doping region electrode grid line, wherein the electrode grid line includes a fine grid;

[0079] Step E: irradiate the first laser processed area of ​​the first doped area and / or the fine gate in the second doped area and the second laser processed area within 200 μm near the fine gate with laser, and apply reverse bias voltage to the first doped area and the second doped area during irradiation.

[0080] In step A, the silicon substrate can be a silicon wafer with a thickness of 120 μm to 170 μm. The silicon substrate can be pre-polished to remove the cutting damage layer, grease, organic dirt, metal ions and other residues to ensure that the silicon substrate is in a clean and smooth state for subsequent processing. Then, the silicon substrate is inserted into a quartz boat and sent into a tubular diffusion furnace. Under high temperature conditions, a boron source (such as BCl3) can be used as a doping source to perform high-temperature boron diffusion on the back surface of the silicon substrate. The boron doping concentration is 1×10 17 ~1×10 19 atom / cm 3 . Figure 4 This is a schematic diagram of the structure of a silicon substrate after boron diffusion in one embodiment of the present application. Figure 4 The silicon substrate 1 has a back side 101 and a front side 102. After boron diffusion, a P-type doping layer 2 with a thickness of 0.5 μm to 1 μm is formed on the back side 101 of the silicon substrate 1. A borosilicate glass (BSG) layer 21 with a thickness of 10 nm to 100 nm is formed on the surface of the P-type doping layer 2.

[0081] In step B, a first laser grooving process may be performed on a side of the silicon substrate having a P-type doped layer by laser. Figure 5 , Figure 5 This is a schematic diagram of the structure of a silicon substrate after a first laser grooving process in one embodiment of the present application, forming first doping regions and second doping regions that are staggered and parallel to each other.

[0082] After step B, the silicon substrate can be cleaned with an alkaline solution and then cleaned with hydrofluoric acid at a volume concentration of 0.5% to 2% for 10s to 30s. The purpose is to clean the laser etched area and at the same time retain about 30nm to 80nm of the BSG layer in the non-laser etched area (i.e., corresponding to the P-type doped layer 2) to serve as a mask for the subsequent phosphorus diffusion process.

[0083] In step C, the silicon substrate can be inserted into a quartz boat in a back-to-back manner and sent into a tubular diffusion furnace (i.e., a double insertion method). Under high temperature conditions, a phosphorus source (such as POCl3) is used as a doping source to perform high-temperature phosphorus diffusion on the back surface of the silicon substrate. The phosphorus doping concentration is 1×10 17 atom / cm 3 ~1×10 19 atom / cm 3 . Figure 6 This is a schematic diagram of the structure of a silicon substrate after phosphorus diffusion in one embodiment of the present application. Figure 6 After phosphorus diffusion, an N-type doping layer 3 with a thickness of 0.5 μm to 1 μm is formed in the second doping region, and a phosphorus silicon glass (PSG) layer 31 with a thickness of 10 nm to 100 nm is formed on the surface of the N-type doping layer 3. Afterwards, a second laser grooving process can be performed on the N-type doping layer 3 or the P-type doping layer, or the area near the interface between the P-type doping layer and the N-type doping layer. Figure 7 , Figure 7 This is a schematic diagram of the structure of a silicon substrate after the second laser grooving process in one embodiment of the present application, wherein an isolation region 32 is formed between adjacent first doping regions and second doping regions.

[0084] After step C, hydrofluoric acid, nitric acid or sulfuric acid can be used to remove the BSG layer, PSG layer and other film layers on the front side of the silicon substrate, and then an alkaline solution can be used to texture the front side of the silicon substrate, and a texture structure can also be formed in the isolation area.

[0085] In step D, a first passivation layer can be deposited by atomic layer deposition (ALD), for example, a layer of aluminum oxide film is deposited; an electrode slurry is applied to the first doping region and the second doping region to prepare electrode grid lines, and the electrode grid lines include a main grid and a fine grid (also called a sub-grid). The electrode slurry can be applied by screen printing or laser transfer. The present application does not limit the specific application method. The electrode slurry can be, for example, a silver slurry. The pre-sintering process of the present application can be a low-temperature sintering process. For example, the pre-sintering temperature is lower than 700°C. The purpose is to pre-dry the silicon wafer coated with the electrode slurry to remove most of the organic solvent to avoid the gas bubbles generated during laser heating affecting the contact quality of the electrode grid lines; and, by increasing the temperature, the hydrogen atoms in the passivation layer are activated so that they are combined with the recombination center at the P-type emitter and the N-type silicon substrate to form a non-recombination center.

[0086] In an optional embodiment, light injection can be performed during low-temperature pre-sintering. Light injection is the use of photons to excite the solar cell sheet, excite electrons from the valence band to the conduction band, thereby generating current to further improve the photoelectric conversion efficiency of the solar cell.

[0087] In step E, the first laser processing area and / or the second laser processing area can be a rectangular area including at least one fine grid, so that the heat generated by the laser can be effectively transferred to the fine grid. A reverse bias voltage is applied during the laser irradiation process, and the local current of several amperes (current density is 100A / cm 2 ~10000A / cm 2 The laser heating process is called laser induced sintering (LIF). The laser heating process of step E is very short, usually less than 1.5s / cell. The process will partially damage the first passivation layer. In other words, the hot spots caused by laser heating will partially damage the first passivation layer on the silicon substrate, allowing the silver to form direct contact with the silicon substrate to form a silver-silicon alloy layer, thereby establishing an effective electron transmission path.

[0088] In an optional embodiment, the first laser processing area can be laser irradiated; in another optional embodiment, the second laser processing area can be laser irradiated; in yet another optional embodiment, the first laser processing area and the second laser processing area can be laser irradiated together.

[0089] The present application can control the laser irradiation to the electrode grid lines by adjusting the relevant parameters of the laser. For example, the laser scanning path can be adjusted to irradiate the first laser processing area and / or the second laser processing area according to the distribution position of the designed electrode grid lines on the solar cell; or the area range of the laser spot irradiating the fine grid can be adjusted according to the width of the designed electrode grid lines.

[0090] The solar cell preparation method of the present application first forms a P-type doping layer on the back side of a silicon substrate, then performs a first laser grooving process to form a first doping region and a second doping region that are staggered and parallel to each other, then forms an N-type doping layer at the bottom of the second doping region, and performs a second laser grooving process. During the preparation of electrode grid lines, a first laser processed area of ​​the first doping region and / or a second laser processed area of ​​the second doping region are laser irradiated and a reverse bias voltage is applied, so that the fine gate can achieve good ohmic contact with the silicon substrate. This process reduces the large-area corrosion damage of the glass material in the slurry to the surface passivation film by adopting a lower sintering temperature, and at the same time omits the deposition of the tunneling interface passivation film layer and the doped polysilicon layer in the conventional BC process, thereby reducing the process complexity and manufacturing cost.

[0091] In this application, the junction depth refers to the depth of diffusion of the doping element on the silicon substrate, that is, the depth of the doping layer when the doping concentration of the doping atom is the same as the doping concentration of the doping atom corresponding to the doping type of the silicon substrate. By regulating the doping depth of the P-type doping layer and / or the N-type doping layer within the above range, the carriers can be better extracted and the resistivity of the gold semiconductor contact can be reduced, thereby improving the photoelectric conversion efficiency of the solar cell.

[0092] In an optional embodiment, in the first laser grooving process, the energy density of the laser is 100 mJ / cm 2 ~500mJ / cm 2 The overlap rate of the laser is 1% to 70%. In the second laser grooving process, the energy density of the laser is 50mJ / cm 2 ~300mJ / cm 2 , the overlap rate of the laser is 1% to 40%. The present application can achieve the integrity of the morphology of the first doped area and the second doped area on the back side without damaging the remaining structures by controlling the energy density of the laser in the second laser grooving process to be less than the energy density of the laser in the first laser grooving process. In addition, since the laser is a light pulse, after the laser is irradiated on the action surface, its morphology is circular or square. The pattern formed after the laser grooving is actually formed by splicing these spots, that is, the two laser spots will overlap with each other. Based on the above content, the overlap rate of the laser in the present application refers to the percentage of the area of ​​the overlapping part of any two adjacent laser spots to the area of ​​a single spot. By controlling the overlap rate of the laser in the first laser grooving process and the second laser grooving process within the above range, the accuracy and precision of the grooving can be achieved, and then the laser pattern and morphology that meet the design requirements can be obtained.

[0093] In an optional embodiment, the laser irradiation process includes:

[0094] When the first laser processing area is subjected to laser irradiation, scanning irradiation is performed along the length extension direction of the fine grid in the first laser processing area;

[0095] When the second laser processing region is irradiated with laser light, scanning irradiation is performed along the length extension direction of the fine grid in the second laser processing region.

[0096] Figure 8a Schematic diagram of the laser irradiation path in one embodiment of the present application. Figure 8a , the figure includes two symmetrically arranged half-cell solar cells, and the P region (i.e., the first doping region) and the N region (i.e., the second doping region) of each half-cell solar cell are alternately and parallel to each other. A laser 6 is arranged above the silicon substrate 1, and the laser 6 can emit laser. The main grid 51 is shown by the thick solid line in the figure, and the fine grid 52 is shown by the thin dotted line in the figure. In addition, illustratively, the arrow direction in the oval dotted frame is the laser scanning irradiation direction, that is, the laser scans and irradiates along the length extension direction of the fine grid.

[0097] In an optional implementation, the process of applying the reverse bias voltage includes:

[0098] The polarities of the first reverse bias voltage and the second reverse bias voltage are switched by switching the polarity of the voltage between the probe of the first doping region and the probe of the second doping region.

[0099] Figure 8b This is a schematic diagram of the first doping region and the second doping region in one embodiment of the present application, see Figure 8b , two symmetrically arranged half-cell solar cells are located in the same silicon substrate 1, and the first doping region 8 and the second doping region 9 are symmetrically distributed along the boundary line of the two half-cell solar cells (as shown in the dotted box in the figure), and for the same half-cell solar cell, its first doping region and the second doping region are parallel to each other and staggered. The present application can switch the polarity of the first reverse bias voltage and the second reverse bias voltage by switching the polarity of the voltage between the probe of the first doping region 8 and the probe of the second doping region 9. In this way, the laser induced sintering process of the first doping region and the second doping region can be switched without changing the probe, thereby improving the efficiency of solar cell preparation.

[0100] Figure 8cSchematic diagram of the first laser processing area and / or the second laser processing area. The first laser processing area and / or the second laser processing area can be a rectangular area including at least one fine grid, and the distance D between the edge of the first laser processing area and / or the second laser processing area and the fine grid 52 is 150μm to 200μm. By controlling the distance between the edge of the first laser processing area and / or the second laser processing area and the fine grid within the above range, that is, the distance D between the position point of any laser photon irradiated on the surface of the battery cell and the edge of the fine grid is 150μm to 200μm within the coverage range of the laser irradiation on the fine grid, the energy of the laser spot can be effectively transferred to the fine grid and the silicon substrate near the fine grid, which is conducive to the realization of the laser induced sintering process, so that the metal atoms (for example: silver atoms) in the fine grid, with the assistance of the laser heat, form a silver-silicon alloy conductive structure based on silver atoms-silicon atoms (that is, a silver-silicon alloy layer) at the interface between the fine grid and the silicon substrate with the help of the carriers excited by the laser in the silicon substrate, which greatly reduces the transport resistivity of the carriers between the fine grid and the silicon substrate.

[0101] In an optional implementation, the process of applying the reverse bias voltage includes:

[0102] When the fine gate of the first doping region is laser irradiated, a first reverse bias voltage is applied to the first doping region and the second doping region; when the fine gate of the second doping region is laser irradiated, a second reverse bias voltage is applied to the first doping region and the second doping region, wherein the polarities of the first reverse bias voltage and the second reverse bias voltage are opposite. Exemplarily, when the fine gate of the first doping region is laser irradiated, the first reverse bias voltage applied is: the first doping region is positive and the second doping region is negative; when the fine gate of the second doping region is laser irradiated, the second reverse bias voltage applied is: the first doping region is negative and the second doping region is positive. In this way, the resistivity of the gold-semiconductor contact between the metal and the silicon substrate can be reduced by means of laser induced sintering.

[0103] like Figure 8a As shown, the current collected by the fine grid 52 belonging to the same electrode area is converged to the main grid 51 passing through the electrode area; a plurality of probe contact points 531 are arranged at intervals along the length direction of the main grid 51, and the probe contact points 531 are used to electrically connect with the external probe 7. In one embodiment, the process of applying the reverse bias voltage includes:

[0104] When the fine grid of each electrode region is irradiated with laser, all the probe contact points 531 of each electrode region are electrically connected to the external probe 7 so that a reverse bias voltage is applied through these probe contact points 531 .

[0105] In another embodiment, the process of applying a reverse bias voltage includes:

[0106] When the fine grid of each electrode region is irradiated with laser, the first probe contact point 531 of each electrode region is electrically connected to the external probe 7. Among them, the first probe contact point is the probe contact point with the shortest distance to the edge of the solar cell among the probe contact points of each electrode region. In this way, the problem of laser being blocked due to too many probes can be avoided, which is conducive to improving the effect of laser induced sintering.

[0107] In an optional embodiment, when the first doping region electrode grid lines and the second doping region electrode grid lines are prepared by pre-sintering, the pre-sintering temperature is 500°C to 700°C, and the pre-sintering time is 30s to 120s. By controlling the pre-sintering temperature and the pre-sintering time within the above range, most of the organic solvent in the electrode slurry can be removed, and at the same time, the glass material in the conductive slurry can etch through part of the passivation film layer (such as the first passivation layer) on the surface of the battery cell, thereby reducing the on-resistance between the conductive slurry and the silicon substrate in the local area corresponding to the slurry printing area on the surface of the battery cell.

[0108] In an optional embodiment, after preparing the first doping region electrode wire and the second doping region electrode wire, the method further includes:

[0109] An anti-reflection layer is formed on the front and / or back side of the solar cell.

[0110] The present invention can deposit the anti-reflection layer by plasma enhanced chemical vapor deposition (PECVD) method, and the material of the anti-reflection layer is not limited to SiN x 、SiON x and SiO x .

[0111] The present application has no particular restrictions on the parameters of laser irradiation, and technicians can select and set them according to actual needs, as long as laser induced sintering can be performed. For example, the laser power is 5W to 1000W, the wavelength is 300nm to 1200nm, and the frequency is 100Hz to 100MHz.

[0112] The present application has no particular restrictions on the raw materials and process parameters of the first passivation layer, the second passivation layer, and the anti-reflection layer during the deposition process. Technicians can select and set them according to actual needs, as long as the first passivation layer, the second passivation layer, and the anti-reflection layer of the thickness of the present application can be obtained.

[0113] In a third aspect, the present application provides a photovoltaic module, wherein the photovoltaic module includes the solar cell as described in the first aspect, or the photovoltaic module includes the solar cell prepared by the preparation method as described in the second aspect.

[0114] The present application also provides a photovoltaic module, which is used to convert the received light energy into electrical energy and transmit it to an external load. The photovoltaic module includes: at least one battery string, which is formed by connecting a plurality of the above-mentioned solar cells; an encapsulant film, which is used to cover the surface of the battery string; and a cover plate, which is used to cover the surface of the encapsulant film facing away from the battery string.

[0115] Embodiment

[0116] The solar cell, its preparation method, and the photovoltaic module according to the embodiments of the present application will be further described below with reference to more specific embodiments.

[0117] Embodiment 1

[0118] <Preparation of P-type doping layer>

[0119] Insert a clean N-type silicon substrate (with a thickness of 150 μm) into a quartz boat and send it into a tube diffusion furnace. Use BCl3 as a doping source to perform high-temperature boron diffusion (temperature: 1050 °C) on the back surface of the silicon substrate. The doping concentration of boron element is 1×10 18 atom / cm 3 , and the junction depth is 0.6 μm, to form a P-type doping layer with a thickness of 0.7 μm on the back surface of the silicon substrate;

[0120] <First laser grooving treatment>

[0121] Perform a first laser grooving treatment on the side of the silicon substrate with the P-type doping layer. The energy density of the laser is 300 mJ / cm 2 , and the overlap rate is 60%, so that the bottom of the second doping region is exposed to the silicon substrate;

[0122] <Alkaline etching>

[0123] Clean the silicon substrate with a sodium hydroxide solution (concentration: 3 wt%), and then clean it with 12% by volume hydrofluoric acid for 20 s to clean the laser etching area, and at the same time keep about 50 nm of BSG in the area not etched by the laser;

[0124] <Preparation of N-type doping layer>

[0125] Insert the silicon substrate after alkaline etching into a quartz boat in a back-to-back manner and send it into a tube diffusion furnace. Use POCl3 as a doping source to perform high-temperature phosphorus diffusion (temperature: 820 °C) on the back surface of the silicon substrate. The doping concentration of phosphorus element is 1×10 18 atom / cm 3 , and the junction depth is 0.6 μm, to form an N-type doping layer with a thickness of 0.7 μm at the bottom of the second doping region;

[0126] <Second laser grooving treatment>

[0127] The N-type doped layer is subjected to a second laser grooving process, with the laser energy density being 200 mJ / cm 2 , the overlap rate is 30% to form an isolation region with a width of 20 μm between adjacent first doping regions and second doping regions;

[0128] <Go to PSG and Go to BSG>

[0129] Use hydrofluoric acid solution in the chain wet process equipment to remove the PSG and BSG layers on the front, back and surrounding of the silicon substrate;

[0130] <Twilling>

[0131] Using 1wt% NaOH solution, the front side of the silicon substrate is textured, and a texture structure is also formed in the isolation area;

[0132] <Deposition of passivation layer>

[0133] The textured silicon substrate was placed in the reaction chamber of the ALD equipment, and the chamber temperature was controlled to 230°C, and the preheating time was 10 minutes. The deposition process was as follows: first, pure water was introduced for pretreatment, and the flow rate, pulse time, and purge time were controlled; then trimethylaluminum (TMA), H2O, and O3 were alternately introduced in a cycle, and the flow rate, pulse time, and purge time were controlled to prepare the aluminum oxide passivation layer by cyclic deposition. The thickness of the first passivation layer was 4nm, and the thickness of the second passivation layer was 4nm.

[0134] <Deposition of anti-reflection layer>

[0135] A first anti-reflection layer and a second anti-reflection layer are deposited on the surface of the first passivation layer and the second passivation layer respectively using PECVD equipment, and the film material is a laminated silicon nitride or silicon oxynitride film. The thickness of the first anti-reflection layer is 75nm, and the thickness of the second anti-reflection layer is 95nm;

[0136] <Low temperature pre-sintering>

[0137] The electrode slurry is printed on the first doping area and the second doping area by screen printing, and the first doping area electrode grid line and the second doping area electrode grid line are prepared by pre-sintering, and light injection is performed at the same time. The pre-sintering temperature is 600°C and the pre-sintering time is 60s;

[0138] <Laser Induced Sintering>

[0139] Laser irradiation is performed on the first laser processed area of ​​the first doping area and / or the second laser processed area of ​​the second doping area, and a reverse bias voltage is applied to the first doping area and the second doping area during the irradiation process. The laser power is 40W, the wavelength is 1064nm, the frequency is 100kHz, the reverse bias voltage is 15V, and the current density is 800A / cm 2 .

[0140] Performance Test:

[0141] Open circuit voltage (Voc), short circuit current (Isc), short circuit current density (Jsc), fill factor (FF) test:

[0142] The current (I)-voltage (V) of the solar cells of each embodiment and comparative example was measured using an IV tester (model: MX-MPVC-A20, manufacturer: Suzhou Maxwell Technology Co., Ltd.) to obtain the open circuit voltage, short circuit current, short circuit current density, and fill factor of the solar cells.

[0143] Photoelectric conversion efficiency (Eff) test:

[0144] The current (I)-voltage (V) of the solar cells of each embodiment and comparative example was measured using an IV tester (model: MX-MPVC-A20, manufacturer: Suzhou Maxwell Technology Co., Ltd.) to obtain the photoelectric conversion efficiency (Eff) of the solar cells.

[0145] The above is a detailed introduction to a solar cell and its preparation method, and a photovoltaic module disclosed in the present application. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the technical solutions and core inventions of the embodiments of the present application. At the same time, for general technicians in this field, according to the ideas of the present application, there will be changes in the specific implementation methods and application scopes. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A solar cell, characterized in that: include: A silicon substrate, wherein the back side of the silicon substrate comprises a first doping region and a second doping region alternately arranged in a horizontal direction of the silicon substrate; The first doping region corresponds to a P-type doping layer, wherein an electrode gate line is disposed on the back of the P-type doping layer, and the doping concentration of the first doping region is 1×10 17 atom / cm 3 ~1×10 19 atom / cm 3 ; The second doping region corresponds to an N-type doping layer, wherein an electrode grid line is provided on the back of the N-type doping layer, and the doping concentration of the second doping region is 1×10 17 atom / cm 3 ~1×10 19 atom / cm 3 ; A first passivation layer is located on surfaces of the P-type doping layer and the N-type doping layer.

2. The solar cell according to claim 1, characterized in that: The junction depth of the P-type doping layer is 0.5 μm to 1 μm, and the junction depth of the N-type doping layer is 0.5 μm to 1 μm.

3. The solar cell according to claim 1, characterized in that: The solar cell further comprises a silver-silicon alloy layer, wherein the silver-silicon alloy layer is located between the P-type doped layer and the electrode grid line, and / or the silver-silicon alloy layer is located between the N-type doped layer and the electrode grid line.

4. The solar cell according to any one of claims 1 to 3, characterized in that: The width of the first doping region and / or the second doping region is 200 μm to 500 μm.

5. The solar cell according to any one of claims 1 to 3, characterized in that: An isolation region is provided between adjacent first doping regions and second doping regions, and a width of the isolation region is 10 μm to 40 μm.

6. The solar cell according to claim 1, characterized in that: The electrode grid lines include fine grids, and the width of the fine grids is 10 μm to 50 μm.

7. The solar cell according to claim 1, characterized in that: A height difference between an upper surface of the first doping region and an upper surface of the second doping region is H, and 0.5 μm≤H≤5 μm.

8. The solar cell according to any one of claims 1 to 3, characterized in that: The solar cell also includes a second passivation layer, a first anti-reflection layer and a second anti-reflection layer, wherein the second passivation layer is located on the front side of the silicon substrate and in contact with the silicon substrate, the first anti-reflection layer is located on the surface of the first passivation layer, and the second anti-reflection layer is located on the surface of the second passivation layer.

9. A method for preparing a solar cell, characterized in that: The preparation method comprises: Providing a silicon substrate, and forming a P-type doping layer on the back side of the silicon substrate; Performing a first laser grooving process on a side of the silicon substrate having the P-type doping layer to form a first doping region and a second doping region that are staggered and parallel to each other, and exposing the bottom of the second doping region to the silicon substrate; Forming an N-type doping layer at the bottom of the second doping region, and performing a second laser grooving process to form an isolation region between the adjacent first doping region and the second doping region; Forming a first passivation layer at least on the back side of the silicon substrate, applying electrode slurry to the first doping region and the second doping region, and pre-sintering to prepare first doping region electrode grid lines and second doping region electrode grid lines, wherein the electrode grid lines include fine grids; Laser irradiation is performed on a first laser processed area of ​​the first doping region and / or a second laser processed area of ​​the second doping region, and a reverse bias voltage is applied to the first doping region and the second doping region during the irradiation process, wherein the first laser processed area and the second laser processed area include fine gates.

10. The method for preparing a solar cell according to claim 9, characterized in that: In the first laser grooving process, the energy density of the laser is 100 mJ / cm 2 ~500mJ / cm 2 , the laser overlap rate is 1% to 70%; In the second laser grooving process, the energy density of the laser is 50 mJ / cm 2 ~300mJ / cm 2 The overlap rate of the laser is 1% to 40%.

11. The method for preparing a solar cell according to claim 9, characterized in that: The laser irradiation process includes: When the first laser processing area is subjected to laser irradiation, scanning irradiation is performed along the length extension direction of the fine grid in the first laser processing area; When the second laser processing area is laser irradiated, scanning irradiation is performed along the length extension direction of the fine grid in the second laser processing area, and the distance between the edge of the first laser processing area and / or the second laser processing area and the fine grid is 150μm to 200μm.

12. The method for preparing a solar cell according to claim 9, characterized in that: The process of applying the reverse bias voltage includes: When the first laser processing area is subjected to laser irradiation, a first reverse bias voltage is applied to the first doping area and the second doping area; When the second laser processing area is irradiated with laser, a second reverse bias voltage is applied to the first doping region and the second doping region, and the polarities of the first reverse bias voltage and the second reverse bias voltage are opposite.

13. The method for preparing a solar cell according to claim 12, characterized in that: The electrode grid line also includes a main grid, and the fine grids belonging to the same electrode area converge to the main grid passing through the electrode area; A plurality of probe contact points are arranged at intervals along the length direction of the main gate, and the probe contact points are used to be electrically connected to an external probe. The process of applying a reverse bias voltage includes: When the fine grid of each electrode region is subjected to laser irradiation, all the probe contact points of each electrode region are electrically connected to the external probe; or, When the fine grid of each electrode region is laser irradiated, the first probe contact point of each electrode region is electrically connected to the external probe, and the first probe contact point is a probe contact point with the shortest distance to the edge of the solar cell among the probe contact points of each electrode region.

14. The method for preparing a solar cell according to claim 13, characterized in that: The process of applying the reverse bias voltage includes: The polarities of the first reverse bias voltage and the second reverse bias voltage are switched by switching the polarity of the voltage between the probe of the first doping region and the probe of the second doping region.

15. The method for preparing a solar cell according to claim 9, characterized in that: The pre-sintering temperature is 500°C to 700°C, and the pre-sintering time is 30s to 120s.

16. The method for preparing a solar cell according to claim 9, characterized in that: The reverse bias voltage ranges from 10V to 20V, and the current density is 100A / cm 2 ~10000A / cm 2 .

17. The method for preparing a solar cell according to any one of claims 9 to 16, characterized in that: After preparing the first doping region electrode gate line and the second doping region electrode gate line, the method further includes: An anti-reflection layer is formed on the front side and / or the back side of the solar cell.

18. A photovoltaic module, characterized in that: The photovoltaic module comprises the solar cell according to any one of claims 1 to 8, or the photovoltaic module comprises the solar cell prepared by the preparation method according to any one of claims 9 to 17.

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