Implementation method of linked list out-of-order hardware top-speed self-inspector

Abstract

The invention relates to the technical field of communication chips, in particular to an implementation method of a linked list out-of-order hardware top-speed self-inspector, which comprises the following steps: electrifying a system, initializing a chip linked list, emptying a ptrList data structure, packing up a service flow, enabling a chip to start to store and forward a data frame, enabling the ptrList to start to press in a pointer of a frame segment at the same time, and enabling the pointers of the frame segment to enter the chip; for storage operation, pointers and pointer states recorded by the ptrList are monitored in real time, and if the same pointers appear and the same pointer states are also the same, it is indicated that the linked list is out of order, the triggering is interrupted, and the system is initialized. According to the method, disorder of the linked list can be automatically sensed, interruption can be triggered during disorder, and meanwhile, the system is initialized, so that hardware can automatically sense the disorder of the linked list and notify the system to process, and the method is easy to implement, simple in logic and high in practicability. And various scene applications can be easily expanded based on the method.

Description

Technical Field

[0001] The present invention relates to the technical field of communication chips, and in particular to a method for realizing a link list disordered hardware extremely fast self-checker. Background Art

[0002] Linked list technology is widely used in communication chip design, mainly for the maintenance of storage resources. In the design of switching chips, the messages input on the data path are interactive. At this time, linked lists are used to maintain the front-end relationship of frame fragments in the storage space.

[0003] When a data frame fragment is written into the storage space, the linked list will record that this fragment is connected to a specific address in the storage space. When the data frame is read from the storage space, the next frame is found based on the storage address of the next frame before and after the frame recorded in the linked list. The linked list space needs to be released while reading.

[0004] However, in some abnormal situations, such as improper operation, poor electrical characteristics of the environment, etc., the linked list will be out of order, which will lead to serious consequences such as memory leaks and design jams;

[0005] Most of the storage media on the market use SRAM to record the pointer status, and observe the pointer usage status by reading SRAM; this implementation method has the following disadvantages:

[0006] 1. SRAM can only read one entry per clock cycle; it cannot observe all pointer states in real time, and it cannot clear the state instantaneously;

[0007] 2. SRAM occupies a larger chip area than the register group;

[0008] 3. When the design frequency is very high, especially in FPGA design, SRAM has huge timing violations;

[0009] Therefore, if we can sense the disorder at the beginning, clear the status instantly, close the port, and notify the system in advance to initialize, we can avoid the above serious problems. To this end, we propose a method to implement a linked list disorder hardware self-checker. Summary of the invention

[0010] In view of this, the purpose of the present invention is to propose a method for implementing a linked list disorder hardware ultra-fast self-checker to solve the problem that the hardware cannot automatically sense the disorder in the early stage of disorder, resulting in memory disorder and system crash.

[0011] Based on the above purpose, the present invention provides a method for implementing a linked list disorder hardware extremely fast self-checker, comprising the following steps:

[0012] Step S1, the system is powered on, the chip linked list is initialized, the ptrList data structure is cleared, the ptrList depth is parameterized to match the storage unit depth, the ptrList uses the number of units ptrListCnt, and ptrListCnt is initialized to 0;

[0013] Step S2, the business flow starts, the chip starts to store and forward the data frame, and at the same time ptrList starts to push the pointer of the frame fragment, and the pushed content is {link list pointer, pointer state}; the pointer state pushed in when storing is writing, and the pointer state pushed in when releasing is releasing; each time a pointer is pushed in, prtListCnt+1;

[0014] Step S3, monitor the linked list pointer and pointer status recorded in ptrList in real time, and observe the content of the corresponding number of ptrLists according to the value of ptrListCnt;

[0015] Step S4: If the same pointer appears and the same pointer state is the same, it means that the linked list is out of order;

[0016] Step S5, triggering an interrupt, the system is initialized, and at the same time, the entire ptrList is initialized by resetting ptrListCnt=0.

[0017] Preferably, in step S1, the following steps are also included:

[0018] Step S1.1, power on the system, set a linked list pointer window array ptrList = {};

[0019] {} indicates an array or list of pointers initialized to empty;

[0020] Step S1.2, set a status flag ptrStatus for each linked list pointer, ptrStatus value 0 indicates writing, ptrStatus value 1 indicates releasing;

[0021] Step S1.3, set the ptrList depth occupancy count ptrListCnt, initialized to 0, indicating that there is no valid pointer in ptrList.

[0022] Preferably, in step S2, the following steps are also included:

[0023] Step S2.1, each time the chip writes a frame fragment, {list pointer, ptrStatus(0)} is pushed into ptrList as a state variable, and ptrListCnt+1;

[0024] Step S2.2, every time the chip releases a frame fragment, it pushes {list pointer, ptrStatus(1)} into ptrList, and ptrListCnt+1;

[0025] Step S2.3, when ptrListCnt reaches the maximum depth of ptrList, ptrListCnt-1, it means that the initial pointer is cleared.

[0026] Preferably, in step S4, as frame fragments are continuously written or released, there are pointers of ptrListCnt that are not 0. Among these pointers, if there are pointers with the same name and the same status, it means that the pointers are disordered.

[0027] Preferably, in step S5, by initializing ptrListCnt=0, the entire ptrList is reset, and the system initialization includes shutting down the interface receiving function and initializing the linked list.

[0028] The beneficial effects of the present invention: The present invention provides a method for implementing a hardware high-speed self-checker for a linked list disorder. The present invention sets a linked list pointer window array PtrList and an array window depth scale parameter PtrListCnt, and sets a ptrStatus value of 0 to indicate writing and a ptrStatus value of 1 to indicate release, so that the linked list disorder can be automatically sensed, and an interrupt can be triggered and the system can be initialized at the same time when the disorder occurs, thereby realizing that the hardware can automatically sense and notify the system to take action when the linked list is initially disordered. The method is easy to implement, has simple logic, and is easy to expand to various scene applications based on this method. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0030] Figure 1 This is a schematic diagram of the organizational structure of ptrList according to an embodiment of the present invention;

[0031] Figure 2 A schematic diagram of a linked list state shift according to an embodiment of the present invention;

[0032] Figure 3 It is a schematic diagram of the structure when the linked list is out of order in an embodiment of the present invention. DETAILED DESCRIPTION

[0033] In order to make the objectives, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

[0034] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present invention should be understood by people with ordinary skills in the field to which the present invention belongs. The "first", "second" and similar words used in the present invention do not represent any order, quantity or importance, but are only used to distinguish different components. "Including" or "comprising" and similar words mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connecting" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0035] like Figure 1 , Figure 2 , Figure 3 As shown, a method for implementing a linked list disorder hardware extremely fast self-checker includes the following steps:

[0036] Step S1, the system is powered on, the chip linked list is initialized, the ptrList data structure is cleared, the ptrList depth is parameterized to match the storage unit depth, the ptrList uses the number of units ptrListCnt, and ptrListCnt is initialized to 0;

[0037] In step S1, the following steps are also included:

[0038] Step S1.1, power on the system, set a linked list pointer window array ptrList = {};

[0039] {} indicates an array or list of pointers initialized to empty;

[0040] Step S1.2, set a status flag ptrStatus for each linked list pointer, ptrStatus value 0 indicates writing, ptrStatus value 1 indicates releasing;

[0041] Step S1.3, set the ptrList depth occupancy count ptrListCnt, initialized to 0, indicating that there is no valid pointer in ptrList.

[0042] Compared with the existing two sets of storage space for storage resource pointer and empty linked list pointer, the storage resource and empty linked list of the present invention are one set, which reduces the chip area by at least half.

[0043] Step S2: The business flow starts, and the chip starts to store and forward the data frame. At the same time, ptrList starts to push the pointer of the frame fragment. The pushed content is {link list pointer, pointer state}. The pointer state pushed in when storing is writing, and the pointer state pushed in when releasing is releasing. Each time a pointer is pushed in, prtListCnt+1, such as Figure 2 As shown;

[0044] In step S2, the following steps are also included:

[0045] Step S2.1, each time the chip writes a frame fragment, {list pointer, ptrStatus(0)} is pushed into ptrList as a state variable, and ptrListCnt+1;

[0046] Step S2.2, every time the chip releases a frame fragment, it pushes {list pointer, ptrStatus(1)} into ptrList, and ptrListCnt+1;

[0047] Step S2.3, when ptrListCnt reaches the maximum depth of ptrList, ptrListCnt-1, it means that the initial pointer is cleared.

[0048] The writing of packet fragments into the cache is performed by a specific function control module. When a packet fragment comes, this control module will get a free pointer and write the fragment to the memory address indicated by the free pointer. At the same time, it will push this pointer into prtList.

[0049] Step S3, monitor the linked list pointer and pointer status recorded in ptrList in real time, and observe the content of the corresponding number of ptrLists according to the value of ptrListCnt;

[0050] In step S3, as frame fragments are continuously written or released, ptrList will shift. When ptrList is full, the linked list pointer overflows. Overflow refers to natural discard. According to the actual performance of the design, it is guaranteed that under normal circumstances, the pointer entering this window will definitely go through two states before overflowing: use and release. That is, under normal circumstances, the pointer will go through two states of use and release before overflowing. The design ensures that the pointer window period meets the normal situation time.

[0051] Step S4: If the same pointer appears and the same pointer state is the same, it means that the linked list is out of order, such as Figure 3 As shown, ptr10 appears more than once at this time, and both ptr10 states are written, indicating that the linked list is out of order;

[0052] Step S5: trigger an interrupt, the system is initialized, and at the same time, the entire ptrList is initialized by resetting ptrListCnt=0.

[0053] In step S5, by initializing ptrListCnt=0, the entire ptrList is reset. The system initialization includes closing the interface receiving function and initializing the linked list, so that the system can be initialized at the early stage of the linked list disorder. The user is not aware of it, which effectively prevents the system from freezing due to memory disorder.

[0054] Aging must not be used during this process, because the business flow is always forwarded in the chip. If aging is enabled at this time, some jumbo frames or low-priority messages that exist due to some QOS reasons will be aged, which will cause memory leaks in actual use.

[0055] Because the present invention is a register array, during actual operation, the logic can see the contents of all registers, and can also update the contents of all registers at once, and can be aged instantly.

[0056] The PtrList data structure is implemented not as a FIFO, but as a queue built with a register array, which means that the status of all push pointers can be observed at the same time; in high-speed chip design, there is no need to consider the practical problems caused by the size of the FIFO depth. The shift registers include S1--S5, which play a role in the whole process.

[0057] To sum up, the present invention can automatically sense the disorder of the linked list, and can trigger an interrupt and initialize the system at the same time when the disorder occurs, so that the hardware can automatically sense and notify the system to take action when the linked list is initially disordered. It is easy to implement, the logic is simple, and it is easy to expand various scene applications based on this method.

[0058] Those skilled in the art should understand that the discussion of any of the above embodiments is merely illustrative and is not intended to imply that the scope of the present invention is limited to these examples. Under the concept of the present invention, the technical features in the above embodiments or different embodiments may be combined, the steps may be implemented in any order, and there are many other variations of the different aspects of the present invention as described above, which are not provided in detail for the sake of simplicity.

[0059] The embodiments of the present invention are intended to cover all such substitutions, modifications and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A method for implementing a linked list disorder hardware extremely fast self-checker, characterized in that: The following steps are involved: Step S1, the system is powered on, the chip linked list is initialized, the ptrList data structure is cleared, the ptrList depth is parameterized to match the storage unit depth, the ptrList uses the number of units ptrListCnt, and ptrListCnt is initialized to 0; Step S2, the business flow starts, the chip starts to store and forward the data frame, and at the same time ptrList starts to push the pointer of the frame fragment, and the pushed content is {link list pointer, pointer state}; the pointer state pushed in when storing is writing, and the pointer state pushed in when releasing is releasing; each time a pointer is pushed in, prtListCnt+1; Step S3, monitor the linked list pointer and pointer status recorded in ptrList in real time, and observe the content of the corresponding number of ptrLists according to the value of ptrListCnt; Step S4: If the same pointer appears and the same pointer state is the same, it means that the linked list is out of order; Step S5, triggering an interrupt, the system is initialized, and at the same time, the entire ptrList is initialized by resetting ptrListCnt=0.

2. The method for implementing a linked list disorder hardware extremely fast self-checker according to claim 1, characterized in that: In step S1, the following steps are also included: Step S1.1, power on the system, set a linked list pointer window array ptrList = {}; {} indicates an array or list of pointers initialized to empty; Step S1.2, set a status flag ptrStatus for each linked list pointer, ptrStatus value 0 indicates writing, ptrStatus value 1 indicates releasing; Step S1.3, set the ptrList depth occupancy count ptrListCnt, initialized to 0, indicating that there is no valid pointer in ptrList.

3. The method for implementing a linked list disorder hardware extremely fast self-checker according to claim 2, characterized in that: In step S2, the following steps are also included: Step S2.1, each time the chip writes a frame fragment, {list pointer, ptrStatus(0)} is pushed into ptrList as a state variable, and ptrListCnt+1; Step S2.2, every time the chip releases a frame fragment, it pushes {list pointer, ptrStatus(1)} into ptrList, and ptrListCnt+1; Step S2.3, when ptrListCnt reaches the maximum depth of ptrList, ptrListCnt-1, it means that the initial pointer is cleared.

4. The method for implementing a linked list disorder hardware extremely fast self-checker according to claim 3, characterized in that: In step S4, as frame fragments are continuously written or released, there are pointers of ptrListCnt that are not 0. Among these pointers, if there are pointers with the same name and the same status, it means that the pointers are out of order.

5. The method for implementing a linked list disorder hardware extremely fast self-checker according to claim 1, characterized in that: In step S5, by initializing ptrListCnt=0, the entire ptrList is reset, and the system initialization includes closing the interface receiving function and initializing the linked list.

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