Simulation method and device of semiconductor device, equipment and storage medium

Abstract

The invention discloses a simulation method and device of a semiconductor device, electronic equipment, a storage medium and a product, and belongs to the technical field of semiconductors. The simulation method of the semiconductor device comprises the following steps: acquiring a planar layout of the semiconductor device; identifying the planar layout, and determining a target mask plate actually used in the manufacturing process of the semiconductor device; according to a process design library, identifying configuration information of the target mask, the configuration information including bright and dark field types and size information of the target mask; building a simulation program according to the configuration information of the target mask; and simulating the semiconductor device according to the simulation program. According to the method, the labor cost and the time cost can be saved, and the simulation efficiency and accuracy are improved.

Description

Technical Field

[0001] The present application belongs to the field of semiconductor technology, and in particular, relates to a simulation method, device, equipment and storage medium for a semiconductor device. Background Art

[0002] In the related art, the simulation program of semiconductor devices needs to be built manually. First, the relevant information of the mask used by the semiconductor device is manually measured and set, and then the simulation program is built manually according to the actual process flow. This manual construction method requires a lot of manpower and time costs, and the information measured and set manually has problems such as inaccuracy, resulting in low efficiency and accuracy of the simulation. Summary of the invention

[0003] The present application aims to solve at least one of the technical problems existing in the prior art. To this end, the present application proposes a simulation method, device, equipment and storage medium for semiconductor devices, which can save manpower and time costs and improve the efficiency and accuracy of simulation.

[0004] In a first aspect, the present application provides a simulation method for a semiconductor device, the method comprising:

[0005] Obtaining a planar layout of a semiconductor device;

[0006] Identifying the planar layout to determine a target mask actually used in the manufacturing process of the semiconductor device;

[0007] According to the process design library, identifying the configuration information of the target mask, wherein the configuration information includes the bright field and dark field type and size information of the target mask;

[0008] Building a simulation program according to the configuration information of the target mask;

[0009] The semiconductor device is simulated according to the simulation program.

[0010] According to the simulation method of the semiconductor device of the present application, the target mask is determined by identifying the planar layout of the semiconductor device, and the configuration information of the target mask is automatically identified according to the process design library. The configuration information includes the light and dark field type and size information of the target mask. The simulation program is automatically built according to the configuration information of the target mask. There is no need to manually set the configuration information of the mask or manually build the simulation program, which saves a lot of manpower and time costs and improves the efficiency and accuracy of the simulation.

[0011] According to an embodiment of the present application, the simulation method of the semiconductor device is applied to simulation software, and the process design library is integrated into the simulation software.

[0012] According to an embodiment of the present application, the identifying the planar layout to determine the target mask actually used in the manufacturing process of the semiconductor device includes:

[0013] According to the process design library, the planar layout is identified to obtain mask information of each layer in the planar layout, wherein the mask information includes the type of the mask;

[0014] According to the type of the mask, a target mask actually used in the manufacturing process of the semiconductor device is determined.

[0015] According to one embodiment of the present application, the simulation program includes a process simulation program;

[0016] The step of building a simulation program according to the configuration information of the target mask includes:

[0017] Determining the photoresist type corresponding to the target mask according to the bright and dark field type of the target mask;

[0018] The process simulation program is constructed according to the configuration information of the target mask and the type of photoresist.

[0019] According to one embodiment of the present application, the method further includes:

[0020] Setting a core region of the semiconductor device;

[0021] Performing simulation mesh optimization on the core area to obtain optimized mesh information;

[0022] According to the optimized grid information, a grid program is built and added to the simulation program.

[0023] According to an embodiment of the present application, before simulating the semiconductor device according to the simulation program, the method further includes:

[0024] Simulation programs irrelevant to device units in the semiconductor device are removed from the simulation programs.

[0025] According to an embodiment of the present application, removing simulation programs irrelevant to device units in the semiconductor device from the simulation programs includes:

[0026] Determining a first mask actually used in the manufacturing process of the device unit from a process design library;

[0027] Comparing the first mask with the target mask, and selecting an inconsistent second mask from the target mask;

[0028] The simulation program associated with the second mask is removed from the simulation programs.

[0029] In a second aspect, the present application provides a simulation device for a semiconductor device, the device comprising:

[0030] An acquisition module, used for acquiring a planar layout of a semiconductor device;

[0031] A determination module, used to identify the plane layout and determine the target mask actually used in the manufacturing process of the semiconductor device;

[0032] An identification module, used to identify the configuration information of the target mask;

[0033] A building module, used to build a simulation program according to the configuration information of the target mask;

[0034] A simulation module is used to simulate the semiconductor device according to the simulation program.

[0035] According to the simulation device of the semiconductor device of the present application, the target mask is determined by identifying the planar layout of the semiconductor device, and the configuration information of the target mask is automatically identified according to the process design library. The configuration information includes the light and dark field type and size information of the target mask. The simulation program is automatically built according to the configuration information of the target mask. There is no need to manually set the configuration information of the mask or manually build the simulation program, which saves a lot of manpower and time costs and improves the efficiency and accuracy of the simulation.

[0036] In a third aspect, the present application provides an electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, the simulation method for a semiconductor device as described in the first aspect above is implemented.

[0037] In a fourth aspect, the present application provides a non-transitory computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the semiconductor device simulation method as described in the first aspect above.

[0038] In a fifth aspect, the present application provides a computer program product, including a computer program, which, when executed by a processor, implements the simulation method of a semiconductor device as described in the first aspect above.

[0039] The above one or more technical solutions in the embodiments of the present application have at least one of the following technical effects:

[0040] By identifying the planar layout of the semiconductor device, the target mask is determined, and the configuration information of the target mask is automatically identified according to the process design library. The configuration information includes the light and dark field type and size information of the target mask. The simulation program is automatically built according to the configuration information of the target mask. There is no need to manually set the configuration information of the mask or manually build the simulation program, which saves a lot of manpower and time costs and improves the efficiency and accuracy of the simulation.

[0041] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become apparent from the description below, or will be learned through the practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0043] Figure 1 It is a flowchart of a simulation method for a semiconductor device provided in an embodiment of the present application;

[0044] Figure 2 is a schematic structural diagram of a simulation device for a semiconductor device provided in an embodiment of the present application;

[0045] Figure 3 is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application;

[0046] Figure 4 It is a hardware schematic diagram of the electronic device provided in the embodiment of the present application. DETAILED DESCRIPTION

[0047] The following will be combined with the drawings in the embodiments of the present application to clearly describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments in the present application belong to the scope of protection of this application.

[0048] The terms "first", "second", etc. in the specification and claims of the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable under appropriate circumstances, so that the embodiments of the present application can be implemented in an order other than those illustrated or described here, and the objects distinguished by "first", "second", etc. are generally of one type, and the number of objects is not limited. For example, the first object can be one or more. In addition, "and / or" in the specification and claims represents at least one of the connected objects, and the character " / " generally indicates that the objects associated with each other are in an "or" relationship.

[0049] The simulation method, apparatus, electronic device and storage medium of the semiconductor device provided in the embodiments of the present application are described in detail below with reference to specific embodiments and their application scenarios in conjunction with the accompanying drawings.

[0050] The semiconductor device simulation method may be applied to a terminal, and may be specifically executed by hardware or software in the terminal.

[0051] The terminal includes, but is not limited to, a portable communication device such as a mobile phone or tablet computer with a touch-sensitive surface (e.g., a touch screen display and / or a touch pad). It should also be understood that in some embodiments, the terminal may not be a portable communication device, but a desktop computer with a touch-sensitive surface (e.g., a touch screen display and / or a touch pad).

[0052] Figure 1 A schematic flow chart of a semiconductor device simulation method provided in an embodiment of the present application.

[0053] The simulation method for a semiconductor device provided in an embodiment of the present application may be executed by an electronic device or a functional module or functional entity in the electronic device that can implement the simulation method. The electronic devices mentioned in the embodiment of the present application include but are not limited to mobile phones, tablet computers, computers, cameras, and wearable devices. The simulation method for a semiconductor device provided in an embodiment of the present application is described below using an electronic device as an example of the execution subject.

[0054] like Figure 1 As shown, the simulation method of the semiconductor device includes: step 110, step 120, step 130, step 140 and step 150.

[0055] Step 110: Obtain a planar layout of the semiconductor device.

[0056] In this embodiment, the design of the semiconductor device can be presented in the form of a plane layout, which is a set of mutually nested graphics. The plane layout of the semiconductor device is composed of graphics on different layers, and different graphics represent different structures in the semiconductor device. The plane layout can reflect information such as the type of the semiconductor device, the plane size, the relative position of the structure, and the connection relationship between the structures.

[0057] The planar layout of a semiconductor device is associated with the manufacturing process used for the semiconductor device. Each layer in the semiconductor device corresponds to a different process step.

[0058] The planar layout of a semiconductor device can be stored in a file in the GDS format. The planar layout of a semiconductor device can be designed by a layout engineer.

[0059] The simulation method of the semiconductor device in this embodiment can be applied to simulation software. In practical application, the electronic device can be installed with simulation software, and the plane layout of the semiconductor device is imported into the simulation software of the electronic device, so that the electronic device can obtain the plane layout of the semiconductor device. Among them, the simulation software can be TCAD (Technology Computer Aided Design) simulation software.

[0060] Step 120: Identify the planar layout and determine the target mask actually used in the manufacturing process of the semiconductor device.

[0061] In this embodiment, the mask is a pattern transfer tool or motherboard in the semiconductor device manufacturing process, carrying pattern information and process technology information. The function of the mask is to transfer the circuit pattern carried by it to the base material by exposure, thereby realizing the production of semiconductor devices.

[0062] In the actual process of manufacturing semiconductor devices, there are many types of masks, such as masks corresponding to marks, masks corresponding to dummy structures, and masks actually used. Among them, the mark can be used to position its subsequent process, and the mark can be a specific structure, such as a positioning groove. The mask corresponding to the mark refers to the mask used to form the mark. For example, a mark is formed on the substrate through a mask so that positioning can be performed according to the mark later to form other film layers on the substrate. The dummy structure is not a structure required for the semiconductor device to realize its function, and is usually designed in the idle area of ​​the semiconductor device to maintain environmental consistency. The mask corresponding to the dummy structure refers to the mask used to form the dummy structure. The mask actually used refers to the mask used to form the functional structure in the semiconductor device, and the functional structure in the semiconductor device refers to the structure that realizes the function of the semiconductor device. For example, the mask actually used may include masks corresponding to functional film layers such as active layers, polysilicon layers, injection layers, and metal layers in the semiconductor device.

[0063] In this embodiment, the actual mask used is determined from various types of masks existing in the actual process of manufacturing semiconductor devices as the target mask for subsequent steps. There are various ways to determine the target mask.

[0064] In some embodiments, the step 120 of identifying the planar layout and determining the target mask actually used in the manufacturing process of the semiconductor device includes:

[0065] According to the process design library, the plane layout is identified to obtain the mask information of each layer in the plane layout, and the mask information includes the type of the mask;

[0066] According to the type of mask, the target mask actually used in the manufacturing process of the semiconductor device is determined.

[0067] The process design library may be a PDK (Process Design Kit) library. The PDK library is a process design kit or process design kit for manufacturing semiconductor devices in integrated circuit manufacturing engineering. The process design library may be integrated into the simulation software.

[0068] The process design library contains the basic elements that reflect the manufacturing process, such as transistors, contact holes, interconnects, etc. The process design library can include design rule files, electrical rule files, layout hierarchy definition files, device layouts, and inter-layer custom parameters.

[0069] In this embodiment, the process design library in the layout making software (such as Virtuoso software) can be embedded into the simulation software (such as TCAD simulation software), and a tool SCTools can be designed in the simulation software. According to the process design library and through the tool SCTools, all layers in the planar layout of the semiconductor device are identified.

[0070] First, according to the process design library, identify the information of all masks corresponding to the plane layout (i.e., the mask information of each layer), including the mask corresponding to the mark, the mask corresponding to the virtual structure, and the mask actually used, etc. The mask information may include the type of mask, and the type of mask may be represented by Data Type. Different types of masks have different Data Types. For example, Data Type includes three identifiers, namely, a first identifier, a second identifier, and a third identifier. Among them, the first identifier indicates the mask corresponding to the mark, the second identifier indicates the mask corresponding to the virtual structure, and the third identifier indicates the mask actually used.

[0071] After obtaining the type of each mask, it is possible to determine whether each mask is a mask actually used according to the type of each mask. For example, the Data Type of each mask in the mask information is detected to determine whether the Data Type of each mask is the first identifier, the second identifier, or the third identifier. If the Data Type of a mask is the third identifier, it indicates that the mask is the mask actually used, and the mask is used as the target mask; if the Data Type of a mask is the first identifier or the second identifier, it indicates that the mask is the mask corresponding to the mark or the mask corresponding to the virtual structure, that is, the mask is not the mask actually used, and the mask is not used as the target mask.

[0072] It should be noted that the mask information may also include a physical layout identifier (such as GDS Number) and a mask name (such as Mask Name), etc. The GDS Number, Data Type, and Mask Name of each mask are correspondingly stored in the process design library.

[0073] In some embodiments, the process design library (such as the PDK library) has Mask Information, which defines the relevant information of the mask actually used in the manufacturing process of the semiconductor device. After identifying the information of all the masks corresponding to the planar layout, the information of all the identified masks can be compared with the information of the masks in the Mask Information in the process design library to filter out the target mask actually used from all the identified masks.

[0074] For example, the GDS Number, Data Type and Mask Name of all identified masks are compared with the GDS Number, Data Type and Mask Name in the Mask Information in the process design library, and the masks with consistent GDS Number, Data Type and Mask Name are retained as the target masks actually used.

[0075] Step 130 : Identify the configuration information of the target mask according to the process design library, where the configuration information includes the bright field and dark field type and size information of the target mask.

[0076] In this embodiment, the configuration information of the target mask refers to the relevant information of the target mask used to build the simulation program. According to the process design library and through the tool SCTools, the configuration information of the target mask can be identified. The configuration information may include the bright and dark field type and size information of the target mask.

[0077] Among them, the bright and dark field types include bright field types or dark field types. The bright field type means that the target mask is a bright field mask (clear mask), and the dark field type means that the target mask is a dark field mask (dark mask). In the dark field mask, most areas are opaque, and only the pattern area that needs to be transferred is translucent. When there are fewer or sparsely distributed patterns to be transferred, or when making very small patterns, using a dark field mask can achieve better results. In the bright field mask, most of the beam areas are translucent, and only the pattern area that needs to be transferred is opaque. When there are more patterns to be transferred or the pattern density is higher, using a bright field mask can achieve better results. The size information may include the characteristic size of the target mask, such as the size of the translucent area and the non-translucent area in the target mask.

[0078] It should be noted that the configuration information may also include other information of the target mask used to build the simulation program, which is not specifically limited here.

[0079] In some embodiments, the step 130 of identifying the configuration information of the target mask includes:

[0080] Identify the bright and dark field types of the target mask from the process design library;

[0081] Identify the size information of the target mask.

[0082] The process design library has the light and dark field types of each mask, and the light and dark field types of each mask can be saved corresponding to information such as mask type, mask name, and physical layout identification. After determining the target mask, the light and dark field type of the target mask can be obtained from the process design library according to the mask type, mask name, and physical layout identification of the target mask.

[0083] The pattern of the target mask can also be obtained from the process design library. The pattern of the target mask can be identified and the size information of the target mask can be measured through the tool SCTools.

[0084] The related technology requires manual measurement of the mask size information based on the planar layout of the semiconductor device, and the setting of the mask light and dark field type. This manual method wastes a lot of manpower and time costs, and is prone to inaccurate measurement of the mask size information, occasional mask missing, inaccurate setting of the mask light and dark field type, etc., resulting in inaccuracy in the subsequent simulation program construction and affecting the simulation results.

[0085] The present embodiment integrates the process design library into the simulation software, and through the tool SCTools in the simulation software, the light and dark field types of the target mask can be automatically obtained from the process design library, and the size information of the target mask can be automatically identified and measured without manual measurement and setting, thus saving a lot of manpower and time costs, ensuring the integrity of the target mask, improving the accuracy of the size information and light and dark field types of the target mask, and thus improving the accuracy of the subsequent simulation program construction and improving the simulation effect.

[0086] Step 140: Building a simulation program according to the configuration information of the target mask.

[0087] In this embodiment, after the simulation software identifies the configuration information of the target mask, it can generate a simulation program according to the configuration information of the target mask. The configuration information includes the bright and dark field type and size information of the target mask, and the configuration information can also include information such as the name of the target mask. The simulation program can include a process simulation program. The simulation program can also include other programs that can realize semiconductor device simulation, which are not specifically limited here.

[0088] In some embodiments, building a simulation program according to the configuration information of the target mask in step 140 includes:

[0089] Determine the photoresist type corresponding to the target mask according to the bright and dark field type of the target mask;

[0090] Build a process simulation program based on the target mask configuration information and photoresist type.

[0091] Among them, the types of photoresists include positive photoresists and negative photoresists. The exposed part of the positive photoresist is soluble in the developer, while the unexposed part is not. After development, the remaining photoresist pattern is the same as the pattern of the mask, that is, the exposed part of the positive photoresist is removed. The exposed part of the negative photoresist is not soluble in the developer, while the unexposed part is soluble in the developer. After development, the remaining photoresist pattern is complementary to the pattern of the mask, that is, the unexposed part of the negative photoresist is removed.

[0092] When making finer graphics, positive photoresist can be used, that is, the resolution of positive photoresist is higher, but the sensitivity of positive photoresist is not very high and the exposure dose is large. Negative photoresist has higher sensitivity, but lower resolution and is not suitable for fine processing.

[0093] The simulation software in this embodiment can automatically determine the photoresist type corresponding to the target mask according to the light and dark fields of the target mask. The simulation software automatically converts the configuration information and photoresist type of the target mask, such as the name, light and dark field type and size information of the target mask, and the photoresist type, into a process simulation program. It should be noted that the process simulation program can be a process simulation program for the entire process of semiconductor devices.

[0094] In the related art, the photoresist type is manually defined, and the simulation program is manually built according to the actual process flow of the semiconductor device, which results in a long time for building the simulation program and is prone to errors.

[0095] However, this embodiment automatically determines the corresponding photoresist type according to the light and dark field type of the target mask, and the simulation software automatically generates a simulation program without manually introducing various uncertainties, thereby improving the efficiency and accuracy of building the simulation program.

[0096] Step 150: Simulate the semiconductor device according to the simulation program.

[0097] In this embodiment, a simulation program is run in the simulation software to realize the simulation of the semiconductor device and to realize the performance analysis of the semiconductor device.

[0098] In the related art, the inaccuracy of simulation program construction easily leads to inaccurate electrical parameter performance of semiconductor devices obtained by simulation, misleading the formulation of engineering solutions, thus causing the failure of the entire engineering project tape-out. However, this embodiment improves the efficiency and accuracy of simulation program construction, thereby improving simulation efficiency, improving the accuracy of simulation results, and reducing the risk of engineering project tape-out failure.

[0099] In some embodiments, the simulation method of a semiconductor device further includes:

[0100] Setting a core region of a semiconductor device;

[0101] Perform simulation mesh optimization on the core area to obtain optimized mesh information;

[0102] According to the optimized mesh information, build the mesh program and add it to the simulation program.

[0103] The semiconductor device includes a core area, which can be pre-set. The core area of ​​the semiconductor device is an area in the semiconductor device with a functional structure, and the functional structure is a structure that realizes the function of the semiconductor device. The semiconductor device may also include an idle area outside the core area.

[0104] The mesh information before optimization may include the size of the mesh required for simulation of all regions of the semiconductor device (which may be a default size). The mesh required for simulation of the core region of the semiconductor device is optimized to reduce the size of the mesh required for simulation of the core region, thereby obtaining optimized mesh information. The optimized mesh information may include the size of the mesh required for simulation of the optimized core region and the default size of the mesh required for simulation of the idle region. It should be noted that after the simulation mesh of the core region is optimized, the size of the mesh required for simulation of the core region is smaller than the size of the mesh required for simulation of the idle region.

[0105] According to the optimized grid information, a grid program is built, and the grid program is used to set the size of the grid required for simulating different areas (including core areas and idle areas) of the semiconductor device. The built grid program is added to the simulation program so that the simulation program can be run to simulate the semiconductor device.

[0106] This embodiment performs simulation mesh optimization on the core area to further improve the simulation effect of the semiconductor device.

[0107] In some embodiments, before simulating the semiconductor device according to the simulation program in step 150, the method further includes:

[0108] Simulation programs irrelevant to device units in the semiconductor device are removed from the simulation programs.

[0109] The simulation program built according to the configuration information of the target mask in step 140 is a full-process process simulation program for semiconductor devices. Running the full-process process simulation program can realize the simulation of the entire semiconductor device.

[0110] The semiconductor device includes a plurality of device units (such as transistors). In some practical applications, it is not necessary to simulate the entire semiconductor device, but only some device units in the semiconductor device need to be simulated. The simulation programs irrelevant to the target device unit can be removed from the full-process process simulation program of the semiconductor device, and only the simulation programs associated with the target device unit are retained. The simulation program associated with the target device unit is run to realize the simulation of the target device unit in the semiconductor device.

[0111] In some embodiments, the step of removing simulation programs irrelevant to device units in the semiconductor device from the simulation programs includes:

[0112] Determining a first mask actually used in a manufacturing process of a device unit from a process design library;

[0113] Comparing the first mask with the target mask, and screening out the inconsistent second mask from the target mask;

[0114] The simulation program associated with the second mask is removed from the simulation programs.

[0115] The process design library (such as the PDK library) contains Pcells (parameterized cells) corresponding to each device unit in the semiconductor device. When simulating a target device unit in a semiconductor device, by identifying the Pcell corresponding to the target device unit in the process design library, the mask actually used in the manufacturing process of the target device unit can be determined as the first mask.

[0116] By comparing the first mask with the target mask, inconsistent masks can be selected from the target mask as the second mask, which is the other mask in the target mask except the first mask. The second mask is an unnecessary mask.

[0117] Remove the simulation program associated with the second mask from the full-process process simulation program of the semiconductor device. Add a comment, such as "#", before the name of the second mask in the full-process process simulation program of the semiconductor device, indicating that the simulation program associated with the second mask is not needed, and the remaining simulation program is the simulation program associated with the target device unit. Run the simulation program associated with the target device unit to realize the simulation of the target device unit in the semiconductor device.

[0118] It should be noted that the simulation method of the semiconductor device provided in the embodiment of the present application also supports the construction of a simulation program for a customized device. A plane layout is set according to the customized device, the set plane layout is identified, the target mask actually used in the manufacturing process of the customized device is determined, the configuration information of the target mask is identified, and a simulation program is built according to the configuration information of the target mask, and the customized device is simulated according to the simulation program.

[0119] According to the simulation method of a semiconductor device provided in an embodiment of the present application, a target mask is determined by identifying a planar layout of the semiconductor device, and configuration information of the target mask is automatically identified according to a process design library, wherein the configuration information includes the light and dark field type and size information of the target mask. A simulation program is automatically built according to the configuration information of the target mask, and there is no need to manually set the configuration information of the mask or manually build the simulation program, thereby saving a large amount of manpower and time costs and improving the efficiency and accuracy of semiconductor device simulation.

[0120] The semiconductor device simulation method provided in the embodiment of the present application can be executed by a semiconductor device simulation device. The semiconductor device simulation method performed by a semiconductor device simulation device is taken as an example to illustrate the semiconductor device simulation device provided in the embodiment of the present application.

[0121] An embodiment of the present application also provides a simulation device for a semiconductor device.

[0122] like Figure 2 As shown, the simulation device for a semiconductor device includes: an acquisition module 210 , a determination module 220 , an identification module 230 , a construction module 240 and a simulation module 250 .

[0123] An acquisition module 210 is used to acquire a planar layout of a semiconductor device;

[0124] A determination module 220, configured to identify the planar layout and determine a target mask actually used in the manufacturing process of the semiconductor device;

[0125] An identification module 230, for identifying the configuration information of the target mask according to the process design library, wherein the configuration information includes the bright field and dark field type and size information of the target mask;

[0126] A building module 240 is used to build a simulation program according to the configuration information of the target mask;

[0127] The simulation module 250 is used to simulate the semiconductor device according to the simulation program.

[0128] According to the simulation device of the semiconductor device provided in the embodiment of the present application, the target mask is determined by identifying the planar layout of the semiconductor device, and the configuration information of the target mask is automatically identified according to the process design library. The configuration information includes the light and dark field type and size information of the target mask. The simulation program is automatically built according to the configuration information of the target mask. There is no need to manually set the configuration information of the mask or manually build the simulation program, which saves a lot of manpower and time costs and improves the efficiency and accuracy of the simulation.

[0129] In some embodiments, the simulation apparatus of the semiconductor device is applied to simulation software, and the process design library is integrated into the simulation software.

[0130] In some embodiments, the determination module 220 is further configured to:

[0131] According to the process design library, the planar layout is identified to obtain mask information of each layer in the planar layout, wherein the mask information includes the type of the mask;

[0132] According to the type of the mask, a target mask actually used in the manufacturing process of the semiconductor device is determined.

[0133] In some embodiments, the identification module 230 is further configured to:

[0134] Identifying the bright and dark field type of the target mask from a process design library;

[0135] Identify the size information of the target mask.

[0136] This embodiment can automatically obtain the light and dark field types of the target mask from the process design library, and can automatically identify and measure the size information of the target mask without manual measurement and setting, thus saving a lot of manpower and time costs, and ensuring the integrity of the target mask, improving the accuracy of the size information and light and dark field types of the target mask, thereby improving the accuracy of the subsequent simulation program construction and improving the simulation effect.

[0137] In some embodiments, the simulation program includes a process simulation program; the building module 240 is further used to:

[0138] Determining the photoresist type corresponding to the target mask according to the bright and dark field type of the target mask;

[0139] The process simulation program is constructed according to the configuration information of the target mask and the type of photoresist.

[0140] This embodiment automatically determines the corresponding photoresist type according to the light and dark field type of the target mask, and the simulation software automatically generates a simulation program without manually introducing various uncertainties, thereby improving the efficiency and accuracy of building the simulation program.

[0141] In some embodiments, the simulation device for a semiconductor device further includes an optimization module, and the optimization module is used to:

[0142] Setting a core region of the semiconductor device;

[0143] Performing simulation mesh optimization on the core area to obtain optimized mesh information;

[0144] According to the optimized grid information, a grid program is built and added to the simulation program.

[0145] This embodiment performs simulation mesh optimization on the core area to further improve the simulation effect of the semiconductor device.

[0146] In some embodiments, the semiconductor device simulation apparatus further includes a removal module, and the removal module is used to:

[0147] Simulation programs irrelevant to device units in the semiconductor device are removed from the simulation programs.

[0148] This embodiment can realize the simulation of the device unit in the semiconductor device without simulating the entire semiconductor device, thereby improving the simulation efficiency of the device unit.

[0149] In some embodiments, the removal module is further configured to:

[0150] Determining a first mask actually used in the manufacturing process of the device unit from a process design library;

[0151] Comparing the first mask with the target mask, and selecting an inconsistent second mask from the target mask;

[0152] The simulation program associated with the second mask is removed from the simulation programs.

[0153] It should be noted that the simulation device for semiconductor devices provided in the embodiment of the present application also supports the construction of a simulation program for customized devices. The acquisition module 210 is also used to set a plane layout according to the customized device; the determination module 220 is also used to identify the set plane layout and determine the target mask actually used in the manufacturing process of the customized device; the identification module 230 is also used to identify the configuration information of the target mask; the construction module 240 is also used to build a simulation program according to the configuration information of the target mask; the simulation module 250 is also used to simulate the customized device according to the simulation program.

[0154] The simulation device of the semiconductor device in the embodiment of the present application can be an electronic device, or a component in the electronic device, such as an integrated circuit or a chip. The electronic device can be a terminal, or other devices other than a terminal. Exemplarily, the electronic device can be a mobile phone, a tablet computer, a laptop computer, a PDA, a vehicle-mounted electronic device, a mobile Internet device (Mobile Internet Device, MID), an augmented reality (augmented reality, AR) / virtual reality (virtual reality, VR) device, a robot, a wearable device, an ultra-mobile personal computer (ultra-mobile personal computer, UMPC), a netbook or a personal digital assistant (personal digital assistant, PDA), etc., and can also be a server, a network attached storage (Network Attached Storage, NAS), a personal computer (personal computer, PC), a television (television, TV), a teller machine or a self-service machine, etc., which is not specifically limited in the embodiment of the present application.

[0155] The semiconductor device simulation device in the embodiment of the present application may be a device having an operating system. The operating system may be a Microsoft (Windows) operating system, an Android (Android) operating system, an IOS operating system, or other possible operating systems, which are not specifically limited in the embodiment of the present application.

[0156] The semiconductor device simulation device provided in the embodiment of the present application can realize Figure 1 To avoid repetition, the various processes implemented by the method embodiment are not described here.

[0157] In some embodiments, Figure 3As shown, an embodiment of the present application also provides an electronic device 600, including a processor 601, a memory 602, and a computer program stored in the memory 602 and executable on the processor 601. When the program is executed by the processor 601, the various processes of the above-mentioned semiconductor device simulation method embodiment are implemented, and the same technical effect can be achieved. To avoid repetition, it will not be described here.

[0158] It should be noted that the electronic devices in the embodiments of the present application include the above-mentioned mobile electronic devices and non-mobile electronic devices.

[0159] Figure 4 A schematic diagram of the hardware structure of an electronic device to implement an embodiment of the present application.

[0160] The electronic device 700 includes but is not limited to: a radio frequency unit 701, a network module 702, an audio output unit 703, an input unit 704, a sensor 705, a display unit 706, a user input unit 707, an interface unit 708, a memory 709, a processor 710 and other components.

[0161] Those skilled in the art will appreciate that the electronic device 700 may also include a power source (such as a battery) for supplying power to each component, and the power source may be logically connected to the processor 710 through a power management system, thereby implementing functions such as managing charging, discharging, and power consumption management through the power management system. Figure 4 The electronic device structure shown in the figure does not constitute a limitation on the electronic device. The electronic device may include more or fewer components than shown in the figure, or combine certain components, or arrange the components differently, which will not be described in detail here.

[0162] Among them, the processor 710 is used to obtain a planar layout of a semiconductor device; identify the planar layout to determine the target mask actually used in the manufacturing process of the semiconductor device; identify the configuration information of the target mask according to the process design library, the configuration information includes the bright and dark field type and size information of the target mask; build a simulation program according to the configuration information of the target mask; and simulate the semiconductor device according to the simulation program.

[0163] According to the electronic device provided in the embodiment of the present application, the target mask is determined by identifying the planar layout of the semiconductor device, and the configuration information of the target mask is automatically identified according to the process design library. The configuration information includes the light and dark field type and size information of the target mask. According to the configuration information of the target mask, a simulation program is automatically built. There is no need to manually set the configuration information of the mask or manually build the simulation program, which saves a lot of manpower and time costs and improves the efficiency and accuracy of the simulation.

[0164] In some embodiments, the processor 710 is installed with simulation software, and the process design library is integrated into the simulation software.

[0165] In some embodiments, the processor 710 is further configured to identify the planar layout according to the process design library, and obtain mask information of each layer in the planar layout, wherein the mask information includes the type of the mask;

[0166] According to the type of the mask, a target mask actually used in the manufacturing process of the semiconductor device is determined.

[0167] In some embodiments, the processor 710 is further configured to:

[0168] Identifying the bright and dark field type of the target mask from a process design library;

[0169] Identify the size information of the target mask.

[0170] In some embodiments, the simulation program includes a process simulation program; the processor 710 is further configured to:

[0171] Determining the photoresist type corresponding to the target mask according to the bright and dark field type of the target mask;

[0172] The process simulation program is constructed according to the configuration information of the target mask and the type of photoresist.

[0173] In some embodiments, the processor 710 is further configured to:

[0174] Setting a core region of the semiconductor device;

[0175] Performing simulation mesh optimization on the core area to obtain optimized mesh information;

[0176] According to the optimized grid information, a grid program is built and added to the simulation program.

[0177] In some embodiments, the processor 710 is further configured to:

[0178] Simulation programs irrelevant to device units in the semiconductor device are removed from the simulation programs.

[0179] In some embodiments, the processor 710 is further configured to:

[0180] Determining a first mask actually used in the manufacturing process of the device unit from a process design library;

[0181] Comparing the first mask with the target mask, and selecting an inconsistent second mask from the target mask;

[0182] The simulation program associated with the second mask is removed from the simulation programs.

[0183] It should be understood that in the embodiment of the present application, the input unit 704 may include a graphics processor (Graphics Processing Unit, GPU) 7041 and a microphone 7042, and the graphics processor 7041 processes the image data of the static picture or video obtained by the image capture device (such as a camera) in the video capture mode or the image capture mode. The display unit 706 may include a display panel 7061, and the display panel 7061 may be configured in the form of a liquid crystal display, an organic light emitting diode, etc. The user input unit 707 includes a touch panel 7071 and at least one of other input devices 7072. The touch panel 7071 is also called a touch screen. The touch panel 7071 may include two parts: a touch detection device and a touch controller. Other input devices 7072 may include, but are not limited to, a physical keyboard, function keys (such as volume control keys, switch keys, etc.), a trackball, a mouse, and a joystick, which will not be repeated here.

[0184] The memory 709 can be used to store software programs and various data. The memory 709 may mainly include a first storage area for storing programs or instructions and a second storage area for storing data, wherein the first storage area may store an operating system, an application program or instructions required for at least one function (such as a sound playback function, an image playback function, etc.), etc. In addition, the memory 709 may include a volatile memory or a non-volatile memory, or the memory 709 may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), a static random access memory (SRAM), a dynamic random access memory (DRAM), a synchronous dynamic random access memory (SDRAM), a double data rate synchronous dynamic random access memory (DDRSDRAM), an enhanced synchronous dynamic random access memory (ESDRAM), a synchronous link dynamic random access memory (SLDRAM) and a direct memory bus random access memory (DRRAM). The memory 709 in the embodiment of the present application includes but is not limited to these and any other suitable types of memory.

[0185] The processor 710 may include one or more processing units; the processor 710 integrates an application processor and a modem processor, wherein the application processor mainly processes operations related to an operating system, a user interface, and application programs, and the modem processor mainly processes wireless communication signals, such as a baseband processor. It is understandable that the modem processor may not be integrated into the processor 710.

[0186] An embodiment of the present application also provides a non-transitory computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the various processes of the above-mentioned semiconductor device simulation method embodiment are implemented, and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.

[0187] The processor is the processor in the electronic device described in the above embodiment. The readable storage medium includes a computer readable storage medium, such as a computer read-only memory ROM, a random access memory RAM, a magnetic disk or an optical disk.

[0188] An embodiment of the present application also provides a computer program product, including a computer program, which implements the simulation method of the semiconductor device when executed by a processor.

[0189] The processor is the processor in the electronic device described in the above embodiment. The readable storage medium includes a computer readable storage medium, such as a computer read-only memory ROM, a random access memory RAM, a magnetic disk or an optical disk.

[0190] It should be noted that, in this article, the terms "comprise", "include" or any other variant thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise one..." do not exclude the presence of other identical elements in the process, method, article or device including the element. In addition, it should be pointed out that the scope of the methods and devices in the embodiments of the present application is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in reverse order according to the functions involved, for example, the described method may be performed in an order different from that described, and various steps may also be added, omitted, or combined. In addition, the features described with reference to certain examples may be combined in other examples.

[0191] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a computer software product, which is stored in a storage medium (such as ROM / RAM, a disk, or an optical disk), and includes a number of instructions for a terminal (which can be a mobile phone, a computer, a server, or a network device, etc.) to execute the methods described in each embodiment of the present application.

[0192] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of the present application, ordinary technicians in this field can also make many forms without departing from the purpose of the present application and the scope of protection of the claims, all of which are within the protection of the present application.

[0193] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0194] Although the embodiments of the present application have been shown and described, those skilled in the art will appreciate that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present application, and that the scope of the present application is defined by the claims and their equivalents.

Claims

1. A method for simulating a semiconductor device, characterized in that: include: Obtaining a planar layout of a semiconductor device; Identifying the planar layout to determine a target mask actually used in the manufacturing process of the semiconductor device; According to the process design library, identifying the configuration information of the target mask, wherein the configuration information includes the bright field and dark field type and size information of the target mask; Building a simulation program according to the configuration information of the target mask; The semiconductor device is simulated according to the simulation program.

2. The semiconductor device simulation method according to claim 1, characterized in that: The simulation method of the semiconductor device is applied to simulation software, and the process design library is integrated in the simulation software.

3. The semiconductor device simulation method according to claim 1, characterized in that: The step of identifying the planar layout and determining a target mask actually used in the manufacturing process of the semiconductor device includes: According to the process design library, the planar layout is identified to obtain mask information of each layer in the planar layout, wherein the mask information includes the type of the mask; According to the type of the mask, a target mask actually used in the manufacturing process of the semiconductor device is determined.

4. The semiconductor device simulation method according to claim 1, characterized in that: The simulation program includes a process simulation program; The step of building a simulation program according to the configuration information of the target mask includes: Determining the photoresist type corresponding to the target mask according to the bright and dark field type of the target mask; The process simulation program is constructed according to the configuration information of the target mask and the type of photoresist.

5. The method for simulating a semiconductor device according to claim 1, wherein: The method further comprises: Setting a core region of the semiconductor device; Performing simulation mesh optimization on the core area to obtain optimized mesh information; According to the optimized grid information, a grid program is built and added to the simulation program.

6. The semiconductor device simulation method according to any one of claims 1 to 5, characterized in that: Before simulating the semiconductor device according to the simulation program, the method further includes: Simulation programs irrelevant to device units in the semiconductor device are removed from the simulation programs.

7. The method for simulating a semiconductor device according to claim 6, wherein: The removing of simulation programs irrelevant to device units in the semiconductor device from the simulation programs comprises: Determining a first mask actually used in the manufacturing process of the device unit from the process design library; Comparing the first mask with the target mask, and selecting an inconsistent second mask from the target mask; The simulation program associated with the second mask is removed from the simulation programs.

8. A semiconductor device simulation device, characterized in that: include: An acquisition module, used for acquiring a planar layout of a semiconductor device; A determination module, used to identify the plane layout and determine the target mask actually used in the manufacturing process of the semiconductor device; An identification module, used to identify the configuration information of the target mask according to the process design library, wherein the configuration information includes the bright field and dark field type and size information of the target mask; A building module, used to build a simulation program according to the configuration information of the target mask; A simulation module is used to simulate the semiconductor device according to the simulation program.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the program, the simulation method of the semiconductor device according to any one of claims 1 to 7 is implemented.

10. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the method for simulating a semiconductor device as claimed in any one of claims 1 to 7 is implemented.

11. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the method for simulating a semiconductor device according to any one of claims 1 to 7 is implemented.

Images