Quantum circuit generation method, execution method, and quantum circuit generation server

Abstract

The invention discloses a quantum circuit generation method based on a large language model, an execution method of a quantum circuit and a quantum circuit generation server. The quantum circuit generation method comprises the following steps: in response to input quantum circuit generation information, obtaining a first target knowledge base from a pre-constructed quantum knowledge base according to the quantum circuit generation information; and based on a pre-trained large language model, generating a target quantum circuit according to the first target knowledge base and the quantum circuit generation information. Therefore, in the field of quantum calculation, the data information related to the quantum circuit generation information is retrieved in the pre-constructed quantum knowledge base, the related data information is processed by the large language model, and the circuit conforming to the quantum calculation rule is generated, so that errors in the design process are reduced, and the accuracy of the generated quantum circuit is improved. In addition, the quantum circuit meeting the user requirement can be quickly generated, and the manual labor and time cost in the traditional quantum circuit design process is greatly reduced.

Description

Technical Field

[0001] The present application relates to the field of quantum computing, and more specifically, to a quantum circuit generation method based on a large language model, a quantum circuit execution method, and a quantum circuit generation server. Background Art

[0002] Quantum computing based on quantum circuits can perform computing tasks that are difficult for classical computers to complete. However, in related technologies, the generation of quantum circuits relies on manual experience, requiring relevant technicians to design quantum circuits by themselves. This requires operators to have a certain professional knowledge base and is prone to errors. Summary of the invention

[0003] The present application provides a quantum circuit generation method based on a large language model, a quantum circuit execution method and a quantum circuit generation server.

[0004] The embodiment of the present application provides a quantum circuit generation method based on a large language model, the method comprising:

[0005] In response to the input quantum circuit generation information, obtaining a first target knowledge base from a pre-constructed quantum knowledge base according to the quantum circuit generation information;

[0006] Based on the pre-trained large language model, a target quantum circuit is generated according to the first target knowledge base and the quantum circuit generation information.

[0007] Thus, the present application provides a quantum circuit generation method based on a large language model. First, in response to the input quantum circuit generation information, a first target knowledge base is obtained from a pre-constructed quantum knowledge base according to the quantum circuit generation information, and the pre-constructed quantum knowledge base provides sufficient effective information in the field of quantum computing. Then, based on the pre-trained large language model, a target quantum circuit is generated according to the first target knowledge base and the quantum circuit generation information. In this way, in the field of quantum computing, data information related to the quantum circuit generation information is retrieved from the pre-constructed quantum knowledge base, and the relevant data information is processed by the large language model to generate a circuit that conforms to the rules of quantum computing, thereby reducing errors in the design process and improving the accuracy of the generated quantum circuit. In addition, by combining the large language model and the pre-constructed rich quantum knowledge base, quantum circuits that meet user needs can be quickly generated, greatly reducing the manual labor and time costs in the traditional quantum circuit design process.

[0008] In certain embodiments, the method further comprises:

[0009] Based on a preset retrieval technology, a target knowledge item associated with the quantum circuit generation information is acquired from the first target knowledge base according to the quantum circuit generation information.

[0010] In this way, based on the preset retrieval technology, the target knowledge items associated with the quantum circuit generation information are obtained from the first target knowledge base according to the quantum circuit generation information. In this way, by analyzing the quantum circuit generation information, the system can extract relevant target knowledge items from the first target knowledge base, thereby ensuring that the generated circuit design closely meets the needs of the user and improving the accuracy and efficiency of quantum circuit generation.

[0011] In certain embodiments, the method further comprises:

[0012] Based on a preset prompt word generation template, a splicing process is performed according to the quantum circuit generation information and the target knowledge item to determine a first target prompt word.

[0013] In this way, based on the preset prompt word generation template, the quantum circuit generation information and the target knowledge items are spliced ​​to determine the first target prompt word. In this way, based on the preset prompt word generation template, the quantum circuit generation information and the target knowledge items can be accurately spliced ​​to generate guiding prompt words, thereby not only ensuring that the generated quantum circuit is theoretically accurate and feasible, but also ensuring that the quantum circuit generated by the large language model meets user needs.

[0014] In some embodiments, the generating a target quantum circuit based on the pre-trained large language model according to the first target knowledge base and the quantum circuit generation information comprises:

[0015] Based on the large language model, the target quantum circuit is generated according to the first target prompt word.

[0016] In this way, based on the large language model, the target quantum circuit is generated according to the first target prompt word. The large language model has the ability to understand and generate complex texts, and can generate a target quantum circuit that meets specific needs according to the first target prompt word. In this way, based on the powerful ability of the large language model, the target quantum circuit is generated according to the first target prompt word, which can not only ensure that the generated quantum circuit is accurate and feasible in theory, but also ensure that the quantum circuit generated by the large language model meets user needs.

[0017] In certain embodiments, the method further comprises:

[0018] The target quantum circuit is checked to determine the correctness of the target quantum circuit.

[0019] In this way, the target quantum circuit is checked to determine the correctness of the target quantum circuit. In this way, it can be ensured that the generated target quantum circuit is not only correct in theory, but also feasible and effective in the actual quantum computing environment, thereby improving the quality and reliability of the generated quantum circuit.

[0020] In some embodiments, the checking process of the target quantum circuit includes:

[0021] In response to the quantum circuit generation information, determining a target quantum circuit specification corresponding to the target quantum circuit;

[0022] confirming whether the target quantum circuit meets the target quantum circuit specification;

[0023] In the case where the target quantum circuit meets the target quantum circuit specification, confirming whether the target quantum circuit meets logical consistency;

[0024] In the case where the target quantum circuit satisfies the logical consistency, confirming whether the target quantum circuit satisfies physical feasibility;

[0025] In the case where the target quantum circuit satisfies the physical feasibility, confirming that the target quantum circuit is correct.

[0026] In this way, first, in response to the quantum circuit generation information, the target quantum circuit specification corresponding to the target quantum circuit is determined. Next, it is confirmed whether the target quantum circuit meets the target quantum circuit specification. Then, if the target quantum circuit meets the target quantum circuit specification, it is confirmed whether the target quantum circuit meets the logical consistency. Subsequently, if the target quantum circuit meets the logical consistency, it is confirmed whether the target quantum circuit meets the physical feasibility. Finally, if the target quantum circuit meets the physical feasibility, it is confirmed that the target quantum circuit is correct. In this way, through multiple check processing, it is ensured that the generated target quantum circuit is not only correct in mathematical model and logical structure, but also can be effectively executed on actual quantum hardware and meets the constraints of physical realization, thereby improving the practical application value and reliability of the generated target quantum circuit.

[0027] In certain embodiments, the method further comprises:

[0028] When it is determined that the target quantum circuit is correct, quantum gate optimization processing is performed on the target quantum circuit to obtain an optimized target quantum circuit.

[0029] In this way, when it is determined that the target quantum circuit is correct, the target quantum circuit is subjected to quantum gate optimization processing to obtain an optimized target quantum circuit. In this way, by performing quantum gate optimization processing on the target quantum circuit, the target quantum circuit has fewer quantum gate operations, lower error rate, and higher execution efficiency while maintaining the original function.

[0030] In certain embodiments, the method further comprises:

[0031] In a case where the target quantum circuit does not satisfy the target quantum circuit specification or the target quantum circuit does not satisfy the logical consistency or the target quantum circuit does not satisfy the physical feasibility, it is confirmed that the target quantum circuit is abnormal.

[0032] In this way, when the target quantum circuit does not meet the target quantum circuit specification or the target quantum circuit does not meet the logical consistency or the target quantum circuit does not meet the physical feasibility, the target quantum circuit is confirmed to be abnormal. In this way, the server identifies the abnormality of the target quantum circuit, thereby ensuring that the generated quantum circuit is not only theoretically correct, but also feasible and effective in the actual quantum computing environment.

[0033] In certain embodiments, the method further comprises:

[0034] In the case where the target quantum circuit is abnormal, generating quantum circuit to generate error information;

[0035] Based on the preset prompt word generation template, a second target prompt word is generated according to the quantum circuit generation error information and the first target prompt word;

[0036] Acquire the second target knowledge base from the quantum knowledge base according to the second target prompt word;

[0037] Based on the large language model, generating a second target quantum circuit according to the second target knowledge base and the second target prompt word;

[0038] The second target quantum circuit is checked and processed until the second target quantum circuit is correct or the number of times the quantum circuit generates error information reaches a preset maximum number of times.

[0039] In this way, when the target quantum circuit is abnormal, quantum circuit generation error information is generated. Subsequently, a template is generated based on a preset prompt word, and a second target prompt word is generated according to the quantum circuit generation error information and the first target prompt word. Next, a second target knowledge base is obtained from a pre-constructed quantum knowledge base according to the second target prompt word. Then, based on the large language model, a second target quantum circuit is generated according to the second target knowledge base and the second target prompt word. Finally, the second target quantum circuit is checked and processed until the second target quantum circuit is correct, or the number of times the quantum circuit generates error information reaches the preset maximum number of times. In this way, when the target quantum circuit is abnormal, through continuous error detection, feedback and correction, a correct and effective quantum circuit design is gradually approached, thereby ensuring that the generated quantum circuit is not only accurate in theory, but also efficient and reliable in actual quantum computing applications, thereby improving the overall performance and stability of the quantum circuit.

[0040] The embodiment of the present application provides a method for executing a quantum circuit, wherein the quantum circuit is obtained based on the above-mentioned quantum circuit generation method, and the method comprises:

[0041] Determining target computing power resources according to the quantum circuit generated information;

[0042] The quantum circuit is processed according to the target computing power resources to obtain a target quantum execution result.

[0043] Thus, the embodiment of the present application provides a method for executing a quantum circuit. First, the target computing power resources are determined according to the quantum circuit generation information. Then, the quantum circuit is processed according to the target computing power resources to obtain the target quantum execution result. In this way, the need for manual configuration and intervention is reduced through the automated process, thereby reducing the errors that may occur when manually configuring parameters and improving the correctness and reliability of quantum circuit execution.

[0044] In some embodiments, the step of generating information based on the quantum circuit and determining a target computing resource includes:

[0045] Extracting information generated by the quantum circuit to determine operating parameters;

[0046] The target computing power resources are determined according to the operating parameters.

[0047] In this way, the server extracts the quantum circuit generation information and determines the operating parameters. Then, the server determines the target computing power resources based on the operating parameters. In this way, after the server analyzes and processes the quantum circuit generation information, it can determine the optimal operating parameters and target computing power resources according to the specific needs of the quantum circuit, which helps to improve the automation of quantum circuit design and ensure that the circuit can be executed efficiently and accurately on actual quantum computing hardware.

[0048] An embodiment of the present application provides a quantum circuit generation server, which includes a memory and a processor. The memory stores a computer program. When the computer program is executed by the processor, the above-mentioned quantum circuit generation method or the above-mentioned quantum circuit execution method is implemented.

[0049] Additional aspects and advantages of the embodiments of the present application will be given in part in the description below, and in part will become apparent from the description below, or will be learned through the practice of the embodiments of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0051] Figure 1 It is one of the flowcharts of the quantum circuit generation method of certain embodiments of the present application;

[0052] Figure 2 It is a schematic diagram of the entity and data structure of the quantum knowledge base in certain embodiments of the present application;

[0053] Figure 3 is a schematic diagram of a quantum circuit generation process of certain embodiments of the present application;

[0054] Figure 4 This is the second flow chart of the quantum circuit generation method in some embodiments of the present application;

[0055] Figure 5 This is the third flow chart of the quantum circuit generation method of certain embodiments of the present application;

[0056] Figure 6 This is a fourth flow chart of a quantum circuit generation method according to certain embodiments of the present application;

[0057] Figure 7 This is the fifth flow chart of the quantum circuit generation method of certain embodiments of the present application;

[0058] Figure 8 This is the sixth flow chart of the quantum circuit generation method of certain embodiments of the present application;

[0059] Fig. 9 This is the seventh flow chart of the quantum circuit generation method of certain embodiments of the present application;

[0060] Fig.10 This is the eighth flow chart of the quantum circuit generation method of certain embodiments of the present application;

[0061] Fig.11 This is the ninth flow chart of the quantum circuit generation method of certain embodiments of the present application;

[0062] Fig.12 It is one of the flowcharts of the execution method of the quantum circuit of certain embodiments of the present application;

[0063] Fig.13 This is the second flow chart of the execution method of the quantum circuit in certain embodiments of the present application;

[0064] Fig.14 is a schematic diagram of a quantum circuit for Bell state preparation in certain embodiments of the present application;

[0065] Fig.15 It is a schematic diagram of the operating results of a quantum circuit prepared by Bell state in certain embodiments of the present application. DETAILED DESCRIPTION

[0066] The embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals represent the same or similar elements or elements having the same or similar functions from beginning to end. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the embodiments of the present application, and cannot be understood as limiting the embodiments of the present application.

[0067] Quantum computing based on quantum circuits has the ability to perform computing tasks that are difficult for classical computers to complete. Quantum computing uses the superposition and entanglement characteristics of quantum bits to significantly surpass the performance of traditional computers in certain computing tasks, especially in the fields of factorization, search algorithms, and quantum simulation. However, the generation of quantum circuits currently relies mainly on manual experience, and relevant technicians need to design quantum circuits by themselves. This requires operators to have a certain professional knowledge base, and the design process is prone to errors.

[0068] Based on the above questions, please refer to Figure 1 The embodiment of the present application provides a quantum circuit generation method based on a large language model, the method comprising:

[0069] 011: in response to the input quantum circuit generation information, obtaining a first target knowledge base from a pre-built quantum knowledge base according to the quantum circuit generation information;

[0070] 012: Based on the pre-trained large language model, generate a target quantum circuit according to the first target knowledge base and quantum circuit generation information.

[0071] The embodiment of the present application also provides a quantum circuit generation server, including a memory and a processor. The quantum circuit generation method based on a large language model of the embodiment of the present application can be implemented by the quantum circuit generation server of the embodiment of the present application. Specifically, a computer program is stored in the memory, and the processor is used to obtain a first target knowledge base from a pre-built quantum knowledge base according to the quantum circuit generation information in response to the input quantum circuit generation information. And based on the pre-trained large language model, a target quantum circuit is generated according to the first target knowledge base and the quantum circuit generation information.

[0072] The embodiment of the present application also provides a quantum circuit generation device. The resource access method of the embodiment of the present application can be implemented by the quantum circuit generation device of the embodiment of the present application. Specifically, the quantum circuit generation device includes an acquisition module and a generation module. The acquisition module is used to respond to the input quantum circuit generation information and obtain a first target knowledge base from a pre-built quantum knowledge base according to the quantum circuit generation information. The generation module is used to generate a target quantum circuit based on the pre-trained large language model according to the first target knowledge base and the quantum circuit generation information.

[0073] Specifically, a large language model refers to a large-scale language model (LLM), which is a deep learning model in the field of artificial intelligence. It is an advanced language processing server based on artificial intelligence technology that can understand and generate natural language text. This type of model is trained with a large amount of text data, has a very large number of parameters, has the ability to handle multiple tasks, and has a strong ability to understand context, so that it can complete new tasks based on a small number of example samples or even zero samples.

[0074] Quantum circuit refers to a computing model based on quantum bits and quantum gates, which describes the operation sequence between quantum bits and the connection mode of quantum gates to perform quantum computing tasks. Quantum circuits are composed of many quantum gates, which act on quantum bits in a specific order to achieve specific quantum computing functions or operation processes.

[0075] Quantum gate is the basic operation unit of quantum computing, which can transform the state of quantum bits and realize the processing of quantum information. The function of quantum gate is to create entanglement between quantum bits or change the superposition state of quantum bits.

[0076] Quantum Circuit for Information Generation refers to the relevant data information sent by users or other input devices for generating quantum circuits, including the language format, circuit style and other data information of quantum circuits.

[0077] Knowledge bases refer to databases that store a large amount of structured facts and information. This information is used by models to understand and generate more accurate and rich language expressions to answer questions or provide relevant knowledge. It usually includes data on entities, concepts, attributes, and the relationships between the three.

[0078] The quantum knowledge base refers to a pre-built knowledge base that includes a large amount of data information related to quantum computing. The quantum knowledge base in the implementation of this application includes a general knowledge base, a quantum language framework library, a quantum algorithm case library, and a quantum circuit optimization tool library. Please refer to Figure 2 , Figure 2 Schematic diagram of the entity and data structure of the quantum knowledge base. In some embodiments, the quantum knowledge base can also include other knowledge bases related to quantum computing, which are not limited here.

[0079] The general knowledge base includes the basic knowledge of quantum mechanics and quantum computing. Among them, quantum mechanics is the theoretical basis of quantum computing, which describes the working principles of quantum bits and quantum gates. The basic knowledge of quantum computing includes quantum bits, quantum gates, quantum circuits, quantum algorithms, etc.

[0080] The quantum language framework library refers to a resource library that contains quantum gate categories, language formats, and circuit samples supported by different types of quantum programming languages. It provides a convenient reference and tool set for large language models to help them learn and use different quantum programming languages, as well as design and implement quantum circuits. It should be noted that different types of quantum programming languages ​​refer to different quantum language frameworks, and different quantum language frameworks support different quantum gates. In addition, the same quantum circuit is expressed differently in different quantum language frameworks.

[0081] The quantum language framework library includes quantum language frameworks such as Qiskit, Cirq and Cqlib, etc. The actual quantum language framework library also includes more quantum language frameworks. Here, only the above three quantum language frameworks are used to illustrate the quantum language framework library in the implementation mode of this application. Among them, Qiskit supports single quantum gates such as X gate, Y gate, Z gate, H gate, S gate, T gate and two quantum gates such as CNOT gate, CX gate, CY gate, CZ gate, SWAP gate. Cirq supports single quantum gates such as X gate, Y gate, Z gate, H gate, S gate, T gate and two quantum gates such as CNOT gate, CZ gate. Cqlib supports single quantum gates such as X gate, Y gate, Z gate, H gate, S gate, T gate and two quantum gates such as CZ gate. It can be found that different quantum language frameworks support different quantum gates. It should be noted that in the implementation mode of this application, X gate, Y gate, Z gate, etc. are all quantum gates, and their respective functions and meanings are not specifically elaborated here.

[0082] In addition, the circuit formats of different quantum language frameworks are different. The following is an example of preparing quantum circuits using Bell states.

[0083] In the QASM quantum instruction language used by Qiskit, the circuit format of the Bell state quantum circuit is as follows:

[0084] ""

[0085] OPENQASM 2.0;

[0086] include "qelib1.inc";

[0087] qreg q[2]; / / Create a quantum register containing 2 qubits

[0088] creg c[2]; / / Create a classic register containing 2 classic bits

[0089] / / Apply the Hadamard gate to the first qubit

[0090] hq[0];

[0091] / / Apply CNOT gate, the first qubit is used as control bit, the second qubit is used as target bit

[0092] cx q[0],q[1];

[0093] / / Measure all qubits and store the results in classical registers

[0094] measure q[0]->c[0];

[0095] Measure q[1] -> c[1];

[0096] "″"

[0097] In the QCIS quantum instruction set used by Cirq, the circuit format of the Bell state preparation quantum circuit is as follows:

[0098] "″"

[0099] H Q00

[0100] H Q01

[0101] CZ Q00 Q01

[0102] H Q01

[0103] M Q00

[0104] M Q01

[0105] "″"

[0106] The quantum algorithm case library refers to a resource library that includes specific examples of quantum algorithms, application cases of quantum algorithms, and specific hardware implementation cases. It provides a rich learning and reference resource for large language models, helping large language models better understand the working principles, application scenarios, and actual implementation methods of quantum algorithms.

[0107] The quantum algorithm case library is a resource library that includes specific examples of quantum algorithms, application cases of quantum algorithms, and specific hardware implementation cases. A specific example of a quantum algorithm is Shor's algorithm. In the quantum algorithm case library, the data information related to Shor's algorithm is as follows:

[0108] Algorithm description: Shor's algorithm is a quantum algorithm proposed by Peter Shor in 1994. It can effectively factor large integers, which means it can break widely used public key encryption systems such as RSA encryption. The core of Shor's algorithm lies in its use of the quantum Fourier transform to find the periodicity of integers, thereby factoring out prime factors. Detailed steps:

[0109] Preprocessing: Ensure that the integer N to be factored is composite and N is not equal to a power of a prime number. Randomly select an integer a such that 1 < a < N and a is relatively prime to N.

[0110] Quantum computing part: Initialize the quantum register to be in a superposition state to represent all possible x values (x is the base of the modular exponentiation in subsequent calculations). For each x, calculate a^x mod N and store the result in the quantum register.

[0111] Quantum Fourier Transform: Performing a quantum Fourier transform (QFT) on the quantum register creates a superposition state that contains all the periodic information of a^x mod N.

[0112] Measurement: Measure the quantum register and get a specific value of y. This value of y is an indication of the periodicity of a^x mod N.

[0113] Classical calculation part: Use the measured y value to find the period r of a (that is, the order of N) through the continued fraction expansion. If the period r found is an even number and a^(r / 2)≠-1mod N, then the algorithm continues; otherwise, reselect a and repeat the above steps.

[0114] Factorization: Calculate gcd(a^(r / 2)+1,N) and gcd(a^(r / 2)-1,N). If the result of any of the above gcd is a non-trivial factor of N, then the algorithm successfully decomposes N; otherwise, reselect a and repeat the above steps.

[0115] Note: The success of Shor's algorithm depends on finding a suitable period r, which is not always guaranteed.

[0116] One quantum algorithm application case is encryption security assessment based on Shor's algorithm. In the quantum algorithm case library, the data information related to encryption security assessment based on Shor's algorithm is as follows:

[0117] Application description: The powerful ability of Shor's algorithm lies in its ability to crack the currently widely used public key encryption system, such as RSA encryption. Therefore, in the field of encryption security, Shor's algorithm can be used to evaluate the security of existing encryption systems and promote the advancement of encryption technology.

[0118] Detailed application case: Encryption security assessment service

[0119] Company background: An information security company that focuses on providing encryption security assessments and solutions.

[0120] Business requirement: With the development of quantum computing, the company needs to evaluate the security of the RSA encryption systems used by its customers and provide corresponding upgrade recommendations.

[0121] Specific steps:

[0122] First, simulate the attack: use Shor's algorithm to try to decompose the customer's RSA key on a simulated quantum computer. Step 1: Get the RSA public key (N, e) from the customer. Step 2: Run Shor's algorithm on the simulated quantum computer to try to find the prime factors of N. Step 3: Record the time and resources required for the decomposition.

[0123] Next, security assessment: Based on the results of the simulated attack, evaluate the security of the customer's RSA encryption system under potential quantum attacks. Step 1: Analyze whether the decomposition attempt of the Shor algorithm is successful and whether the required resources are within the capabilities of current quantum computers. Step 2: If the Shor algorithm successfully decomposes N, the encryption system is considered to have security risks; otherwise, the system is considered to be temporarily secure.

[0124] Finally, the following recommendations are made: Based on the evaluation results, provide customers with suggestions for upgrading their encryption systems. Step 1: For systems at risk, recommend customers to upgrade to more secure encryption algorithms, such as lattice-based encryption algorithms or hash-based encryption algorithms. Step 2: For temporarily secure systems, recommend customers to continue to monitor the development of quantum computing and prepare for encryption upgrades in the future.

[0125] A specific hardware implementation case is to implement Shor's algorithm on IBM Quantum System One. In the quantum algorithm case library, the data information related to the implementation of Shor's algorithm on IBM Quantum System One is as follows:

[0126] Hardware background: IBM Quantum System One is IBM's first commercial quantum computing system, which contains a quantum processor with a fixed physical topology. Suppose we use a processor with 20 qubits and 16 connections between qubits.

[0127] Physical topology considerations: The connections between qubits are not fully connected, so we need to design quantum circuits based on the actual connection diagram. We need to minimize the distance between qubits to reduce the error rate in quantum gate operations.

[0128] Specific implementation steps:

[0129] Step 1: Select appropriate qubits: According to the physical topology of IBM Quantum System One, select a group of adjacent qubits to implement Shor's algorithm. For example, select qubits 0, 1, 2, 3, and 4 (assuming that the connections between these qubits meet the algorithm requirements).

[0130] Step 2: Initialize the quantum circuit: Use qubit 0 as the control bit and qubit 1 as the target bit to implement the CNOT gate to create an entangled state. Perform Hadamard transformation on qubits 2, 3, and 4 to put them in a superposition state.

[0131] Step 3: Implement the Quantum Fourier Transform (QFT): Due to the limitations of the physical topology, we need to adjust the implementation of the QFT to ensure that only connections between adjacent qubits are used. To implement the QFT using qubits 2, 3, and 4, it may be necessary to insert additional SWAP gates to adjust the order of the qubits to fit the physical topology.

[0132] Step 4: Perform sequential measurements: measure qubits 2, 3, and 4 to estimate the period r of N. Since qubits 0 and 1 are entangled, measuring them will give phase information related to the period r.

[0133] Step 5, classical post-processing: Use the measurement results to perform the classical continued fraction algorithm to find the prime factors of N.

[0134] Example code (pseudocode):

[0135] # Assume qubits 0-4 are adjacent and can perform the required quantum gates

[0136] qc=QuantumCircuit(5)

[0137] # Initialize qubits

[0138] qc.h(2)

[0139] qc.h(3)

[0140] qc.h(4)

[0141] # Implement CNOT gate to create entangled state

[0142] qc.cx(0,1)

[0143] # Implement QFT, considering physical topology

[0144] #...(insert QFT implementation, may require SWAP gate)

[0145] #Perform measurement

[0146] qc.measure([2,3,4],[2,3,4])

[0147] qc.measure([0,1],[0,1])

[0148] #Running the circuit on IBM Quantum System One

[0149] backend=IBMQ.get_backend('ibmq_system_one')

[0150] job = execute(qc,backend)

[0151] result = job.result()

[0152] #Classic post-processing

[0153] #...(Use result.get_counts() to get the measurement results and perform the continued fraction algorithm)

[0154] The quantum circuit optimization tool library refers to a collection of resources for quantum circuit optimization and improvement, including quantum circuit mapping tools, quantum circuit optimization algorithms, and quantum gate-level optimization tools. These tools and algorithms can improve the efficiency and performance of quantum circuits, reduce the demand for computing resources, and reduce the error rate.

[0155] Among them, quantum circuit mapping tools refer to the need to map the abstract quantum bits in the algorithm to the positions of physical quantum bits on the actual hardware due to the topological limitations of quantum hardware. This usually requires the algorithm designer or mapping algorithm to decide how to map logical quantum bits to physical quantum bits to minimize the required swap operations (swap gates) and the total number of operations. Quantum circuit optimization algorithms include swap optimization and simulated annealing. Swap optimization refers to optimizing the number and position of swap gates when mapping quantum bits to physical quantum bits to adapt to the connection topology of quantum hardware. Simulated annealing refers to a heuristic search algorithm for low-cost implementation of quantum circuits. Quantum gate-level optimization tools include basic gate decomposition, quantum gate synthesis, gate fusion, and gate cancellation. Basic gate decomposition refers to decomposing advanced quantum gates into a set of basic quantum gates, such as decomposing any single-qubit gate into a rotation gate around the X, Y, and Z axes, and decomposing a two-qubit gate into a combination of a CNOT gate and a single-qubit gate. Quantum gate synthesis refers to the use of algorithms such as the Solovay-Kitaev theorem to synthesize arbitrary single-qubit gates, approximating the target gate through a sequence of basic rotation gates. Gate fusion refers to the merging of consecutive single-qubit gates into an equivalent gate to reduce the number of gates. Gate elimination refers to the identification and elimination of quantum gate pairs that cancel each other out, such as two consecutive rotation gates on a qubit may cancel each other out. It should be noted that the quantum circuit mapping tools, quantum circuit optimization algorithms, and quantum gate-level optimization tools in the quantum circuit optimization tool library include not only those mentioned above, but also other quantum circuit mapping tools, quantum circuit optimization algorithms, and quantum gate-level optimization tools, which are not limited here.

[0156] The quantum computing research paper database refers to a knowledge base that includes a large number of academic papers, research reports and review articles in the field of quantum computing.

[0157] The first target knowledge base refers to a knowledge base associated with quantum circuit generation information obtained by processing quantum circuit generation information from a pre-built quantum knowledge base through certain retrieval methods.

[0158] See also Figure 3 , Figure 3 A schematic diagram of the quantum circuit generation process in the quantum circuit generation server. After receiving the quantum generation information input by the user or other input device, the server will analyze the input quantum circuit generation information, and then obtain the knowledge base related to the quantum circuit generation information from the pre-built quantum knowledge base according to the results of the analysis and processing, that is, the first target knowledge base. For example, if the server derives from the quantum circuit generation information that it needs to provide the user or other input device with the basic knowledge of quantum mechanics or quantum computing and use the QASM quantum instruction language to generate a quantum circuit, then the server will use the general knowledge base, quantum language framework library, and quantum circuit optimization tool library as the first target knowledge base. Finally, the server outputs the relevant quantum computing or quantum mechanics knowledge to the user or other input device and generates the relevant quantum circuit. If the server derives from the quantum circuit generation information that it needs to provide the user or other input device with the application case of Shor's algorithm in cryptographic security and use the QASM quantum instruction language to generate a quantum circuit, then the server will use the general knowledge base, quantum language framework library, quantum algorithm case library, and quantum circuit optimization tool library as the first target knowledge base. Finally, the server outputs the cryptographically secure application case of Shor's algorithm to the user or other input device and generates the relevant quantum circuit.

[0159] After obtaining the first target knowledge base, based on the pre-trained large language model, the server generates a target quantum circuit according to the first target knowledge base and quantum circuit generation information.

[0160] In summary, the present application provides a quantum circuit generation method based on a large language model. First, in response to the input quantum circuit generation information, a first target knowledge base is obtained from a pre-constructed quantum knowledge base according to the quantum circuit generation information, and the pre-constructed quantum knowledge base provides enough effective information in the field of quantum computing. Then, based on the pre-trained large language model, a target quantum circuit is generated according to the first target knowledge base and the quantum circuit generation information. In this way, in the field of quantum computing, data information related to the quantum circuit generation information is retrieved from the pre-constructed quantum knowledge base, and the relevant data information is processed by the large language model to generate a circuit that conforms to the rules of quantum computing, thereby reducing errors in the design process and improving the accuracy of the generated quantum circuit. In addition, by combining a large language model with a pre-constructed rich quantum knowledge base, quantum circuits that meet user needs can be quickly generated, greatly reducing the manual labor and time costs in the traditional quantum circuit design process.

[0161] See also Figure 4 In some embodiments, the method further comprises:

[0162] 013: Based on a preset retrieval technology, a target knowledge item associated with the quantum circuit generation information is obtained from the first target knowledge base according to the quantum circuit generation information.

[0163] In some embodiments, the acquisition module is further configured to acquire target knowledge items associated with the quantum circuit generation information from the first target knowledge base based on a preset retrieval technology according to the quantum circuit generation information.

[0164] In some embodiments, the processor is further configured to obtain, based on a preset retrieval technology and according to the quantum circuit generation information, a target knowledge item associated with the quantum circuit generation information from the first target knowledge base.

[0165] Specifically, the preset retrieval technology refers to the use of mathematical models and algorithms to convert text information into operable and comparable vector representations, thereby achieving efficient retrieval and information extraction. In the implementation of the present application, a vector model is used as the preset retrieval technology, which is a similarity calculation method.

[0166] The target knowledge item refers to a knowledge item related to quantum circuit generation information retrieved from the acquired first target knowledge base through a preset retrieval technology.

[0167] The server analyzes and processes the acquired quantum circuit generation information, and then searches the confirmed first target knowledge base through a preset search technology to acquire target knowledge items associated with the quantum circuit generation information.

[0168] In this way, by analyzing the quantum circuit generation information, the system can extract relevant target knowledge items from the first target knowledge base, thereby ensuring that the generated circuit design closely meets the user's needs and improving the accuracy and efficiency of quantum circuit generation.

[0169] See also Figure 5 In some embodiments, the method further comprises:

[0170] 014: Generate a template based on the preset prompt word, perform splicing processing based on the quantum circuit generation information and the target knowledge items, and determine the first target prompt word.

[0171] In some embodiments, the quantum circuit generation device further includes a splicing module, which is used to generate a template based on a preset prompt word, perform splicing processing according to the quantum circuit generation information and the target knowledge item, and determine the first target prompt word.

[0172] In some embodiments, the processor is further configured to generate a template based on a preset prompt word, perform splicing processing based on quantum circuit generation information and target knowledge items, and determine a first target prompt word.

[0173] Specifically, the preset prompt word generation template refers to a framework for guiding a large language model to generate specific types of content. The preset prompt word generation template can be adjusted and expanded according to specific needs to adapt to different quantum circuit generation tasks. For example, the prompt word: Please generate a quantum circuit suitable for solving [specific problem] according to the principle of the [quantum algorithm name] algorithm. Example: Please solve the problem of matching the "AT" sequence in the "ATGCGCTGTACGT" gene sequence according to the principle of the Grover algorithm. Or, the prompt word: Please verify whether the following quantum circuit description conforms to the basic rules of quantum computing and point out any potential errors or inconsistencies: [quantum circuit description]. Example: Please verify whether the following quantum circuit description conforms to the basic rules of quantum computing and point out any potential errors or inconsistencies: A 3-qubit quantum circuit containing a T gate and a CNOT gate. It can also be, the prompt word: For the following quantum circuit description, please propose an optimization plan to reduce the number of quantum gates required: [quantum circuit description]. Example: For the following quantum circuit description, please propose an optimization scheme to reduce the number of quantum gates required: a 4-qubit quantum circuit containing Hadamard gates and CNOT gates.

[0174] Based on the preset prompt word generation template, the server splices the specific quantum circuit generation information such as the type of quantum algorithm to be executed and the expected output, and the knowledge items related to the quantum circuit generation information such as the description of the quantum algorithm and the design principles of the quantum circuit, and combines the quantum circuit generation information with the target knowledge items to obtain the first target prompt word.

[0175] In this way, based on the preset prompt word generation template, it is possible to accurately splice the quantum circuit generation information and the target knowledge items to generate guiding prompt words, which not only ensures that the generated quantum circuit is theoretically accurate and feasible, but also ensures that the quantum circuit generated by the large language model meets user needs.

[0176] See also Figure 6 In some embodiments, step 012 (generating a target quantum circuit based on a pre-trained large language model and the first target knowledge base and quantum circuit generation information) includes:

[0177] 0121: Based on the large language model, generate the target quantum circuit according to the first target prompt word.

[0178] In some embodiments, the generation module is further configured to generate a target quantum circuit according to the first target prompt word based on the large language model.

[0179] In some embodiments, the processor is further configured to generate a target quantum circuit according to the first target prompt word based on the large language model.

[0180] Specifically, a large language model refers to a large language model that is pre-trained based on certain text data. In some embodiments, the training method is as follows. First, a large amount of data information related to quantum computing, quantum mechanics, quantum circuits, and quantum circuits needs to be collected. Then, the collected data information is pre-processed, including steps such as cleaning, word segmentation, and tokenization. Cleaning refers to removing irrelevant information. Word segmentation refers to dividing the text into words or vocabulary units. Tokenization refers to converting each word or vocabulary unit into a digital form that the model can understand. Then, the pre-processed data information is used to train the large language model. During the training process, the large language model will try to predict the next word or token in the text sequence, and by continuously adjusting the parameters inside the large language model, the prediction of the large language model is made as close to the actual data as possible.

[0181] The target quantum circuit refers to the quantum circuit generated by the server and sent to the user or input device.

[0182] The large language model in the server will parse the first target prompt word, understand the key information, and then design a target quantum circuit based on this key information.

[0183] In this way, based on the powerful capabilities of the large language model, generating the target quantum circuit according to the first target prompt word can not only ensure that the generated quantum circuit is theoretically accurate and feasible, but also ensure that the quantum circuit generated by the large language model meets user needs.

[0184] See also Figure 7, the method further comprises:

[0185] 015: Check the target quantum circuit to determine the correctness of the target quantum circuit.

[0186] In some embodiments, the quantum circuit generation device further includes a processing module, and the processing module is used to perform a check process on the target quantum circuit to determine the correctness of the target quantum circuit.

[0187] In some embodiments, the processor is further configured to perform a check process on the target quantum circuit to determine the correctness of the target quantum circuit.

[0188] Specifically, after generating the target quantum circuit, the server will perform a check process on the target quantum circuit to determine the correctness of the target quantum circuit. The check process includes a quantum circuit normative check, a logical consistency check, and a physical feasibility check.

[0189] In this way, it can be ensured that the generated target quantum circuit is not only correct in theory, but also feasible and effective in the actual quantum computing environment, thereby improving the quality and reliability of the generated quantum circuit.

[0190] See also Figure 8 In some embodiments, step 015 (checking the target quantum circuit) includes:

[0191] 0151: In response to the quantum circuit generation information, determining a target quantum circuit specification corresponding to the target quantum circuit;

[0192] 0152: Confirm whether the target quantum circuit meets the target quantum circuit specification;

[0193] 0153: When the target quantum circuit meets the target quantum circuit specification, confirm whether the target quantum circuit meets the logical consistency;

[0194] 0154: Under the condition that the target quantum circuit satisfies logical consistency, confirm whether the target quantum circuit satisfies physical feasibility;

[0195] 0155: Confirm that the target quantum circuit is correct when the target quantum circuit meets physical feasibility.

[0196] In some embodiments, the quantum circuit generation device further includes a determination module. The confirmation module is used to determine the target quantum circuit specification corresponding to the target quantum circuit in response to the quantum circuit generation information. And confirm whether the target quantum circuit meets the target quantum circuit specification. And if the target quantum circuit meets the target quantum circuit specification, confirm whether the target quantum circuit meets logical consistency. The confirmation module is also used to confirm whether the target quantum circuit meets physical feasibility if the target quantum circuit meets logical consistency. And if the target quantum circuit meets physical feasibility, confirm that the target quantum circuit is correct.

[0197] In certain embodiments, the processor is further configured to determine, in response to the quantum circuit generation information, a target quantum circuit specification corresponding to the target quantum circuit. And confirm whether the target quantum circuit satisfies the target quantum circuit specification. And if the target quantum circuit satisfies the target quantum circuit specification, confirm whether the target quantum circuit satisfies logical consistency. The processor is further configured to confirm whether the target quantum circuit satisfies physical feasibility if the target quantum circuit satisfies logical consistency. And if the target quantum circuit satisfies physical feasibility, confirm that the target quantum circuit is correct.

[0198] Specifically, the target quantum circuit specification refers to the quantum circuit format and quantum circuit syntax of the quantum programming language determined in the quantum circuit generation information input by the user or other input device. If the user or other input device does not set the quantum circuit format and quantum circuit syntax in the quantum circuit generation information, the default quantum circuit format and quantum circuit syntax are used.

[0199] Quantum circuit format and syntax verification refers to verifying whether the quantum circuit description follows the format rules and syntax rules of the quantum programming language used. First, it is usually checked whether there are problems in the quantum circuit description. Next, it is checked whether the representation of the quantum gates in the circuit is correct, including the type of gates, parameters, and target quantum bits. Incorrect representation of quantum gates may cause the circuit to fail to execute correctly. Then, verify whether the quantum bits used in the circuit are correct, including the number of quantum bits, initialization and measurement operations. Incorrect use of quantum bits may cause abnormal circuit behavior. Finally, check whether there are appropriate comments and documentation in the circuit description to help understand the design and function of the circuit. In some embodiments, there may be other quantum circuit format and syntax verification methods, which are not limited here.

[0200] In some implementations, quantum circuit format and syntax verification may fail for the following reasons, including missing required brackets in the quantum circuit description, using undefined quantum gates in the quantum circuit description, and quantum bit index out of range.

[0201] Logical consistency refers to whether the logical structure of the quantum circuit is correct and whether the various parts of the circuit can work together to achieve the expected functions. First, it is usually checked whether the quantum gates applied in the circuit are correct and whether they are arranged in the correct order. The wrong application or order of quantum gates may cause the circuit to fail to execute correctly. Subsequently, it is checked whether the circuit can achieve its designed functions, such as quantum superposition, quantum entanglement, or basic operations of quantum computing. In some embodiments, there may be other ways to verify logical consistency, which are not limited here.

[0202] In some embodiments, the reason why the verification of the logical consistency of a quantum circuit fails may be that there are two consecutive Hadamard gates on the same quantum bit in the quantum circuit, which will cancel each other out, but there is no logically required operation afterwards. Or the quantum circuit attempts to apply a CNOT gate on the control bit and the target bit at the same time, but there is no connection between them.

[0203] Physical feasibility verification refers to the process of checking whether the target quantum circuit can be executed and implemented on actual quantum computing hardware. Since quantum computers are subject to physical limitations, such as the coherence time of quantum bits, the accuracy and connection limitations of quantum gates, etc., the design of quantum circuits must take these practical factors into account.

[0204] The physical feasibility verification method is as follows. First, it is usually checked whether the quantum bit connections in the target quantum circuit meet the connection restrictions of the target hardware. In many quantum hardware, not all quantum bits can interact directly, so the design of the quantum circuit must follow a specific connection topology. Next, the error rate of the quantum gates used in the target quantum circuit is evaluated to ensure that the overall performance of the target quantum circuit is not seriously affected by gate errors. Then, check whether the operation of the target quantum circuit is completed within the coherence time range of the quantum bit, which limits the time window of the quantum operation. Then evaluate the depth of the target quantum circuit, that is, the number of continuous quantum gate operations, and the width, that is, the number of quantum bits operated simultaneously, to ensure that they are within the limitations of the hardware. Finally, ensure that the design of the target quantum circuit meets the characteristics of the target quantum hardware, including quantum bit types such as superconducting quantum bits, ion trap quantum bits, and available quantum gate sets. In some embodiments, there may be other ways to verify physical feasibility, which are not limited here.

[0205] In some embodiments, the reason why the quantum circuit logic consistency verification fails may be that the quantum circuit requires the execution of a CNOT gate between quantum bits that are not physically connected, or the quantum circuit uses a quantum gate that is not supported by the target quantum hardware.

[0206] First, in response to the quantum circuit generation information, the server determines the target quantum circuit specification corresponding to the target quantum circuit. Next, the server confirms whether the target quantum circuit meets the target quantum circuit specification. Then, if the target quantum circuit meets the target quantum circuit specification, the server confirms whether the target quantum circuit meets logical consistency. Subsequently, if the target quantum circuit meets logical consistency, the server confirms whether the target quantum circuit meets physical feasibility. Finally, if the target quantum circuit meets physical feasibility, the server confirms that the target quantum circuit is correct. It should be noted that only when all three verifications are passed, the server will confirm that the target quantum circuit is correct.

[0207] In this way, through multiple checks, it is ensured that the generated target quantum circuit is not only correct in mathematical model and logical structure, but also can be effectively executed on actual quantum hardware and conform to the constraints of physical implementation, thereby improving the practical application value and reliability of the generated target quantum circuit.

[0208] See also Fig. 9 , the method further comprises:

[0209] 016: When it is determined that the target quantum circuit is correct, the target quantum circuit is subjected to quantum gate optimization processing to obtain an optimized target quantum circuit.

[0210] In some embodiments, the quantum circuit generation device further includes an optimization module, which is used to perform quantum gate optimization processing on the target quantum circuit to obtain an optimized target quantum circuit when it is determined that the target quantum circuit is correct.

[0211] In some embodiments, the processor is further configured to, when determining that the target quantum circuit is correct, perform quantum gate optimization processing on the target quantum circuit to obtain an optimized target quantum circuit.

[0212] Specifically, when the target quantum circuit is determined to be correct, the server first reduces the total number of quantum gates required in the circuit by merging or replacing quantum gates. Then, the server adjusts the order of quantum gates to minimize the interaction and interference between quantum bits. In this way, the server obtains the optimized target quantum circuit.

[0213] In this way, by performing quantum gate optimization processing on the target quantum circuit, the target quantum circuit has fewer quantum gate operations, lower error rate, and higher execution efficiency while maintaining its original function.

[0214] See also Fig.10 In some embodiments, the method further comprises:

[0215] 0156: Confirm that the target quantum circuit is abnormal when the target quantum circuit does not meet the target quantum circuit specification or the target quantum circuit does not meet the logical consistency or the target quantum circuit does not meet the physical feasibility.

[0216] In some embodiments, the confirmation module is further used to confirm that the target quantum circuit is abnormal if the target quantum circuit does not meet the target quantum circuit specification or the target quantum circuit does not meet the logical consistency or the target quantum circuit does not meet the physical feasibility.

[0217] In certain embodiments, the processor is further configured to confirm that the target quantum circuit is abnormal if the target quantum circuit does not satisfy a target quantum circuit specification, the target quantum circuit does not satisfy logical consistency, or the target quantum circuit does not satisfy physical feasibility.

[0218] Specifically, if the target quantum circuit does not meet the target quantum circuit specification, that is, if the grammatical rules of the quantum programming language are incorrect, the quantum gates are incorrectly applied, or the quantum bits are used irrationally, then the target quantum circuit is confirmed to be abnormal.

[0219] If the target quantum circuit does not satisfy logical consistency, that is, if there is a contradiction or inconsistency in any aspect including the order of quantum gates, the connection between quantum bits and the overall layout of the circuit, then the target quantum circuit is confirmed to be abnormal.

[0220] If the target quantum circuit does not meet physical feasibility, that is, if there are insurmountable limitations or problems in any of the aspects such as the connectivity of quantum bits, the error rate of quantum gates, the coherence time of quantum bits, the depth and width of the circuit, the error detection and correction mechanism, and hardware compatibility, then the target quantum circuit is confirmed to be abnormal.

[0221] In this way, the server identifies anomalies in the target quantum circuit, thereby ensuring that the generated quantum circuit is not only correct in theory but also feasible and effective in actual quantum computing environments.

[0222] See also Fig.11 In some embodiments, the method further comprises:

[0223] 017: When the target quantum circuit is abnormal, the generated quantum circuit generates error information;

[0224] 018: Generate a template based on a preset prompt word, generate a second target prompt word according to the quantum circuit to generate error information and the first target prompt word;

[0225] 019: Obtain the second target knowledge base from the pre-built quantum knowledge base according to the second target prompt word;

[0226] 020: Based on the large language model, generate the second target quantum circuit according to the second target knowledge base and the second target prompt word;

[0227] 021: Check and process the second target quantum circuit until the second target quantum circuit is correct, or the number of times the quantum circuit generates error information reaches a preset maximum number of times.

[0228] In some embodiments, the generation module is used to generate quantum circuit generation error information when the target quantum circuit is abnormal. The generation module is also used to generate a template based on a preset prompt word, and generate a second target prompt word according to the quantum circuit generation error information and the first target prompt word. The acquisition module is also used to obtain a second target knowledge base from a pre-built quantum knowledge base according to the second target prompt word. The generation module is also used to generate a second target quantum circuit based on the large language model according to the second target knowledge base and the second target prompt word. The processing module is also used to check and process the second target quantum circuit until the second target quantum circuit is correct or the number of times the quantum circuit generates error information reaches a preset maximum number of times.

[0229] In some embodiments, the processor is used to generate quantum circuit generation error information when the target quantum circuit is abnormal. And based on the preset prompt word, a template is generated, and a second target prompt word is generated according to the quantum circuit generation error information and the first target prompt word. And a second target knowledge base is obtained from a pre-built quantum knowledge base according to the second target prompt word. The processor is also used to generate a second target quantum circuit based on the large language model according to the second target knowledge base and the second target prompt word. And the second target quantum circuit is checked and processed until the second target quantum circuit is correct or the number of times the quantum circuit generates error information reaches a preset maximum number of times.

[0230] Specifically, the second target prompt word refers to a prompt word obtained by splicing the quantum circuit generation error information and the first target prompt word based on a preset prompt word generation template.

[0231] The second target knowledge base refers to a required knowledge base that is re-determined from the pre-constructed quantum knowledge base according to the second target prompt word.

[0232] The preset maximum number of generation times refers to the preset maximum number of times a quantum circuit generates erroneous information.

[0233] When the target quantum circuit is confirmed to be abnormal, the server will generate quantum circuit generation error information.

[0234] For example, if the cause of the target quantum circuit anomaly is "missing required parentheses in the quantum circuit description", the generated quantum circuit generation error message may be "Syntax Error: Missing parenthesis at line 10.". If the cause of the target quantum circuit anomaly is "the quantum circuit description uses an undefined quantum gate", the generated quantum circuit generation error message may be "Syntax Error: Undefined quantum gate 'QGateX' at line 5.". If the cause of the target quantum circuit anomaly is "the quantum bit index is out of range", the generated quantum circuit generation error message may be "Syntax Error: Quantum bit index out of range (requested qubit 10, but only 5 qubits available) at line 7.".

[0235] If the cause of the target quantum circuit anomaly is "there are two consecutive Hadamard gates on the same quantum bit in the quantum circuit, which will cancel each other, but there is no logically required operation afterwards", then the generated quantum circuit generation error signal may be "Logical Inconsistency: Redundant Hadamard gates on qubit 2atlines15and 16.". If the cause of the target quantum circuit anomaly is "the quantum circuit attempts to apply CNOT gates on the control bit and the target bit at the same time, but there is no connection between them", then the generated quantum circuit generation error signal may be "LogicalError: Attempt to apply CNOT gate between non-adjacent qubits 0and 3atline22.".

[0236] If the cause of the target quantum circuit anomaly is "the quantum circuit requires the execution of a CNOT gate between physically unconnected qubits", then the generated quantum circuit generation error signal may be "Physical Infeasibility: CNOT gate cannot be implemented between disconnected qubits 1and 4 on the target hardware.".

[0237] If the cause of the target quantum circuit anomaly is "the quantum circuit uses a quantum gate that is not supported by the target quantum hardware", then the generated quantum circuit generation error message may be "Hardware Incompatibility: Quantum gate 'T' is not supported by the target quantum processor at line 30.".

[0238] Subsequently, a template is generated based on a preset prompt word, and a second target prompt word is generated according to the quantum circuit generation error information and the first target prompt word. Next, a second target knowledge base is obtained from a pre-built quantum knowledge base according to the second target prompt word. Then, based on the large language model, a second target quantum circuit is generated according to the second target knowledge base and the second target prompt word. Finally, the generated second target quantum circuit is checked and processed, including format and syntax verification, logical consistency verification, physical feasibility verification, etc., to ensure the correctness and feasibility of the second target quantum circuit. If the second target quantum circuit is still abnormal, the server will continue to generate a new quantum circuit generation error message and repeat the above steps until the correct quantum circuit is generated or the preset maximum number of generation times is reached.

[0239] In this way, when the target quantum circuit is abnormal, through continuous error detection, feedback and correction, we can gradually approach a correct and effective quantum circuit design, thereby ensuring that the generated quantum circuit is not only accurate in theory, but also efficient and reliable in actual quantum computing applications, thereby improving the overall performance and stability of the quantum circuit.

[0240] See also Fig.12 The embodiment of the present application provides a method for executing a quantum circuit, wherein the quantum circuit is obtained based on the above-mentioned quantum circuit generation method, and the method comprises:

[0241] 031: Determine the target computing power resources based on the information generated by the quantum circuit;

[0242] 032: Process the quantum circuit according to the target computing power resources to obtain the target quantum execution result.

[0243] The embodiment of the present application also provides a quantum circuit generation server, including a memory and a processor. The execution method of the quantum circuit of the embodiment of the present application can be implemented by the quantum circuit generation server of the embodiment of the present application. Specifically, a computer program is stored in the memory, and the processor is used to determine the target computing power resources according to the quantum circuit generation information. And the quantum circuit is processed according to the target computing power resources to obtain the target quantum execution result.

[0244] The embodiment of the present application also provides a quantum circuit execution device. The information generation method of the embodiment of the present application can be implemented by the quantum circuit execution device of the embodiment of the present application. Specifically, the quantum circuit execution device includes a determination module and a processing module. The determination module is used to generate information based on the quantum circuit and determine the target computing power resources. The processing module is used to process the quantum circuit according to the target computing power resources to obtain the target quantum execution result.

[0245] Specifically, the target computing power resources refer to the computing power resources determined by the server to be allocated to the quantum circuit generated according to the quantum circuit generation information after analyzing the quantum circuit generation information, including quantum computing physical machines and quantum computing simulators.

[0246] First, the server analyzes the quantum circuit generation information to determine the target computing resources, that is, according to the complexity of the generated quantum circuit and the required computing power, the target computing resources required to execute the circuit are determined. Then, according to the determined target computing resources, the quantum circuit is processed and the target quantum execution result is obtained. The target quantum execution result may include the evolution of the quantum state, the formation of quantum entanglement, the output of the quantum algorithm, etc., which depends on the design and function of the circuit and is not limited here.

[0247] In summary, the embodiments of the present application provide a method for executing a quantum circuit. First, the target computing power resources are determined according to the quantum circuit generation information. Then, the quantum circuit is processed according to the target computing power resources to obtain the target quantum execution result. In this way, the need for manual configuration and intervention is reduced through the automated process, thereby reducing the errors that may occur when manually configuring parameters and improving the correctness and reliability of quantum circuit execution.

[0248] See also Fig.13 In some embodiments, step 031 (determining target computing resources according to quantum circuit generation information) includes:

[0249] 0311: Extract information generated by quantum circuits and determine operating parameters;

[0250] 0312: Determine the target computing resources based on the operating parameters.

[0251] In some embodiments, the determination module is used to extract quantum circuit generation information and determine operating parameters. The determination module is also used to determine target computing resources based on the operating parameters.

[0252] In some embodiments, the processor is further configured to extract information generated by the quantum circuit, determine operating parameters, and determine target computing resources based on the operating parameters.

[0253] Specifically, the server first analyzes the quantum circuit generation information, such as the number of quantum bits, the type and number of quantum gates, the depth and width of the circuit, etc. It also extracts operating parameters from the quantum circuit generation information, such as the quantum computing device specified by the user or other input device. If the quantum computing device is not explicitly specified, the system will automatically adopt the preset default configuration.

[0254] Subsequently, the generated quantum circuit is combined with the extracted operation parameters, and the quantum circuit is submitted and started by calling the corresponding interface. After the quantum circuit is completed, the server outputs the operation result of the quantum circuit.

[0255] In this way, after analyzing and processing the information generated by the quantum circuit, the server can determine the optimal operating parameters and target computing power resources based on the specific needs of the quantum circuit, which helps to improve the degree of automation in quantum circuit design and ensure that the circuit can be executed efficiently and accurately on actual quantum computing hardware.

[0256] The following is an example to illustrate the above-mentioned quantum circuit generation method based on a large language model and the quantum circuit execution method. The prompt word entered by the user is "Please use the quantum computer Xuanyuan-1 to execute the quantum circuit prepared by Bell state".

[0257] The quantum circuit generation server first determines in the pre-built quantum knowledge base that the quantum knowledge base required for generating the quantum circuit for Bell state preparation is the quantum language framework library, quantum algorithm case library, and quantum circuit optimization tool library. Subsequently, based on the keyword similarity calculation method, the quantum generation server searches for the quantum language framework library that is compatible with Xuanyuan-1, and searches for specific examples of algorithms and specific hardware implementation cases that are compatible with Bell state preparation in the quantum algorithm case library. It also searches for quantum circuit mapping tools, quantum circuit optimization algorithms, and quantum gate-level optimization tools that are compatible with Bell state preparation in the quantum circuit optimization tool library. In this way, based on the above steps, the target knowledge items associated with Bell state preparation are obtained.

[0258] Next, the quantum circuit generation server generates a template based on the preset prompt words, and splices the target knowledge entry and the prompt words entered by the user, "Please use the quantum computer Xuanyuan-1 to execute the quantum circuit prepared in Bell state", to form a complete quantum circuit construction request.

[0259] Then, the quantum circuit construction request will be submitted to the pre-trained large language model, which will generate the corresponding Bell state preparation quantum circuit based on the spliced ​​information. Fig.14 The schematic diagram of the quantum circuit for preparing the generated Bell state is as follows Fig.14 shown.

[0260] Then, the quantum circuit generation server checks and processes the Bell state prepared quantum circuit, namely, performs quantum circuit specification check, logical consistency check and physical feasibility check.

[0261] After confirming that there is no abnormality in the quantum circuit prepared in Bell state, the quantum circuit is submitted to the quantum circuit execution module in the quantum circuit generation server for operation. The quantum circuit execution module first combines the prompt word entered by the user with the preset prompt template, and then uses a large-scale language model to extract the required operating parameters from the prompt word submitted by the user, such as the target quantum computing device, including quantum computing physical machine and quantum computing simulator. It can be found that the prompt word submitted by the user "Please use the quantum computer Xuanyuan No. 1 to execute the quantum circuit prepared in Bell state" does not specify the target quantum computing device, and the quantum circuit execution module will automatically adopt the preset default configuration.

[0262] Next, the generated Bell state preparation quantum circuit is merged with the extracted operating parameters, and the quantum circuit is submitted to start execution by calling the corresponding interface.

[0263] Finally, the operation results of the quantum circuit prepared by Bell state are obtained. Fig.15 The schematic diagram of the operation results of the Bell state quantum circuit is as follows: Fig.15 shown.

[0264] The present application also provides a computer-readable storage medium containing a computer program. When the computer program is executed by one or more processors, the one or more processors execute the method of the present application.

[0265] It is understood that a computer program includes computer program code. The computer program code may be in source code form, object code form, executable file or some intermediate form. Computer readable storage media may include: any entity or device capable of carrying computer program code, recording medium, USB flash drive, mobile hard disk, magnetic disk, optical disk, computer memory, read-only memory (ROM), random access memory (RAM), and software distribution medium.

[0266] In the description of this specification, the descriptions with reference to the terms "specifically", "further", "particularly", "understandably", etc. are intended to mean that the specific features, structures, materials or characteristics described in conjunction with the embodiments or examples are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms are not intended to refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, unless they are contradictory.

[0267] Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, fragment or portion of code that includes one or more executable instructions for implementing the steps of a specific logical function or process, and the scope of the preferred embodiments of the present application includes alternative implementations in which functions may not be performed in the order shown or discussed, including performing functions in a substantially simultaneous manner or in the reverse order depending on the functions involved, which should be understood by technicians in the technical field to which the embodiments of the present application belong.

[0268] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the present application. Ordinary technicians in this field can change, modify, replace and modify the above embodiments within the scope of the present application.

Claims

1. A quantum circuit generation method based on a large language model, characterized in that: The method comprises: In response to the input quantum circuit generation information, obtaining a first target knowledge base from a pre-constructed quantum knowledge base according to the quantum circuit generation information; Based on the pre-trained large language model, a target quantum circuit is generated according to the first target knowledge base and the quantum circuit generation information.

2. The quantum circuit generation method according to claim 1, characterized in that: The method further comprises: Based on a preset retrieval technology, a target knowledge item associated with the quantum circuit generation information is acquired from the first target knowledge base according to the quantum circuit generation information.

3. The quantum circuit generation method according to claim 2, characterized in that: The method further comprises: Based on a preset prompt word generation template, a splicing process is performed according to the quantum circuit generation information and the target knowledge item to determine a first target prompt word.

4. The quantum circuit generation method according to claim 3, characterized in that: The method of generating a target quantum circuit based on the pre-trained large language model according to the first target knowledge base and the quantum circuit generation information includes: Based on the large language model, the target quantum circuit is generated according to the first target prompt word.

5. The method for generating a quantum circuit according to claim 3, characterized in that: The method further comprises: The target quantum circuit is checked to determine the correctness of the target quantum circuit.

6. The quantum circuit generation method according to claim 5, characterized in that: The checking process of the target quantum circuit includes: In response to the quantum circuit generation information, determining a target quantum circuit specification corresponding to the target quantum circuit; confirming whether the target quantum circuit meets the target quantum circuit specification; In the case where the target quantum circuit meets the target quantum circuit specification, confirming whether the target quantum circuit meets logical consistency; In the case where the target quantum circuit satisfies the logical consistency, confirming whether the target quantum circuit satisfies physical feasibility; In the case where the target quantum circuit satisfies the physical feasibility, confirming that the target quantum circuit is correct.

7. The quantum circuit generation method according to claim 5, characterized in that: The method further comprises: When it is determined that the target quantum circuit is correct, quantum gate optimization processing is performed on the target quantum circuit to obtain an optimized target quantum circuit.

8. The method for generating a quantum circuit according to claim 6, wherein: The method further comprises: In a case where the target quantum circuit does not satisfy the target quantum circuit specification or the target quantum circuit does not satisfy the logical consistency or the target quantum circuit does not satisfy the physical feasibility, it is confirmed that the target quantum circuit is abnormal.

9. The method for generating a quantum circuit according to claim 8, characterized in that: The method further comprises: In the case where the target quantum circuit is abnormal, generating quantum circuit to generate error information; Based on the preset prompt word generation template, a second target prompt word is generated according to the quantum circuit generation error information and the first target prompt word; Acquire the second target knowledge base from the quantum knowledge base according to the second target prompt word; Based on the large language model, generating a second target quantum circuit according to the second target knowledge base and the second target prompt word; The second target quantum circuit is checked and processed until the second target quantum circuit is correct or the number of times the quantum circuit generates error information reaches a preset maximum number of times.

10. A method for executing a quantum circuit, characterized in that: The quantum circuit is obtained based on the quantum circuit generation method according to claims 1-9, the method comprising: Determining target computing power resources according to the quantum circuit generated information; The quantum circuit is processed according to the target computing power resources to obtain a target quantum execution result.

11. The execution method according to claim 10, characterized in that: Determining target computing resources according to the information generated by the quantum circuit includes: Extracting information generated by the quantum circuit to determine operating parameters; The target computing power resources are determined according to the operating parameters.

12. A quantum circuit generation server, characterized in that: The quantum circuit generation server includes a memory and a processor, wherein the memory stores a computer program, and when the computer program is executed by the processor, the method according to any one of claims 1 to 9 or the method according to any one of claims 10 to 11 is implemented.

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