Multi-core processor adaptive deployment method and device, terminal equipment and storage medium

Abstract

The invention discloses a multi-core processor self-adaptive deployment method and device, terminal equipment and a storage medium. The method comprises the steps that the operation load of each core of a processor is acquired; wherein a part of cores in the processor are deployed with a management operating system through an SMP architecture, and other cores are deployed with a real-time operating system through the SMP architecture; the management operating system and the real-time operating system are deployed on the software platform in an AMP architecture; and performing adaptive deployment on the cores of the processor according to the operation load of each core. According to the invention, an AMP / SMP hybrid deployment architecture is adopted, and high real-time performance, real-time performance and processor capability are considered.

Description

Technical Field

[0001] The present invention relates to the field of multi-core processing technology, and in particular to a method, apparatus, terminal device and storage medium for adaptively deploying a multi-core processor. Background Art

[0002] Embedded systems are increasingly being used in power secondary equipment. Almost every intelligent electronic device designed and produced today is an embedded system. With the rapid development of embedded processor technology, the use of multi-core processors is becoming increasingly common. Within multi-core systems, there are two types of processing architectures: symmetric multiprocessing (SMP) and asymmetric multiprocessing (AMP). In the SMP model, all processors share the same physical address space, with a single operating system centrally scheduling multiple cores, thus multiplying the processing power of a single system. In the AMP model, each processor has its own local memory, allowing each core to independently run its own operating system and applications. Generally, products with high reliability and real-time requirements are suited to the AMP bare-bones solution. Products with lower real-time requirements but more complex functionality and higher processor requirements are better suited to the SMP operating system solution.

[0003] However, some products require both reliability and real-time performance, as well as high processor power. For example, a differential protection consistency tester must perform high-real-time tests such as time interval and delay on differentially transmitted Ethernet frame messages. It also requires complex functional testing of differential protection devices, such as sampling accuracy and sampling synchronization, by linking analog and digital input and output. These products typically operate in an AMP architecture consisting of a single management operating system and multiple real-time bare cores. In this mode, each core requires an independent execution program and shared memory area. Interaction between multiple cores requires inter-core communication or shared memory, which can easily lead to problems such as memory read and write conflicts. Summary of the Invention

[0004] The present invention provides a multi-core processor adaptive deployment method, apparatus, terminal device and storage medium to solve the technical problem that memory read and write conflicts are prone to occur in the existing processor architecture model adopted by products with high requirements for reliability, real-time performance and processor performance.

[0005] In order to solve the above technical problems, an embodiment of the present invention provides a method for adaptively deploying a multi-core processor, including:

[0006] Obtaining the operating load of each core of the processor; wherein some cores of the processor are deployed with a management operating system in an SMP architecture, and other cores are deployed with a real-time operating system in an SMP architecture; and the management operating system and the real-time operating system are deployed on a software platform in an AMP architecture;

[0007] The cores of the processor are adaptively deployed according to the operating load of each core.

[0008] As a preferred solution, the core of the management operating system includes a first master core and several first slave cores; the core of the real-time operating system includes a second master core and several second slave cores.

[0009] As a preferred solution, the adaptive deployment of processor cores according to the operating load of each core includes:

[0010] Calculating an average load ratio of the core managing the operating system based on the operating load of each core;

[0011] When the average load ratio of the core of the management operating system within the preset time period is less than the first preset load ratio, the following operations are performed:

[0012] Dynamically switching all processes in the management operating system to the first master core and resetting all the first slave cores;

[0013] The first master core notifies the second master core through inter-core communication, so that the second master core starts the first slave core in a real-time operating system slave core mode.

[0014] As a preferred solution, the calculation formula for the average load ratio of the core of the management operating system is:

[0015]

[0016] Where η1 represents the average load ratio of the core of the management operating system; T represents the time interval; N represents the number of cores of the management operating system; Q 1,i Indicates the operating load of the i-th core of the management operating system.

[0017] As a preferred solution, the adaptive deployment of processor cores according to the operating load of each core includes:

[0018] Calculating the load proportion of the second main core according to the operating load of each of the cores;

[0019] When the load ratio of the second main core is greater than the second preset load ratio, perform the following operations:

[0020] The second master core notifies the first master core through inter-core communication, so that all processes in the management operating system are dynamically switched to the first master core and all the first slave cores are reset;

[0021] The first master core notifies the second master core through inter-core communication, so that the second master core starts the first slave core in a real-time operating system slave core mode.

[0022] As a preferred solution, after the master core of the real-time operating system starts the other cores in the management operating system except the master core into the real-time operating system slave core mode, the method further includes:

[0023] When the load ratio of the main core of the real-time operating system is less than or equal to the second preset load ratio, perform the following operations:

[0024] Switching all processes of all the first slave cores to the core of the real-time operating system, and resetting all the first slave cores;

[0025] The second master core notifies the first master core through inter-core communication, so that the first master core resets all the first slave cores and starts all the first slave cores into a management operating system slave mode.

[0026] As a preferred solution, the calculation formula for the load proportion of the main core of the real-time operating system is:

[0027]

[0028] Where η2 represents the load ratio of the main core of the real-time operating system; T represents the time interval; Q2 represents the operating load of the main core of the real-time operating system.

[0029] Based on the above embodiment, another embodiment of the present invention provides a multi-core processor adaptive deployment device, including: a data acquisition module and an adaptive deployment module;

[0030] The data acquisition module is used to obtain the operating load of each core of the processor; wherein some cores of the processor are deployed with a management operating system in an SMP architecture, and other cores are deployed with a real-time operating system in an SMP architecture; the management operating system and the real-time operating system are deployed on a software platform in an AMP architecture;

[0031] The adaptive deployment module is used to adaptively deploy the cores of the processor according to the operating load of each core.

[0032] Based on the above embodiments, another embodiment of the present invention provides a terminal device, which includes a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor. When the processor executes the computer program, it implements the multi-core processor adaptive deployment method described in the above embodiment of the invention.

[0033] Based on the above embodiments, another embodiment of the present invention provides a storage medium, which includes a stored computer program, wherein when the computer program is running, the device where the storage medium is located is controlled to execute the multi-core processor adaptive deployment method described in the above invention embodiment.

[0034] Compared with the prior art, the embodiments of the present invention have the following beneficial effects:

[0035] The present invention obtains the operating load of each core of a processor; wherein some cores of the processor are deployed with a management operating system using an SMP architecture, and other cores are deployed with a real-time operating system using an SMP architecture; the management operating system and the real-time operating system are deployed on a software platform using an AMP architecture; and the cores of the processor are adaptively deployed based on the operating load of each core. The present invention adopts an AMP / SMP hybrid deployment architecture, where the management operating system and the real-time operating system are deployed on the same software platform using the AMP architecture, and each operating system is deployed in an SMP architecture to implement advanced applications on each core of the processor, balancing high real-time performance, real-time performance, and processor capabilities. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 This is a flow chart of a multi-core processor adaptive deployment method provided by one embodiment of the present invention;

[0037] Figure 2 This is a schematic diagram of a structure of a multi-core processor hybrid dynamic deployment provided by an embodiment of the present invention;

[0038] Figure 3 This is a schematic diagram of a structure of a multi-core processor hybrid dynamic deployment provided by an embodiment of the present invention;

[0039] Figure 4 This is a schematic diagram of a structure of a multi-core processor hybrid dynamic deployment provided by an embodiment of the present invention;

[0040] Figure 5 This is a schematic diagram of a structure of a multi-core processor hybrid dynamic deployment provided by an embodiment of the present invention;

[0041] Figure 6 It is a structural diagram of a multi-core processor adaptive deployment device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0042] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0043] Example 1

[0044] Please refer to Figure 1 , a multi-core processor adaptive deployment method provided by an embodiment of the present invention, comprising:

[0045] S1. Obtain the operating load of each core of the processor; wherein, some cores of the processor are deployed with a management operating system using an SMP architecture, and other cores are deployed with a real-time operating system using an SMP architecture; the management operating system and the real-time operating system are deployed on a software platform using an AMP architecture.

[0046] S2. Adaptively deploy the cores of the processor according to the operating load of each core.

[0047] It should be noted that the present invention provides a multi-core processor adaptive deployment method based on AMP / SMP hybrid dynamic deployment. The same software platform uses the AMP architecture to deploy the management operating system and the real-time operating system, and each operating system deploys the SMP architecture to implement advanced applications of each core of the processor.

[0048] For example, a multi-core processor is used in the tester, and the AMP architecture is deployed on the software platform. The management operating system and the real-time operating system are run simultaneously. The SMP architecture is deployed between the processor cores in each operating system to achieve AMP / SMP hybrid dynamic deployment.

[0049] In this embodiment, the operating system automatically counts the operating load of each core and stores the operating load data of each core in the shared memory. Based on the operating load, the operating state of each core is dynamically deployed in real time through inter-core communication to meet the real-time and complexity requirements of data processing.

[0050] In a preferred embodiment, the core of the management operating system includes a first master core and several first slave cores; the core of the real-time operating system includes a second master core and several second slave cores.

[0051] In this embodiment, the quad-core processor of the tester is taken as an example. Figure 2The software platform deploys the AMP architecture and runs the management operating system and the real-time operating system at the same time. Among them, the cores Core0 and Core1 deploy the management operating system with the SMP architecture, defining Core0 as the master core and Core1 as the slave core, which are used for file management, protocol communication, human-computer interaction and other advanced application functions; the cores Core2 and Core3 deploy the real-time operating system with the SMP architecture, defining Core2 as the master core and Core3 as the slave core. Core2 performs acquisition calculations, Ethernet frame reception and other functions, and Core3 performs input and output, analog output and other functions.

[0052] In a preferred embodiment, the adaptively deploying the cores of the processor according to the operating load of each core includes:

[0053] Calculating an average load ratio of the core managing the operating system based on the operating load of each core;

[0054] When the average load ratio of the core of the management operating system within the preset time period is less than the first preset load ratio, the following operations are performed:

[0055] Dynamically switching all processes in the management operating system to the first master core and resetting all the first slave cores;

[0056] The first master core notifies the second master core through inter-core communication, so that the second master core starts the first slave core in a real-time operating system slave core mode.

[0057] In this embodiment, taking the above quad-core processor as an example, during normal operation, Core0 and Core1 run a management operating system, and Core2 and Core3 run a real-time operating system.

[0058] When the average load ratio of the core managing the operating system within the preset time is less than the first preset load ratio, first, all processes running on Core1 are dynamically switched to Core0, and Core1 is reset; then, Core0 notifies Core2 through inter-core communication to start 1 as the real-time operating system slave core mode. Figure 3 As shown, Core0 runs the management operating system and executes application functions such as file management, protocol communication, and human-computer interaction; Core2, Core3, and Core1 run the real-time operating system, Core2 and Core1 perform acquisition calculations, Ethernet frame reception, and other functions, and Core3 performs functions such as input and output, and analog output.

[0059] It should be noted that the preset duration is usually set to 1 hour.

[0060] In a preferred embodiment, the calculation formula for the average load ratio of the core of the management operating system is:

[0061]

[0062] Where η1 represents the average load ratio of the core of the management operating system; T represents the time interval; N represents the number of cores of the management operating system; Q 1,i Indicates the operating load of the i-th core of the management operating system.

[0063] In a preferred embodiment, the adaptively deploying the cores of the processor according to the operating load of each core includes:

[0064] Calculating the load proportion of the second main core according to the operating load of each of the cores;

[0065] When the load ratio of the second main core is greater than the second preset load ratio, perform the following operations:

[0066] The second master core notifies the first master core through inter-core communication, so that all processes in the management operating system are dynamically switched to the first master core and all the first slave cores are reset;

[0067] The first master core notifies the second master core through inter-core communication, so that the second master core starts the first slave core in a real-time operating system slave core mode.

[0068] In this embodiment, taking the above-mentioned quad-core processor as an example, when the tester performs differential protection message transmission test, the tester needs to receive a large number of Ethernet frame messages, and the messages are transmitted at the ms level. The tester needs to quickly receive a large number of messages and accurately record the receiving time. The real-time requirement is high. At this time, the operating load of Core2 is relatively high.

[0069] When the load ratio of the main core of the real-time operating system is greater than the second preset load ratio, first, Core2 sends an inter-core communication to Core0, and Core0 dynamically switches all processes running on Core1 to Core0 and resets Core1; then, Core0 notifies Core2 through inter-core communication to start Core1 as the slave core mode of the real-time operating system, and Core1 takes on part of the differential protection test function. At this time, if Figure 4 As shown, Core0 runs the management operating system and executes application functions such as file management, protocol communication, and human-computer interaction. Core2, Core3, and Core1 run the real-time operating system. Core2 and Core1 perform differential transmission testing, acquisition calculations, Ethernet frame reception, and other functions. Core3 performs functions such as open input and output, and analog output.

[0070] In a preferred embodiment, after the master core of the real-time operating system starts the other cores of the management operating system except the master core into the real-time operating system slave core mode, the method further includes:

[0071] When the load ratio of the main core of the real-time operating system is less than or equal to the second preset load ratio, perform the following operations:

[0072] Switching all processes of all the first slave cores to the core of the real-time operating system, and resetting all the first slave cores;

[0073] The second master core notifies the first master core through inter-core communication, so that the first master core resets all the first slave cores and starts all the first slave cores into a management operating system slave mode.

[0074] In this embodiment, taking the above-mentioned quad-core processor as an example, when the management operating system of the tester runs complex functions, such as importing and exporting a large number of files, upgrading programs, printing experimental reports and other advanced applications, it is necessary to give full play to the optimal performance of the advanced applications. First, if Core1 is in the real-time operating system slave mode at this time, Core2 will first dynamically switch the process running on Core1 to Core2 or Core3; then, Core2 will notify Core0 through inter-core communication to restart Core1 to the management operating system slave mode, and Core1 will take on some of the complex advanced application functions. At this time, Figure 5 As shown, Core0 and Core1 run the management operating system and execute advanced applications such as file management, protocol communication, and human-computer interaction. Core2 and Core3 run the real-time operating system and execute functions such as acquisition calculations, Ethernet reception, binary input and output, and analog output.

[0075] In a preferred embodiment, the calculation formula for the load ratio of the main core of the real-time operating system is:

[0076]

[0077] Where η2 represents the load ratio of the main core of the real-time operating system; T represents the time interval; Q2 represents the operating load of the main core of the real-time operating system.

[0078] This paper uses the op command and the Cyclictest test tool to compare the performance and real-time performance of various deployments. The test object is the differential protection consistency test. The tester uses a T3 quad-core processor and the software uses the open-source Linux + RT-Thread domestic operating system. AMP / SMP hybrid dynamic deployment system architecture is implemented. AMP deploys two operating systems, Linux + RT-Thread; the Linux operating system SMP is deployed on Core0 and Core1, with Core0 as the master core and Core1 as the slave core. The RT-Thread real-time operating system SMP is deployed on Core2 and Core3, with Core2 as the master core and Core3 as the slave core. The results are shown in the following table:

[0079]

[0080]

[0081] It can be seen that the real-time performance of the SMP deployment is poor, and the CPU load of the AMP deployment is too high. After the AMP / SMP hybrid dynamic deployment system architecture is deployed, the real-time performance and performance of the differential protection conformance tester are improved.

[0082] Example 2

[0083] Please refer to Figure 6 , is a structural diagram of a multi-core processor adaptive deployment device provided by an embodiment of the present invention, comprising: a data acquisition module and an adaptive deployment module;

[0084] The data acquisition module is used to obtain the operating load of each core of the processor; wherein some cores of the processor are deployed with a management operating system in an SMP architecture, and other cores are deployed with a real-time operating system in an SMP architecture; the management operating system and the real-time operating system are deployed on a software platform in an AMP architecture;

[0085] The adaptive deployment module is used to adaptively deploy the cores of the processor according to the operating load of each core.

[0086] Example 3

[0087] Accordingly, an embodiment of the present invention provides a terminal device, which includes a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor. When the processor executes the computer program, it implements the multi-core processor adaptive deployment method described in the above embodiment of the invention.

[0088] Example 4

[0089] Accordingly, an embodiment of the present invention provides a storage medium, which includes a stored computer program, wherein when the computer program is running, the device where the storage medium is located is controlled to execute the multi-core processor adaptive deployment method described in the above embodiment of the invention.

[0090] It should be noted that the device embodiments described above are merely illustrative, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed across multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the present embodiment. In addition, in the drawings of the device embodiments provided by the present invention, the connection relationship between the modules indicates that there is a communication connection between them, which may be specifically implemented as one or more communication buses or signal lines. A person of ordinary skill in the art can understand and implement the present invention without inventive work.

[0091] Those skilled in the art will clearly understand that for the sake of convenience and brevity, the specific working process of the device described above can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here.

[0092] The terminal device may be a computing device such as a desktop computer, a notebook computer, a PDA, a cloud server, etc. The terminal device may include, but is not limited to, a processor and a memory.

[0093] The processor may be a central processing unit (CPU), other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor, etc. The processor is the control center of the device, connecting various parts of the entire device using various interfaces and lines.

[0094] The memory can be used to store the computer program, and the processor realizes various functions of the device by running or executing the computer program stored in the memory and calling the data stored in the memory. The memory can mainly include a program storage area and a data storage area, wherein the program storage area can store an operating system, at least one application required for a function, etc.; the data storage area can store data created according to the use of the mobile phone, etc. In addition, the memory can include a high-speed random access memory and can also include a non-volatile memory, such as a hard disk, a memory, a plug-in hard disk, a smart memory card (Smart Media Card, SMC), a secure digital (Secure Digital, SD) card, a flash card (FlashCard), at least one disk storage device, a flash memory device, or other volatile solid-state storage devices.

[0095] The storage medium is a storage medium, and the computer program is stored in the storage medium. When the computer program is executed by the processor, it can implement the steps of the above-mentioned method embodiments. The computer program includes computer program code, and the computer program code can be in source code form, object code form, executable file or some intermediate form. The computer-readable medium may include: any entity or device that can carry the computer program code, recording medium, USB flash drive, mobile hard disk, magnetic disk, optical disk, computer memory, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), electric carrier signal, telecommunication signal and software distribution medium. It should be noted that the content contained in the computer-readable medium can be appropriately increased or decreased according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, computer-readable media do not include electric carrier signals and telecommunication signals.

[0096] The above is a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications are also considered to be within the scope of protection of the present invention.

Claims

1. A multi-core processor adaptive deployment method, characterized in that: include: Obtaining the running load of each core of the processor; wherein some cores of the processor are deployed with a management operating system in an SMP architecture, and other cores are deployed with a real-time operating system in an SMP architecture; and the management operating system and the real-time operating system are deployed on a software platform in an AMP architecture; The cores of the processor are adaptively deployed according to the operating load of each core.

2. The multi-core processor adaptive deployment method according to claim 1, characterized in that: The core of the management operating system includes a first main core and a plurality of first slave cores; the core of the real-time operating system includes a second main core and a plurality of second slave cores.

3. The multi-core processor adaptive deployment method according to claim 2, characterized in that: The adaptively deploying the cores of the processor according to the operating load of each core includes: Calculate the average load ratio of the core managing the operating system according to the operating load of each core; When the average load ratio of the core of the management operating system within the preset time period is less than the first preset load ratio, the following operations are performed: Dynamically switch all processes in the management operating system to the first master core, and reset all the first slave cores; The first master core notifies the second master core through inter-core communication, so that the second master core starts the first slave core into a real-time operating system slave core mode.

4. The multi-core processor adaptive deployment method according to claim 3, characterized in that: The calculation formula for the average load ratio of the core of the management operating system is: Where η1 represents the average load ratio of the core managing the operating system; T represents the time interval; N represents the number of cores managing the operating system; Q 1,i Represents the operating load of the i-th core of the management operating system.

5. The multi-core processor adaptive deployment method according to claim 2, characterized in that: The adaptively deploying the cores of the processor according to the operating load of each core includes: Calculating the load proportion of the second main core according to the operating load of each of the cores; When the load proportion of the second main core is greater than the second preset load proportion, the following operations are performed: The second master core notifies the first master core through inter-core communication, so that all processes in the management operating system are dynamically switched to the first master core, and all the first slave cores are reset; The first master core notifies the second master core through inter-core communication, so that the second master core starts the first slave core into a real-time operating system slave core mode.

6. The multi-core processor adaptive deployment method according to claim 5, characterized in that: After the master core of the real-time operating system starts the other cores except the master core in the management operating system into the slave core mode of the real-time operating system, the method further includes: When the load proportion of the main core of the real-time operating system is less than or equal to the second preset load proportion, performing the following operations: Switching all processes of all the first slave cores to the core of the real-time operating system, and resetting all the first slave cores; The second master core notifies the first master core through inter-core communication, so that the first master core resets all the first slave cores and starts all the first slave cores to manage the operating system slave mode.

7. The multi-core processor adaptive deployment method according to claim 5, characterized in that: The calculation formula of the load proportion of the main core of the real-time operating system is: Wherein, η2 represents the load proportion of the main core of the real-time operating system; T represents the time interval; Q2 represents the operating load of the main core of the real-time operating system.

8. A multi-core processor adaptive deployment device, characterized in that: include: Data acquisition module and adaptive deployment module; The data acquisition module is used to acquire the operating load of each core of the processor; wherein some cores of the processor are deployed with a management operating system in an SMP architecture, and other cores are deployed with a real-time operating system in an SMP architecture; the management operating system and the real-time operating system are deployed on a software platform in an AMP architecture; The adaptive deployment module is used to adaptively deploy the cores of the processor according to the operating load of each core.

9. A terminal device, characterized in that: The method comprises a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor, wherein when the processor executes the computer program, the method for adaptively deploying multi-core processors as claimed in any one of claims 1 to 7 is implemented.

10. A storage medium, characterized in that: The storage medium includes a stored computer program, wherein when the computer program is running, the device where the storage medium is located is controlled to execute the multi-core processor adaptive deployment method according to any one of claims 1 to 7.

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