Method and system for refreshing flash memory device

Abstract

The invention provides a method and a system for refreshing a flash memory device. The system for refreshing the flash memory device mainly comprises a host, a main control unit and a plurality of flash memory units, wherein the main control unit and the flash memory units are arranged in the flash memory device. The method for refreshing the flash memory device comprises the following steps: providing an efficiency value of a plurality of flash memory units from a main control unit to a host; when the efficiency value is lower than a preset value, the slave host provides a refreshing instruction to the main control unit; and controlling the plurality of flash memory units to stop the current operation by the main control unit, and performing a refresh operation of one of the plurality of flash memory units.

Description

Technical Field

[0001] The present invention relates to a method and system for refreshing a flash memory device, and more particularly to a method and system for refreshing a flash memory device capable of improving the performance of a memory device. Background Art

[0002] Flash memory consumes power when writing or reading data, but once the data is written, the stored data can be retained for a period of time without disappearing even if the power is removed. In addition, flash memory has many advantages such as small size, large capacity, fast read and write speed, quiet and power-saving, shock and moisture resistance, etc., so it is widely used in embedded systems, portable information products and consumer electronic products.

[0003] However, although flash memory is convenient and has many advantages, it still has some limitations and defects, including read disturb, write disturb, data retention and memory wear-out.

[0004] CN105843550B is a technology for reducing read disturbance errors. TWI756297B discloses a technology for performing re-reading when a read error occurs in a storage area. CN109949850A discloses a technology that uses a re-read table to store voltage values ​​corresponding to various error types defined in advance. When a data access error occurs, each set of voltage values ​​in the retry table can be tested in sequence until the voltage value corresponding to the current error type is tested, and the corresponding access adjustment action is performed based on the error type corresponding to this set of voltage values. TW201818414A uses a temperature sensor to detect temperature, and calculates the safe period for data preservation based on the temperature and the number of erase and write cycles. During the safe period, the data of each memory block is erased and rewritten, and the data preservation time of the flash memory is extended by refreshing the material preservation period of each memory block to prevent data errors due to exceeding the data preservation period, read disturbance or memory loss.

[0005] However, the above technologies still cannot comprehensively and immediately improve the limitations and defects of flash memory. For example, the flash memory may continue to have data retention issues when it is not powered on, causing data errors due to being stored for too long.

[0006] Therefore, how to overcome the above problems that cannot be solved by the prior art and improve the overall performance of the flash memory is an urgent issue to be solved in the industry. Summary of the invention

[0007] In view of the above problems, one object of the present invention is to provide a method and system for refreshing a flash memory device, which can forcefully execute the operation of refreshing the flash memory device by issuing a refresh command on the host side to refresh all valid data blocks.

[0008] Another object of the present invention is to provide a method and system for refreshing a flash memory device. When the performance value of the flash memory device is lower than a preset value, a host terminal directly issues a refresh command to force the operation of refreshing the flash memory device to refresh all valid data blocks.

[0009] To achieve the above-mentioned object of the present invention, the present invention provides a method for refreshing a flash memory device, wherein the flash memory device includes a main control unit and a plurality of flash memory units, and the method includes the following steps: providing performance values ​​of the plurality of flash memory units to a host from the main control unit; when the performance values ​​are lower than a preset value, providing a refresh instruction from the host to the main control unit; and controlling the plurality of flash memory units to stop current operations and perform a refresh operation on the plurality of flash memory units by the main control unit.

[0010] To achieve the above-mentioned object of the present invention, the present invention further provides a method for refreshing a flash memory device, wherein the flash memory device includes a main control unit and a plurality of flash memory units, and the method includes the following steps: providing a refresh instruction from a host to the main control unit; and causing the main control unit to stop the current operation of the plurality of flash memory units and execute a refresh operation of the plurality of flash memory units.

[0011] To achieve the above-mentioned object of the present invention, the present invention further provides a system for refreshing a flash memory device, comprising a host, a main control unit, and a plurality of flash memory units. The main control unit is disposed in the flash memory device and connected to the host. The plurality of flash memory units are disposed in the flash memory device and connected to the main control unit. The host is configured to provide a refresh instruction to the main control unit, so that the main control unit controls the plurality of flash memory units to stop current operations and execute refresh operations of the plurality of flash memory units.

[0012] In summary, the method and system for refreshing the flash memory device of the present invention can force the flash memory device to refresh all valid data blocks by directly issuing a refresh command from the host. After the refresh is completed, not only can the efficiency of the flash memory device be improved by 100%, but also the data preservation capability can be improved.

[0013] For further description and advantages of the present invention, please refer to the following drawings and embodiments to more clearly understand the technical solution of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] The above objects and advantages of the present invention will become more easily understood by those having ordinary knowledge in the art after referring to the following detailed description and the accompanying drawings.

[0015] Figure 1 FIG. 4 is a block diagram of a system for refreshing a flash memory device according to an embodiment of the present invention.

[0016] Figure 2 FIG. 4 is a flow chart of a method for refreshing a flash memory device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0017] Please read the following detailed description with reference to the drawings of the present disclosure, wherein the drawings of the present invention are used in an illustrative manner to introduce various different embodiments of the present invention and to provide an understanding of how to implement the present invention. The embodiments of the present invention provide sufficient content for those skilled in the art to implement the embodiments disclosed by the present invention, or to implement embodiments derived from the contents disclosed by the present invention. It should be noted that the embodiments are not mutually exclusive, and some embodiments can be appropriately combined with one or more other embodiments to form new embodiments, that is, the implementation of the present invention is not limited to the embodiments disclosed below. In addition, for the sake of simplicity and clarity of illustration, the relevant details will not be excessively disclosed in each embodiment. Even if specific details are disclosed, they are only exemplified to make the reader understand, and the relevant specific details in each embodiment are not intended to limit the disclosure of this case.

[0018] See also Figure 1 and Figure 2 , which are respectively a block diagram of a system for refreshing a flash memory device and a flow chart of a method for refreshing a flash memory device according to a specific embodiment of the present invention. Figure 1 In the embodiment of the present invention, the system 10 for refreshing the flash memory device is suitable for Figure 2 A method of refreshing a flash memory device is shown.

[0019] exist Figure 1 In the embodiment, the system 10 for refreshing a flash memory device includes a host 100 and a flash memory device 200. In one embodiment, the host 100 is any device that can issue a refresh command, such as a personal computer with an operating system such as Windows or Linux, or a device with a microcontroller (MCU). In one embodiment, the communication between the host 100 and the flash memory device 200 complies with the non-volatile memory communication protocol (NVMe), serial advanced technology attachment (SATA), or integrated circuit bus (I 2 C) specification, or triggered by a general purpose input and output (GPIO).

[0020] exist Figure 1 In the embodiment, the flash memory device 200 includes an interface unit 210, a main control unit 220, and a plurality of flash memory units 230. The interface unit 210 can receive a refresh command from the host 100 and transmit a refresh command in accordance with the non-volatile memory communication protocol (NVMe), serial advanced technology attachment (SATA), integrated bus circuit (I 2 C) or a standard refresh command of a general purpose input and output (GPIO) is transmitted to the main control unit 220. After receiving the refresh command, the main control unit 220 controls the multiple flash memory units 230 to stop the current operation and executes the refresh operation of the multiple flash memory units 230.

[0021] In one embodiment, the main control unit 220 includes a processing unit 221, a control logic unit 222, and a buffer management unit 223. The processing unit 221 is configured to communicate with the host 100 through the interface unit 210. The control logic unit 222 is connected between the processing unit 221 and the plurality of flash memory units 230, and is configured to be controlled by the processing unit 221, thereby controlling the refresh operation of the plurality of flash memory units 230. The buffer management unit 223 is connected between the control logic unit 222 and the processing unit 221, and is configured to store data in the plurality of flash memory units 230 during the refresh operation.

[0022] In one embodiment, the flash memory device 200 further includes a performance evaluation unit 240, which is connected to the main control unit 220 and is configured to provide a performance value to the main control unit 220 according to the performance of the plurality of flash memory units 230. When the main control unit 220 determines that the performance value is lower than a preset value, it controls the plurality of flash memory units 230 to stop the current operation and performs a refresh operation on the plurality of flash memory units 230. In another embodiment, the main control unit 220 can also transmit the performance value to the host 100 in response to a request from the host 100. Then, a refresh command is transmitted from the host 100 to the main control unit 220. After receiving the refresh command, the main control unit 220 controls the plurality of flash memory units 230 to stop the current operation and performs a refresh operation on the plurality of flash memory units 230.

[0023] exist Figure 2 In the method of refreshing the flash memory device, the method comprises the following steps. First, in step S201, the host 100 transmits a request for obtaining a performance value to the flash memory device 200. In a specific embodiment, the request complies with the non-volatile memory communication protocol (NVMe), serial advanced technology attachment (SATA), integrated circuit (I 2 C) or general purpose input and output (GPIO) specifications.

[0024] After receiving the request to obtain the performance value, in step S202, the main control unit 220 in the flash memory device 200 replies the performance values ​​of the plurality of flash memory units 230 to the host 100. In a specific embodiment, the performance values ​​of the plurality of flash memory units 230 can be values ​​obtained by detecting the performance in any manner. For example, in a specific embodiment, the performance value can be provided to the main control unit 220 by the performance evaluation unit 240 according to the performance of the plurality of flash memory units 230.

[0025] Next, in step S203, the host 100 determines whether the performance value is lower than a preset value. In a specific embodiment, the host 100 can determine whether the performance value is lower than the preset value by firmware, software or hardware. If the performance value is lower than the preset value, in step S204, a refresh command is sent from the host 100 to the main control unit 220 in the flash memory device 200. In a specific embodiment, the refresh command complies with the non-volatile memory communication protocol (NVMe), serial advanced technology attachment (SATA), integrated circuit (I 2 C) or general purpose input and output (GPIO) specifications. If the performance value is not lower than the preset value, return to step S201.

[0026] After the main control unit 220 in the flash memory device 200 receives the refresh command, in step S205, the main control unit 220 controls the plurality of flash memory units 230 to stop the current operation and executes the refresh operation of the plurality of flash memory units 230. In a specific embodiment, during the refresh operation, the data stored in at least one of the plurality of flash memory units 230 is first copied to the buffer management unit 223, and then the data of the at least one of the plurality of flash memory units 230 is erased, and then the copied data is rewritten from the buffer management unit 223 to the at least one flash memory unit 230.

[0027] In step S206, the main control unit 220 determines whether all of the flash memory cells 230 have been refreshed. If all of the flash memory cells 230 have been refreshed, in step S207, the main control unit 220 sets all of the flash memory cells 230 to a refresh state. If all of the flash memory cells 230 have not been refreshed, the process returns to step S205 to continue the refresh operation.

[0028] Regardless of whether step S205 has been executed, step S208 can be executed at any time, and the host 100 transmits a request to obtain the refresh status, and in step S209, it is determined whether the host 100 has obtained all the refresh status. If the host 100 has not obtained all the refresh status, return to step S208; if the host 100 has obtained all the refresh status, return to step S201.

[0029] However, in another specific embodiment, the method of refreshing the flash memory device can be started by the user directly executing step S204. That is, regardless of the performance of the plurality of flash memory units 230, the user directly provides a refresh command from the host 100 to the main control unit 220 in the flash memory device 200 through an interface (not shown) on the top of the host 100, forcing the execution of step S205, so that the main control unit 220 controls the plurality of flash memory units 230 to stop the current operation and execute the refresh operation of the plurality of flash memory units 230. The advantage of this embodiment is that the user can decide the timing of starting the refresh of the flash memory device 200 by himself when the operation load of the plurality of flash memory units 230 is relatively light or even idle, which can not only speed up the efficiency of refreshing the flash memory device 200, but also improve the performance of the flash memory device 200 after the refresh.

[0030] From the above discussion, it can be seen that the method and system for refreshing the flash memory device of the present invention can force the operation of refreshing the flash memory device by directly issuing a refresh command from the host end to refresh all valid data blocks. After the refresh is completed, not only can the efficiency of the flash memory device be improved by 100%, but also the data preservation capability can be improved.

[0031] Although the present invention is disclosed as above by the above-mentioned several implementation modes or embodiments, they are not used to limit the present invention. Those skilled in the art may make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be determined by the definition of the appended claims.

[0032] (Explanation of symbols)

[0033] 10: System for refreshing a flash memory device 100: Host

[0034] 200: Flash memory device 210: Interface unit

[0035] 220: Main control unit 221: Processing unit

[0036] 222: Control logic unit 223: Buffer management unit

[0037] 230: Flash memory unit 240: Performance evaluation unit

[0038] S201-S209: steps.

Claims

1. A method for refreshing a flash memory device, wherein the flash memory device comprises a main control unit and a plurality of flash memory units, and the method comprises the following steps: Providing a performance value of the plurality of flash memory cells from the main control unit to a host; When the performance value is lower than a preset value, providing a refresh instruction from the host to the main control unit; as well as The main control unit controls the plurality of flash memory units to stop a current operation and execute a refresh operation of the plurality of flash memory units.

2. The method of claim 1, before the main control unit provides the performance value, the method further comprises the following steps: A request regarding the performance value of the plurality of flash memory cells is transmitted from the host to the main control unit.

3. The method of claim 1 , wherein after the main control unit performs the refresh operation, the method further comprises the following steps: A refresh status is transmitted from the main control unit to the host to indicate whether all of the plurality of flash memory cells have been refreshed.

4. The method of claim 1, wherein the refresh command complies with non-volatile memory express (NVMe), serial advanced technology attachment (SATA), integrated bus circuit (I 2 C) or general purpose input and output (GPIO) specifications.

5. A method for refreshing a flash memory device, wherein the flash memory device comprises a main control unit and a plurality of flash memory units, and the method comprises the following steps: Providing a refresh command from a host to the main control unit; as well as The main control unit is caused to stop a current operation of one of the plurality of flash memory units and to perform a refresh operation of one of the plurality of flash memory units.

6. The method of claim 5, wherein after the main control unit performs the refresh operation, the method further comprises the following steps: A refresh status is transmitted from the main control unit to the host to indicate whether all of the plurality of flash memory cells have been refreshed.

7. The method of claim 5, wherein the refresh command complies with non-volatile memory express (NVMe), serial advanced technology attachment (SATA), integrated bus circuit (I 2 C) or general purpose input and output (GPIO) specifications.

8. A system for refreshing a flash memory device, comprising: A host; a main control unit, disposed in the flash memory device and connected to the host; as well as A plurality of flash memory units are disposed in the flash memory device and connected to the main control unit. The host is configured to provide a refresh instruction to the main control unit, so that the main control unit controls the plurality of flash memory units to stop a current operation and execute a refresh operation of the plurality of flash memory units.

9. The system of claim 8, wherein the main control unit comprises: a processing unit configured to communicate with the host through an interface unit; a control logic unit connected between the processing unit and the plurality of flash memory units and configured to be controlled by the processing unit to further control the refresh operation of the plurality of flash memory units; as well as A buffer management unit is connected between the control logic unit and the processing unit and is configured to store data in the plurality of flash memory cells during the refresh operation.

10. The system of claim 8, wherein the refresh command complies with non-volatile memory express (NVMe), serial advanced technology attachment (SATA), integrated bus circuit (I 2 C) or general purpose input and output (GPIO) specifications.

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