Method and apparatus for silicon photon testing

Abstract

The embodiment of the invention relates to a method and a device for silicon photon testing. A first photonic integrated circuit (PIC) chip originates from a PIC wafer. The first PIC chip includes a substrate and one or more optical communication components fabricated on the substrate. An optical test assembly is also fabricated on the substrate. The optical test component is configured to pass light to a second PIC chip on the PIC wafer prior to die singulation of the PIC wafer for testing one or more operational properties of an optical component disposed on the second PIC chip. The second PIC chip is adjacent to the first PIC chip on the PIC wafer prior to die singulation of the PIC wafer.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of priority to U.S. Provisional Patent Application No. 63 / 537,379, filed on September 8, 2023, entitled “High-Throughput Vertically-Coupled Wafer-Level Silicon Photonics Test Methodology,” the entire disclosure of which is expressly incorporated herein by reference. Technical Field

[0003] The present disclosure relates generally to silicon (Si) photonic integrated circuits (PICs), and more particularly to testing Si PICs. Background Art

[0004] Testing Silicon (Si) Photonic Integrated Circuits (PICs) at the wafer level is extremely useful for screening bad die before subsequent assembly steps. Failure to screen out bad Si PICs before subsequent assembly steps results in lower overall yield, higher costs, and reduced assembly capabilities because electrical / optical defects are detected later in the manufacturing chain.

[0005] A challenging aspect of Si PIC testing is coupling light on and off the chip structure for parameter measurement. Typically, there are two main methods to couple light into or out of a Si PIC: a) vertical coupling via a grating coupler, and b) edge coupling via a mode converter. Edge coupling typically provides lower optical loss, greater relative polarization insensitivity, and better broadband wavelength response than grating couplers, so edge coupling is often used to interface the PIC die with lasers, optical fibers, etc. in conjunction with subsequent manufacturing stages. However, using edge coupling for wafer-level testing is impractical because the edge of the PIC die cannot be accessed before the wafer is cut.

[0006] Grating couplers on the die are a potential solution for coupling light onto and off the die for wafer-level testing. As an example, for a die that includes edge couplers for inputting light into a waveguide during end-use operation, a grating coupler may also be included on the die near the edge coupler to input light into the waveguide during wafer-level testing. However, in order to input light to the die via the grating coupler, the test probe must be aligned with the grating coupler on each die, which typically adds significant cost. As a result, optoelectronic wafer-level testing of Si PICs is often skipped entirely. Summary of the invention

[0007] In an embodiment, a first photonic integrated circuit (PIC) chip is described, the first PIC chip being derived from a PIC wafer. The first PIC chip includes: a substrate; one or more optical communication components fabricated on the substrate; and an optical test component fabricated on the substrate, the optical test component being configured to pass light to a second PIC chip on the PIC wafer before die singulation of the PIC wafer to test one or more operational properties of the optical components disposed on the second PIC chip, wherein the second PIC chip is adjacent to the first PIC chip on the PIC wafer before die singulation of the PIC wafer.

[0008] In another embodiment, a method for manufacturing a PIC chip includes: making a plurality of PIC chips on a PIC wafer having a substrate, and for each PIC chip among the plurality of PIC chips of the PIC wafer, including: making one or more optical components and one or more electrical components corresponding to at least one of the following: i) an optical communication transmitter, and ii) an optical communication receiver on the substrate, and making a test component on the substrate, the test component being different from the one or more optical components and one or more electrical components corresponding to at least one of the following: i) an optical communication transmitter, and ii) an optical communication receiver, the test component being configured to transmit light to another PIC chip adjacent to the PIC chip when the PIC chip and the other PIC chip are integrated with the PIC wafer to test one or more operational properties of the optical component disposed on the other PIC chip.

[0009] In still another embodiment, a method for testing a PIC chip integrated with a PIC wafer includes: manipulating a test probe device over the PIC wafer to approach at least a first optical coupler of a plurality of optical test components of a first PIC chip of the PIC wafer, the first PIC chip also including one or more optical communication components separate from the plurality of optical test components; providing light from the test probe device to at least the first optical coupler of the first PIC chip; transferring the light of the test probe device from at least the first optical coupler to an optical component disposed on a second PIC chip via the optical test component of the first PIC chip; and using the light transferred from the test probe device to the optical component disposed on the second PIC to test one or more operational properties of the optical component disposed on the second PIC chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1A is a simplified diagram of a portion of an example photonic integrated circuit (PIC) wafer in which a first PIC chip includes a test component for testing one or more operational properties of an optical component of a second PIC chip in accordance with an embodiment.

[0011] Figure 1Bis a simplified diagram of a PIC chip according to an embodiment, a portion of which is shown in FIG. Figure 1A As shown in the picture.

[0012] Figure 1C It is a diagram according to an embodiment. Figure 1A Simplified diagram of the surface of a portion of a wafer.

[0013] Figure 2A According to the embodiment Figure 1A A magnified view of a PIC wafer showing a first edge coupler of a first PIC chip and a corresponding second edge coupler of a second PIC chip.

[0014] Figure 2B According to the embodiment Figure 2A The first PIC chip in Figure 2A A view of the second PIC chip after separation.

[0015] Figure 3 According to the embodiment, Figure 2A Shown is a simulated graph of optical coupling loss versus trench width between edge couplers of adjacent PIC chips.

[0016] Figure 4 According to another embodiment Figure 2A Illustration of edge couplers with an optically clear liquid or epoxy deposited between the edge couplers.

[0017] Figure 5 is an enlarged view of an example PIC wafer illustrating a test assembly of a PIC chip feeding back light output from an optical emitter assembly of another PIC chip according to an embodiment.

[0018] Figure 6 is a simplified diagram of a portion of another example PIC wafer in which a first PIC chip includes a test component for testing one or more operational properties of an optical component of a second PIC chip according to another embodiment.

[0019] Figure 7 is a simplified diagram of a portion of another example PIC wafer in which a first PIC chip includes a test component for testing one or more operational properties of an optical component of a second PIC chip according to another embodiment.

[0020] Fig. 8A is a graph of the modes of a prior art grating coupler and a near-Gaussian mode 808 of a single mode fiber (SMF) when the modes are aligned.

[0021] Figure 8B When the mode relative displacement is 3μm, Fig. 8A Schematic diagram of the pattern.

[0022] Fig. 9A is a diagram of extended modes of an example grating coupler and extended near-Gaussian modes of an example SMF when modes are aligned according to an embodiment.

[0023] Fig. 9B When the mode relative displacement is 3 μm Fig. 9A Schematic diagram of the pattern.

[0024] Fig. 10A is a diagram of a typical grating coupler with a 10 μm SMF mode field diameter (MFD).

[0025] Fig. 10B is used according to some embodiments Figure 1A , Figure 6 or Figure 7 Figure 2. An example grating coupler diagram of an extended SMF mode MFD of one or more PIC chips.

[0026] Fig.11A is a simplified block diagram of an example test probe mechanism for testing PIC wafers such as those described herein, according to an embodiment.

[0027] Fig. 11B is a simplified block diagram of another example test probe mechanism for testing PIC wafers such as those described herein, according to another embodiment.

[0028] Fig.12 is a flow chart of an example method for testing PIC chips integrated with a PIC wafer according to an embodiment.

[0029] Fig.13 is a flow chart of an example method for manufacturing a PIC chip according to an embodiment. DETAILED DESCRIPTION

[0030] In the following embodiments, a photonic integrated circuit (PIC) wafer includes a first PIC chip and a second PIC chip adjacent to the first PIC chip. Each of the first PIC chip and the second PIC chip includes one or more optical communication components, such as one or more (or none) of an optical modulator, an optical demodulator, an optical multiplexer, an optical demultiplexer, etc. The first PIC chip also includes one or more optical test components configured to pass light to the second PIC chip to test the optical components of the second PIC chip.

[0031] In some embodiments, the second PIC chip includes a first optical edge coupler, and the one or more optical test components of the first PIC chip are configured to pass light to the second PIC chip via the first optical edge coupler to test at least the first optical edge coupler. In some embodiments, the second PIC chip additionally or alternatively includes a second optical edge coupler, and the one or more optical test components of the first PIC chip are configured to receive light from the second PIC chip via the second optical edge coupler to test at least the second optical edge coupler.

[0032] In some embodiments, the one or more optical test components of the first PIC chip include a first grating coupler configured to receive light from a test probe mechanism, and the one or more optical test components are configured to pass the light received via the first grating coupler to a second PIC chip for testing the optical components of the second PIC chip. In some embodiments, the one or more optical test components of the first PIC chip additionally or alternatively include a second grating coupler configured to pass light to the test probe mechanism, and the one or more optical test components are configured to pass the light received from the second PIC chip to the second grating coupler for testing the optical components of the second PIC chip.

[0033] Figure 1A 1 is a simplified diagram of a portion of an example PIC wafer 100 according to an embodiment. The portion of PIC wafer 100 includes PIC chip 104-1 and PIC chip 104-2. Figure 1A Only a portion of the PIC chip is depicted. Figure 1B As shown in (Simplified Figure of PIC Wafer 100), PIC Wafer 100 includes a plurality of PIC chips 104, including PIC chip 104-1 and PIC chip 104-2. In an embodiment, all PIC chips 104 have the same structure. For example, Figure 1A As can be seen in FIG. 1 , the chip 104 - 1 and the PIC chip 104 - 2 have the same structure. In other embodiments, most of the PIC chips 104 have the same structure, while one or more other PIC chips 104 have different suitable structures.

[0034] Now refer to Figure 1A , the PIC chip 104-1 includes a plurality of optical components and optionally electrical components, as described below, corresponding to the end use of the PIC chip 104-1, which provides the desired functionality after the PIC chip 104-1 has been separated from the other PIC chips 104 of the PIC wafer 100 and has been packaged in a suitable PIC package. For example, in Figure 1AIn an example of the embodiment, the PIC chip 104-1 includes optical components and electrical components related to optical modulation for generating one or more optical communication signals for transmission via one or more suitable optical media. In another embodiment, the PIC chip 104-1 additionally or alternatively includes optical components and electrical components related to optical demodulation of one or more optical communication signals received via one or more suitable optical media. In other embodiments, the PIC chip 104-1 additionally or alternatively includes optical components and optional electrical components related to processing one or more optical signals in another suitable manner other than optical modulation or optical demodulation, such as filtering one or more optical signals, optically multiplexing optical signals, optically demultiplexing optical signals, etc.

[0035] PIC chip 104-1 also includes a plurality of optical components and optionally electrical components (i.e., test components 108) that are configured to facilitate testing of one or more operational properties of optical components disposed on a PIC chip 104 (e.g., PIC chip 104-2) adjacent to PIC chip 104-1. As will be further described below, test components 108 provide one or more mechanisms for at least one of: i) receiving light from a test probe mechanism and delivering the light to PIC chip 104-2, and ii) receiving light from PIC chip 104-2 and delivering the light to the test probe mechanism.

[0036] As explained above, each of at least some of the PIC chips 104 includes a test component, such as the test components 108, 188 described above, for testing adjacent PIC chips 104. This is in contrast to other implementations in which the test components, such as the test components 108, 188 described above, are fabricated on sacrificial structures of the PIC wafer 100 that are discarded after testing and die singulation. When the test components, such as the test components 108, 188, are included within the PIC chips 104, there is much less waste of the wafer 100 than in implementations in which the test components are fabricated on sacrificial structures of the PIC wafer 100.

[0037] With respect to components of the PIC chip 104-1 other than the test component 108, in an embodiment, the PIC chip 104-1 includes a plurality of Mach-Zehnder modulators (MZMs) 112 configured to modulate data onto a plurality of optical signals for transmission. In another embodiment, in addition to the test component 108, the components of the PIC chip 104-1 include one or more other suitable optical modulators other than the MZMs. The PIC chip 104-1 also includes a plurality of edge couplers 116 configured to receive light from one or more lasers when the PIC chip 104-1 is in the form of an end-use product (e.g., after the PIC chip 104-1 has been separated from the other PIC chips 104 of the PIC wafer 100 and has been packaged in a suitable PIC package). The edge couplers 116 are optically coupled to the MZMs 112 via a plurality of waveguides 120.

[0038] PIC chip 104 - 1 also includes a plurality of edge couplers 124 configured to receive modulated light from MZM 112 and output the modulated light to, for example, an optical fiber in an end-use configuration. Edge couplers 124 are optically coupled to MZM 112 via a plurality of waveguides 128 .

[0039] As mentioned above, PIC chip 104-2 has the same structure as PIC chip 104-1. For example, PIC chip 104-2 includes a plurality of MZMs 132 corresponding to MZMs 112 of PIC chip 104-1. Additionally, PIC chip 104-2 includes edge couplers 136 corresponding to edge couplers 116 of PIC chip 104-1 and waveguides 140 corresponding to waveguides 120 of PIC chip 104-1. Additionally, PIC chip 104-2 includes edge couplers 144 corresponding to edge couplers 124 of PIC chip 104-1 and waveguides 148 corresponding to waveguides 128 of PIC chip 104-1.

[0040] Referring to the test assembly 108 of the PIC chip 104-1, the test assembly 108 includes an optical coupler 160 configured to receive light from a test probe mechanism. In an embodiment, to facilitate testing of the PIC chip 104-1 and the PIC chip 104-2 when they are integrated with the PIC wafer 100, the optical coupler 160 is configured to receive light from a direction that is at an angle between about 60 degrees and 90 degrees relative to a plane parallel to the PIC wafer 100. In another embodiment, the optical coupler 160 is configured to receive light from a direction that is at an angle between about 70 degrees and 90 degrees relative to a plane parallel to the PIC wafer 100. In another embodiment, the optical coupler 160 is configured to receive light from a direction that is at an angle between about 75 degrees and 90 degrees relative to a plane parallel to the PIC wafer 100. In other embodiments, the optical coupler 160 is configured to receive light from a direction that is at another suitable angle relative to a plane parallel to the PIC wafer 100.

[0041] In an embodiment, the optical coupler 160 includes a grating coupler. In another embodiment, the optical coupler 160 includes other suitable couplers other than a grating coupler.

[0042] The test assembly 108 of the PIC chip 104-1 also includes an edge coupler 164 that is optically aligned with the edge coupler 136 of the PIC chip 104-2. The edge coupler 164 is optically coupled to the optical coupler 160 via a waveguide 168. In a test operation, light from the test probe mechanism is received by the optical coupler 160 and passed to the edge coupler 164 via the waveguide 168. The edge coupler 164 is configured to output the light from the test probe mechanism to the edge coupler 136 of the PIC chip 104-2.

[0043] The test assembly 108 of the PIC chip 104-1 also includes an edge coupler 172 that is optically aligned with the edge coupler 144 of the PIC chip 104-2. In a test operation, light output by the edge coupler 144 of the PIC chip 104-2 is received by the optical coupler 172.

[0044] The test assembly 108 also includes an optical coupler 176, which is configured to output light to the test probe mechanism. In an embodiment, and also to facilitate testing of the PIC chip 104-2 when the PIC chip 104-1 and the PIC chip 104-2 are integrated with the PIC wafer 100, the optical coupler 176 is configured to output light in a direction that is at an angle of about 60 degrees to 90 degrees relative to a plane parallel to the PIC wafer 100. In another embodiment, the optical coupler 176 is configured to output light in a direction that is at an angle of about 70 degrees to 90 degrees relative to a plane parallel to the PIC wafer 100. In another embodiment, the optical coupler 176 is configured to output light in a direction that is at an angle of about 75 degrees to 90 degrees relative to a plane parallel to the PIC wafer 100. In other embodiments, the optical coupler 176 is configured to output light in a direction that is another suitable angle relative to a plane parallel to the PIC wafer 100.

[0045] In an embodiment, the optical coupler 176 comprises a grating coupler. In another embodiment, the optical coupler 176 comprises other suitable couplers other than a grating coupler.

[0046] Edge coupler 172 is optically coupled to optical coupler 176 via waveguide 180. In a test operation, light output by edge coupler 144 of PIC chip 104-2 is received by edge coupler 172. Light received by edge coupler 172 is transferred to optical coupler 176 via waveguide 180. Optical coupler 176 is configured to output light from edge coupler 144 of PIC chip 104-2 to a test probe mechanism.

[0047] In an embodiment, the waveguides 168, 180 are routed on a lower silicon nitride layer below an upper metal layer, which allows the electrical die pad frame to be fabricated without significant consideration of the optical structure of the test assembly 108. In an embodiment, the waveguides 168, 180 are fabricated such that the mode radius of the waveguides 168, 180 below the metal layer is substantially smaller than the stack height difference between the silicon nitride layer and the metal.

[0048] The test assembly 108 also includes electrical and / or electro-optical components (not shown), such as photodiodes, sensors, signal buffers, etc., to facilitate testing of the PIC chip 104-2 when the PIC chip 104-1 and the PIC chip 104-2 are integrated with the PIC wafer 100. The test assembly 108 includes an electrical pad 116 electrically coupled to the electrical and / or electro-optical components via circuit traces (not shown). The electrical pad 116 is configured to be electrically coupled to electrical contacts (e.g., pins, etc.) of a test probe mechanism for i) receiving a first electrical signal (e.g., power, ground, control signal, a high-speed data signal (test data) for modulation by the optical modulator under test, etc.) from the test probe mechanism, and ii) providing a second electrical signal from the electrical and / or electro-optical component to the test probe mechanism, such as the output of a photodiode, a high-speed demodulated data signal output by an optical demodulator circuit device under test, etc. The circuit traces of the test assembly 108 deliver a first electrical signal from the electrical pad 116 to the electrical and / or electro-optical component and deliver a second electrical signal from the electrical and / or electro-optical component to the electrical pad 116 .

[0049] PIC chip 104-2 includes a test assembly 188 having the same structure (or a similar structure) as the test assembly in test assembly 108 of PIC chip 104-1. Test assembly 188 of PIC chip 104-2 is configured to facilitate testing of one or more operational properties of an optical assembly disposed on another PIC chip 104 adjacent to PIC chip 104-2 in the same or similar manner as the operation of test assembly 108 of PIC chip 104-1 described above.

[0050] The edge couplers of a PIC chip, such as edge couplers 136, 144 of PIC chip 104-2, are typically spaced laterally at different distances and / or spaced laterally at distances significantly longer than the pitch of the optical input / output of a typical test probe. In the illustrative embodiment, edge couplers 144-1 and 144-2 are spaced laterally at a distance of 1.6 millimeters (mm), and edge couplers 144-3 and 144-4 are spaced laterally at 1.6 mm; edge coupler 144-2 and edge coupler 136-1 are spaced laterally at 1.5 mm, and edge coupler 136-4 and edge coupler 144-3 are spaced laterally at 1.5 mm; and edge coupler 136 is spaced laterally at a distance of 500 micrometers (μm). On the other hand, the pitch of the optical input / output of a typical optical test probe is 127 μm or 250 μm.

[0051] According to an embodiment, as discussed above, the optical couplers 160, 176 of the test assembly 108 are equidistant at a suitable distance corresponding to the pitch of the optical input / output of a typical optical test probe. For example, in some embodiments, the optical couplers 160, 176 are equidistant at 127 μm, or equidistant at 250 μm. Therefore, according to some embodiments, the test assembly 108 is configured to convert the lateral spacing of the optical input / output of the PIC chip 104-2 from a first lateral spacing to a second lateral spacing that is uniform and shorter than the first spacing in conjunction with the test PIC chip 104-2. According to an embodiment, the second spacing corresponds to the pitch of the optical input / output of a typical optical test probe. At least in some embodiments, converting the lateral spacing of the optical input / output of the PIC chip 104-2 from the first lateral spacing to a standard fiber array optical pitch reduces the cost and / or complexity of the test probe, and removes the need for a custom optical block for the test probe (which may be cost-prohibitive and / or commercially unfeasible).

[0052] In some embodiments, PIC chip 104-1 includes electrical and / or electro-optical components (not shown) that are distinct from test component 108 and that are configured to provide desired functionality according to the end use of PIC chip 104 after PIC chip 104-1 has been separated from other PIC chips 104 of PIC wafer 100 and has been packaged in a suitable PIC package. For example, according to an embodiment, MZM 112 includes electrodes that receive a modulation control signal, wherein the modulation control signal provided to the electrode causes MZM 112 to modulate light input to MZM 112. As another example, according to an embodiment, MZM 112 includes electrodes that receive power, ground, and / or bias signals for electrically configuring MZM 112 for operation. The electrical and / or electro-optical components are electrically coupled to circuit traces (not shown) that are configured to deliver electrical signals to or from the electrical and / or electro-optical components.

[0053] Now refer to Figure 1C , which illustrates Figure 1A On the surface of a portion of wafer 100, PIC chip 104-1 includes an electrical pad 192 that is different from test component 108 and is electrically coupled to an electrical component and / or electro-optical component via the circuit traces discussed above. In some embodiments, such electrical pad 192 provides a mechanism for sending electrical signals to and / or receiving electrical signals from the electrical component and / or electro-optical component.

[0054] As discussed above, the PIC chip 104-2 has the same structure as the PIC chip 104-1, and thus the PIC chip 104-2 includes electrical components and / or electro-optical components and circuit traces ( Figure 1A104-2) are configured to provide desired functionality according to the end use of the PIC chip 104-2 after the PIC chip 104-2 has been separated from the other PIC chips 104 of the PIC wafer 100 and has been packaged in a suitable PIC package. Additionally, the PIC chip 104-2 includes an electrical pad 196 that is different from the test component 188 and is electrically coupled to the electrical component and / or the electro-optical component via the circuit traces discussed above. In some embodiments, the electrical pad 196 is used to provide a third electrical signal (e.g., power, ground, bias signal, modulation control signal, a high-speed data signal (test data) for modulation by the optical modulator under test, etc.) to the PIC chip 104-2 during a test procedure for testing the PIC chip 104-2, and / or receive a fourth electrical signal (e.g., the output of a photodiode, a high-speed demodulated data signal output by an optical demodulator circuit device under test, etc.) from the PIC chip 104-2 during a test procedure for testing the PIC 104-2.

[0055] In an embodiment, the electrical pads 196 of the PIC chip 104-2 are configured to be electrically coupled to electrical contacts (e.g., pins, etc.) of a test probe mechanism to i) receive a third electrical signal (e.g., power, ground, bias, modulation control signal, a high-speed data signal (test data) for modulation by an optical modulator under test, etc.) from the test probe mechanism, and ii) provide a fourth electrical signal (e.g., the output of a photodiode, a high-speed demodulated data signal output by an optical demodulator circuit device under test, etc.) from the electrical component and / or electro-optical component to the test probe mechanism. The circuit traces of the PIC chip 104-2 transfer the third electrical signal from the electrical pads 196 to the electrical component and / or electro-optical component, and transfer the fourth electrical signal from the electrical component and / or electro-optical component to the electrical pads 196.

[0056] like Figure 1C As illustrated, the optical couplers 160, 176 are laterally spaced a distance D from the PIC chip 104-2, and this lateral spacing between the optical couplers 160, 176 and the PIC chip 104-2 provides clearance for a test probe assembly that will contact the electrical pads 196 of the PIC chip 104-2. In some embodiments, this lateral spacing allows for a simplified test probe design compared to implementations where the optical couplers 160, 176 are significantly closer to the PIC chip 104-2.

[0057] In a test operation for testing PIC chip 104-2, a test probe mechanism is manipulated over wafer 100 to be close to PIC chip 104-1 and PIC chip 104-2, so that i) the lens fiber array of the test probe mechanism is aligned with the optical couplers 160, 176 of PIC chip 104-1, and ii) the electrical contacts (e.g., pins, etc.) of the test probe mechanism are aligned with and in contact with the electrical pads 196 of PIC chip 104-2. Optionally, other electrical contacts (e.g., pins, etc.) of the test probe mechanism are aligned with and in contact with the electrical pads 116 of PIC chip 104-1.

[0058] The test probe mechanism provides electrical signals (e.g., one or more of a ground signal, a power signal, a control signal, a bias signal, a modulation control signal, a high-speed data signal (test data) for modulation by the optical modulator under test, etc.) to the electrical pads 196 and optionally the electrical pads 116. Additionally, the test probe mechanism provides one or more optical signals to the optical coupler 160. The waveguide 168 and the edge coupler 164 provide the optical signals from the test probe mechanism to the edge coupler 136 of the PIC chip 104-2. In this way, one or more operational properties of the edge coupler 136 of the PIC chip 104-2 can be tested while the PIC chip 104-2 is still integral with the PIC wafer 100, which is not possible with typical PIC wafer testing techniques.

[0059] From PIC chip 104-2 ( Figure 1A ) is output by edge coupler 144 of PIC chip 104-2 and received by edge coupler 172 of PIC chip 104-1. The optical signal received by edge coupler 172 is passed to optical coupler 176 via waveguide 180, and optical coupler 176 outputs the optical signal to the test probe mechanism. In this way, one or more operational properties of edge coupler 144 of PIC chip 104-2 may also be tested while PIC chip 104-2 is still integral with PIC wafer 100, which is not possible with typical PIC wafer testing techniques. Additionally, when light is passed from the test probe mechanism to MZM 132 and the optical signal from MZM 132 is passed to the test probe mechanism, one or more operational properties of MZM 132 may be tested while PIC chip 104-2 is still integral with PIC wafer 100.

[0060] In some embodiments, the electrical signal output by the PIC chip 104 - 2 (eg, the output of a photodiode, a high-speed demodulated data signal output by an optical demodulator circuit device, etc.) is received by a test probe mechanism and analyzed by a test device.

[0061] The structure of the PIC chip 104 described above is only a simplified example. In other embodiments, the PIC chip 104 has another suitable structure.

[0062] Figure 2A According to the embodiment Figure 1A FIG. 1 is an enlarged view of a portion of PIC wafer 100, showing edge coupler 136 of PIC chip 104-2 and one of corresponding edge couplers 164 of PIC chip 104-1. In some embodiments, edge couplers 144, 172 ( Figure 1A ) has the same Figure 2A The edge coupler structure shown is a suitable structure. Figure 2A Example structures (eg, fork-shaped structures) of edge coupler 136 and edge coupler 164 are illustrated, but according to other embodiments, PIC chip 104 includes edge couplers (eg, edge couplers 136 , 144 , 164 , 172 ) having other suitable edge coupler structures.

[0063] Edge coupler 136 includes facet 204, and edge coupler 164 includes facet 208. Facets 204, 208 are aligned to sub-micron accuracy by design via photolithography, for example, during silicon PIC foundry fabrication. Air gap trench 212 is formed between PIC chip 104-1 and PIC chip 104-2 using a suitable PIC fabrication process, such as reactive ion etching (RIE) or another suitable process. In an embodiment, the process used to form air gap trench 212 is also used to form smooth facets 204, 208.

[0064] The groove 212 has a suitable width w. The width w is selected to be significantly within the Rayleigh range of the extended mode to minimize coupling losses. On the other hand, the width w is selected to be large enough to allow economical separation of the PIC chips 104 during die singulation by a suitable dicing technique (such as laser dicing, blade dicing, etc.). When the width w is narrow enough, the optical loss between the edge couplers 136, 164 will be low enough to fit within a typical optical link budget.

[0065] Figure 2B According to the embodiment Figure 2A FIG. 1 is a diagram of PIC chip 104 - 1 after being separated from PIC chip 104 - 2 .

[0066] although FIG. 2A to FIG. 2B It is a reference Figure 1A described, but in some embodiments, reference FIG. 2A to FIG. 2B The technology described is different from Figure 1A The example PIC chip 104 may be used in conjunction with other suitable PIC chips. In some embodiments, reference FIG. 2A to FIG. 2BThe techniques described are not Figure 1A The example PIC chip 104 is used in conjunction with the example PIC chip 104.

[0067] Figure 3 300 is a simulated graph of optical coupling loss versus groove width between edge couplers of adjacent PIC chips (such as PIC chip 104-1 and PIC chip 104-2) according to an embodiment. The optical loss corresponding to a 40 μm groove width cut using a blade is approximately 6 to 7 decibels (dB), which has been verified in measurements using PIC chips (made using a 1550 nm process). The optical loss corresponding to a 20 μm groove width cut using a laser is approximately 4 dB to 5 dB, which is significantly better than alternative testing techniques where light enters the PIC chip under test using a 2x2 input directional optical coupler. Such input directional optical couplers typically have relatively high optical losses due to the low coupler / tap ratio of the input laser in the optical path (typically 20:80), which results in an optical loss of at least 7 dB. If such an input directional optical coupler uses an unused port of a 90:10 tap, the optical loss may be greater than 10 dB, which may require the use of a fiber amplifier and may present hazardous optical power levels in the test setup. Thus, in at least some embodiments, use of techniques such as described herein eliminates the need for fiber amplifiers and potentially hazardous optical power levels in the test setup.

[0068] Figure 4 According to another embodiment Figure 2A 1 and 104-2. An optically transparent liquid or epoxy 404 is deposited in the trench 212 between the edge coupler 136 and the edge coupler 164, at least for the testing purposes described above. In at least some embodiments, the use of the liquid / epoxy 404 during testing facilitates obtaining measurements while the PIC chip 104-2 remains integral to the PIC wafer 100 that more closely matches the eventual end-use coupling. For example, according to some embodiments, the refractive index of the liquid / epoxy 404 is selected to match the refractive index of the waveguide of the PIC chip 104, which reduces divergence and mitigates reflections that would be seen in the air gaps in the trench 212 where the liquid / epoxy 404 is omitted.

[0069] According to some embodiments, the liquid / epoxy 404 is later heated to evaporate, such as using an isopropyl alcohol (IPA) vapor vacuum dryer or another suitable mechanism, or is removed during a washing step (e.g., in conjunction with dicing). In another embodiment, the epoxy 404 used to fabricate the assembly of the PIC chip 104 is cured in situ.

[0070] In some embodiments, the above reference Figure 4 The use of the liquid / epoxy resin described is different from Figure 1A The example PIC chip 104 may be used in conjunction with other suitable PIC chips. In some embodiments, the above referenced Figure 4 The described liquid / epoxy resin is not intended for use with Figure 1A The example PIC chip 104 is used in conjunction with the example PIC chip 104.

[0071] In some embodiments, wherein each of at least some of the PIC chips includes an optical communication transmitter component and an optical communication receiver component, the test component of a first PIC chip includes one or more waveguides that feed light output from the optical transmitter component of an adjacent second PIC chip back to the optical receiver component of the second PIC chip. Figure 5 is an enlarged view of an example PIC wafer 500 illustrating a test assembly of a PIC chip 504 that feeds back light output from an optical emitter assembly of a PIC chip 508, in accordance with an embodiment.

[0072] A trench 512 such as described above is made between PIC chip 504 and PIC chip 508 .

[0073] The test assembly of PIC chip 504 includes waveguide 516. Waveguide 516 transfers light received from the test probe to a first edge coupler (not shown) of PIC chip 504. Waveguide 528 of PIC chip 508 transfers light from the test probe (received via a second edge coupler (not shown) of PIC chip 508) toward an optical transmitter assembly (not shown) of PIC chip 508. The optical transmitter assembly of PIC chip 508 generates an output optical signal, which is transferred to a third edge coupler (not shown) of PIC chip 508 via waveguide 532. Waveguide 544 of the test assembly of PIC chip 504 receives the output optical signal from PIC chip 508 via a fourth edge coupler (not shown) of PIC chip 504. Waveguide 544 feeds the output optical signal from PIC chip 508 back to PIC chip 508 via a fifth edge coupler (not shown) of PIC chip 504. Waveguide 544 intersects waveguide 516 with a high isolation 90° waveguide crossover perpendicular to waveguide 516.

[0074] Waveguide 560 of PIC chip 508 passes light from the test component of PIC chip 504 (received via a sixth edge coupler (not shown) of PIC chip 508 ) toward an optical receiver component (not shown) of PIC chip 508 .

[0075] In an embodiment, Figures 1A to 1C The example PIC chip 104 uses a Figure 5In other embodiments, Figures 1A to 1C The example PIC chip 104 does not use the above reference Figure 5 In other embodiments, the optical feedback technology described in Figures 1A to 1C Different from the example PIC chip 104, other suitable PIC chips such as those described above may be used. Figure 5 The optical feedback technology described herein, these PIC chips include test components such as those described herein.

[0076] Figure 6 6 is a simplified diagram of a portion of an example PIC wafer 600 according to another embodiment. The portion of the PIC wafer 600 includes a PIC chip 604-1 and a PIC chip 604-2. Figure 6 Only two PIC chips 604 are shown in the figure, but the PIC chip 600 includes more than two PIC chips 604, such as Figure 1B 1. In an embodiment, all PIC chips 604 of PIC wafer 600 have the same structure. For example, in an embodiment, chip 604-1 and PIC chip 604-2 have the same structure. In other embodiments, most of PIC chips 604 have the same structure, while one or more other PIC chips 604 have different suitable structures.

[0077] PIC chip 604-1 includes a plurality of optical components and optionally electrical components (not shown) corresponding to the end use of PIC chip 604-1 that provides the desired functionality after PIC chip 604-1 has been separated from the other PIC chips 604 of PIC wafer 600 and has been packaged in a suitable PIC package. Figure 6 In the example of PIC chip 604-1, PIC chip 604-1 includes optical components and electrical components related to i) optical modulation for generating multiple optical communication signals for transmission via one or more suitable optical media, and ii) demodulation of the multiple optical signals as part of recovering data from the multiple optical communication signals received via the one or more suitable optical media. In other embodiments, PIC chip 604-1 additionally includes optical components and optionally electrical components related to processing the one or more optical signals in another suitable manner other than optical modulation or optical demodulation, such as filtering the one or more optical signals, optically multiplexing the optical signals, optically demultiplexing the optical signals, etc.

[0078] PIC chip 604-1 also includes a plurality of optical components and optionally electrical components (i.e., test components 608) configured to facilitate testing of one or more operational properties of optical components disposed on a PIC chip 604 (e.g., PIC chip 604-2) adjacent to PIC chip 604-1. As will be further described below, test components 608 provide one or more mechanisms for i) receiving light from a test probe mechanism and delivering the light to PIC chip 604-2, and ii) receiving light from PIC chip 604-2 and feeding the light back to PIC chip 604-2. Since PIC chips 604-1 and 604-2 have the same structure, PIC chip 604-2 also includes a test component (not shown), such as test component 608.

[0079] PIC chip 604-2 includes an edge coupler 616 that is configured to receive light from one or more lasers when PIC chip 604-2 is in end-use product form, e.g., after PIC chip 604-2 has been separated from other PIC chips 604 of PIC wafer 600 and has been packaged in a suitable PIC package. Edge coupler 616 is optically coupled to an optical modulator (e.g., MZM; not shown) via a corresponding waveguide. The optical modulator of PIC chip 604-2 generates eight transmitter output signals TX1 to TX8, which are delivered to corresponding edge couplers 620 via waveguides, and edge coupler 620 is configured to output transmitter output signals TX1 to TX8.

[0080] The PIC chip 604-2 includes an edge coupler 624 configured to receive the modulated optical signals RX1 to RX8 via one or more optical media when the PIC chip 604-2 is in an end-use product form, e.g., after the PIC chip 604-2 has been separated from the other PIC chips 604 of the PIC wafer 600 and has been packaged in a suitable PIC package. The edge coupler 624 is optically coupled to an optical demodulator (not shown) via corresponding waveguides (not shown).

[0081] Since PIC chips 604-1 and 604-2 have the same structure, PIC chip 604-1 also includes an edge coupler, an optical modulator (not shown), an optical demodulator (not shown), and a waveguide (not shown) like those of PIC chip 604-2 discussed above.

[0082] Referring to the test assembly 608 of the PIC chip 604-1, the test assembly 608 includes an optical coupler 640 configured to receive light from a test probe mechanism. In an embodiment, to facilitate testing of the PIC chip 604-1 and the PIC chip 604-2 when they are integrated with the PIC wafer 600, the optical coupler 640 is configured to receive light from a direction that is at an angle between about 60 degrees and 90 degrees relative to a plane parallel to the PIC wafer 600. In another embodiment, the optical coupler 640 is configured to receive light from a direction that is at an angle between about 70 degrees and 90 degrees relative to a plane parallel to the PIC wafer 600. In another embodiment, the optical coupler 640 is configured to receive light from a direction that is at an angle between about 75 degrees and 90 degrees relative to a plane parallel to the PIC wafer 600. In other embodiments, the optical coupler 640 is configured to receive light from a direction that is at another suitable angle relative to a plane parallel to the PIC wafer 600.

[0083] In an embodiment, the optical coupler 640 includes a grating coupler. In another embodiment, the optical coupler 640 includes other suitable couplers other than a grating coupler.

[0084] The test assembly 608 of the PIC chip 604-1 also includes an edge coupler 644 that is optically aligned with the edge coupler 616 of the PIC chip 604-2. The edge coupler 644 is optically coupled to the optical coupler 640 via a waveguide 648. In a test operation, light from the test probe mechanism is received by the optical coupler 640 and passed to the edge coupler 644 via the waveguide 648. The edge coupler 644 is configured to output the light from the test probe mechanism to the edge coupler 616 of the PIC chip 604-2.

[0085] The test assembly 608 of the PIC chip 604-1 also includes an edge coupler 660 that is optically aligned with the edge coupler 620 of the PIC chip 604-2. In a test operation, the optical signals TX to TX8 output by the edge coupler 620 of the PIC chip 604-2 are received by the edge coupler 660.

[0086] The test assembly 608 of the PIC chip 604-1 also includes an edge coupler 664, which is optically aligned with the edge coupler 624 of the PIC chip 604-2. The edge coupler 664 is optically coupled to the edge coupler 660 via a waveguide 668, and the optical signals TX1 to TX8 received by the edge coupler 660 are fed back to the edge coupler 664 via the waveguide 668. In the test operation, the optical signals TX to TX8 output by the edge coupler 624 of the PIC chip 604-2 are received by the edge coupler 660 of the PIC chip 604-2 and fed back to the edge coupler 624 of the PIC chip 604-2 via the waveguide 668 and the edge coupler 664.

[0087] In the test operation of testing PIC chip 604-2, the test probe mechanism is manipulated on wafer 600 to be close to PIC chip 604-1 and PIC chip 604-2, so that i) the lens fiber array of the test probe mechanism is aligned with the optical coupler 640 of PIC chip 604-1, and ii) the electrical contacts (e.g., pins, etc.) of the test probe mechanism are aligned with and contacted with the electrical pads (not shown) of PIC chip 604-2. Optionally, other electrical contacts (e.g., pins, etc.) of the test probe mechanism are aligned with and contacted with the electrical pads of PIC chip 604-1 corresponding to the test component 608.

[0088] The test probe mechanism provides electrical signals (e.g., one or more of a ground signal, a power signal, a modulation control signal, a bias signal, a high-speed data signal (test data) for modulation by the optical modulator under test, etc.) to the electrical pads of the PIC chip 604-2 (and optionally the electrical pads of the PIC chip 604-1). Additionally, the test probe mechanism provides an optical signal to the optical coupler 640. The waveguide 648 and the edge coupler 644 provide the optical signal from the test probe mechanism to the edge coupler 616 of the PIC chip 604-2. In this way, the edge coupler 616 of the PIC chip 604-2 can be tested while the PIC chip 604-2 is still integral with the PIC wafer 600, which is not possible with typical PIC wafer testing techniques.

[0089] The optical signal output by the optical modulator of the PIC chip 604-2 is output by the edge coupler 620 of the PIC chip 604-2 and is received by the edge coupler 660 of the PIC chip 604-1. The optical signal received by the edge coupler 660 is fed back to the edge coupler 624 of the PIC chip 604-2 via the waveguide 668 and the edge coupler 664. In this way, the edge coupler 620 and the edge coupler 624 of the PIC chip 104-2 can also be tested while the PIC chip 604-2 is still integral with the PIC wafer 600, which is not possible with typical PIC wafer testing techniques.

[0090] Additionally, when light is passed from the test probe mechanism to the optical modulator and the optical signal output by the optical modulator is fed back to the optical demodulator, the operational properties of the optical modulator and the optical demodulator can be tested while the PIC chip 604 - 2 is still integral with the PIC wafer 600 .

[0091] The edge couplers 616, 620, 624 of the PIC chip 604-2 are typically spaced laterally at different distances and / or spaced laterally at distances that are significantly longer than the pitch of the optical inputs / outputs of a typical test probe. According to an embodiment, as discussed above, the optical couplers 640 of the test assembly 608 are equidistant at a suitable distance corresponding to the pitch of the optical inputs / outputs of a typical optical test probe. For example, in some embodiments, the optical couplers 608 are equidistant at 127 μm, or equidistant at 250 μm. Therefore, according to some embodiments, the test assembly 608 is configured to, in conjunction with testing the PIC chip 604-2, convert the lateral spacing of the optical inputs / outputs of the PIC chip 604-2 from a first lateral spacing to a second lateral spacing that is uniform and shorter than the first spacing. According to an embodiment, the second spacing corresponds to the pitch of the optical inputs / outputs of a typical optical test probe. In at least some embodiments, converting the lateral spacing of the optical input / output of the PIC chip 604-2 from the first lateral spacing to the standard fiber array optical pitch reduces test probe cost and / or complexity and eliminates the need for a custom optical block for the test probe (which may be cost-prohibitive and / or commercially unfeasible).

[0092] In an embodiment, Figures 1A to 1C The example PIC chip 104 uses a Figure 6 In other embodiments, Figures 1A to 1C The example PIC chip 104 does not use the above reference Figure 6 In other embodiments, the optical feedback technology described in Figures 1A to 1C Different from the example PIC chip 104, other suitable PIC chips such as those described above may be used. Figure 6 The optical feedback technology described herein, these PIC chips include test components such as those described herein.

[0093] Figure 7 7 is a simplified diagram of a portion of another example PIC wafer 700 according to another embodiment. The portion of the PIC wafer 700 includes a PIC chip 704-1 and a PIC chip 704-2. Figure 7 Only two PIC chips 704 are shown in the figure, but the PIC chip 700 includes more than two PIC chips 704, such as Figure 1B1. In an embodiment, all PIC chips 704 of PIC wafer 700 have the same structure. For example, in an embodiment, chip 704-1 and PIC chip 704-2 have the same structure. In other embodiments, most of PIC chips 704 have the same structure, while one or more other PIC chips 704 have different suitable structures.

[0094] PIC chip 704-1 includes a number of optical components and optionally electrical components (not shown) corresponding to the end use of PIC chip 704-1 that provides the desired functionality after PIC chip 704-1 has been separated from the other PIC chips 704 of PIC wafer 700 and has been packaged in a suitable PIC package. Figure 7 In the example of PIC chip 704-1, PIC chip 704-1 includes optical components and electrical components related to i) optical modulation for generating multiple optical communication signals for transmission via one or more suitable optical media, and ii) demodulation of the multiple optical signals as part of recovering data from the multiple optical communication signals received via the one or more suitable optical media. In other embodiments, PIC chip 704-1 additionally includes optical components and optionally electrical components related to processing the one or more optical signals in another suitable manner other than optical modulation or optical demodulation, such as filtering the one or more optical signals, optically multiplexing the optical signals, optically demultiplexing the optical signals, etc.

[0095] PIC chip 704-1 also includes a plurality of optical components and electrical components (i.e., test components 708) configured to facilitate testing of one or more operational properties of optical components disposed on a PIC chip 704 (e.g., PIC chip 704-2) adjacent to PIC chip 704-1. As will be further described below, test components 708 provide one or more mechanisms for i) receiving light from a test probe mechanism and delivering the light to PIC chip 704-2, and ii) receiving light from PIC chip 704-2 and processing the light received from PIC chip 704-2. Since PIC chips 704-1 and 704-2 have the same structure, PIC chip 704-2 also includes a test component (not shown), such as test component 708.

[0096] PIC chip 704-2 includes an edge coupler 716 that is configured to receive light from the laser when PIC chip 704-2 is in end-use product form, e.g., after PIC chip 704-2 has been separated from other PIC chips 704 of PIC wafer 700 and has been packaged in a suitable PIC package. Edge coupler 716 is optically coupled to an optical modulator (e.g., MZM; not shown) via a corresponding waveguide (not shown). The optical modulator of PIC chip 704-2 generates four transmitter output signals TX1 to TX4, which are passed to corresponding edge couplers 720 via waveguides, and edge coupler 720 is configured to output transmitter output signals TX1 to TX4. Although in Figure 7 One edge coupler 716 is illustrated in FIG. 7 , but in other embodiments, the PIC chip 704 - 2 includes multiple edge couplers 716 configured to receive light from one or more lasers when the PIC chip 704 - 2 is in end-use product form.

[0097] The PIC chip 704-2 includes an edge coupler 724 configured to receive modulated optical signals RX1 to RX4 via one or more optical media when the PIC chip 704-2 is in end-use product form, e.g., after the PIC chip 704-2 has been separated from other PIC chips 704 of the PIC wafer 700 and has been packaged in a suitable PIC package. The edge coupler 724 is optically coupled to an optical demodulator (not shown) via corresponding waveguides.

[0098] According to an embodiment, the PIC chip 704-2 includes an edge coupler 728 associated with an alignment test probe mechanism, as will be described below. The edge coupler 728 is optically coupled to the photodiode 732 via a waveguide 736. The output of the photodiode 732 is electrically coupled to the electrical pad 740 via a circuit trace. In some embodiments, the PIC chip 704-2 includes other electrical pads and circuit traces (not shown) that are configured to provide ground, power and / or bias signals to the photodiode 732.

[0099] Since PIC chips 704-1 and 704-2 have the same structure, PIC chip 704-1 also includes edge couplers, optical modulators (not shown), optical demodulators (not shown), waveguides (not shown), and electrical traces and pads (not shown) like those of PIC chip 704-2 discussed above.

[0100] Referring to the test assembly 708 of the PIC chip 704-1, according to an embodiment, the test assembly 708 includes an optical coupler 752, which is configured to receive light from the test probe mechanism in conjunction with the alignment test probe mechanism, as will be described below. According to an embodiment, the test assembly 708 also includes one or more optical couplers 756, which are configured to receive light from the test probe, and the light received via the one or more optical couplers 756 will be provided to the one or more optical transmitter components of the PIC chip 704-2, as further discussed below. According to an embodiment, the test assembly 708 also includes an optical coupler 760, which is configured to receive light from the test probe, and the light received via the optical coupler 760 will be provided to the optical receiver component of the PIC chip 704-2, as further discussed below.

[0101] In an embodiment, to facilitate testing of PIC chip 704-1 and PIC chip 704-2 when they are integrated with PIC wafer 700, optical couplers 752, 756, 760 are configured to receive light from a direction at an angle between about 60 and 90 degrees relative to a plane parallel to PIC wafer 700. In another embodiment, optical couplers 752, 756, 760 are configured to receive light from a direction at an angle between about 70 and 90 degrees relative to a plane parallel to PIC wafer 700. In another embodiment, optical couplers 752, 756, 760 are configured to receive light from a direction at an angle between about 75 and 90 degrees relative to a plane parallel to PIC wafer 700. In other embodiments, optical couplers 752, 756, 760 are configured to receive light from a direction at another suitable angle relative to a plane parallel to PIC wafer 700.

[0102] In an embodiment, the optical couplers 752, 756, 760 include grating couplers. In another embodiment, the optical couplers 752, 756, 760 include other suitable couplers other than grating couplers.

[0103] The test assembly 708 of the PIC chip 704-1 also includes an edge coupler 772 that is optically aligned with the edge coupler 728 of the PIC chip 704-2. The edge coupler 772 is optically coupled to the optical coupler 752 via a waveguide 774. In a test operation, light from the test probe mechanism is received by the optical coupler 752 and passed to the edge coupler 772 via the waveguide 774. The edge coupler 772 is configured to output the light from the test probe mechanism to the edge coupler 728 of the PIC chip 704-2. As will be further described below, in an embodiment, the electrical output of the photodiode 732 optically coupled to the edge coupler 728 can be used to determine when the test probe is sufficiently aligned with the optical couplers 752, 756, 760.

[0104] The test assembly 708 of the PIC chip 704-1 also includes one or more edge couplers 776 optically aligned with the one or more edge couplers 716 of the PIC chip 704-2. The one or more edge couplers 776 are optically coupled to the one or more optical couplers 756 via one or more waveguides 778. In a test operation, light from the test probe mechanism is received by the one or more optical couplers 756 and passed to the one or more edge couplers 776 via the one or more waveguides 778. The one or more edge couplers 776 are configured to output light from the test probe mechanism to the one or more edge couplers 716 of the PIC chip 704-2.

[0105] The test assembly 708 of the PIC chip 704-1 also includes an edge coupler 780, which is optically aligned with the edge coupler 724 of the PIC chip 704-2. The edge coupler 780 is optically coupled to the optical coupler 760 via a waveguide 782. In a test operation, an optical signal received via the optical coupler 760 is transferred to the edge coupler 780 via the waveguide 782, and an optical signal output by the edge coupler 780 is received by the edge coupler 724 of the PIC chip 704-2.

[0106] The test assembly 708 of the PIC chip 604-1 also includes an edge coupler 784 that is optically aligned with the edge coupler 720 of the PIC chip 704-2. The edge coupler 784 is optically coupled to the photodiode 786 via a waveguide 788. The output of the photodiode 788 is electrically coupled to an electrical pad 790 via a circuit trace. In some embodiments, the PIC chip 704-2 includes other electrical pads and circuit traces (not shown) that are configured to provide ground, power, and / or bias signals to the photodiode 786.

[0107] In a test operation, light output by the optical transmitter components (e.g., TX1 to TX4) of the PIC chip 704-2 is output by the edge coupler 720 of the PIC chip 704-2 and received by the edge coupler 784 of the PIC chip 704-1. As will be further described below, in an embodiment, the electrical output of the photodiode 786 optically coupled to the edge coupler 784 can be used to test one or more optical characteristics (e.g., operational properties) of the optical transmitter components of the PIC chip 704-2 and / or the edge coupler 720.

[0108] In the test operation of testing PIC chip 704-2, the test probe mechanism is manipulated on wafer 700 to be close to PIC chip 704-1 and PIC chip 704-2 so that i) the lens fiber array of the test probe mechanism is aligned with the optical couplers 756 and 760 of PIC chip 704-1, ii) the electrical contacts (e.g., pins, etc.) of the test probe mechanism are aligned with and in contact with the electrical pads (such as electrical pad 740) of PIC chip 704-2; and iii) the electrical contacts (e.g., pins, etc.) of the test probe mechanism are aligned with and in contact with the electrical pads (such as electrical pad 790) of PIC chip 704-1.

[0109] The test probe mechanism provides electrical signals (e.g., one or more of a ground signal, a power signal, a modulation control signal, a bias signal, a high-speed data signal (test data) for modulation by the optical modulator under test, etc.) to electrical pads of PIC chip 704-2 (e.g., electrical pad 740) and electrical pads of PIC chip 704-1 (e.g., electrical pad 790).

[0110] The alignment optical signal output by the test probe is received by the optical coupler 752 and passed to the edge coupler 772 via the waveguide 774. The edge coupler 772 outputs the optical signal to the edge coupler 728 of the PIC chip 704-2. The optical signal received by the edge coupler 728 is passed to the photodiode 732 via the waveguide 736. According to an embodiment, the electrical output of the photodiode 732 is received by the test probe mechanism via the electrical pad 740, and the test controller (not shown) uses the electrical output of the photodiode 732 to determine when the test probe mechanism is satisfactorily aligned with the optical couplers 756, 760.

[0111] Additionally, the test probe mechanism provides one or more optical signals to the one or more optical couplers 756. The one or more waveguides 778 and the one or more edge couplers 776 provide the one or more optical signals from the test probe mechanism to the one or more edge couplers 716 of the PIC chip 704-2. In this way, the one or more edge couplers 716 of the PIC chip 704-2 can be tested while the PIC chip 704-2 is still integral to the PIC wafer 700, which is not possible with typical PIC wafer testing techniques.

[0112] One or more optical signals received by one or more edge couplers 716 of PIC chip 704-2 are provided to an optical transmitter component (e.g., an optical modulator; not shown) of PIC chip 704-2. Transmitter optical signals TX1 to TX4 output by the optical modulator of PIC chip 704-2 are output by edge coupler 720 of PIC chip 704-2 and received by edge coupler 784 of PIC chip 704-1. The optical signal received by edge coupler 784 is passed to photodiode 786 via waveguide 788. According to an embodiment, the electrical output of photodiode 786 is received by a test probe mechanism via electrical pad 790, and a test controller (not shown) uses the electrical output of photodiode 786 to test optical characteristics (e.g., operational properties) of edge coupler 720 and transmitter component (e.g., optical modulator; not shown) of PIC chip 704-2. In this way, the edge coupler 720 of the PIC chip 704-2 can be tested while the PIC chip 704-2 is still integral to the PIC wafer 700, which is not possible with typical PIC wafer testing techniques.

[0113] Additionally, when light is delivered from the test probe mechanism to the optical emitter components (eg, optical modulators) of the PIC chip 704 - 2 , operational properties of the optical emitter components may be tested while the PIC chip 704 - 2 is still integral to the PIC wafer 700 .

[0114] Additionally, the test probe mechanism provides a plurality of optical signals to the optical coupler 760. The waveguide 782 and the one or more edge couplers 780 provide the plurality of optical signals from the test probe mechanism to the one or more edge couplers 724 of the PIC chip 704-2. In this manner, the edge couplers 724 of the PIC chip 704-2 can be tested while the PIC chip 704-2 is still integral with the PIC wafer 700, which is not possible with typical PIC wafer testing techniques.

[0115] The optical signal received by the edge coupler 724 of the PIC chip 704-2 is provided to an optical receiver component (e.g., an optical demodulator; not shown) of the PIC chip 704-2. In this way, the edge coupler 720 of the PIC chip 704-2 can be tested while the PIC chip 704-2 is still integral with the PIC wafer 700, which is not possible with typical PIC wafer testing techniques.

[0116] Additionally, when light is passed from the test probe mechanism to an optical receiver component (eg, an optical demodulator) of the PIC chip 704 - 2 , operational properties of the optical receiver component may be tested while the PIC chip 704 - 2 is still integral to the PIC wafer 700 .

[0117] The edge couplers 716, 720, 724, 728 of the PIC chip 704-2 are typically spaced laterally at different distances and / or spaced laterally at distances that are significantly longer than the pitch of the optical inputs / outputs of a typical test probe. According to an embodiment, as discussed above, the optical couplers 752, 756, 760 of the test assembly 708 are equidistant at a suitable distance corresponding to the pitch of the optical inputs / outputs of a typical optical test probe. For example, in some embodiments, the optical couplers 708 are equidistant at 127 μm, or equidistant at 250 μm. Therefore, according to some embodiments, the test assembly 708 is configured to convert the lateral spacing of the optical inputs / outputs of the PIC chip 704-2 from a first lateral spacing to a second lateral spacing that is uniform and shorter than the first spacing in conjunction with testing the PIC chip 704-2. According to an embodiment, the second spacing corresponds to the pitch of the optical inputs / outputs of a typical optical test probe. In at least some embodiments, converting the lateral spacing of the optical input / output of PIC chip 704-2 from a first lateral spacing to a standard fiber array optical pitch reduces test probe cost and / or complexity and eliminates the need for a custom optical block for the test probe (which may be cost-prohibitive and / or commercially unfeasible).

[0118] In an embodiment, Figures 1A to 1C An example of a PIC chip 104 and / or Figure 6 The example PIC chip 604 uses a Figure 7 In other embodiments, Figures 1A to 1C An example of a PIC chip 104 and / or Figure 6 The example PIC chip 604 does not use the Figure 7 In other embodiments, the optical feedback technology described in Figures 1A to 1C An example of a PIC chip 104 and Figure 6 Different from the example PIC chip 604, other suitable PIC chips such as those described above may be used. Figure 7The techniques described herein, these PIC chips include test components such as those described herein.

[0119] Typical optical test probe mechanisms use a 6-axis positioner integrated into a custom designed probe to actively align the sub-micron accuracy optical input / output to the wafer grating coupler, as greater than sub-micron accuracy can result in significantly reduced coupling efficiency between the test probe and the grating coupler. Fig. 8A 808 is a graph of a mode 804 of a prior art grating coupler and a near-Gaussian mode 808 of a single mode fiber (SMF) when the modes 804, 808 are aligned. The x-axis and y-axis correspond to x and y positions, respectively, and are in μm. The typical mode field size of the prior art grating coupler mode is about 5x7 μm, and the typical mode field diameter (MFD) of the SMF is typically 10 μm.

[0120] When the modes 804, 808 are misaligned, the degree of overlap of the modes 804, 808 and the coupling efficiency are drastically reduced. Figure 8B When the relative displacement between modes 804 and 808 is 3 μm Fig. 8A Figure 8 shows the patterns 804, 808 of FIG. 8 , which are typical displacements due to the walkoff repeatability of a typical wafer probe. Fig. 8A Similarly, the x-axis and y-axis correspond to the x and y positions, respectively, and are in μm. Figure 8B As shown, with a displacement of 3 μm, the coupling efficiency may decrease by 4 dB to 5 dB, which is undesirable. Additionally, due to the limitations of accurately aligning the fiber array of the test probe device to the wafer grating coupler without the use of the 6-axis positioner discussed above, misalignment in excess of 3 μm is expected to occur. Therefore, it is difficult to achieve acceptable coupling efficiency without the use of sub-micron active alignment.

[0121] In some embodiments, to reduce the need for sub-micron alignment of the test probe mechanism's fiber array with an optical coupler such as the PIC chip described above, the fiber modes of the test probe mechanism's fiber array and the modes of the optical coupler are extended relative to prior art grating couplers and SMF fibers. Fig. 9A 908 is a graph of an extended mode 904 of an example grating coupler and an extended near-Gaussian mode 908 of an example SMF when the modes 904, 908 are aligned according to an embodiment. The x-axis and y-axis correspond to x and y positions, respectively, and are in μm. The mode field size of the grating coupler mode 904 is approximately 8x24 μm, and the MFD of the extended Gaussian mode 908 is approximately 30 μm.

[0122] Fig. 9B When the relative displacement between modes 904 and 908 is 3 μm Fig. 9AFigure 904, 908 of the patterns, which are typical displacements due to the walk-off repeatability of a typical wafer probe. Fig. 9A Likewise, the x-axis and y-axis correspond to the x and y positions, respectively, and are in μm.

[0123] and Figure 8B Compared with the smaller modes 804 and 808, Fig. 9B The degree of overlap between modes 904 and 908 in Fig. 9A The alignment modes 904 and 908 are relatively unchanged compared to each other, so the coupling efficiency remains relatively constant under a relative displacement of 3 μm. Experimental tests show that the extended mode (such as Figures 9A to 9B The coupling efficiency of the example modes 904, 908) of the RF is maintained within about 0.2 dB at a typical 3 μm XY repeatability displacement. FIG. 9A to FIG. 9B The example modes 904, 908) provide significantly greater tolerance to test probe movement misalignment, so that, in at least some embodiments, proper coupling between the test probe mechanism and the optical coupler of the PIC chip can be repeatedly achieved without the use of sub-micron active alignment.

[0124] exist FIG. 9A to FIG. 9B In the example of FIG. 1 , the width of the pattern 904 of the grating coupler parallel to the y-axis is significantly greater than the width of the pattern 904 parallel to the x-axis. In other embodiments, the grating coupler is designed so that FIG. 9A to FIG. 9B Compared to the illustrated pattern 904 , the width of the grating coupler's pattern parallel to the x-axis is significantly closer to the width of the grating coupler's pattern parallel to the y-axis.

[0125] Fig. 10A 1 is a diagram of a typical grating coupler 1000 for a 10 μm SMF mode MFD. The grating coupler 1000 includes a silicon plate 1004 and a grating 1008. The width (M) of the grating coupler 1000 is 16 μm, and the total length of the grating coupler 1000 is 32 μm. The length (L) of the silicon plate 1004 is 12 μm. The period of the grating 1008 is selected based on the wavelength of light with which the grating coupler 1000 is to be used.

[0126] Fig. 10B is a diagram of an example grating coupler 1050 for extended 30 μm SMF mode MFD according to an embodiment. The grating coupler 1050 includes a silicon plate 1054 and a grating 1058. In an embodiment, in order to Fig. 10A In the mode of the grating coupler 1000 compared to the extended grating coupler 1050, the length (L) of the silicon plate 1054 is increased relative to the length of the silicon plate 1004, and the width (M) of the grating coupler 1050 is increased relative to Fig. 10AThe width of the grating coupler 1050 is increased. For example, the width (M) of the grating coupler 1050 is 69 μm, and the length (L) of the silicon plate 1054 is 23 μm. The total length of the grating coupler 1050 is 53 μm, and the period of the grating 1058 is selected based on the wavelength of light with which the grating coupler 1050 is to be used.

[0127] According to an embodiment, the greater length (L) of the silicon plate 1054 and the greater width (M) of the grating coupler 1050 compared to the grating coupler 1000 increase the divergence of the optical mode in the plate 1054 before being coupled out by the grating 1058. In an embodiment, the greater length (L) of the silicon plate 1054 compared to the grating coupler 1000 also allows for a longer propagation distance in the diverging plate mode.

[0128] In some embodiments, further expansion of the mode of the grating coupler 1050 in the propagation direction is achieved via apodization of the grating period of the grating 1058 and / or use of a weaker, lower refractive index SiN grating structure to match the size and shape of the expanded Gaussian mode of the test probe fiber.

[0129] Although the reference Fig. 10B Example dimensions are described, but in other embodiments, the grating coupler has other suitable dimensions. For example, in some embodiments, the length (L) of the silicon plate 1054 is at least 18 μm. In other embodiments, the length (L) of the silicon plate 1054 is at least 20 μm. In other embodiments, the length (L) of the silicon plate 1054 is at least 24 μm. In some embodiments, the width (M) of the grating coupler 1050 is at least 48 μm. In other embodiments, the width (M) of the grating coupler 1050 is at least 54 μm. In other embodiments, the width (M) of the grating coupler 1050 is at least 64 μm. In other embodiments, the width (M) of the grating coupler 1050 is at least 72 μm.

[0130] In other embodiments, the grating coupler 1050 has Fig. 10B The shapes shown are different from the suitable shapes.

[0131] In other embodiments, the grating coupler 1050 is used as described above with reference to Fig. 10B The grating 1058 may be made of a suitable material different from or in addition to the materials described. For example, in another embodiment, the grating 1058 includes silicon nitride on a plate that includes one or more layers of one or more suitable materials (such as one or more of silicon, silicon dioxide, BOX, etc.).

[0132] In some embodiments, the optical couplers 160, 176 ( Figure 1A )、optical coupler 640( Figure 6 ) and / or optical couplers 752, 756, 760 ( Figure 7 ) has the same Fig. 10B In other embodiments, the optical couplers 160, 176 ( Figure 1A )、optical coupler 640( Figure 6 ) and / or optical couplers 752, 756, 760 ( Figure 7 ) has the same Fig. 10B Different suitable structures of grating couplers are described.

[0133] Fig.11A 1 is a simplified block diagram of an example test probe mechanism 1100 for testing a PIC wafer such as described above, according to an embodiment. The test probe mechanism 1100 is shown positioned over a PIC wafer 1104 having an optical coupler 1108 and electrical pads 1112. For example, according to an embodiment, the PIC wafer 1104 is connected to a Figures 1A to 1C 104-1 and 104-2, optical coupler 1108 corresponds to optical coupler 160, 176, and electrical pad 1112 corresponds to electrical pad (such as electrical pad 116 or other electrical pad) of PIC chip 104-1 and / or PIC chip 104-2. As another example, according to another embodiment, PIC chip 1104 corresponds to Figure 6 PIC chip 1104 corresponds to PIC chip 600, optical coupler 1108 corresponds to optical coupler 640, and electrical pad 1112 corresponds to electrical pad of PIC chip 604-1 and / or PIC chip 604-2. As another example, according to another embodiment, PIC chip 1104 corresponds to Figure 7 The optical coupler 1108 corresponds to the optical couplers 752, 756, 760, and the electrical pad 1112 corresponds to the electrical pad 740 of the PIC chip 604-1 and the electrical pad 790 of the PIC chip 604-2 and / or other electrical pads of the PIC chip 704-1 and / or the PIC chip 704-2.

[0134] In other embodiments, PIC wafer 1104 corresponds to a suitable PIC wafer other than PIC wafers 100, 600, 700. In other embodiments, a PIC wafer other than PIC wafers 100, 600, 700 is used. Fig.11A A suitable test probe mechanism of the example test probe mechanism 1100 is used to test the PIC wafers 100 , 600 , 700 .

[0135] The test probe mechanism 1100 includes a probe card 1120. The test probe mechanism 1100 also includes an end-fire lens fiber array 1124. Additionally, an XY fine positioner 1128 is coupled to the probe card 1120 and the fiber array 1124. The XY fine positioner 1128 is used to align the fiber array 1124 with the electrical probe 1132 of the test probe mechanism 1100. The electrical probe 1132 is coupled to the probe card 1120. The XY fine positioner 1128 allows for end-user field tuning in the event of mechanical expansion / contraction over temperature, wear of the tip of the electrical probe, changes in adapting to electrical probe needle overload, etc. In other embodiments, the XY fine positioner 1128 is omitted and the fiber array 1124 is mounted to the probe card. In such embodiments, the fiber array 1124 and / or the electrical probe 1132 are adjusted and fixed to the position alignment assembly of the test probe mechanism 1100.

[0136] Fig. 11B 1 is a simplified block diagram of another example test probe mechanism 1150 for testing PIC wafers such as those described above, according to another embodiment. The test probe mechanism 1150 is illustrated as being positioned above with reference to Fig.11A On the PIC chip 1104 in question.

[0137] The test probe mechanism 1150 includes a probe card 1170. The test probe mechanism 1100 also includes an in-plane coupled lens fiber array 1174. Additionally, an XY fine positioner 1178 is coupled to the probe card 1170 and the fiber array 1174. The XY fine positioner 1178 is used to align the fiber array 1174 with the electrical probe 1182 of the test probe mechanism 1150. The electrical probe 1182 is coupled to the probe card 1170. The XY fine positioner 1178 allows for end-user field tuning in the event of over-temperature mechanical expansion / contraction, wear of the tip of the electrical probe, adaptation to changes in electrical probe needle overload, etc. In other embodiments, the XY fine positioner 1178 is omitted and the fiber array 1174 is mounted to the probe card. In such embodiments, the fiber array 1174 and / or the electrical probe 1182 are adjusted and fixed to the position alignment assembly of the test probe mechanism 1150.

[0138] Now refer to FIG. 11A to FIG. 11B According to some embodiments, the change in z-height directly affects the coupling position on the PIC wafer 1104 because the light is coupled at an angle, such as about 10°. Thus, for example, according to some embodiments, a 20 μm wear plus a 20 μm additional overload will reduce the working distance by 40 μm and the relative X position by 40*tan(10°), which is about 7 μm.

[0139] In some embodiments, the lens arrays 1124, 1174 are configured to generate an extended pattern at a relatively long working distance (e.g., 200 μm or another suitable working distance), such as with reference to Fig. 9B The electrical probes 1132 and 1182 may be any suitable electrical probe technology, such as a cantilever, a vertical probe, a film, a pin, a needle, or the like.

[0140] As described above, in at least some embodiments, the lateral distance between lens arrays 1124, 1174 and electrical probes 1132, 1182 enables the use of electrical probe techniques, such as vertical pins, thin film probe cards, etc., which cannot be easily cut or otherwise adapted to allow insertion of optical arrays.

[0141] A test probe mechanism such as the above (e.g., test probe mechanism 1100, test probe mechanism 1150, etc.) is a component of a wafer testing apparatus. In various embodiments, the wafer testing apparatus includes components such as a power supply, a laser for generating an optical signal output by the test probe mechanism, an analog-to-digital converter (ADC) for converting an analog signal received by the test probe mechanism into a digital signal for processing by the test apparatus, an electrical signal generator for generating an electrical test signal such as the above output by the test probe mechanism, an optical processor for processing the optical signal received by the test probe mechanism, etc. In some embodiments, the wafer testing apparatus further includes one or more computer processors that execute machine-readable instructions that, when executed by the one or more computer processors, cause the one or more computer processors to process the electrical and / or optical signals received by the test probe mechanism. In some embodiments, when executed by the one or more computer processors, the machine-readable instructions also cause the one or more computer processors to analyze the operational properties of the optical components disposed on the PIC chip by processing the electrical and / or optical signals received by the test probe mechanism. In some embodiments, the machine-readable instructions are stored in one or more memory devices of the wafer testing apparatus.

[0142] Fig.12 is a flow chart of an example method 1200 for testing a PIC chip integrated with a PIC wafer according to an embodiment. According to various embodiments, the method 1200 is combined with Figures 1A to 1C PIC chip 100, Figure 6 PIC chip 600 and / or Figure 7 The PIC chip 700 is implemented, and for ease of explanation, reference is made to Figure 1A , Figure 6 and Figure 7 According to other embodiments, the method 1200 is combined with Figures 1A to 1C PIC chip 100, Figure 6PIC chip 600 and / or Figure 7 The PIC chip 700 may be implemented in another suitable PIC chip. According to some embodiments, Figures 1A to 1C PIC chip 100, Figure 6 The PIC wafer 600 and / or the PIC wafer 700 is tested using another suitable method different from the method 1200 .

[0143] According to some embodiments, method 1200 involves using Fig.11A Test probe mechanism 1100 or Fig. 11B The test probe mechanism 1150, and for ease of explanation, refer to FIG. 11A to FIG. 11B Describe method 1200. In other embodiments, using FIG. 11A to FIG. 11B The method 1200 can be implemented by using another suitable test probe mechanism different from the test probe mechanism 1100 and 1150. In some embodiments, Fig.11A The test probe mechanism 1100 and / or Fig. 11B The test probe mechanism 1150 is used in other suitable methods other than the method 1200 for testing PIC chips integrated with a PIC wafer.

[0144] At box 1204, a test probe mechanism is manipulated over the PIC wafer to approach an optical coupler among a plurality of optical test components of a first PIC chip of the PIC wafer. In an embodiment, the first PIC chip also includes one or more optical communication components separate from the plurality of optical test components. In some embodiments, the one or more optical communication components separate from the plurality of optical test components correspond to an end use of the first PIC chip that provides desired functionality after the first PIC chip has been separated from other PIC chips of the PIC wafer and has been packaged in a suitable PIC package. In an embodiment, the one or more optical communication components separate from the plurality of optical test components include optical components and electrical components associated with optical modulation for generating one or more optical communication signals for transmission via one or more suitable optical media. In another embodiment, the one or more optical communication components separate from the plurality of optical test components additionally or alternatively include optical components and electrical components that are associated with optical demodulation of one or more optical communication signals received via one or more suitable optical media. In other embodiments, one or more optical communication components separate from the plurality of optical testing components additionally or alternatively include optical components and, optionally, electrical components associated with processing one or more optical signals in another suitable manner other than optical modulation or optical demodulation, such as filtering one or more optical signals, optically multiplexing optical signals, optically demultiplexing optical signals, etc.

[0145] In an embodiment, manipulating the test probe mechanism at block 1204 includes manipulating Fig.11A In another embodiment, manipulating the test probe mechanism at block 1204 includes manipulating Fig. 11B A test probe mechanism 1150 is provided.

[0146] At block 1208, light from the test probe mechanism is provided to the optical coupler of the first PIC chip. For example, in an embodiment, light from the test probe mechanism is provided to the optical coupler 160 ( Figure 1A , Figure 1C In another embodiment, light from the test probe mechanism is provided to the optical coupler 640 ( Figure 6 In another embodiment, light from the test probe mechanism is provided to the optical coupler 756 ( Figure 7 ).

[0147] At block 1212, light from the test probe mechanism is transferred from the optical coupler to the optical component disposed on the second PIC chip via the optical test component of the first PIC chip. For example, in an embodiment, light received via the optical coupler 160 is transferred to the second PIC chip ( Figure 1A In another embodiment, light received via optical coupler 640 is transferred to a second PIC chip via waveguide 648 and edge coupler 644. Figure 6 In another embodiment, light received via optical coupler 756 is transferred to a second PIC chip via waveguide 778 and edge coupler 776. Figure 7 ).

[0148] In an embodiment, providing light from the test probe mechanism to an optical coupler of the first PIC chip at box 1208 includes providing light from the test probe mechanism to a grating coupler of the first PIC chip; and transferring light from the optical coupler at box 1212 includes transferring light from the grating coupler to an optical component disposed on the second PIC chip via an optical test component of the first PIC chip.

[0149] In another embodiment, transferring light at block 1212 includes: transferring light from an optical coupler of a first PIC chip to a first edge coupler of the first PIC chip; and transferring light from the first edge coupler of the first PIC chip to a second edge coupler of a second PIC chip. In an embodiment, the first edge coupler of the first PIC chip is optically aligned with the second edge coupler of the second PIC chip, and the first PIC chip and the second PIC are integral to a PIC wafer.

[0150] At block 1216, one or more operational properties of the optical component disposed on the second PIC chip are tested using the light delivered from the test probe mechanism to the optical component disposed on the second PIC at block 1212.

[0151] In an embodiment, testing one or more operational properties of an optical component disposed on the second PIC chip using light provided from a test probe mechanism at block 1216 includes using light provided from a test probe mechanism and passed from a first edge coupler of the first PIC chip to a second edge coupler of the second PIC chip to test at least one operational property of the second edge coupler of the second PIC chip.

[0152] At block 1220, light from the second PIC chip is transferred to the first PIC chip. For example, in an embodiment, light output by edge coupler 136 of PIC chip 104-2 is received by edge coupler 164 of PIC chip 104-1 ( Figure 1A In another embodiment, light output by edge coupler 620 of PIC chip 604-2 is received by edge coupler 660 of PIC chip 604-1 ( Figure 6 In another embodiment, light output by edge coupler 720 of PIC chip 704-2 is received by edge coupler 784 of PIC chip 704-1 ( Figure 7 ).

[0153] At block 1224, the light passed from the second PIC chip to the first PIC chip at block 1220 is used to test one or more other operational properties of the optical components disposed on the second PIC chip.

[0154] In an embodiment, using light passed from the second PIC chip to the first PIC chip to test one or more other operational properties of an optical component disposed on the second PIC chip at block 1224 includes using light output by a first edge coupler of the second PIC chip and received by a second edge coupler of the first PIC chip to test at least one operational property of a first edge coupler of the second PIC chip, the first edge coupler of the second PIC chip being optically aligned with the second edge coupler of the first PIC chip, and the first PIC chip and the second PIC being integral to a PIC wafer.

[0155] In another embodiment, the method 1200 further includes: passing light from a first edge coupler of a second PIC chip to a second edge coupler of a first PIC chip, the first edge coupler of the second PIC chip being optically aligned with the second edge coupler of the first PIC chip, and the first PIC chip and the second PIC are integral to the PIC wafer; passing light from the second edge coupler of the first PIC chip to a third edge coupler of the first PIC chip; and passing light from the third edge coupler of the first PIC chip to a fourth edge coupler of the second PIC chip, the third edge coupler of the first PIC chip being optically aligned with the fourth edge coupler of the second PIC chip, and the first PIC chip and the second PIC are integral to the PIC wafer. In another embodiment, using light provided from a test probe mechanism at block 1212 includes: testing at least one operational property of the fourth edge coupler of the second PIC chip using light passed from the third edge coupler of the first PIC chip to the fourth edge coupler of the second PIC chip.

[0156] In some embodiments, blocks 1220 and 1224 are omitted.

[0157] Fig.13 is a flow chart of an example method 1300 for manufacturing a PIC chip according to an embodiment. According to various embodiments, the method 1300 corresponds to manufacturing Figures 1A to 1C PIC chip 104, Figure 6 PIC chip 604 and / or Figure 7 PIC chip 704, and for ease of explanation, method 1300 refers to Figure 1A , Figure 6 and Figure 7 According to other embodiments, method 1300 involves manufacturing and Figures 1A to 1C PIC chip 104, Figure 6 The PIC chip 604 and Figure 7 The PIC chip 704 may be any other suitable PIC chip. According to some embodiments, Figures 1A to 1C PIC chip 104, Figure 6 PIC chip 604 and / or Figure 7 The PIC chip 704 is manufactured according to another suitable method different from the method 1300 .

[0158] The method 1300 includes blocks 1304 and 1308 as elements of fabricating a plurality of PIC chips on a PIC wafer having a substrate. At block 1304, for each PIC chip among the plurality of PIC chips of the PIC wafer, fabricating one or more optical components and one or more electrical components on the substrate, the one or more optical components and the one or more electrical components corresponding to at least one of: i) an optical communication transmitter, and ii) an optical communication receiver.

[0159] According to some embodiments, fabricating one or more optical components and one or more electrical components includes fabricating components associated with at least one of: i) an optical modulator, and ii) an optical demodulator.

[0160] At block 1308, for each PIC chip among the plurality of PIC chips of the PIC wafer, a test component is fabricated on a substrate that is different from the one or more optical components and the one or more electrical components fabricated at block 1304. The test component fabricated at block 1309 is configured to pass light to another PIC chip adjacent to the PIC chip when the PIC chip and the other PIC chip are integral with the PIC wafer to test one or more operational properties of the optical component disposed on the other PIC chip.

[0161] In an embodiment, fabricating the test assembly at box 1308 includes: fabricating a first edge coupler on the substrate to optically align with a second edge coupler of another PIC chip, the first edge coupler being configured to pass light to the second edge coupler of the other PIC chip before the PIC chip is separated from the other PIC chip to test at least a first operational property among one or more operational properties of the optical assembly disposed on the other PIC chip.

[0162] In another embodiment, fabricating the test assembly at block 1308 includes fabricating an optical coupler on a substrate, the optical coupler configured to receive light from an optical test probe, and fabricating a waveguide on the substrate optically coupled to the optical coupler and the first edge coupler, the waveguide configured to transfer light between the optical coupler and the first edge coupler.

[0163] In another embodiment, fabricating the test assembly at box 1308 includes: fabricating a third edge coupler on the substrate to optically align with a fourth edge coupler of another PIC chip, the third edge coupler being configured to receive light from the fourth edge coupler of the second PIC chip before the first PIC chip is separated from the second PIC chip to test at least a second operational property among the one or more operational properties of the optical assembly disposed on the second PIC chip.

[0164] In another embodiment, fabricating the test assembly at block 1308 includes fabricating an optical coupler on a substrate, the optical coupler configured to pass light to an optical test probe, and fabricating a waveguide on the substrate, the waveguide optically coupled to the optical coupler and a third edge coupler, the waveguide configured to pass light between the third edge coupler and the optical coupler.

[0165] In another embodiment, fabricating the test assembly at block 1308 includes fabricating a photodiode fabricated on a substrate; and fabricating a waveguide on the substrate, the waveguide being optically coupled to the photodiode and a third edge coupler, the waveguide being configured to transfer light between the third edge coupler and the photodiode; wherein the photodiode is configured to generate an electrical signal based on light from a fourth edge coupler of the second PIC chip before the first PIC chip is separated from the second PIC chip, the electrical signal being associated with a second operational property of the optical assembly disposed on the second PIC chip.

[0166] At block 1312, for each PIC chip among the plurality of PIC chips of the PIC wafer, the test assembly fabricated at block 1308 is used to test one or more operational properties of an optical assembly disposed on another PIC chip adjacent to the PIC chip. In an embodiment, block 1312 includes performing Fig.12 The method 1200 is implemented to test one or more operational properties of an optical component disposed on another PIC chip. In other embodiments, another suitable method different from the method 1200 is implemented to test one or more operational properties of an optical component disposed on another PIC chip.

[0167] At block 1316, at least some of the PIC chips of the PIC wafer are separated. In an embodiment, separating the PIC chips at block 1316 includes separating the PIC chips using laser dicing. In another embodiment, separating the PIC chips at block 1316 includes separating the PIC chips using blade dicing.

[0168] At block 1320 , the PIC chips separated at block 1316 are packaged in respective PIC packages.

[0169] In some embodiments, one or more of blocks 1312, 1316, and 1320 are omitted. For example, in an embodiment, the final product of method 1300 is an untested PIC wafer such as the unseparated PIC chips described above. In another embodiment, the final product of method 1300 is a tested PIC wafer such as the unseparated PIC chips described above. In another embodiment, the final product of method 1300 is a separated but unpackaged PIC chip.

[0170] Embodiment 1: A first photonic integrated circuit (PIC) chip, the first PIC chip derived from a PIC wafer, the first PIC chip comprising: a substrate; one or more optical communication components fabricated on the substrate; and an optical test component fabricated on the substrate, the optical test component being configured to transmit light to a second PIC chip on the PIC wafer before die singulation of the PIC wafer, for testing one or more operational properties of the optical components disposed on the second PIC chip, wherein the second PIC chip is adjacent to the first PIC chip on the PIC wafer before die singulation of the PIC wafer.

[0171] Embodiment 2: The first PIC chip according to embodiment 1, wherein the optical test assembly comprises: a first edge coupler fabricated on a substrate, the first edge coupler being configured to transfer light to a second edge coupler of a second PIC chip before die singulation of the PIC wafer, for testing at least a first operational property among one or more operational properties of an optical assembly disposed on the second PIC chip.

[0172] Embodiment 3: According to the first PIC chip of embodiment 2, the optical test assembly further comprises: an optical coupler fabricated on a substrate, the optical coupler being configured to receive light from an optical test probe; and a waveguide fabricated on the substrate, the waveguide being optically coupled to the optical coupler and the first edge coupler, the waveguide being configured to transfer light between the optical coupler and the first edge coupler.

[0173] Embodiment 4: The first PIC chip according to embodiment 3, wherein: the optical coupler comprises a grating coupler.

[0174] Embodiment 5: The first PIC chip according to any one of embodiments 2 to 4, wherein the optical test assembly further comprises: a third edge coupler fabricated on the substrate, the third edge coupler being configured to receive light from a fourth edge coupler of the second PIC chip before die singulation of the PIC wafer, for testing at least a second operational property among the one or more operational properties of the optical assembly disposed on the second PIC chip.

[0175] Embodiment 6: According to the first PIC chip of Embodiment 5, the optical test assembly further comprises: an optical coupler fabricated on a substrate, the optical coupler being configured to transfer light to an optical test probe; and a waveguide fabricated on the substrate, the waveguide being optically coupled to the optical coupler and a third edge coupler, the waveguide being configured to transfer light between the third edge coupler and the optical coupler.

[0176] Embodiment 7: The first PIC chip according to embodiment 5, wherein the optical test assembly further comprises: a photodiode fabricated on a substrate; and a waveguide fabricated on the substrate, the waveguide being optically coupled to the photodiode and a third edge coupler, the waveguide being configured to transfer light between the third edge coupler and the photodiode; wherein the photodiode is configured to generate an electrical signal based on light from a fourth edge coupler of a second PIC chip before die singulation of the PIC wafer, the electrical signal being associated with a second operational property of the optical assembly disposed on the second PIC chip.

[0177] Embodiment 8: The first PIC chip according to any one of embodiments 1 to 7 further includes an electrical test component fabricated on a substrate, the electrical test component including one or more electrical pads, and configured to, before die singulation of the PIC wafer: generate one or more electrical signals associated with at least a first operational attribute of one or more operational attributes of an optical component disposed on a second PIC chip; and provide the one or more electrical signals to the one or more electrical pads for output to an electrical test probe mechanism.

[0178] Embodiment 9: A method for manufacturing a photonic integrated circuit (PIC) chip, the method comprising: making a plurality of PIC chips on a PIC wafer having a substrate, and for each PIC chip among the plurality of PIC chips on the PIC wafer, comprising: making one or more optical components and one or more electrical components on the substrate, the one or more optical components and the one or more electrical components corresponding to at least one of the following: i) an optical communication transmitter, and ii) an optical communication receiver, and making a test component on the substrate, the test component being different from the one or more optical components and the one or more electrical components corresponding to at least one of the following: i) an optical communication transmitter, and ii) an optical communication receiver, the test component being configured to transmit light to another PIC chip when the PIC chip and another PIC chip adjacent to the PIC chip are integrated with the PIC wafer, for testing one or more operational properties of the optical component disposed on the other PIC chip.

[0179] Embodiment 10: The method for manufacturing a PIC chip according to embodiment 9, wherein for each PIC chip among a plurality of PIC chips of a PIC wafer, making a test component comprises: making a first edge coupler on a substrate to optically align with a second edge coupler of another PIC chip, the first edge coupler being configured to transmit light to the second edge coupler of another PIC chip before bare die singulation of the PIC wafer, for testing at least a first operational property among one or more operational properties of an optical component arranged on the other PIC chip.

[0180] Embodiment 11: The method for manufacturing a PIC chip according to embodiment 10, wherein, for each PIC chip among a plurality of PIC chips of a PIC wafer, making a test assembly further comprises: making an optical coupler on a substrate, the optical coupler being configured to receive light from an optical test probe; and making a waveguide on the substrate optically coupled to the optical coupler and a first edge coupler, the waveguide being configured to transfer light between the optical coupler and the first edge coupler.

[0181] Embodiment 12: The method for manufacturing a PIC chip according to embodiment 10, wherein for each PIC chip among a plurality of PIC chips of a PIC wafer, making a test component further comprises: making a third edge coupler on a substrate to optically align with a fourth edge coupler of another PIC chip, the third edge coupler being configured to receive light from the fourth edge coupler of the second PIC chip before bare die singulation of the PIC wafer, for testing at least a second operational property among one or more operational properties of an optical component disposed on the second PIC chip.

[0182] Embodiment 13: The method for manufacturing a PIC chip according to embodiment 12, wherein, for each PIC chip among a plurality of PIC chips of a PIC wafer, making a test assembly further comprises: making an optical coupler on a substrate, the optical coupler being configured to transfer light to an optical test probe; and making a waveguide on the substrate, the waveguide being optically coupled to the optical coupler and a third edge coupler, the waveguide being configured to transfer light between the third edge coupler and the optical coupler.

[0183] Embodiment 14: The method for manufacturing a PIC chip according to embodiment 12, wherein, for each PIC chip among a plurality of PIC chips of a PIC wafer, making a test component further comprises: making a photodiode, which is made on a substrate; and making a waveguide on the substrate, which is optically coupled to the photodiode and a third edge coupler, and the waveguide is configured to transfer light between the third edge coupler and the photodiode; wherein the photodiode is configured to generate an electrical signal based on light from a fourth edge coupler of a second PIC chip before die singulation of the PIC wafer, and the electrical signal is associated with a second operational property of an optical component disposed on the second PIC chip.

[0184] Embodiment 15: The method for manufacturing a PIC chip according to any one of Embodiments 9 to 14 further includes, for each PIC chip among a plurality of PIC chips of the PIC chip: making at least a first optical coupler on a substrate, wherein the at least first optical coupler is in a test component of the PIC chip; making one or more waveguides on the substrate, wherein the one or more waveguides are configured to transfer light between the optical coupler of the PIC chip and another PIC chip; manipulating a test probe device over the PIC chip to approach at least the first optical coupler of the PIC chip; providing light from the test probe device to at least the first optical coupler of the PIC chip; transferring the light of the test probe device from the at least first optical coupler to an optical component disposed on another PIC chip via one or more waveguides of the PIC chip; and using the light transferred from the test probe device to the optical component disposed on another PIC to test one or more operational properties of the optical component disposed on another PIC chip.

[0185] Embodiment 16: A method for manufacturing a PIC chip according to Embodiment 15, wherein: making at least a first optical coupler on a substrate comprises: making a grating coupler on a substrate; providing light from a test probe device to at least the first optical coupler of the PIC chip comprises: providing light from the test probe device to the grating coupler of the PIC chip; and transferring light from at least the first optical coupler comprises: transferring the light from the grating coupler to an optical component disposed on another PIC chip via one or more waveguides of the first PIC chip.

[0186] Embodiment 17: The method for manufacturing a PIC chip according to any one of Embodiments 15 or 16, further comprising, for each PIC chip among a plurality of PIC chips of a PIC wafer: making a first edge coupler on a substrate, the first edge coupler being optically aligned with a second edge coupler of another PIC chip; wherein transferring light to an optical component disposed on another PIC chip via an optical test component of the first PIC chip comprises: transferring light from at least the first optical coupler of the PIC chip to the first edge coupler of the PIC chip via one or more waveguides, and transferring light from the first edge coupler of the PIC chip to the second edge coupler of another PIC chip.

[0187] Embodiment 18: The method for manufacturing a PIC chip according to Embodiment 17, wherein using light provided from a test probe device to test one or more operational properties of an optical component disposed on another PIC chip includes: using light provided from a test probe device and transmitted from a first edge coupler of the PIC chip to a second edge coupler of another PIC chip to test at least one operational property of the second edge coupler of another PIC chip.

[0188] Embodiment 19: The method for manufacturing a PIC chip according to Embodiment 17 further includes, for each PIC chip among a plurality of PIC chips of a PIC wafer: making a third edge coupler on a substrate, the third edge coupler being optically aligned with a fourth edge coupler of another PIC chip; making a fifth edge coupler on a substrate, the fifth edge coupler being optically aligned with a sixth edge coupler of another PIC chip; transferring light from the fourth edge coupler of another PIC chip to the third edge coupler of the PIC chip; transferring light from the third edge coupler of the PIC chip to the fifth edge coupler of the PIC chip; and transferring light from the fifth edge coupler of the PIC chip to the sixth edge coupler of another PIC chip.

[0189] Embodiment 20: The method for manufacturing a PIC chip according to Embodiment 19, wherein using light provided from a test probe device to test one or more operational properties of an optical component disposed on another PIC chip includes: using light transmitted from a fifth edge coupler of the PIC chip to a sixth edge coupler of another PIC chip to test at least one operational property of a sixth edge coupler of another PIC chip.

[0190] Embodiment 21: The method for manufacturing a PIC chip according to Embodiment 17 further includes, for each PIC chip among a plurality of PIC chips of a PIC wafer: making a third edge coupler on a substrate, the third edge coupler being optically aligned with a fourth edge coupler of another PIC chip; making a second optical coupler on the substrate; transferring light from the fourth edge coupler of another PIC chip to the third edge coupler of the PIC chip; transferring light from the third edge coupler of the first PIC chip to the second optical coupler of the PIC chip; and receiving, at a test probe device, light from another PIC chip output by the second optical coupler of the PIC chip.

[0191] Embodiment 22: The method for manufacturing a PIC chip according to Embodiment 21, further comprising: using light from a second optical coupler of the PIC chip received by the test probe device to test at least one operational property of an optical component of another PIC chip.

[0192] Embodiment 23: A method for manufacturing a PIC chip according to Embodiment 22, wherein using light from a second optical coupler of the PIC chip received by a test probe device to test at least one operational property of an optical component of another PIC chip includes: using light from a second optical coupler of the PIC chip received by a test probe device to test at least one operational property of a fourth edge coupler of another PIC chip.

[0193] Embodiment 24: The method for manufacturing PIC chips according to any one of Embodiments 15 to 23, further comprising: performing bare die singulation of the PIC wafer to separate at least some of the PIC chips of the PIC wafer.

[0194] Embodiment 25: The method for manufacturing a PIC chip according to Embodiment 24, further comprising: packaging the PIC chip separated from the PIC wafer in a corresponding PIC package.

[0195] Embodiment 26: A method for testing a photonic integrated circuit (PIC) chip integrated with a PIC chip, the method comprising: manipulating a test probe device above the PIC chip to approach at least a first optical coupler among a plurality of optical test components of a first PIC chip of the PIC chip, the first PIC chip also comprising one or more optical communication components separate from the plurality of optical test components; providing light from the test probe device to at least the first optical coupler of the first PIC chip; transferring the light of the test probe device from at least the first optical coupler to an optical component disposed on a second PIC chip via the optical test component of the first PIC chip; and using the light transferred from the test probe device to the optical component disposed on the second PIC to test one or more operational properties of the optical component disposed on the second PIC chip.

[0196] Embodiment 27: A method for testing a PIC chip according to Embodiment 26, wherein: providing light from a test probe device to at least a first optical coupler of a first PIC chip comprises: providing light from the test probe device to a grating coupler of the first PIC chip; and transferring light from at least the first optical coupler comprises: transferring light from the grating coupler to an optical component disposed on a second PIC chip via an optical test component of the first PIC chip.

[0197] Embodiment 28: A method for testing a PIC chip according to Embodiment 26, wherein transferring light to an optical component disposed on a second PIC chip via an optical test component of a first PIC chip comprises: transferring light from at least a first optical coupler of the first PIC chip to a first edge coupler of the first PIC chip; and transferring light from the first edge coupler of the first PIC chip to a second edge coupler of the second PIC chip, the first edge coupler of the first PIC chip being optically aligned with the second edge coupler of the second PIC chip, and the first PIC chip and the second PIC are integral with a PIC wafer.

[0198] Embodiment 29: The method for testing a PIC chip according to Embodiment 28, wherein using light provided from a test probe device to test one or more operational properties of an optical component disposed on a second PIC chip comprises: using light provided from a test probe device and transmitted from a first edge coupler of a first PIC chip to a second edge coupler of a second PIC chip to test at least one operational property of a second edge coupler of a second PIC chip.

[0199] Embodiment 30: A method for testing a PIC chip according to embodiment 28, wherein transferring light to an optical component disposed on a second PIC chip via an optical testing component of a first PIC chip comprises: transferring light from a third edge coupler of the second PIC chip to a fourth edge coupler of the first PIC chip, the third edge coupler of the second PIC chip being optically aligned with the fourth edge coupler of the first PIC chip, and the first PIC chip and the second PIC being integral with the PIC wafer; transferring light from the fourth edge coupler of the first PIC chip to a fifth edge coupler of the first PIC chip; and transferring light from the fifth edge coupler of the first PIC chip to a sixth edge coupler of the second PIC chip, the fifth edge coupler of the first PIC chip being optically aligned with the sixth edge coupler of the second PIC chip, and the first PIC chip and the second PIC being integral with the PIC wafer.

[0200] Embodiment 31: A method for testing a PIC chip according to embodiment 30, wherein using light provided from a test probe device to test one or more operational properties of an optical component disposed on a second PIC chip comprises: using light transmitted from a fifth edge coupler of a first PIC chip to a sixth edge coupler of a second PIC chip to test at least one operational property of the sixth edge coupler of the second PIC chip.

[0201] Embodiment 32: The method for testing PIC chips according to Embodiment 28 further includes: transferring light from a third edge coupler of a second PIC chip to a fourth edge coupler of a first PIC chip, the third edge coupler of the second PIC chip being optically aligned with the fourth edge coupler of the first PIC chip, and the first PIC chip and the second PIC are integrated with a PIC wafer; transferring light from the fourth edge coupler of the first PIC chip to a second optical coupler of the first PIC chip of the PIC wafer; and at a test probe device, receiving light from the second PIC chip output by the second optical coupler of the first PIC chip.

[0202] Embodiment 33: The method for testing a PIC chip according to Embodiment 32, further comprising: using light received by the test probe device from the second optical coupler of the first PIC chip to test at least one operational property of an optical component of the second PIC chip.

[0203] Embodiment 34: A method for testing a PIC chip according to Embodiment 33, wherein using light received by a test probe device from a second optical coupler of a first PIC chip to test at least one operational property of an optical component of a second PIC chip comprises: using light received by a test probe device from a second optical coupler of a first PIC chip to test at least one operational property of a third edge coupler of a second PIC chip.

[0204] At least some of the various blocks, operations, and techniques described above may be implemented using hardware, a processor executing firmware instructions, a processor executing software instructions, or any combination thereof. When implemented using a processor executing software or firmware instructions, the software or firmware instructions may be stored in any suitable computer-readable memory. The software or firmware instructions may include machine-readable instructions that, when executed by one or more processors, cause the one or more processors to perform various actions such as those described above.

[0205] When implemented in hardware, the hardware may include one or more of discrete components, integrated circuits, application specific integrated circuits (ASICs), programmable logic devices (PLDs), and the like.

[0206] Although the present invention has been described with reference to specific examples, the specific examples are intended to be illustrative only and not limiting of the present invention, and changes, additions and / or deletions may be made to the disclosed embodiments without departing from the scope of the present invention.

Claims

1. A first photonic integrated circuit PIC chip, the first PIC chip being derived from a PIC wafer, the first PIC chip comprising: substrate; one or more optical communication components fabricated on the substrate; as well as an optical test assembly fabricated on the substrate, the optical test assembly configured to deliver light to a second PIC chip on the PIC wafer prior to die singulation of the PIC wafer for testing one or more operational properties of an optical assembly disposed on the second PIC chip, wherein the second PIC chip is adjacent to the first PIC chip on the PIC wafer prior to die singulation of the PIC wafer.

2. The first PIC chip according to claim 1, wherein the optical test assembly comprises: a first edge coupler fabricated on the substrate, the first edge coupler configured to pass light to a second edge coupler of the second PIC chip prior to die singulation of the PIC wafer for testing at least a first operational property among the one or more operational properties of the optical component disposed on the second PIC chip.

3. The first PIC chip according to claim 2, wherein the optical test assembly further comprises: an optical coupler fabricated on the substrate, the optical coupler being configured to receive light from an optical test probe; as well as A waveguide is fabricated on the substrate, the waveguide is optically coupled to the optical coupler and the first edge coupler, and the waveguide is configured to transfer light between the optical coupler and the first edge coupler.

4. The first PIC chip according to claim 3, wherein: The optical coupler comprises a grating coupler.

5. The first PIC chip according to claim 2, wherein the optical test assembly further comprises: a third edge coupler fabricated on the substrate, the third edge coupler being configured to receive light from a fourth edge coupler of the second PIC chip prior to die singulation of the PIC wafer for testing at least a second operational property of the one or more operational properties of the optical component disposed on the second PIC chip.

6. The first PIC chip according to claim 5, wherein the optical test assembly further comprises: an optical coupler fabricated on the substrate, the optical coupler being configured to transmit light to an optical test probe; as well as A waveguide is fabricated on the substrate, the waveguide is optically coupled to the optical coupler and the third edge coupler, and the waveguide is configured to transfer light between the third edge coupler and the optical coupler.

7. The first PIC chip according to claim 5, wherein the optical test assembly further comprises: A photodiode is fabricated on the substrate; as well as a waveguide fabricated on the substrate, the waveguide being optically coupled to the photodiode and the third edge coupler, the waveguide being configured to transfer light between the third edge coupler and the photodiode; Wherein the photodiode is configured to generate an electrical signal based on light from the fourth edge coupler of the second PIC chip prior to die singulation of the PIC wafer, the electrical signal being associated with the second operational property of the optical component disposed on the second PIC chip.

8. The first PIC chip of claim 1 , further comprising an electrical test assembly fabricated on the substrate, the electrical test assembly comprising one or more electrical pads and configured, prior to bare die singulation of the PIC wafer, to: generating one or more electrical signals associated with at least a first operational property of the one or more operational properties of the optical component disposed on the second PIC chip; and The one or more electrical signals are provided to the one or more electrical pads for output to an electrical test probe mechanism.

9. A method for manufacturing a photonic integrated circuit (PIC) chip, the method comprising: A plurality of PIC chips are fabricated on a PIC wafer having a substrate, wherein for each of the plurality of PIC chips on the PIC wafer, the method comprises: One or more optical components and one or more electrical components are fabricated on the substrate, the one or more optical components and the one or more electrical components corresponding to at least one of: i) an optical communication transmitter, and ii) an optical communication receiver, and A test component is fabricated on the substrate, the test component being different from the one or more optical components and the one or more electrical components corresponding to at least one of: i) the optical communication transmitter, and ii) the optical communication receiver, the test component being configured to transmit light to another PIC chip adjacent to the PIC chip when the PIC chip and the other PIC chip are integrated with the PIC wafer, for testing one or more operational properties of the optical component disposed on the other PIC chip.

10. The method for manufacturing a PIC chip according to claim 9, wherein for each PIC chip among a plurality of PIC chips of the PIC wafer, making the test component comprises: A first edge coupler is fabricated on the substrate to be optically aligned with a second edge coupler of the other PIC chip, the first edge coupler being configured to deliver light to the second edge coupler of the other PIC chip for testing at least a first operational property among the one or more operational properties of the optical component disposed on the other PIC chip prior to die singulation of the PIC wafer.

11. The method for manufacturing a PIC chip according to claim 10, wherein for each PIC chip among a plurality of PIC chips of the PIC wafer, making the test component further comprises: fabricating an optical coupler on the substrate, the optical coupler being configured to receive light from an optical test probe; as well as A waveguide is fabricated on the substrate, the waveguide being optically coupled to the optical coupler and the first edge coupler, the waveguide being configured to transfer light between the optical coupler and the first edge coupler.

12. The method for manufacturing a PIC chip according to claim 10, wherein for each PIC chip among the plurality of PIC chips of the PIC wafer, making the test component further comprises: A third edge coupler is fabricated on the substrate to be optically aligned with a fourth edge coupler of the other PIC chip, the third edge coupler being configured to receive light from the fourth edge coupler of the second PIC chip prior to die singulation of the PIC wafer for testing at least a second operational property among the one or more operational properties of the optical component disposed on the second PIC chip.

13. The method for manufacturing a PIC chip according to claim 12, wherein for each PIC chip among a plurality of PIC chips of the PIC wafer, making the test component further comprises: fabricating an optical coupler on the substrate, the optical coupler being configured to transmit light to an optical test probe; as well as A waveguide is fabricated on the substrate, the waveguide being optically coupled to the optical coupler and the third edge coupler, the waveguide being configured to transfer light between the third edge coupler and the optical coupler.

14. The method for manufacturing a PIC chip according to claim 12, wherein for each PIC chip among a plurality of PIC chips of the PIC wafer, making the test component further comprises: manufacturing a photodiode, wherein the photodiode is manufactured on the substrate; as well as fabricating a waveguide on the substrate, the waveguide being optically coupled to the photodiode and the third edge coupler, the waveguide being configured to transfer light between the third edge coupler and the photodiode; Wherein the photodiode is configured to generate an electrical signal based on light from the fourth edge coupler of the second PIC chip prior to die singulation of the PIC wafer, the electrical signal being associated with the second operational property of the optical component disposed on the second PIC chip.

15. The method for manufacturing PIC chips according to claim 9, further comprising, for each PIC chip among the plurality of PIC chips of the PIC wafer: Fabricating at least a first optical coupler on the substrate, wherein the at least first optical coupler is within the test component of the PIC chip; fabricating one or more waveguides on the substrate, the one or more waveguides being configured to transfer light between the optical coupler of the PIC chip and the other PIC chip; manipulating a test probe device over the PIC wafer close to the at least the first optical coupler of the PIC chip; providing light from the test probe device to the at least the first optical coupler of the PIC chip; transferring light of the test probe device from the at least the first optical coupler to an optical component disposed on the other PIC chip via the one or more waveguides of the PIC chip; as well as One or more operational properties of the optical component disposed on the other PIC chip are tested using the light delivered from the test probe device to the optical component disposed on the other PIC chip.

16. The method for manufacturing a PIC chip according to claim 15, wherein: Fabricating at least the first optical coupler on the substrate includes: fabricating a grating coupler on the substrate; Providing light from the test probe device to the at least the first optical coupler of the PIC chip comprises: providing light from the test probe device to the grating coupler of the PIC chip; and Transferring light from the at least the first optical coupler comprises transferring light from the grating coupler to the optical component disposed on the further PIC chip via the one or more waveguides of the first PIC chip.

17. The method for manufacturing PIC chips according to claim 15, further comprising, for each PIC chip among the plurality of PIC chips of the PIC wafer: fabricating a first edge coupler on the substrate, the first edge coupler being optically aligned with a second edge coupler of the other PIC chip; The transmitting of light to the optical component disposed on the other PIC chip via the optical test component of the first PIC chip comprises: transferring light from said at least said first optical coupler of said PIC chip to said first edge coupler of said PIC chip via said one or more waveguides, and Light is transferred from the first edge coupler of the PIC chip to the second edge coupler of the another PIC chip.

18. The method for manufacturing a PIC chip according to claim 17, wherein using the light provided from the test probe device to test one or more operational properties of the optical component disposed on the other PIC chip comprises: Light provided from the test probe device and passed from the first edge coupler of the PIC chip to the second edge coupler of the other PIC chip is used to test at least one operational property of the second edge coupler of the other PIC chip.

19. The method for manufacturing PIC chips according to claim 17, further comprising, for each PIC chip among the plurality of PIC chips of the PIC wafer: fabricating a third edge coupler on the substrate, wherein the third edge coupler is optically aligned with a fourth edge coupler of the other PIC chip; fabricating a fifth edge coupler on the substrate, the fifth edge coupler being optically aligned with a sixth edge coupler of the other PIC chip; passing light from the fourth edge coupler of the another PIC chip to the third edge coupler of the PIC chip; passing light from the third edge coupler of the PIC chip to the fifth edge coupler of the PIC chip; and Light is transferred from the fifth edge coupler of the PIC chip to the sixth edge coupler of the another PIC chip.

20. The method for manufacturing a PIC chip according to claim 19, wherein using the light provided from the test probe device to test one or more operational properties of the optical component disposed on the other PIC chip comprises: Light passing from the fifth edge coupler of the PIC chip to the sixth edge coupler of the other PIC chip is used to test at least one operational property of the sixth edge coupler of the other PIC chip.

21. The method for manufacturing PIC chips according to claim 17, further comprising, for each PIC chip among the plurality of PIC chips of the PIC wafer: fabricating a third edge coupler on the substrate, wherein the third edge coupler is optically aligned with a fourth edge coupler of the other PIC chip; fabricating a second optical coupler on the substrate; passing light from the fourth edge coupler of the another PIC chip to the third edge coupler of the PIC chip; passing light from the third edge coupler of the first PIC chip to the second optical coupler of the PIC chip; and At the test probe device, light from the other PIC chip output by the second optical coupler of the PIC chip is received.

22. The method for manufacturing a PIC chip according to claim 21, further comprising: Light from the second optical coupler of the PIC chip received by the test probe device is used to test at least one operational property of an optical component of the other PIC chip.

23. The method for manufacturing a PIC chip according to claim 22, wherein using the light received by the test probe device from the second optical coupler of the PIC chip to test at least one of the operational properties of the optical component of the other PIC chip comprises: Light from the second optical coupler of the PIC chip received by the test probe device is used to test at least one operational property of the fourth edge coupler of the other PIC chip.

24. The method for manufacturing a PIC chip according to claim 15, further comprising: Die singulation of the PIC wafer is performed to separate at least some of the PIC chips of the PIC wafer.

25. The method for manufacturing a PIC chip according to claim 24, further comprising: The PIC chips separated from the PIC wafer are packaged in corresponding PIC packages.

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