System and method for converting positive voltage level into negative voltage level

Abstract

The invention provides a system and method for converting a positive voltage level into a negative voltage level, and belongs to the technical field of level conversion, the output end of a comparator is connected with one side of a fourth resistor, and the output end of the other side of the fourth resistor is connected with the grid electrode of an NMOS tube; the source electrode of the NMOS tube is grounded; the drain electrode is connected with a load resistor and is used for driving a load or voltage output for level conversion; when the in-phase input voltage is a high level, the comparator output is + Vcc, and the drain voltage output is a negative level; and when the in-phase input voltage is at a low level, the output of the comparator is-Vcc, and the voltage output of the drain electrode is 0. The circuit is suitable for various digital control circuit applications when positive and negative levels need to be turned at high frequency, and scenes where large-current driving needs to be provided for negative-voltage power supply applications.

Description

Technical Field

[0001] The present application belongs to the technical field of level conversion, and more specifically, relates to a system and method for converting a positive voltage level into a negative voltage level. Background Art

[0002] The existing positive and negative level conversion circuits are generally implemented by dedicated power supply chips, such as charge pump chips such as TP7660H, but the biggest problem with this chip is that it cannot be used for high-frequency conversion solutions, and the amplitude of the convertible voltage is limited by the maximum input voltage range of this type of chip, which generally does not exceed 12V. Another method is to use the isolation characteristics of the isolation optocoupler to achieve positive and negative voltages; however, the above two methods cannot meet the application of large loads. Summary of the invention

[0003] In view of the defects of the prior art, the purpose of the present application is to provide a system and method for converting a positive voltage level into a negative voltage level, aiming to solve the problem that the existing positive-negative level conversion circuit is not suitable for high-frequency conversion and cannot meet the requirements of large load driving.

[0004] To achieve the above-mentioned purpose, the present application provides a system for converting a positive voltage level into a negative voltage level, comprising a second voltage-dividing resistor, a third voltage-dividing resistor, a fourth resistor, a comparator and an NMOS tube;

[0005] The comparator's non-inverting terminal inputs the non-inverting input voltage; the inverting terminal is connected to one side of the second voltage-dividing resistor and the third voltage-dividing resistor; the second voltage-dividing resistor and the third voltage-dividing resistor are connected in series; the other side of the third voltage-dividing resistor inputs the reference voltage; the positive power supply of the comparator is connected to +V cc , negative power supply connected to -V cc The output end of the comparator is connected to one side of the fourth resistor, and the other side of the output end of the fourth resistor is connected to the gate of the NMOS tube; the source of the NMOS tube is connected to the negative level; the drain is connected to the load resistor, which is used to drive the load or output the voltage as a level conversion;

[0006] The fourth resistor is used to prevent the NMOS tube from driving oscillation and current limiting; wherein, the in-phase input voltage is a positive voltage or a zero voltage; when the reference voltage is greater than or equal to the positive voltage of the in-phase input voltage, the ratio of the second voltage-dividing resistor and the third voltage-dividing resistor is calculated by the voltage-dividing formula so that the voltage input to the reverse input terminal is between the zero voltage and the positive voltage of the in-phase input voltage; when the in-phase input voltage is a high level, the comparator output is +V cc , the drain voltage output is -V cc ; When the non-inverting input voltage is low, the comparator output is -V cc , the drain voltage output is 0; wherein the reference voltage is a constant voltage value.

[0007] Further preferably, the comparator non-inverting terminal input is a high-frequency signal output by an IO pin of the MCU, or a low-frequency signal.

[0008] Further preferably, when the in-phase input voltage is at a high level, the NMOS tube is turned on, and the load driving current is I load =(V COM -(-V cc )) / R load , the voltage output is -V cc ;

[0009] When the non-inverting input voltage is at a low level, the NMOS tube is turned off, no current flows through the load resistor, and the voltage output is 0.

[0010] Further preferably, a first resistor is provided at the non-inverting terminal of the comparator for current limiting.

[0011] Further preferably, the comparator is a high-speed comparator.

[0012] On the other hand, based on the above-mentioned system for converting a positive voltage level into a negative voltage level, the present application provides a corresponding method for converting a positive voltage level into a negative voltage level, specifically:

[0013] When the system converting the positive voltage level into the negative voltage level is used in the digital control circuit, the non-inverting input voltage is set to a low level, and the comparator output outputs -V cc , turning off the NMOS tube, no current flows through the load resistor, and the voltage output is 0, which is output as a digital signal; setting the non-inverting input voltage to a high level, the comparator output output +V cc , turning on the NMOS tube and outputting the voltage as -V cc , output as a digital signal.

[0014] On the other hand, based on the above-mentioned system for converting a positive voltage level into a negative voltage level, the present application provides a corresponding method for converting a positive voltage level into a negative voltage level, specifically:

[0015] When a system that converts a positive voltage level into a negative voltage level is used to drive a load, the non-inverting input voltage is set to a high level, and the comparator output outputs +V cc , so that the NMOS tube is turned on, and the load driving current is I load =(V COM -(-V cc )) / R load .

[0016] In general, the above technical solutions conceived by this application have the following beneficial effects compared with the prior art:

[0017] The present application provides a system for converting a positive voltage level into a negative voltage level. Based on a comparator and an NMOS tube, the input voltage at the in-phase terminal of the comparator is converted into a negative voltage or zero voltage; a load resistor is connected to the drain terminal of the NMOS tube to drive a large load, or as a voltage output for level conversion; therefore, the system for converting a positive voltage level into a negative voltage level provided by the present application is suitable for various digital control circuit applications that require high-frequency flipping of positive and negative levels, as well as scenarios that require high-current drive for negative voltage power supply applications. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 It is a schematic diagram of a device for converting a positive voltage level into a negative voltage level provided in an embodiment of the present application. DETAILED DESCRIPTION

[0019] For ease of understanding, the English abbreviations and related technical terms involved in the embodiments of the present application are explained and described below.

[0020] The embodiments of the present application are described below in conjunction with the drawings in the embodiments of the present application.

[0021] The system for converting positive voltage level into negative voltage level provided in the present application is suitable for various digital control circuit applications when high-frequency flipping of positive and negative voltage levels is required, and for scenarios where high current drive is required for negative voltage power supply applications, such as Figure 1 As shown, it includes a resistor, a comparator and an NMOS tube;

[0022] The specific principle is: +V cc and -V cc is the positive and negative power supply of the system, V in It is the comparator non-inverting input, which is usually a high-frequency signal output from the IO pin of the MCU (microprocessor, Microcontroller Unit), and its amplitude is mostly +3.3V; V in It can be a high-frequency signal or a DC signal; R1 is used to limit the current; V ref After passing through the voltage divider resistor, it is input to the inverting terminal of the comparator. ref is a constant voltage value with no limit on the amplitude; more specifically, when V ref ≤V in When V ref >V in When the ratio of R3 and R2 is adjusted, 0<V ref '≤V in ;Comparator U1 positive power supply connected to +V cc ,, Negative power supply connected to -V cc , the supply voltage amplitude is determined by the selected comparator, COM (zero potential point) is the common point 0V; when Vin When it is high, the output of comparator U1 is +V cc ; When V in When it is low, the output of comparator U1 is -V cc ; The comparator output is connected to the gate G of the NMOS tube Q1 through the resistor R4; R4 is used to prevent the NMOS tube from driving oscillation; the drain D of Q1 is connected to the load to drive a load that requires a large current, or used as a voltage output, as a level conversion output, V out is 0 or negative level; more specifically, when V in When high, V out is a negative level; when V in When it is low, V out is 0; the other end of the load is connected to the COM end of the system; the source S of Q1 is connected to -V cc ;

[0023] The positive and negative level conversion process is as follows:

[0024] When V in When it is high level, the comparator outputs +V cc , NMOS tube is turned on, and when used in high current scenarios, there is I load =(V COM -(-V cc )) / R load ; When used as digital signal output, there is V out =-V cc ;

[0025] When V in When it is low level, the comparator outputs -V cc , NMOS tube is turned off, R load Load has no current V cc Flow through; when used as digital signal output, there is V out =V COM .

[0026] In summary, compared with the prior art, the present application has the following advantages:

[0027] The present application provides a system for converting a positive voltage level into a negative voltage level. Based on a comparator and an NMOS tube, the input voltage at the in-phase terminal of the comparator is converted into a negative voltage or zero voltage; a load resistor is connected to the drain terminal of the NMOS tube to drive a large load, or as a voltage output for level conversion; therefore, the system for converting a positive voltage level into a negative voltage level provided by the present application is suitable for various digital control circuit applications that require high-frequency flipping of positive and negative levels, as well as scenarios that require high-current drive for negative voltage power supply applications.

[0028] It should be understood that expressions such as "including" and "may include" that may be used in the present application indicate the existence of the disclosed functions, operations, or constituent elements, and do not limit one or more additional functions, operations, and constituent elements. In the present application, terms such as "including" and / or "having" may be interpreted as indicating specific characteristics, numbers, operations, constituent elements, components, or combinations thereof, but may not be interpreted as excluding the existence or possibility of adding one or more other characteristics, numbers, operations, constituent elements, components, or combinations thereof.

[0029] In addition, in the present application, the expression "and / or" includes any and all combinations of the associated listed words. For example, the expression "A and / or B" may include A, may include B, or may include both A and B.

[0030] In the description of the embodiments of the present application, it should be noted that, unless otherwise clearly specified and limited, the term "connection" should be understood in a broad sense. For example, "connection" can be a detachable connection or a non-detachable connection; it can be a direct connection or an indirect connection through an intermediate medium.

[0031] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A system for converting a positive voltage level into a negative voltage level, characterized in that: It includes a second voltage-dividing resistor, a third voltage-dividing resistor, a fourth resistor, a comparator and an NMOS tube; The comparator's non-inverting terminal inputs the non-inverting input voltage; the inverting terminal is connected to one side of the second voltage-dividing resistor and the third voltage-dividing resistor; the second voltage-dividing resistor and the third voltage-dividing resistor are connected in series; the other side of the third voltage-dividing resistor inputs the reference voltage; the positive power supply of the comparator is connected to +V cc , negative power supply connected to -V cc The output end of the comparator is connected to one side of the fourth resistor, and the other side of the output end of the fourth resistor is connected to the gate of the NMOS tube; the source of the NMOS tube is connected to the negative level; the drain is connected to the load resistor, which is used to drive the load or output the voltage as a level conversion; The fourth resistor is used to prevent the NMOS tube from driving oscillation and current limiting; wherein, the in-phase input voltage is a positive voltage or a zero voltage; when the reference voltage is greater than or equal to the positive voltage of the in-phase input voltage, the ratio of the second voltage-dividing resistor and the third voltage-dividing resistor is calculated by the voltage-dividing formula so that the voltage input at the reverse input terminal is between the zero voltage and the positive voltage of the in-phase input voltage; when the in-phase input voltage is a high level, the comparator output is +V cc , the drain voltage output is -V cc ; When the non-inverting input voltage is low, the comparator output is -V cc , the drain voltage output is 0; wherein the reference voltage is a constant voltage value.

2. The system according to claim 1, characterized in that The input of the comparator's non-inverting terminal is a high-frequency signal output by an IO pin of the MCU, or a low-frequency signal.

3. The system according to claim 1 or 2, characterized in that: When the common-mode input voltage is high, the NMOS tube is turned on and the load drive current is I load =(V COM -(-V cc )) / R load , the voltage output is -V cc ; When the non-inverting input voltage is at a low level, the NMOS tube is turned off, no current flows through the load resistor, and the voltage output is 0.

4. The system according to claim 1, characterized in that The non-inverting terminal of the comparator is provided with a first resistor for current limiting.

5. The system according to claim 1 or 4, characterized in that: The comparator is a high-speed comparator.

6. A method for converting a positive voltage level into a negative voltage level based on the system according to any one of claims 1 to 5, characterized in that: Specifically: When the system converting the positive voltage level into the negative voltage level is used in the digital control circuit, the non-inverting input voltage is set to a low level, and the comparator output outputs -V cc , turning off the NMOS tube, no current flows through the load resistor, and the voltage output is 0, which is output as a digital signal; setting the non-inverting input voltage to a high level, the comparator output terminal outputs +V cc , turning on the NMOS tube and outputting the voltage as -V cc , output as a digital signal.

7. A method for converting a positive voltage level into a negative voltage level based on the system according to any one of claims 1 to 5, characterized in that: When a system that converts a positive voltage level into a negative voltage level is used to drive a load, the non-inverting input voltage is set to a high level, and the comparator output outputs +V cc , so that the NMOS tube is turned on, and the load driving current is I load =(V COM -(-V cc )) / R load .

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