Method for inhibiting internal layering of plastic package circuit

Through vacuum air phase deposition technology, coupling agent, parylene and nanofluorin are deposited layer by layer, solving the problem of partial layers in the plastic sealing circuit, improving material binding force and waterproof and moisture-proof ability, and extending device life.

CN119626910APending Publication Date: 2025-03-14BEIJING MXTRONICS CORP +1
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Patent Information

Application Number
CN202411716695.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-27
Publication Date
2025-03-14

AI Technical Summary

Technical Problem

The problems with some layers inside the plastic sealing circuit lead to a shortening of the device life, mainly due to the difference in thermal expansion coefficient between different materials and moisture intrusion.

Method used

Through vacuum air phase deposition technology, coupling agent, parylene and nanofluorin are deposited layer by layer to form a multi-layer film structure to enhance the binding force between the materials and waterproof and moisture-proof ability.

Benefits of technology

It effectively suppresses the device layering phenomenon, improves the binding force between the frame/substrate and parylene, parylene and plastic sealing material, enhances the waterproof and moisture-proof ability of the device, and extends the device life.

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Abstract

The invention belongs to the field of integrated circuit plastic package, and particularly relates to a method for inhibiting internal layering of a plastic package circuit. The invention aims to solve the problem of internal layering of the plastic package circuit. According to the method for inhibiting layering in the plastic package circuit, a coupling agent, poly-p-xylylene and a coupling agent are respectively deposited in the circuit by adopting a vacuum gas phase deposition process, and nano fluorine is deposited on a plastic package outer layer. According to the invention, the waterproof and moistureproof capability of the device can be effectively enhanced, layering is inhibited, the plastic package material is not corroded after the device passes through HAST, high-pressure cooking and salt mist examination, and the appearance is kept clean and tidy.
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Description

Technical Field

[0001] The invention belongs to the field of integrated circuit plastic packaging, and in particular relates to a method for suppressing internal delamination of a plastic packaging circuit. Background Art

[0002] Delamination of plastic encapsulated circuits: Delamination refers to the peeling between the interfaces where different materials are bonded together inside the package, which greatly reduces the life of the device. The main areas where delamination occurs are: the interface between the plastic encapsulation material and the frame / substrate, the interface between the plastic encapsulation material and the conductive adhesive, and the interface between the plastic encapsulation material and the chip. Delamination is mainly caused by thermal stress damage or moisture damage caused by the difference in thermal expansion coefficients between different materials.

[0003] Vacuum vapor deposition (Physical Vapor Deposition): A technology that uses the physical process of thermal evaporation or glow discharge or arc discharge to deposit the required coating on the surface of the substrate. For general vacuum deposition processes, during the deposition process, the internal environment of the chamber is firstly brought into a vacuum state, and then the deposition material is heated, so that the deposition material enters the chamber from one side after high-temperature cracking, while a low-temperature cold trap is connected to the other side of the chamber. Through the refrigeration effect of the cold trap, a significant temperature difference is formed on both sides of the chamber, so that the deposition material forms a certain flow trend inside the chamber and can continuously enter the chamber.

[0004] Nano-fluorine mainly includes fluoropolymers and nanoparticles, among which fluoropolymers can provide good high temperature resistance and corrosion resistance, and nanoparticles play the role of filling and reinforcement. The two are organically combined, and then leveling agents, antioxidants, etc. are added to prepare nano-fluorine with a variety of excellent protective properties. Coupling agent is a plastic additive that enhances the interfacial strength of materials and the adhesion of heterogeneous organic matter. It is composed of amino, vinyl, epoxy and other groups. Polyparaxylene is a thermoplastic polymer synthesized from para-xylene, which is often used as an electrical insulation layer, chemical protection layer, protective layer and sealing layer film. Summary of the invention

[0005] In order to solve the above-mentioned problem in the prior art, that is, the problem of internal delamination of a plastic-encapsulated circuit, the present invention provides a method for suppressing internal delamination of a plastic-encapsulated circuit.

[0006] The technical solution of the present invention includes:

[0007] A method for suppressing internal delamination of a plastic-encapsulated circuit, characterized by comprising the following steps: S1, baking the circuit to be deposited after bonding to remove moisture; S2, placing the circuit after degassing in a deposition tooling; S3, use circuit fixing glue to bond the outer edge of the circuit, fix the circuit on the tooling, and complete the mask; S4, placing the tooling evenly into the deposition chamber; S5. Weigh out a certain amount of coupling agent and put it into the evaporation chamber; S6, setting deposition process parameters to complete the deposition of the first layer of coupling agent; S7, wait for the evaporation chamber to cool to room temperature, weigh out a certain amount of polyparaxylene, and put it into the evaporation chamber; S8, adjusting the deposition process parameters to complete the deposition of the second layer of polyparaxylene; S9, wait for the evaporation chamber to cool to room temperature, weigh out a certain amount of coupling agent, and put it into the evaporation chamber; S10, adjusting deposition process parameters to complete the deposition of the third layer of coupling agent; S11, when the temperature of the cracking chamber drops below 400°C, the tooling is taken out and the mask is removed; S12, completing injection molding of the circuit after removing the mask; S13, baking the circuit after injection molding to finalize the shape; S14, placing the circuit to be deposited after injection molding in a deposition tool; S15, use circuit fixing glue to bond the outer edge of the circuit, fix the circuit on the tooling, and complete the mask; S16, arranging the tooling in a spiral shape and evenly placing it in the deposition chamber; S17, weigh out a certain amount of nano-fluorine and put it into the evaporation chamber; S18, adjusting deposition process parameters to complete nano-fluorine deposition outside the device; S19. When the temperature of the cracking chamber drops below 400°C, take out the tooling, remove the mask, and store the circuit in a nitrogen cabinet.

[0008] As an optional technical solution, in steps S1 and S13, baking is performed in an oven, and the baking conditions are a temperature of 150° C., a vacuum degree of 125±15 mTorr, and a time of 24 hours.

[0009] As an optional technical solution, in steps S2 and S14, the dimensions of the deposition tooling used are designed according to the frame / substrate dimensions, and the dimension design parameters include tooling length A1 of 212mm to 300mm, tooling width A2 of 88mm to 136mm, tooling thickness A3 of 6.6mm to 18mm, outer edge length B1 of 218mm to 294mm, outer edge width B2 of 60mm to 88mm, outer edge depth B3 of 0.25mm to 0.45mm, inner edge length C1 of 176mm to 252mm, inner edge width C2 of 26mm to 39mm, and inner edge depth C3 of 1.8mm to 6mm.

[0010] As an optional technical solution, in the mask operation described in steps S3 and S15, after the circuit is placed in the tooling, a 3.5 mm wide tape is used to bond the circuit around the edges, with the bonding width of the tooling edge being about 1 mm and the bonding width of the circuit edge being about 2.5 mm.

[0011] As an optional technical solution, in steps S5 and S9, the coupling agent is a liquid reagent, and the dosage is 33mL to 39mL; in step S7, polyparaxylene is a solid granular reagent, and the dosage is 14g to 16g; in step S17, nano-fluorine is a liquid reagent, and the dosage is 10.5mL to 13.5mL.

[0012] As an optional technical solution, in steps S5 and S9, the coupling agent is a silane substance, including any one of chloropropyltrimethoxysilane, vinyltrichlorosilane, vinyltriethoxysilane, vinyltri(2-methoxyethoxy)silane, γ-(methacryloyloxy)propyltrimethoxysilane, γ-glycidyloxypropyltrimethoxysilane, γ-aminopropyltriethoxysilane, and anilinotriethoxysilane.

[0013] As an optional technical solution, in step S7, the polyparaxylene is any one of type N, type C, type D, type F, type VT-4, and type AF4.

[0014] As an optional technical solution, in step S17, the nano-fluorine is hydrofluoroether.

[0015] As an optional technical solution, after the deposition is completed, the film thickness inside the device is: 1.5±0.05μm for the coupling agent in step S5, 1.2±0.08μm for polyparaxylene in step S7, 1.5±0.05μm for the coupling agent in step S9, and in step S17, the thickness of the nano-fluorine outside the device is 0.4±0.04μm.

[0016] As an optional technical solution, in steps S5 and S9, the coupling agent deposition process parameters are as follows: the initial vacuum of the deposition chamber is 3mT~20mT, the temperature of the liquid evaporation chamber is 145°C~200°C, the liquid cut-off vacuum is 25mT~35mT, the limit vacuum is 3mT~9mT, and the coating vacuum is 30mT~40mT; in step S7, the polyparaxylene deposition process parameters are as follows: the initial vacuum of the deposition chamber is 3mT~9mT, the solid evaporation room temperature is 145°C~200°C, the liquid cut-off vacuum is 25mT~35mT, the limit vacuum is 3mT~9mT, and the coating vacuum is 30mT~40mT. The temperature of the nano-fluorine deposition chamber is 95℃~120℃, the solid material cut-off vacuum is 25mT~55mT, the ultimate vacuum is 3mT~9mT, and the coating vacuum is 24mT~30mT; in step S17, the nano-fluorine deposition process parameters are the initial vacuum of the deposition chamber is 3mT~20mT, the liquid material evaporation chamber temperature is 125℃~160℃, the liquid material cut-off vacuum is 25mT~35mT, the ultimate vacuum is 3mT~9mT, and the coating vacuum is 24mT~30mT.

[0017] Beneficial effects of the present invention:

[0018] (1) The present invention coats the coupling agent layer, the polyparaxylene layer, and the coupling agent layer in a specific ratio and structure by vacuum vapor deposition inside the device, wherein the polyparaxylene can effectively solve the device stratification problem caused by HAST, high pressure cooking, and salt spray test; the coupling agent can effectively solve the device stratification problem caused by temperature cycling, and play an adhesive role to improve the bonding strength between the frame / substrate and the polyparaxylene, and between the polyparaxylene and the plastic packaging material. Moreover, the two materials of the coupling agent and the polyparaxylene work together to effectively enhance the waterproof and moisture-proof ability of the device and inhibit stratification.

[0019] (2) The device is coated with nano-fluorine by vacuum vapor deposition, which can prevent the plastic packaging material from being corroded after passing HAST, high-pressure cooking, and salt spray tests, and keep the appearance neat.

[0020] (3) Through vacuum vapor deposition technology, the film thickness can be controlled within 2.5μm, and the flatness can reach 0.5%. Compared with immersion, spraying and other process methods, it has the least impact on the device surface and does not affect the aesthetics.

[0021] (4) The deposited material after masking is only deposited on the surface of the plastic packaging material and will not be deposited on the back of the frame / substrate, which will not affect the subsequent ball planting of the BGA device. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Other features, objects and advantages of the present application will become more apparent by reading the detailed description of non-limiting embodiments made with reference to the following drawings:

[0023] Figure 1 It is a process flow diagram of a method for suppressing internal delamination of a plastic-encapsulated circuit according to the present invention;

[0024] FIG. 2( a ) is a schematic diagram of a deposition tooling structure of a method for suppressing internal delamination of a plastic-encapsulated circuit according to the present invention;

[0025] Fig. 2(b) is a left side view of Fig. 2(a);

[0026] FIG. 3( a ) is a schematic diagram of mask positions of a method for suppressing internal delamination of a plastic-encapsulated circuit according to the present invention;

[0027] Fig. 3(b) is a left side view of Fig. 3(a);

[0028] Figure 4 It is a schematic diagram of the internal film structure of a plastic-encapsulated device after protection in a method for suppressing internal delamination of a plastic-encapsulated circuit of the present invention;

[0029] Figure 5 It is a schematic diagram of the external film structure of a plastic-encapsulated device after protection according to a method for suppressing internal delamination of a plastic-encapsulated circuit of the present invention. DETAILED DESCRIPTION

[0030] The present application will be further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the relevant invention, rather than to limit the invention. It is also necessary to explain that, for ease of description, only the parts related to the relevant invention are shown in the accompanying drawings.

[0031] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0032] like Figure 1 As shown, the present invention provides a method for inhibiting internal delamination of a plastic-sealed circuit, comprising: removing moisture before deposition, placing the circuit into a deposition tool, applying a mask around the circuit, placing the tool into a deposition chamber, placing a coupling agent into an evaporation chamber, depositing the coupling agent, placing paraxylene into the evaporation chamber, depositing paraxylene, placing the coupling agent into the evaporation chamber, depositing the coupling agent, taking out the tool, removing the mask, completing injection molding, baking and finalizing, placing the circuit into a deposition tool, applying a mask around the circuit, placing the tool into a deposition chamber, placing nano-fluorine into the evaporation chamber, depositing nano-fluorine, taking out, and storing.

[0033] The specific steps are: S1, putting the circuit to be deposited after bonding into an oven to bake and remove moisture; S2, placing the circuit after degassing in a deposition tooling; S3, use circuit fixing glue to bond the outer edge of the circuit, fix the circuit on the tooling, and complete the mask; S4, placing the tooling evenly into the deposition chamber; S5. Weigh out a certain amount of coupling agent and put it into the evaporation chamber; S6, setting deposition process parameters to complete the deposition of the first layer of coupling agent; S7, wait for the evaporation chamber to cool to room temperature, weigh out a certain amount of polyparaxylene, and put it into the evaporation chamber; S8, adjusting the deposition process parameters to complete the deposition of the second layer of polyparaxylene; S9, wait for the evaporation chamber to cool to room temperature, weigh out a certain amount of coupling agent, and put it into the evaporation chamber; S10, adjusting deposition process parameters to complete the deposition of the third layer of coupling agent; S11, when the temperature of the cracking chamber drops below 400°C, the tooling is taken out and the mask is removed; S12, completing injection molding of the circuit after removing the mask; S13, putting the circuit after injection molding into an oven for baking and shaping; S14, placing the circuit to be deposited after injection molding in a deposition tool; S15, use circuit fixing glue to bond the outer edge of the circuit, fix the circuit on the tooling, and complete the mask; S16, arranging the tooling in a spiral shape and evenly placing it in the deposition chamber; S17, weigh out a certain amount of nano-fluorine and put it into the evaporation chamber; S18, adjusting deposition process parameters to complete nano-fluorine deposition outside the device; S19. When the temperature of the cracking chamber drops below 400°C, take out the tooling, remove the mask, and store the circuit in a nitrogen cabinet. FIG. 2( a ) is a schematic diagram of the structure of the deposition tooling of the present invention, and FIG. 2( b ) is a left view thereof.

[0034] Among them, the size parameters of the deposition tooling are as follows: parameter Minimum Optimal maximum Tooling length A1 212mm 276mm 300mm Tooling width A2 88mm 112.5mm 136mm Tooling thickness A3 6.6mm 8mm 18mm Outer edge length B1 218mm 240mm 294mm Outer edge width B2 60mm 76.5mm 88mm Outer edge depth B3 0.25mm 0.3mm 0.45mm Inner edge length C1 176mm 198mm 252mm Inner edge width C2 26mm 34.5mm 39mm Inner edge depth C3 1.8mm 3mm 6mm

[0035] FIG. 3( a ) is a schematic diagram of the mask position of the present invention, and FIG. 3( b ) is a left view thereof.

[0036] As shown in the figure, after the circuit is placed in the tooling, a 3.5mm wide tape is used to bond the circuit around it. The bonding width on the tooling side is about 1mm, and the bonding width on the circuit side is about 2.5mm.

[0037] Figure 4 The figure shows a schematic diagram of the internal film layer structure of the plastic-encapsulated device after protection, which includes a coupling agent layer, a polyparaxylene layer and a coupling agent layer.

[0038] The coupling agent deposition process parameters are as follows:

[0039] Parylene Deposition Process Parameters parameter Minimum Optimal maximum Initial vacuum degree of deposition chamber 3mT 9mT 9mT Solid evaporation chamber temperature 95℃ 115℃ 120℃ Solid material cut-off vacuum 25mT 25mT 55mT Ultimate vacuum 3mT 3mT 9mT Coating vacuum 24mT 27mT 30mT

[0040] Figure 5 The figure shows the schematic diagram of the external film structure of the plastic-encapsulated device after protection, and a nano-fluorine layer is deposited on the outside of the device.

[0041] The nano-fluorine deposition process parameters are as follows: parameter Minimum Optimal maximum Initial vacuum degree of deposition chamber 3mT 15mT 20mT Liquid evaporation chamber temperature 125℃ 155℃ 160℃ Liquid material cut-off vacuum 25mT 25mT 35mT Ultimate vacuum 3mT 9mT 9mT Coating vacuum 24mT 27mT 30mT The following is a specific embodiment of the process using the method of suppressing internal delamination of a plastic-encapsulated circuit of the present invention as an implementation process. Example 1 This embodiment is a high-speed A / D converter circuit in a BGA256 package, and the substrate size is 112mm*275.5mm. The design parameters of the deposition tooling in this embodiment are as follows: tooling length A1 is 276 mm, tooling width A2 is 112.5 mm, tooling thickness A3 is 8 mm, outer edge length B1 is 240 mm, outer edge width B2 is 76.5 mm, outer edge depth B3 is 0.3 mm, inner edge length C1 is 198 mm, inner edge width C2 is 34.5 mm, and inner edge depth C3 is 3 mm. The process parameters for nano-fluorine deposition in this embodiment are as follows: initial vacuum of the deposition chamber is 12 mT, temperature of the liquid evaporation chamber is 155°C, liquid cut-off vacuum is 25 mT, ultimate vacuum is 9 mT, and coating vacuum is 30 mT. The coupling agent deposition process parameters of this embodiment are as follows: initial vacuum of the deposition chamber is 15 mT, temperature of the liquid evaporation chamber is 200° C., liquid cut-off vacuum is 25 mT, ultimate vacuum is 6 mT, and coating vacuum is 35 mT. The polyparaxylene deposition process parameters of this embodiment are as follows: initial vacuum of the deposition chamber is 9mT, temperature of the solid evaporation chamber is 120°C, solid cut-off vacuum is 35mT, ultimate vacuum is 9mT, and coating vacuum is 27mT. The process steps used in this embodiment are: S1. Place the bonded circuit to be deposited in an oven to remove moisture. The baking conditions are: temperature 150°C, vacuum degree 125mTorr, time 24h; S2, placing the circuit after degassing in a deposition tooling; S3, use circuit fixing glue to bond the outer edge of the circuit, fix the circuit on the tooling, and complete the mask; S4, arrange the tooling in a spiral shape and evenly place it in the deposition chamber; S5. Use a syringe to draw out 12 mL of coupling agent and place it in the evaporation chamber; S6. Set the equipment process parameters as the initial vacuum of the deposition chamber at 15 mT, the temperature of the liquid evaporation chamber at 200°C, the liquid cut-off vacuum at 25 mT, the ultimate vacuum at 6 mT, and the coating vacuum at 35 mT to complete the deposition of the first layer of coupling agent; S7, wait for the evaporation chamber to cool to room temperature, use an electronic balance to weigh out 15g of polyparaxylene, and put it into the evaporation chamber; S8, adjusting the equipment process parameters to the initial vacuum of the deposition chamber 9mT, the temperature of the solid evaporation chamber 120°C, the solid cut-off vacuum 35mT, the ultimate vacuum 9mT, and the coating vacuum 27mT, and completing the deposition of the second layer of polyparaxylene; S9. Wait for the evaporation chamber to cool to room temperature, use a syringe to draw out 12 mL of coupling agent, and put it into the evaporation chamber; S10, adjusting the equipment process parameters to the initial vacuum of the deposition chamber of 15mT, the temperature of the liquid evaporation chamber of 200°C, the liquid cut-off vacuum of 25mT, the ultimate vacuum of 6mT, and the coating vacuum of 35mT, and completing the deposition of the third layer of coupling agent; S11, when the temperature of the cracking chamber drops below 400°C, the tooling is taken out and the mask is removed; S12, completing injection molding of the circuit after removing the mask; S13, putting the circuit after injection molding into an oven for baking and shaping; S14, placing the circuit to be deposited after injection molding in a deposition tool; S15, use circuit fixing glue to bond the outer edge of the circuit, fix the circuit on the tooling, and complete the mask; S16, arranging the tooling in a spiral shape and evenly placing it in the deposition chamber; S17, use a syringe to draw out 36 mL of nanofluorine and put it into the evaporation chamber; S18, adjusting the equipment process parameters to the initial vacuum of the deposition chamber of 12mT, the temperature of the liquid evaporation chamber of 155°C, the liquid cut-off vacuum of 25mT, the ultimate vacuum of 9mT, and the coating vacuum of 30mT, and completing the nano-fluorine deposition on the outside of the device; S19. When the temperature of the cracking chamber drops below 400°C, take out the tooling, remove the mask, and store the circuit in a nitrogen cabinet. Example 2 This embodiment is a DDR5 high-speed memory circuit in the package form of BGA96, and the substrate size is 108mm*252mm. The design parameters of the deposition tooling in this embodiment are as follows: tooling length A1 is 252.5 mm, tooling width A2 is 108.5 mm, tooling thickness A3 is 8 mm, outer edge length B1 is 228 mm, outer edge width B2 is 63.5 mm, outer edge depth B3 is 0.3 mm, inner edge length C1 is 176 mm, inner edge width C2 is 25.5 mm, and inner edge depth C3 is 3 mm. The nano-fluorine deposition process parameters of this embodiment are as follows: initial vacuum of the deposition chamber is 15mT, temperature of the liquid evaporation chamber is 155°C, liquid cut-off vacuum is 25mT, ultimate vacuum is 9mT, and coating vacuum is 27mT. The coupling agent deposition process parameters of this embodiment are as follows: initial vacuum degree of deposition chamber is 20mT, temperature of liquid evaporation chamber is 200°C, liquid cut-off vacuum degree is 25mT, ultimate vacuum degree is 9mT, and coating vacuum degree is 35mT. The polyparaxylene deposition process parameters of this embodiment are as follows: initial vacuum of the deposition chamber is 9mT, temperature of the solid evaporation chamber is 120°C, solid cut-off vacuum is 35mT, ultimate vacuum is 9mT, and coating vacuum is 27mT. The process steps used in this embodiment are: S1. Place the bonded circuit to be deposited in an oven to remove moisture. The baking conditions are: temperature 150°C, vacuum degree 125mTorr, time 24h; S2, placing the circuit after degassing in a deposition tooling; S3, use circuit fixing glue to bond the outer edge of the circuit, fix the circuit on the tooling, and complete the mask; S4, arrange the tooling in a spiral shape and evenly place it in the deposition chamber; S5. Use a syringe to draw out 12 mL of coupling agent and place it in the evaporation chamber; S6. Set the equipment process parameters as initial vacuum of deposition chamber 20mT, temperature of liquid evaporation chamber 200°C, liquid cut-off vacuum 25mT, ultimate vacuum 9mT, coating vacuum 35mT, and complete the deposition of the first layer of coupling agent; S7, wait for the evaporation chamber to cool to room temperature, use an electronic balance to weigh out 15g of polyparaxylene, and put it into the evaporation chamber; S8, adjusting the equipment process parameters to the initial vacuum of the deposition chamber 9mT, the temperature of the solid evaporation chamber 120°C, the solid cut-off vacuum 35mT, the ultimate vacuum 9mT, and the coating vacuum 27mT, and completing the deposition of the second layer of polyparaxylene; S9. Wait for the evaporation chamber to cool to room temperature, use a syringe to draw out 12 mL of coupling agent, and put it into the evaporation chamber; S10, adjusting the equipment process parameters to the initial vacuum of the deposition chamber at 20mT, the temperature of the liquid evaporation chamber at 200°C, the liquid cut-off vacuum at 25mT, the ultimate vacuum at 9mT, and the coating vacuum at 35mT, and completing the deposition of the third layer of coupling agent; S11, when the temperature of the cracking chamber drops below 400°C, the tooling is taken out and the mask is removed; S12, completing injection molding of the circuit after removing the mask; S13, putting the circuit after injection molding into an oven for baking and shaping; S14, placing the circuit to be deposited after injection molding in a deposition tool; S15, use circuit fixing glue to bond the outer edge of the circuit, fix the circuit on the tooling, and complete the mask; S16, arranging the tooling in a spiral shape and evenly placing it in the deposition chamber; S17, use a syringe to draw out 36 mL of nanofluorine and put it into the evaporation chamber; S18, adjusting the equipment process parameters to the initial vacuum of the deposition chamber of 15mT, the temperature of the liquid evaporation chamber of 155°C, the liquid cut-off vacuum of 25mT, the ultimate vacuum of 9mT, and the coating vacuum of 27mT, and completing the nano-fluorine deposition on the outside of the device; S19. When the temperature of the cracking chamber drops below 400°C, take out the tooling, remove the mask, and store the circuit in a nitrogen cabinet.

[0042] In the description of the present invention, the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer" and the like indicating directions or positional relationships are based on the directions or positional relationships shown in the drawings, which are only for the convenience of description, and do not indicate or imply that the device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.

[0043] In addition, it should be noted that in the description of the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For those skilled in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0044] The term "comprise" or any other similar term is intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus / device that includes a list of elements includes not only those elements but also other elements not expressly listed, or also includes elements inherent to such process, method, article, or apparatus / device.

[0045] So far, the technical solutions of the present invention have been described in conjunction with the preferred embodiments shown in the accompanying drawings. However, it is easy for those skilled in the art to understand that the protection scope of the present invention is obviously not limited to these specific embodiments. Without departing from the principle of the present invention, those skilled in the art can make equivalent changes or substitutions to the relevant technical features, and the technical solutions after these changes or substitutions will fall within the protection scope of the present invention.

Claims

1. A method for inhibiting internal delamination of a plastic-encapsulated circuit, characterized in that The following steps are involved: S1, baking the circuit to be deposited after bonding to remove moisture; S2, placing the circuit after degassing in a deposition tooling; S3, use circuit fixing glue to bond the outer edge of the circuit, fix the circuit on the tooling, and complete the mask; S4, placing the tooling evenly into the deposition chamber; S5. Weigh out a certain amount of coupling agent and put it into the evaporation chamber; S6, setting deposition process parameters to complete the deposition of the first layer of coupling agent; S7, wait for the evaporation chamber to cool to room temperature, weigh out a certain amount of polyparaxylene, and put it into the evaporation chamber; S8, adjusting the deposition process parameters to complete the deposition of the second layer of polyparaxylene; S9, wait for the evaporation chamber to cool to room temperature, weigh out a certain amount of coupling agent, and put it into the evaporation chamber; S10, adjusting deposition process parameters to complete the deposition of the third layer of coupling agent; S11, when the temperature of the cracking chamber drops below 400°C, the tooling is taken out and the mask is removed; S12, completing injection molding of the circuit after removing the mask; S13, baking the circuit after injection molding to finalize the shape; S14, placing the circuit to be deposited after injection molding in a deposition tool; S15, use circuit fixing glue to bond the outer edge of the circuit, fix the circuit on the tooling, and complete the mask; S16, arranging the tooling in a spiral shape and evenly placing it in the deposition chamber; S17, weigh out a certain amount of nano-fluorine and put it into the evaporation chamber; S18, adjusting deposition process parameters to complete nano-fluorine deposition outside the device; S19. When the temperature of the cracking chamber drops below 400°C, take out the tooling, remove the mask, and store the circuit in a nitrogen cabinet.

2. The method for suppressing internal delamination of a plastic-encapsulated circuit according to claim 1, characterized in that: In steps S1 and S13, baking is performed in an oven, and the baking conditions are a temperature of 150° C., a vacuum degree of 125±15 mTor r, and a time of 24 h.

3. The method for suppressing internal delamination of a plastic-encapsulated circuit according to claim 1, characterized in that: In steps S2 and S14, the size of the deposition tooling used is designed according to the frame / substrate size, and its size design parameters include tooling length A1 of 212mm~300mm, tooling width A2 of 88mm~136mm, tooling thickness A3 of 6.6mm~18mm, outer edge length B1 of 218mm~294mm, outer edge width B2 of 60mm~88mm, outer edge depth B3 of 0.25mm~0.45mm, inner edge length C1 of 176mm~252mm, inner edge width C2 of 26mm~39mm, and inner edge depth C3 of 1.8mm~6mm.

4. The method for suppressing internal delamination of a plastic-encapsulated circuit according to claim 1, characterized in that: In the masking operation described in steps S3 and S15, after the circuit is placed in the tooling, a 3.5 mm wide tape is used to bond the circuit around the edges, with a bonding width of about 1 mm at the edge of the tooling and about 2.5 mm at the edge of the circuit.

5. The method for suppressing internal delamination of a plastic-encapsulated circuit according to claim 1, characterized in that: In steps S5 and S9, the coupling agent is a liquid reagent, and the dosage is 33mL to 39mL; in step S7, polyparaxylene is a solid granular reagent, and the dosage is 14g to 16g; in step S17, nano-fluorine is a liquid reagent, and the dosage is 10.5mL to 13.5mL.

6. The method for suppressing internal delamination of a plastic-encapsulated circuit according to claim 5, characterized in that: In steps S5 and S9, the coupling agent is a silane substance, including any one of chloropropyltrimethoxysilane, vinyltrichlorosilane, vinyltriethoxysilane, vinyltri(2-methoxyethoxy)silane, γ-(methacryloyloxy)propyltrimethoxysilane, γ-glycidyloxypropyltrimethoxysilane, γ-aminopropyltriethoxysilane, and anilinotriethoxysilane.

7. The method for suppressing internal delamination of a plastic-encapsulated circuit according to claim 5, characterized in that: In step S7, the polyparaxylene is any one of type N, type C, type D, type F, type VT-4, and type AF4.

8. The method for suppressing internal delamination of a plastic-encapsulated circuit according to claim 5, characterized in that: In step S17, the nano-fluorine is hydrofluoroether.

9. The method for suppressing internal delamination of a plastic-encapsulated circuit according to claim 5, characterized in that: After deposition, the film thickness inside the device is 1.5±0.05 μm for the coupling agent in step S5, 1.2±0.08 μm for polyparaxylene in step S7, and 1.5±0.05 μm for the coupling agent in step S9. In step S17, the thickness of the nano-fluorine outside the device is 0.4±0.04 μm.

10. The method for suppressing internal delamination of a plastic-encapsulated circuit according to claim 1, characterized in that: In steps S6 and S10, the coupling agent deposition process parameters are as follows: the initial vacuum degree of the deposition chamber is 3mT~20mT, the temperature of the liquid evaporation chamber is 145℃~200℃, the liquid cut-off vacuum degree is 25mT~35mT, the ultimate vacuum degree is 3mT~9mT, and the coating vacuum degree is 30mT~40mT; in step S8, the polyparaxylene deposition process parameters are as follows: the initial vacuum degree of the deposition chamber is 3mT~9mT, the temperature of the solid evaporation chamber is 95℃~120℃, the solid cut-off vacuum degree is 25mT~55mT, the ultimate vacuum degree is 3mT~9mT, and the coating vacuum degree is 24mT~30mT; in step S18, the nano-fluorine deposition process parameters are as follows: the initial vacuum degree of the deposition chamber is 3mT~20mT, the temperature of the liquid evaporation chamber is 125℃~160℃, the liquid cut-off vacuum degree is 25mT~35mT, the ultimate vacuum degree is 3mT~9mT, and the coating vacuum degree is 24mT~30mT.

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