Solar array regulator
By using a ZVZCS converter controlled by a hysteresis comparator in the solar array regulator, the problem of PCU power level improvement in the prior art is solved, efficient power regulation is achieved, high voltage risk is reduced, and power density is improved.
Patent Information
- Application Number
- CN202411699630.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-26
- Publication Date
- 2025-03-14
AI Technical Summary
When the prior art improves the power level of the 100V bus PCU, it faces higher power demands, resulting in increased parallel modules, loss of volume and power density, and the bus phase margin decreases, increasing the risk of oscillation, making it difficult to continue to improve the power level.
The ZVZCS converter controlled by the hysteresis comparator sequence is used to amplify the input voltage by the DCX push-pull part, and control it through the shunt part, the hysteresis comparator and the main error amplification circuit to ensure that there is no high voltage in SADA, protect the safety of the whole satellite power supply, and improve the power density of the PCU.
It realizes that the bus voltage is increased without changing the solar array interface, reduces the risk of ignition and short circuit, and improves the overall power density of the PCU.
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Figure CN119628433A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of shunts, and in particular to a solar array regulator. Background Art
[0002] As the most widely used solar panel regulation topology for onboard power supply, the sequential shunt circuit used in the prior art is as follows: Figure 1 As shown, the shunt tube M1 (SI-MOS) is responsible for regulating the power of the windsurfing board SA and is controlled by a unified controller. When the energy is sufficient, the shunt tube M1 short-circuits the energy of the windsurfing board SA to the ground. When energy is needed, the shunt tube M1 is disconnected to allow the windsurfing board SA to discharge to the bus through the inductor L1 and the diode D1. This topology has been fully applied to the current 100V and 42V bus PCUs (Power Conditoning Units) due to its high efficiency, low loss, simplicity and reliability.
[0003] The PCU bus voltage on the high-power communication satellites currently in use is around 100V. At this voltage level, the maximum power of the PCU is basically between 20KW and 25KW. Higher power requirements mean that more modules in parallel correspond to a larger volume and power density loss. At the same time, the parallel connection of a large number of modules will reduce the bus phase margin and increase the risk of oscillation. The above problems make it difficult to continue to increase the PCU power level of the 100V bus, which makes it necessary to increase the PCU power by increasing the bus voltage level.
[0004] Table 1 Insulation level at different voltages
[0005]
[0006] Combined with Table 1, according to the insulation specifications under different voltages, it can be seen that after special material coating, the insulation distance between the inner and outer layers at the voltage level of 251~300V is similar to the commonly used spacing of 51~100V, so choosing a voltage of 300V can maximize the bus voltage level and increase the power density without increasing the insulation spacing.
[0007] Conventional satellite components are as follows: Figure 2 As shown, there are three parts: (1) solar panels (SA) that convert light energy into electrical energy; (2) the satellite body used to carry major equipment; and (3) the solar panel drive mechanism (SADA).
[0008] Among them, the Solar Array Driver Assembly (SADA) is a key component of the modern long-life satellite transmission link. It is used to drive the solar array (SA) to rotate and adjust the angle of the sun shining on the satellite array to obtain energy most efficiently, and complete the transmission of electrical power and electrical signals between the solar array (SA) and the satellite body through the conductive ring. Figure 3 The input and output shown are connected through brushes and loops. The loop slides to adjust the SA incident angle. The brushes ensure that the input cable can be reliably connected when sliding. When the loop rotates, the friction between the brushes and the loop will produce metal debris, which will reduce the insulation distance between the loops. This causes fires and short circuits between the loops when the voltage of the solar panel itself is greater than 100V.
[0009] Figure 1 The sequential shunt circuit shown in the figure directly supplies the energy of the windsurfing SA to the bus. At this time, the voltage of the windsurfing SA will be equal to the bus voltage. If the bus voltage is increased to increase the power of the PCU, this may cause Figure 3 Sparks and short circuits occur in the middle loop, affecting the entire star. In summary, a simple and reliable sequential control boost topology that can replace the S3R (Shunt Squential Series Regulator) is needed to realize the function of the low-voltage SA high-voltage bus (300V) to improve the overall power density of the PCU. Summary of the invention
[0010] The main purpose of the present invention is to propose a solar array regulator, which aims to ensure that SADA does not have high voltage, protect the power supply safety of the entire satellite, and improve the power density of the PCU.
[0011] To achieve the above object, the present invention provides a solar array regulator, comprising k-level power units sequentially controlled by hysteresis comparators, wherein the input end of the k-level power unit is connected to the solar array segment, and the output end is connected in parallel to the HV-BUS high-voltage bus and the main error amplifier circuit;
[0012] The power unit includes a shunt part, a DCX push-pull part and a hysteresis comparator. The hysteresis comparator receives the signal of the main error amplifier circuit. The DCX push-pull part is used to amplify the input voltage in proportion to the transformer turns ratio and control it through the shunt part, the hysteresis comparator and the main error amplifier circuit.
[0013] A further technical solution of the present invention is that the DCX push-pull part is implemented by different open-loop power topologies.
[0014] A further technical solution of the present invention is that the DCX push-pull part has a simple DC transfer function Vo / Vin=n, wherein Vo is the bus voltage, Vin is the input voltage, and n is the transformer turns ratio. The transformer turns ratio n is determined by the input and output voltages, i.e., the solar array voltage V sas and bus voltage V BUS definition:
[0015]
[0016] A further technical solution of the present invention is that the switching frequency f of the power unit SW Determined by parasitic capacitance, equivalent parasitic capacitance C P Must be within the dead zone T gap The internal is charged and discharged, the equivalent parasitic capacitance C P By selecting devices for estimation, the estimation method uses formula (2):
[0017] C P =C ds +C tr +C j *n 2 Formula (2);
[0018] Among them, C ds is the MOSFET output capacitance, C tr is the transformer equivalent capacitance, C j is the equivalent capacitance of the rectifier diode.
[0019] A further technical solution of the present invention is that the switching frequency f of the power unit SW The calculation formula is:
[0020] I M =20%*I SC
[0021]
[0022]
[0023]
[0024] Among them, I M is the magnetizing current, the magnetizing current I M In the gap time t gap time remains constant, responsible for the parasitic capacitance C p Perform charging and discharging.
[0025] A further technical solution of the present invention is that the gap time t gap It is calculated through the transformer and equivalent capacitance. The calculation formula is:
[0026]
[0027]
[0028]
[0029] Resonant capacitor C r The calculation formula is:
[0030]
[0031]
[0032]
[0033] A further technical solution of the present invention is that the relationship between the bus power transconductance G and the main error amplifier circuit is calculated by the following formula:
[0034]
[0035] A further technical solution of the present invention is that the power unit includes a power tube M sh Each power unit has a corresponding threshold range on the threshold of the main error amplifier circuit. load When the load is less than the current of a single-stage power unit, the threshold of the main error amplifier circuit is the highest, and the k-th power unit is working. sh In the regulation state, its duty cycle D is related to the output I load The relationship is as follows:
[0036]
[0037] Among them, n is the duty cycle of the transformer, and the power tube M in other power units sh No power output;
[0038] When the output I load When the load is greater than the current of a single-stage power unit, the power tube M of the k-th power unit sh Normally off, maximum capacity output, the power tube Msh of the k-1th power unit adjusts the output power to stabilize the bus, and the power tubes M in the remaining power units sh No output is performed in the normal shunt state, and so on.
[0039] The beneficial effects of the solar array regulator of the present invention are:
[0040] 1. Compared with the traditional shunt regulation bus, the S3ZVZCS topology regulates the bus frequency and the bus capacitance array is small;
[0041] 2. The SAS interface will not change while increasing the bus voltage;
[0042] 3. SADA will not produce high voltage, reducing the risk of sparking and short circuit;
[0043] 4. The power level of PCU can be further improved. BRIEF DESCRIPTION OF THE DRAWINGS
[0044] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the structures shown in these drawings without paying creative work.
[0045] Figure 1 It is a schematic diagram of a sequential current shunting circuit adopted in the prior art;
[0046] Figure 2 This is a general schematic diagram of a conventional satellite;
[0047] Figure 3 It is a schematic diagram of the loop;
[0048] Figure 4 It is a schematic diagram of the S3ZVZCS structure;
[0049] Figure 5 It is the MEA threshold division diagram.
[0050] The realization of the purpose, functional features and advantages of the present invention will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION
[0051] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0052] In order to ensure that the solar array driver assembly (SADA) does not have high voltage, protect the power supply safety of the entire satellite, and further improve the power density of the PCU, the present invention proposes a new type of solar array regulator. The regulator uses a ZVZCS converter (zero voltage, zero current switching) controlled sequentially by a hysteresis comparator. The regulator is named S3ZVZCS. Figure 4As shown, each power unit is connected to a solar cell segment, and each power unit includes three parts: an open-loop DC / DC converter (also called a DCX push-pull part), a shunt part S3R with a current limiting drive, and a hysteresis comparator circuit receiving an MEA signal.
[0053] Specifically, Figure 4 As shown, a preferred embodiment of the solar array regulator of the present invention includes k-level power units sequentially controlled by hysteresis comparators, wherein the input end of the k-level power unit is connected to the solar array segment, and the output end is connected in parallel to the HV-BUS high-voltage bus and the main error amplifier circuit.
[0054] The power unit includes a shunt part, a DCX push-pull part and a hysteresis comparator. The hysteresis comparator receives the signal of the main error amplifier circuit. The DCX push-pull part is used to amplify the input voltage in proportion to the transformer turns ratio and control it through the shunt part, the hysteresis comparator and the main error amplifier circuit.
[0055] The following first introduces the open-loop DCX.
[0056] In this embodiment, the DCX push-pull part is implemented by different open-loop power topologies, such as open-loop full-bridge, open-loop half-bridge, etc. This embodiment only introduces a ZVZCS converter with a push-pull configuration.
[0057] The DCX push-pull part has a relatively simple DC transfer function Vo / Vin=n, where Vo is the bus voltage (i.e. Figure 4 Medium V BUS ), Vin is the DC input voltage, n is the transformer turns ratio, the transformer turns ratio n is determined by the input and output voltages, that is, the solar array voltage V sas and bus voltage V BUS definition:
[0058]
[0059] The switching frequency f of the power unit SW Mainly determined by parasitic capacitance, equivalent parasitic capacitance C P Must be within the dead zone T gap The equivalent parasitic capacitance C P By selecting devices for estimation, the estimation method uses formula (2):
[0060] C P =C ds +C tr +C j *n 2 Formula (2);
[0061] Among them, Cds is the MOSFET output capacitance, C tr is the transformer equivalent capacitance, C j is the equivalent capacitance of the rectifier diode.
[0062] Magnetizing current I M In the gap time t gap time remains constant, responsible for the parasitic capacitance C p For charging and discharging, the magnetizing current I M It has a great impact on the gap time, transformer size and the final converter efficiency. The switching frequency f required by the converter can be calculated by the following formula: SW .
[0063] I M =20%*I SC
[0064]
[0065]
[0066]
[0067] In order to ensure the MOS tube zero voltage (ZVS) conduction, the gap time t gap It is calculated through the transformer and equivalent capacitance. The calculation formula is:
[0068]
[0069]
[0070]
[0071] In order for the MOS tube to conduct at zero current (ZCS), the resonant capacitor C r The calculation formula is:
[0072]
[0073]
[0074]
[0075] Among them, w gap ,θ,w r It is just a code name for convenience gap Calculation.
[0076] The following is an introduction to the sequential diverter and control strategy design.
[0077] Since DCX is an open-loop converter, its function is to amplify the input into a high-voltage bus in proportion to the transformer turns ratio. Figure 4 The k-level S3ZVZCS are sequentially distributed in Figure 5 above the MEA threshold.
[0078] The relationship between the bus power transconductance G and the main error amplifier circuit can be calculated according to the MEA threshold using the following formula:
[0079]
[0080] The power unit includes a power tube M sh ,like Figure 5 As shown, S3ZVZCS corresponds to a threshold range on the MEA threshold. load When the load is less than the single-stage S3ZVZCS current, the MEA threshold is the highest, and the k-th stage S3ZVZCS k Work, Figure 4 Medium power tube M sh In the regulation state, its duty cycle D is related to the output I load The relationship is as follows:
[0081]
[0082] Among them, n is the transformer duty cycle, and the power tube M in other S3ZVZCS sh No power output;
[0083] When the output I load When the load is greater than the current of a single-stage S3ZVZCS, the power tube M of the k-th stage S3ZVZCS sh Normally off, maximum output capacity, by the k-1th level S3ZVZCS power tube M sh Adjust the output power to stabilize the bus, and the power tubes M in the remaining power units sh No output is performed in the normal shunt state, and so on.
[0084] In summary, this embodiment analyzes a new shunt topology that takes into account the high-voltage bus. This topology increases the voltage of the power bus to ensure that the power level of the satellite power supply PCU can be further increased, and ensures that the SADA terminal voltage will not be over-voltage, reducing the risk of sparking and short circuit.
[0085] The beneficial effects of the solar array regulator of the present invention are:
[0086] 1. Compared with the traditional shunt regulation bus, the S3ZVZCS topology regulates the bus frequency and the bus capacitance array is small;
[0087] 2. The SAS interface will not change while increasing the bus voltage;
[0088] 3. SADA will not produce high voltage, reducing the risk of sparking and short circuit;
[0089] 4. The power level of PCU can be further improved.
[0090] The above description is only a preferred embodiment of the present invention, and does not limit the patent scope of the present invention. All equivalent structural changes made by using the contents of the present invention specification and drawings under the concept of the present invention, or directly / indirectly applied in other related technical fields are included in the patent protection scope of the present invention.
Claims
1. A solar array regulator, characterized in that: It comprises k-level power units sequentially controlled by hysteresis comparators, wherein the input end of the k-level power unit is connected to the solar array segment, and the output end is connected in parallel to the HV-BUS high-voltage bus and the main error amplifier circuit; The power unit includes a shunt part, a DCX push-pull part and a hysteresis comparator. The hysteresis comparator receives the signal of the main error amplifier circuit. The DCX push-pull part is used to amplify the input voltage in proportion to the transformer turns ratio and control it through the shunt part, the hysteresis comparator and the main error amplifier circuit.
2. The solar array regulator according to claim 1, characterized in that: The DCX push-pull section is implemented through different open-loop power topologies.
3. The solar array regulator according to claim 2, characterized in that: The DCX push-pull part has a simple DC transfer function Vo / Vin=n, where Vo is the bus voltage, Vin is the input voltage, and n is the transformer turns ratio. The transformer turns ratio n is determined by the input and output voltages, that is, the solar array voltage V sas and bus voltage V BUS definition:
4. The solar array regulator according to claim 3, characterized in that: The switching frequency f of the power unit SW Determined by parasitic capacitance, equivalent parasitic capacitance C P Must be within the dead zone T gap The internal is charged and discharged, the equivalent parasitic capacitance C P By selecting devices for estimation, the estimation method uses formula (2): C P =C ds +C tr +C j *n 2 Formula (2); Among them, C ds is the MOSFET output capacitance, C tr is the transformer equivalent capacitance, C j is the equivalent capacitance of the rectifier diode.
5. The solar array regulator according to claim 4, characterized in that: The switching frequency f of the power unit SW The calculation formula is: I M =20%*I SC Among them, I M is the magnetizing current, the magnetizing current I M During the gap time tgap, it remains constant and is responsible for the parasitic capacitance C p Perform charging and discharging.
6. The solar array regulator according to claim 5, characterized in that: The gap time t hap It is calculated through the transformer and equivalent capacitance. The calculation formula is: Resonant capacitor C r The calculation formula is:
7. The solar array regulator according to claim 6, characterized in that: The relationship between the bus power transconductance G and the main error amplifier circuit is calculated by the following formula:
8. The solar array regulator according to claim 7, characterized in that: The power unit includes a power tube M sh Each power unit has a corresponding threshold range on the threshold of the main error amplifier circuit. load When the load is less than the current of a single-stage power unit, the threshold of the main error amplifier circuit is the highest, and the k-th power unit is working. sh In the regulation state, its duty cycle D is related to the output I load The relationship is as follows: Among them, n is the duty cycle of the transformer, and the power tube M in other power units sh No power output; When the output I load When the load is greater than the current of a single-stage power unit, the power tube M of the k-th power unit sh Normally off, maximum capacity output, the power tube Msh of the k-1th power unit adjusts the output power to stabilize the bus, and the power tubes M in the remaining power units sh No output is performed in the normal shunt state, and so on.