Oscillator

Abstract

The invention provides an oscillator. The oscillator comprises a frequency control module, an oscillator module and a tuning interface module, the tuning interface module is electrically connected with the oscillator module and the frequency control module respectively; the frequency control module is used for providing a digital tuning control signal to the tuning interface module; and the tuning interface module is used for generating an analog tuning quantity signal according to the acquired clock signal and the digital tuning control signal, and outputting the analog tuning quantity signal to the oscillator module. According to the embodiment of the invention, the digital tuning control signal can be adopted to accurately represent the compensation amount required by the physical environment change, and the analog signal can be prevented from being interfered by noise during transmission; moreover, in the embodiment, the digital tuning control signal is converted into the analog tuning quantity signal, so that the adjustment continuity of the oscillator module can be ensured, the frequency hopping phenomenon during compensation of the digital tuning control signal is reduced, and the frequency stability of the oscillator is improved.

Description

Technical Field

[0001] The present disclosure relates to the field of control technology, and in particular to an oscillator. Background Art

[0002] High-precision oscillators are widely used in modern communication, navigation, measurement and other systems. Taking high-precision oscillators including quartz crystal oscillators (XOs) as an example, as an accurate clock reference source, its frequency stability is crucial to the overall performance of the system.

[0003] However, the frequency of a high-precision oscillator will still be affected by changes in the physical environment (such as temperature, acceleration, etc.), resulting in frequency drift, which in turn affects the stability of the system. Summary of the invention

[0004] The present disclosure provides an oscillator to solve the above technical problems.

[0005] According to a first aspect of the present disclosure, an oscillator is provided, comprising: a frequency control module, an oscillator module and a tuning interface module; the tuning interface module is electrically connected to the oscillator module and the frequency control module respectively;

[0006] The frequency control module is used to provide a digital tuning control signal to the tuning interface module;

[0007] The tuning interface module is used to generate an analog tuning amount signal according to the acquired clock signal and the digital tuning control signal, and output the analog tuning amount signal to the oscillator module.

[0008] Optionally, the clock signal acquired by the tuning interface module is provided by the oscillator module.

[0009] Optionally, the oscillator further comprises a reference oscillation module, and the reference oscillation module is electrically connected to the tuning interface module;

[0010] The reference oscillation module is used to provide a clock signal to the tuning interface module.

[0011] Optionally, the tuning interface module includes a clock distribution submodule, a signal mapping submodule and a digital-to-analog conversion module; the clock distribution submodule is electrically connected to the signal mapping submodule and the digital-to-analog conversion module respectively; the signal mapping submodule is electrically connected to the digital-to-analog conversion module;

[0012] The clock distribution submodule is used to distribute the clock signal to obtain a first clock sub-signal and a second clock sub-signal;

[0013] The signal mapping submodule is used to perform mapping processing on the digital tuning control signal according to the first clock sub-signal to obtain a digital mapping signal;

[0014] The digital-to-analog conversion submodule is used to perform digital-to-analog conversion on the digital mapping signal according to the second clock sub-signal to obtain the analog tuning amount signal.

[0015] Optionally, the signal mapping submodule is implemented using a digital circuit, and is used to sample and process a digital tuning control signal of a first bit width according to the first clock sub-signal to obtain a digital mapping signal of a second bit width; the first bit width is greater than the second bit width.

[0016] Optionally, the digital-to-analog conversion submodule includes: a remapping unit, a device array gating unit, an analog signal calculation unit and a low-pass filtering unit; the device array gating unit is electrically connected to the remapping unit and the analog signal calculation unit respectively, and the analog signal calculation unit is electrically connected to the low-pass filtering unit;

[0017] The remapping unit is used to perform remapping processing on the digital mapping signal to obtain a multi-path gating control signal;

[0018] The device array selection unit is used to switch the working state of each device according to the multi-way selection control signal, and each device outputs a matching analog signal after switching to the working state;

[0019] The analog signal calculation unit is used to sum the analog signals output by the device array selection unit to obtain candidate analog signals;

[0020] The low-pass filtering unit is used to filter out high-frequency signals and stray signals in the candidate analog signal to obtain the analog tuning amount signal.

[0021] Optionally, the analog signal calculation unit includes a summation calculation subunit and a signal correction subunit;

[0022] The summing calculation subunit is used to perform summing processing on the analog signals output by the device array selection unit to obtain an initial analog signal;

[0023] The signal correction subunit is used to perform signal correction on the initial analog signal to obtain the candidate analog signal.

[0024] Optionally, the oscillator further comprises an automatic sensing and compensation logic module, and the automatic sensing and compensation logic module is electrically connected to the frequency control module;

[0025] The automatic sensing and compensation logic module is used to obtain the physical environment change of the environment where the oscillator module is located, and generate a compensation signal according to the physical environment change; and send the compensation signal to the frequency control module;

[0026] The frequency control module is used to generate the digital tuning control signal according to the compensation signal.

[0027] Optionally, the oscillator further comprises an external control interface module, wherein the external control interface is electrically connected to the frequency control module;

[0028] The external control interface module is used to generate a compensation signal from the acquired external control amount, and send the compensation signal to the frequency control module;

[0029] The frequency control module is used to generate the digital tuning control signal according to the compensation signal.

[0030] Optionally, the analog tuning amount signal includes one of the following: voltage, current, charge and capacitance.

[0031] The technical solution provided by the embodiments of the present disclosure may have the following beneficial effects:

[0032] The oscillator provided in this embodiment includes: a frequency control module, an oscillator module and a tuning interface module; the tuning interface module is electrically connected to the oscillator module and the frequency control module respectively; the frequency control module is used to provide a digital tuning control signal to the tuning interface module; the tuning interface module is used to generate an analog tuning amount signal according to the acquired clock signal and the digital tuning control signal, and output the analog tuning amount signal to the oscillator module. In this way, this embodiment can use a digital tuning control signal to accurately characterize the compensation amount required for physical environment changes, and can avoid noise interference during analog signal transmission; and in this embodiment, the digital tuning control signal is converted into an analog tuning amount signal, which can ensure the continuity of the adjustment of the oscillator module, reduce the phenomenon of frequency hopping during digital tuning control signal compensation, and improve the stability of the oscillator frequency.

[0033] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 The present invention is a block diagram of an oscillator according to an embodiment of the present invention.

[0035] Figure 2 The figure is a block diagram of a tuning interface module according to an embodiment of the present disclosure.

[0036] Figure 3The present invention is a block diagram of a digital-to-analog conversion submodule according to an embodiment of the present invention.

[0037] Figure 4 The block diagram is another digital-to-analog conversion submodule according to an embodiment of the present disclosure.

[0038] Figure 5 The present invention is a circuit diagram of a device array selection unit performing dynamic mismatch processing according to an embodiment of the present invention.

[0039] Figure 6 The present invention is a block diagram of an analog signal calculation unit according to an embodiment of the present invention. DETAILED DESCRIPTION

[0040] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present disclosure. Instead, they are merely examples of devices consistent with some aspects of the present disclosure as detailed in the appended claims.

[0041] The present disclosure provides an oscillator, see Figure 1 The oscillator 10 includes: an oscillator module 11, a tuning interface module 12 and a frequency control module 13; the tuning interface module 12 is electrically connected to the oscillator module 11 and the frequency control module 13 respectively; the frequency control module 13 is used to provide a digital tuning control signal to the tuning interface module 12; the tuning interface module 12 is used to generate an analog tuning amount signal according to the acquired clock signal and the digital tuning control signal, and output the analog tuning amount signal to the oscillator module 11.

[0042] This embodiment can use a digital tuning control signal to accurately characterize the compensation amount required for changes in the physical environment, which can avoid noise interference during analog signal transmission; and, in this embodiment, the digital tuning control signal is converted into an analog tuning amount signal, which can ensure the continuity of the adjustment of the oscillator module, reduce the frequency jumping phenomenon during the digital tuning control signal compensation, and improve the stability of the oscillator frequency.

[0043] In one example, the oscillator module 11 may include a resonant cavity and an oscillation maintenance circuit. Among them, the resonant cavity can be a metal cavity, a quartz crystal, a MEMS resonator, a SAW / BAW resonant cavity, etc., which can be selected according to the specific scenario. The physical properties of the resonant cavity may be affected by the external physical environment (such as temperature, acceleration, etc.), causing the oscillation frequency of the oscillator core to deviate from the expected value. The oscillation maintenance circuit cooperates with the resonant cavity to compensate for various losses (including the loss of the resonant cavity itself) and maintain the stability of the oscillation state so that it does not decay. The structure of the oscillator module 11 can be set according to the specific scenario and is not limited here.

[0044] In one example, the clock signal received by the tuning interface module 12 can be provided by the oscillator module 11, or by a reference oscillation module (not shown in the figure), or by an external clock signal. If a clock signal can be provided, the corresponding scheme falls within the protection scope of the present disclosure.

[0045] In one example, the clock signal received by the tuning interface module 12 can be provided by the oscillator module 11, and the tuning interface module 12 includes two input ports and one output port. The two input ports receive the clock signal and the digital tuning control signal respectively, and the one output port outputs the analog tuning amount signal. In this example, the analog tuning amount signal includes one of the following: voltage, current, charge, and capacitance, which can be configured according to the tuning amount mode required by the oscillator module 11. Among them, the tuning amount mode refers to an oscillator module composed of different resonant cavities, and its frequency pulling method may be different, such as changing the frequency of the MEMS oscillator by adjusting the bias voltage, changing the frequency of the quartz crystal oscillator by adjusting the load capacitance, etc.

[0046] In one example, see Figure 2 The tuning interface module 12 includes a clock distribution submodule 21, a signal mapping submodule 22 and a digital-to-analog conversion module 23. The clock distribution submodule 21 is electrically connected to the signal mapping submodule 22 and the digital-to-analog conversion module 23 respectively; the signal mapping submodule 22 is electrically connected to the digital-to-analog conversion module 23.

[0047] The clock distribution submodule 21 is used to distribute the clock signal to obtain a first clock sub-signal and a second clock sub-signal;

[0048] The signal mapping submodule 22 is used to map the digital tuning control signal according to the first clock sub-signal to obtain a digital mapping signal;

[0049] The digital-to-analog conversion submodule 23 is used to perform digital-to-analog conversion on the digital mapping signal according to the second clock sub-signal to obtain an analog tuning amount signal.

[0050] In this example, the clock distribution submodule 21 distributes the clock signal and processes the clock signal, which means generating a matching clock signal for the signal mapping submodule 22 and the digital-to-analog conversion submodule 23 based on the same clock signal, i.e., the first clock sub-signal and the second clock sub-signal mentioned above, i.e., in the time domain, the signal mapping submodule 22 works on the basis of the first clock sub-signal and the digital-to-analog conversion submodule 23 works on the basis of the first clock sub-signal, and in fact, it works on the basis of the clock signal for generating the first clock sub-signal and the second clock sub-signal, so as to achieve the effect that the clock distribution submodule 21, the signal mapping submodule 22 and the digital-to-analog conversion submodule 23 have a definite correlation in frequency and phase in the time domain, or the effect that the three work synchronously.

[0051] In this example, the signal mapping submodule 22 is implemented by a digital circuit, and is used to sample and process the digital tuning control signal of the first bit width according to the first clock sub-signal to obtain a digital mapping signal of the second bit width; wherein the first bit width is greater than the second bit width. For example, the digital tuning control signal can be a control amount of binary data of the first bit width M bits, which is upsampled and mapped to reduce the bit width, and then becomes binary data of the second bit width N bits, wherein the second bit width N is determined by the number of devices in the device array in the digital-to-analog conversion module 23.

[0052] It is understandable that in this example, the signal mapping submodule 22 is implemented using a digital circuit, which may introduce a truncation error. The power spectrum of the truncation error may exhibit a high-pass feature, that is, the truncation error is mainly concentrated outside the signal bandwidth of the digital tuning control amount.

[0053] In one example, see Figure 3 The digital-to-analog conversion submodule 23 includes: a remapping unit 31, a device array gating unit 32, an analog signal calculation unit 33 and a low-pass filtering unit 34; the device array gating unit 32 is electrically connected to the remapping unit 31 and the analog signal calculation unit 33 respectively, and the analog signal calculation unit 33 is electrically connected to the low-pass filtering unit 34.

[0054] The remapping unit 31 is used to perform remapping processing on the digital mapping signal to obtain a multi-channel gating control signal;

[0055] The device array selection unit 32 is used to switch the working state of each device according to the multi-way selection control signal, and each device outputs a matching analog signal after switching to the working state;

[0056] The analog signal calculation unit 33 is used to sum the analog signals output by the device array selection unit to obtain candidate analog signals;

[0057] The low-pass filter unit 34 is used to filter out high-frequency signals and stray signals in the candidate analog signal to obtain an analog tuning amount signal.

[0058] It should be noted that the remapping process refers to converting the digital mapping signal into a codeword that can control the enabling or disabling of each device in the device array selection unit 32, such as binary to thermometer code, thereby enabling some devices in the device array selection unit 32 to ensure good linearity of the digital-to-analog transfer characteristic curve.

[0059] In one example, the device array selection unit 32 may include multiple devices, such as a resistor unit, a current source unit, a capacitor unit, etc., which may be selected according to specific scenarios. When the devices of the device array selection unit 32 are switched to the on state, corresponding analog signals may be output.

[0060] Taking the resistor unit as an example, it can be connected to the positive and negative reference voltages through the shape, indicating whether it is selected or not, and the above codeword controls the switch to be turned on or off. When the resistor unit is turned on, an analog voltage can be output.

[0061] Taking the current source unit as an example, the current source unit can be connected to the analog signal calculation unit 33 or disconnected from the analog signal calculation unit 33 through a switch to indicate whether to select / unselect the analog signal calculation unit 33. The above codeword controls the above switch to be turned on or off. When the current source unit is turned on, an analog current can be output.

[0062] It is understandable that when the device array selection unit 32 includes other devices, the control method of the other devices refers to the connection method of the above-mentioned resistance unit or current source unit, and the corresponding scheme falls within the protection scope of the present disclosure.

[0063] Regarding the error energy caused by the static mismatch of each device in the device array selection unit 32, for example, when the marked resistance values ​​of two resistors are the same but the actual resistance values ​​have a workmanship difference, the current generated by the same input voltage will be different.

[0064] For some possible examples, see Figure 4 The digital-to-analog conversion submodule 23 also includes: a mismatch adjustment unit 35, which is electrically connected to the signal mapping submodule 22 and the remapping unit 31, and is used to generate a mode control signal according to the code stream characteristics of the input digital mapping signal, and send the mode control signal to the remapping unit 31. The remapping unit 31 remaps the digital mapping signal according to the mode control signal to obtain a multi-path gating control signal. It can be understood that different remapping methods correspond to different digital mapping signals, so that the part of the error energy caused by static mismatch that falls within the signal bandwidth is reduced.

[0065] In some possible examples, the remapping unit 31 may randomly select a remapping method from among multiple preset remapping methods each time remapping is required. The random method can reduce the portion of the error energy caused by static mismatch that falls within the signal bandwidth.

[0066] It should be noted that this example illustrates the above two solutions for reducing the static mismatch problem. In some possible examples, dynamic element matching (Dynamic Element Matching, DEM), data weighted averaging (Data-Weighted Averaging, DWA), bidirectional data weighted averaging (Bidirectional Data-Weighted Averaging), vectorized high-order shaping, etc. can be used to implement it. Correspondingly, the structure of the digital-to-analog conversion submodule 23 will change, and the corresponding solution falls within the protection scope of this disclosure.

[0067] Considering that each device in the device array selection unit 32 changes from a gated state to a non-gated state or from a non-gated state to a gated state, the analog signal outputted by the device array selection unit 32 may generate time domain glitches over time, resulting in dynamic mismatch between units. In some possible examples, each device in the device array selection unit 32 may create a gate switch copy.

[0068] See also Figure 5 , when each device of the device array selection unit 32 is a resistor R, it also includes switches S1 to S4, S3 and S4 for creating a gate switch copy. The remapping unit 31 controls the switches S1 to S4 to switch at each switch phase Φ when receiving the digital mapping signal Di, and uses S1 and S2 when Φ is 1; and uses S3 and S4 when Φ is 0.

[0069] Each switching phase Φ has only one switch switching, and at each rising edge of the clock CLK, there is exactly one rising edge and one falling edge in switches S1 to S4. The output error Vi-DiVref of the device generates the same pulse signal in each switching phase, and the pulse signal is no longer related to the input digital mapping signal Di.

[0070] In this way, in this example, the time domain glitches caused by controlling the dynamic mismatch tend to be consistent, so the frequency and shape of the spurious peaks introduced by the glitches are relatively fixed, and no mutual modulation will occur at this time. The position of the spurious peaks will not fall within the useful signal bandwidth, and the position will not frequently change unpredictably. Ultimately, it is easy to eliminate the spurious signals introduced by the above-mentioned time domain glitches in the frequency domain, thereby achieving the effect of improving the signal quality (signal-to-noise-and-distortion power ratio (SNDR)) of the analog tuning signal output by the digital-to-analog conversion module 23.

[0071] In one example, the analog signal calculation unit 33 can be implemented using an analog circuit, see Figure 6 The analog signal calculation unit 33 may include a sum calculation subunit 41 and a signal correction subunit 42 .

[0072] The summing calculation subunit 41 is used to sum the analog signals output by the device array selection unit 32 to obtain an initial analog signal. The summing calculation subunit 41 can be implemented by an inverting summing circuit or a non-inverting summing circuit based on an operational amplifier.

[0073] The signal correction subunit 42 is used to correct the initial analog signal to obtain a candidate analog signal. The signal correction subunit 42 can correct the initial analog signal using at least one circuit or algorithm selected from chopping, self-zeroing, chopping self-zeroing, barrel shifting and flow control shifting.

[0074] In this example, since the analog signal calculation unit 33 is implemented using an analog circuit, its output value is continuous in the time domain without jumps and holds; and through signal correction, the offset and low-frequency noise signals introduced by the summing analog circuit can be reduced, thereby achieving the effect of improving the accuracy of the candidate analog signal.

[0075] In one example, continue to see Figure 1 The oscillator 10 further includes an automatic sensing and compensation logic module 14 . The automatic sensing and compensation logic module 14 is electrically connected to the frequency control module 13 .

[0076] The automatic sensing and compensation logic module 14 is used to obtain the physical environment change of the environment where the oscillator module 11 is located, and generate a compensation signal based on the above physical environment change; and send the above compensation signal to the frequency control module 13; the frequency control module 13 is used to generate a digital tuning control signal based on the compensation signal.

[0077] In one example, the sensor in the automatic sensing and compensation logic module 14 can be set according to the physical environment that the oscillator module 11 is affected by. For example, when the oscillator module 11 is affected by temperature, the automatic sensing and compensation logic module 14 includes a temperature sensor; for another example, when the oscillator module 11 is affected by acceleration, the automatic sensing and compensation logic module 14 includes an acceleration sensor; for another example, when the oscillator module 11 is affected by temperature and acceleration, the automatic sensing and compensation logic module 14 includes a temperature sensor and an acceleration sensor. In the case of being able to accurately collect the physical environment change amount of the environment where the oscillator module 11 is located, the composition scheme of the automatic sensing and compensation logic module 14 falls within the protection scope of the present disclosure.

[0078] It should be noted that the automatic sensing and compensation logic module 14 can store a preset mapping relationship between the physical variation and the digital tuning control signal, and the preset mapping relationship between the physical variation and the digital tuning control signal can be obtained by pre-testing and stored.

[0079] When the automatic sensing and compensation logic module 14 includes a sensor, the above-mentioned physical change quantity is the physical change quantity collected by the sensor. Taking the automatic sensing and compensation logic module 14 as an example including a temperature sensor, the temperature change quantity used by the temperature sensor is the above-mentioned physical change quantity.

[0080] When the automatic sensing and compensation logic module 14 includes two or more sensors, the above-mentioned physical change is the weighted value of the physical change collected by the two or more sensors. Taking the automatic sensing and compensation logic module 14 as an example, the temperature sensor collects the temperature change, and the acceleration sensor collects the acceleration change, and then obtains the product of the above-mentioned temperature change and the preset temperature weight and the product of the acceleration change and the preset acceleration weight, and then obtains the sum of the two products as the above-mentioned physical change.

[0081] It should be noted that when the automatic sensing and compensation logic module 14 includes two or more sensors, the weight value of the physical change quantity can be set according to the influence of each physical parameter on the oscillator module 11, for example, each weight value can be pre-configured. In one example, the physical change quantity collected by each sensor in each acquisition cycle can be obtained to obtain a set of physical change quantities in each acquisition cycle; then, multiple groups of physical change quantities and the frequency change quantity of the oscillator module 11 (i.e., the compensation signal) are fitted to obtain a mapping function between each physical change quantity and the frequency change quantity. It is understandable that the above mapping function includes the weight value of each physical change quantity.

[0082] In another example, see Figure 1 , the oscillator 10 also includes an external control interface module 15, which is electrically connected to the frequency control module 13; the external control interface module 15 is used to obtain the external control amount. The external control amount can be the frequency tuning direction, the frequency tuning value or the working mode of the frequency control module 13, etc., which can be set according to the specific situation. Then, the external control interface module 15 can generate a compensation signal according to the external control amount, and send the compensation signal to the frequency control module 13; the frequency control module 13 is used to generate a digital tuning control signal according to the compensation signal. In this way, in this example, by setting the external control interface module 15, the external control amount input by the user can be obtained, which is conducive to improving the control accuracy of the oscillator 10.

[0083] The oscillator provided in this embodiment can generate an analog tuning amount signal from a digital tuning control signal, eliminate the frequency hopping problem during digital compensation, and improve the short-term frequency stability; and by controlling the noise and distortion introduced in the conversion process, the phase noise and frequency stability of the oscillator can be guaranteed; in addition, by adapting to the frequency drift characteristics of different high-precision oscillators, no specific circuits or components are required, thereby improving versatility and flexibility.

[0084] Those skilled in the art will readily appreciate other embodiments of the present disclosure after considering the specification and practicing the disclosure disclosed herein. The present disclosure is intended to cover any variations, uses, or adaptations that follow the general principles of the present disclosure and include common knowledge or customary techniques in the art that are not disclosed in the present disclosure. The description and examples are to be considered exemplary only, and the true scope and spirit of the present disclosure are indicated by the following claims.

[0085] It should be understood that the present disclosure is not limited to the exact structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

Claims

1. An oscillator, characterized in that: include: A frequency control module, an oscillator module and a tuning interface module; the tuning interface module is electrically connected to the oscillator module and the frequency control module respectively; The frequency control module is used to provide a digital tuning control signal to the tuning interface module; The tuning interface module is used to generate an analog tuning amount signal according to the acquired clock signal and the digital tuning control signal, and output the analog tuning amount signal to the oscillator module.

2. The oscillator according to claim 1, characterized in that The clock signal acquired by the tuning interface module is provided by the oscillator module.

3. The oscillator according to claim 1, characterized in that It also includes a reference oscillation module, the reference oscillation module is electrically connected to the tuning interface module; The reference oscillation module is used to provide a clock signal to the tuning interface module.

4. The oscillator according to claim 1, characterized in that The tuning interface module includes a clock distribution submodule, a signal mapping submodule and a digital-to-analog conversion module; the clock distribution submodule is electrically connected to the signal mapping submodule and the digital-to-analog conversion module respectively; the signal mapping submodule is electrically connected to the digital-to-analog conversion module; The clock distribution submodule is used to distribute the clock signal to obtain a first clock sub-signal and a second clock sub-signal; The signal mapping submodule is used to perform mapping processing on the digital tuning control signal according to the first clock sub-signal to obtain a digital mapping signal; The digital-to-analog conversion submodule is used to perform digital-to-analog conversion on the digital mapping signal according to the second clock sub-signal to obtain the analog tuning amount signal.

5. The oscillator according to claim 4, characterized in that The signal mapping submodule is implemented using a digital circuit and is used to sample and process a digital tuning control signal of a first bit width according to the first clock sub-signal to obtain a digital mapping signal of a second bit width; the first bit width is greater than the second bit width.

6. The oscillator according to claim 4, characterized in that The digital-to-analog conversion submodule comprises: a remapping unit, a device array gating unit, an analog signal calculation unit and a low-pass filtering unit; the device array gating unit is electrically connected to the remapping unit and the analog signal calculation unit respectively, and the analog signal calculation unit is electrically connected to the low-pass filtering unit; The remapping unit is used to perform remapping processing on the digital mapping signal to obtain a multi-path gating control signal; The device array selection unit is used to switch the working state of each device according to the multi-way selection control signal, and each device outputs a matching analog signal after switching to the working state; The analog signal calculation unit is used to sum the analog signals output by the device array selection unit to obtain candidate analog signals; The low-pass filtering unit is used to filter out high-frequency signals and stray signals in the candidate analog signal to obtain the analog tuning amount signal.

7. The oscillator according to claim 6, characterized in that The analog signal calculation unit includes a summation calculation subunit and a signal correction subunit; The summing calculation subunit is used to perform summing processing on the analog signals output by the device array selection unit to obtain an initial analog signal; The signal correction subunit is used to perform signal correction on the initial analog signal to obtain the candidate analog signal.

8. The oscillator according to claim 1, characterized in that It also includes an automatic sensing and compensation logic module, wherein the automatic sensing and compensation logic module is electrically connected to the frequency control module; The automatic sensing and compensation logic module is used to obtain the physical environment change of the environment where the oscillator module is located, and generate a compensation signal according to the physical environment change; and send the compensation signal to the frequency control module; The frequency control module is used to generate the digital tuning control signal according to the compensation signal.

9. The oscillator according to claim 1, characterized in that It also includes an external control interface module, wherein the external control interface is electrically connected to the frequency control module; The external control interface module is used to generate a compensation signal from the acquired external control amount, and send the compensation signal to the frequency control module; The frequency control module is used to generate the digital tuning control signal according to the compensation signal.

10. The oscillator according to claim 1, characterized in that The analog tuning signal includes one of the following: voltage, current, charge and capacitance.

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