Display panel and display device

Abstract

The invention relates to a display panel and a display device. The display panel comprises an array substrate and a pixel definition layer. The pixel definition layer is arranged on the array substrate, a plurality of pixel openings are formed in the pixel definition layer, the pixel definition layer comprises retaining walls arranged between the adjacent pixel openings, the side surfaces, close to one sides of the pixel openings, of the retaining walls comprise first sub-surfaces and second sub-surfaces, the first sub-surfaces are located between the array substrate and the second sub-surfaces, and the second sub-surfaces are located between the array substrate and the second sub-surfaces. The contact angle of the first sub-surface is smaller than that of the second sub-surface; wherein the first sub-surface has a first height in the thickness direction of the display panel, the retaining wall has a second height in the thickness direction of the display panel, and the ratio of the first height to the second height is larger than or equal to 0.5; according to the display panel, the leakage path can be prolonged, the resistance is increased, the leakage current is reduced, and the performance and the display effect of the display panel can be improved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] Organic Light-Emitting Diode (OLED) display panels have the advantages of low cost, wide viewing angle, high contrast, and flexibility. Currently, significant results have been achieved in both small and large size applications.

[0003] Inkjet printing technology can be used in the preparation of organic functional layers of OLED display panels. Inkjet printing technology is to directly drop ink containing OLED materials onto a pre-made pixel definition layer, and form the desired pattern after the solvent evaporates. For example, the hole injection layer, hole transport layer, and light-emitting layer can all be prepared using inkjet printing technology.

[0004] Typically, a hydrophobic surface is formed on the upper side of the dam in the pixel definition layer to allow the ink to flow more easily into the pixel opening; wherein, the film layer climbing intercept points of the hole injection layer, the hole transport layer and the light-emitting layer on the side wall of the dam are all located below the hydrophobic surface, and the climbing heights are not much different, and thus, at the side wall of the dam, the hole injection layer is easily exposed instead of being wrapped, causing the hole injection layer to easily contact the cathode layer above the light-emitting layer, thereby causing leakage, affecting device performance and display effects. Summary of the invention

[0005] The embodiments of the present application provide a display panel and a display device, which can extend the leakage path between short-circuit film layers, increase resistance, and reduce leakage current.

[0006] An embodiment of the present application provides a display panel, comprising:

[0007] An array substrate;

[0008] A pixel definition layer is disposed on the array substrate, a plurality of pixel openings are formed in the pixel definition layer, the pixel definition layer comprises a retaining wall disposed between adjacent pixel openings, a side surface of the retaining wall close to the pixel opening comprises a first sub-surface and a second sub-surface, the first sub-surface is located between the array substrate and the second sub-surface, and a contact angle of the first sub-surface is smaller than a contact angle of the second sub-surface;

[0009] The first sub-surface has a first height along the thickness direction of the display panel, the retaining wall has a second height along the thickness direction of the display panel, and the ratio of the first height to the second height is greater than or equal to 0.5.

[0010] In one embodiment of the present application, the display panel further includes:

[0011] a hole injection layer, comprising a hole injection portion disposed in the pixel opening;

[0012] a light-emitting layer, comprising a light-emitting portion disposed in the pixel opening and located on a side of the hole injection portion away from the array substrate;

[0013] A functional electrode layer is disposed on the pixel definition layer and extends into the pixel opening, and the functional electrode layer located in the pixel opening is located on a side of the light emitting portion away from the hole injection portion;

[0014] The edge of the hole injection portion extends to the side surface, and the functional electrode layer extends to the side surface to be connected to the hole injection portion.

[0015] In one embodiment of the present application, a connection point between the hole injection portion and the functional electrode layer is located on the first sub-surface, and on a side of the first sub-surface close to the second sub-surface.

[0016] In one embodiment of the present application, the orthographic projection of the light emitting portion on the array substrate is located within the orthographic projection of the hole injection portion on the array substrate.

[0017] In one embodiment of the present application, in the pixel opening, an edge of at least one side of the light-emitting portion is spaced apart from the side surface, and the functional electrode layer covers the light-emitting portion and extends to the side surface to be connected to the hole injection portion.

[0018] In one embodiment of the present application, the functional electrode layer includes a cathode layer, and at the side surface, the hole injection portion is connected to the cathode layer;

[0019] Alternatively, the functional electrode layer includes an electron transport layer and the cathode layer, and the electron transport layer is located between the light-emitting portion and the cathode layer, and at the side surface, the hole injection portion is connected to the electron transport layer.

[0020] In one embodiment of the present application, the display panel further comprises a hole transport layer disposed between the hole injection layer and the light emitting layer, the hole transport layer comprising a hole transport portion disposed between the hole injection portion and the light emitting portion and located within the pixel opening;

[0021] In the pixel opening, an edge of at least one side of the hole transport portion is spaced apart from the side surface, and the functional electrode layer covers the light emitting portion and the hole transport portion and extends to the side surface to be connected to the hole injection portion.

[0022] In one embodiment of the present application, the display panel further includes:

[0023] a hole injection layer, comprising a hole injection portion disposed in the pixel opening;

[0024] a light-emitting layer, comprising a light-emitting portion disposed in the pixel opening and located on a side of the hole injection portion away from the array substrate;

[0025] A functional electrode layer is disposed on the pixel definition layer and extends into the pixel opening, and the functional electrode layer located in the pixel opening is located on a side of the light emitting portion away from the hole injection portion;

[0026] Wherein, the hole injection part and the functional electrode layer are arranged at a distance.

[0027] In one embodiment of the present application, the first sub-surface is connected to the second sub-surface, and the first sub-surface and the second sub-surface intersect at a preset angle at the connection point, and the preset angle is less than or equal to 180°.

[0028] In one embodiment of the present application, the first sub-surface includes a first side close to the array substrate and a second side away from the array substrate, the second sub-surface includes a third side close to the array substrate and a fourth side away from the array substrate, there is a first distance between the first side and the second side, there is a second distance between the third side and the fourth side, and the ratio of the first distance to the second distance is greater than or equal to 1.

[0029] In one embodiment of the present application, the first sub-surface is hydrophilic, and the second sub-surface is hydrophobic.

[0030] In one embodiment of the present application, the plurality of pixel openings are arranged in an array along a first direction and a second direction, and the first direction and the second direction intersect;

[0031] The retaining wall comprises a first sub-portion and a plurality of second sub-portions which are stacked, wherein the first sub-portion is located between the array substrate and the second sub-portions, the first sub-portion extends along the first direction and the second direction, and is arranged around each of the pixel openings;

[0032] The second sub-portion extends along the second direction, a plurality of the second sub-portions are arranged along the first direction, a plurality of the pixel openings arranged along the second direction are arranged between two adjacent second sub-portions, and the second sub-portion has the first sub-surface and the second sub-surface on one side close to the pixel opening.

[0033] According to the above-mentioned purpose of the present application, an embodiment of the present application further provides a display device, which includes the display panel.

[0034] The present application provides a display panel and a display device. By increasing the height of the first sub-surface, the proportion of the part with a smaller contact angle in the side surface of the retaining wall can be increased. Therefore, in the manufacturing process of the display panel, the climbing height of the ink on the side surface becomes larger, and the position where the short-circuit film layer is connected also becomes higher, so that the leakage path is extended, the resistance is increased, and the leakage current is reduced, which is beneficial to improving the performance and display effect of the display panel.

[0035] Other features and advantages of the present application will be described in detail in the subsequent detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application, and those skilled in the art can obtain other drawings based on these drawings without creative work.

[0037] In order to more completely understand the present application and its beneficial effects, the following description will be given in conjunction with the accompanying drawings, wherein the same figure numbers represent the same parts in the following description.

[0038] Figure 1 A schematic diagram of the structure of a display panel provided by an embodiment;

[0039] Figure 2 for Figure 1 Schematic diagram of the enlarged structure at a in the middle;

[0040] Figure 3 A schematic diagram of a first structure of a display panel provided in an embodiment of the present application;

[0041] Figure 4 Provided in the embodiments of this application Figure 3 A is a schematic diagram of the enlarged structure of the middle part;

[0042] Figure 5 A schematic diagram of detecting a hydrophobic material on a side surface of a retaining wall provided in an embodiment of the present application;

[0043] Figure 6 A schematic diagram of a second structure of a display panel provided in an embodiment of the present application;

[0044] Figure 7 A schematic diagram of the structure of a pixel definition layer provided in an embodiment of the present application;

[0045] Figure 8Another structural schematic diagram of a pixel definition layer provided in an embodiment of the present application;

[0046] Fig. 9 A schematic diagram of a third structure of a display panel provided in an embodiment of the present application;

[0047] Fig.10 A schematic diagram of the planar distribution of the pixel definition layer provided in an embodiment of the present application;

[0048] Figure 11 to Figure 12 A structural schematic diagram of the manufacturing process of the pixel definition layer provided in an embodiment of the present application.

[0049] Description of reference numerals:

[0050] 1. Anode; 2. Pixel defining layer; 3. Hole injection layer; 4. Hole transport layer; 5. Organic light emitting layer; 6. Cathode;

[0051] 10. Array substrate;

[0052] 20, pixel definition layer; 21, retaining wall; 211, first sub-portion; 212, second sub-portion; 201, pixel opening; 202, top surface; 203, side surface; 2031, first sub-surface; 2032, second sub-surface; 23, retaining wall intermediate; 204, first surface; 205, second surface;

[0053] 30. anode layer; 31. anode;

[0054] 40. hole injection layer; 41. hole injection portion;

[0055] 50. light-emitting layer; 51. light-emitting portion;

[0056] 60. functional electrode layer; 61. cathode layer; 62. hole transport layer;

[0057] 70. Hole transport layer; 71. Hole transport unit. DETAILED DESCRIPTION

[0058] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.

[0059] Please refer to Figure 1 and Figure 2The display panel includes an anode electrode 1, a pixel defining layer 2 disposed on the anode electrode 1, a hole injection film layer 3, a hole transport film layer 4, an organic light emitting layer 5, and a cathode electrode 6 disposed on the pixel defining layer 2 and the organic light emitting layer 5; wherein a pixel opening is opened in the pixel defining layer 2, and the hole injection film layer 3, the hole transport film layer 4 and the organic light emitting layer 5 can all be located in the pixel opening, and the hole injection film layer 3, the hole transport film layer 4 and the organic light emitting layer 5 can usually be prepared by an inkjet printing process; in the inkjet printing process In the embodiment, a hydrophobic surface is often formed on the upper side of the dam in the pixel defining layer 2, so that the ink of the hole injection film layer 3, the hole transport film layer 4 and the organic light emitting layer 5 can flow into the pixel opening more easily; wherein, the film layer climbing interception points of the hole injection film layer 3, the hole transport film layer 4 and the organic light emitting layer 5 on the side wall of the dam are all located below the hydrophobic surface, and the climbing heights are not much different, and then at the side wall of the dam, the hole injection film layer 3 is easily exposed without being wrapped, so that the hole injection film layer 3 is easy to contact with the cathode electrode 6 above the light emitting layer, for example Figure 1 As shown in the leakage current a, leakage current will occur, affecting device performance and display effect.

[0060] Please combine Figure 3 as well as Figure 4 An embodiment of the present application provides a display panel, which includes an array substrate 10 and a pixel definition layer 20; the pixel definition layer 20 is arranged on the array substrate 10, and a plurality of pixel openings 201 are opened in the pixel definition layer 20, and the pixel definition layer 20 includes a retaining wall 21 arranged between adjacent pixel openings 201, and a side surface 203 of the retaining wall 21 close to the pixel opening 201 includes a first sub-surface 2031 and a second sub-surface 2032, the first sub-surface 2031 is located between the array substrate 10 and the second sub-surface 2032, and a contact angle of the first sub-surface 2031 is smaller than a contact angle of the second sub-surface 2032.

[0061] The first sub-surface 2031 has a first height H1 along the thickness direction of the display panel, the retaining wall 21 has a second height H2 along the thickness direction of the display panel, and the ratio of the first height H1 to the second height H2 is greater than or equal to 0.5.

[0062] During the implementation of the application, the embodiment of the present application can increase the proportion of the part with a smaller contact angle in the side surface 203 of the retaining wall 21 by increasing the height of the first sub-surface 2031. Therefore, in the manufacturing process of the display panel, the climbing height of the ink on the side surface 203 becomes larger, and the position where the short-circuit film layer is connected also becomes higher, so that the leakage path is extended, the resistance is increased, and the leakage current is reduced, which is beneficial to improve the performance and display effect of the display panel.

[0063] For details, please refer to Figure 3 and Figure 4 The display panel includes an array substrate 10, an anode layer 30 disposed on the array substrate 10, a pixel definition layer 20 disposed on the anode layer 30, a hole injection layer 40, a light emitting layer 50 and a functional electrode layer 60.

[0064] In some embodiments, the array substrate 10 includes a substrate and a thin film transistor layer disposed on the substrate.

[0065] In some embodiments, the substrate may be a hard substrate, such as a glass substrate; or the substrate may be a flexible substrate, such as a substrate formed of polyimide. When the substrate is a flexible substrate, the substrate may be formed of multiple sub-substrates made of the same material, such as polyimide, and adjacent sub-substrates are bonded by bonding sub-layers.

[0066] In some embodiments, the thin film transistor layer includes a thin film transistor, the thin film transistor includes a semiconductor located on the substrate, and the semiconductor can be formed of polysilicon or a metal oxide (such as indium gallium zinc oxide). Wherein, the semiconductor is divided into a channel region and a source region and a drain region formed on both sides of the channel region. The thin film transistor layer also includes a first gate insulating layer, and the first gate insulating layer covers the semiconductor. The thin film transistor also includes a first gate formed on the first gate insulating layer, and the first gate overlaps with the channel region. The first gate can be formed as a plurality of layers or a single layer including a low resistance material such as Al, Ti, Mo, Cu, Ni, or an alloy thereof, or a material with high corrosion resistance. The thin film transistor layer also includes a second gate insulating layer, and the second gate insulating layer covers the first gate. The thin film transistor also includes a second gate located on the second gate insulating layer, and the second gate overlaps with the first gate. The second gate can be formed as a plurality of layers or a single layer including a low resistance material such as Al, Ti, Mo, Cu, Ni, or an alloy thereof, or a material with high corrosion resistance. The thin film transistor layer also includes a first interlayer insulating layer formed on the second gate. The first interlayer insulating layer, the first gate insulating layer, and the second gate insulating layer include a source contact hole and a drain contact hole, and the source region and the drain region are exposed through the source contact hole and the drain contact hole, respectively.

[0067] The thin film transistor also includes a source and a drain arranged in the same layer, the source and the drain are both formed on the first interlayer insulating layer, the source is connected to the source region through the source contact hole, and the drain is connected to the drain region through the drain contact hole. The source and the drain may be multiple layers or a single layer formed of a low resistance material such as Al, Ti, Mo, Cu, Ni, or an alloy thereof, or a material with high corrosion resistance. For example, the source and the drain may be a triple layer of Ti / Cu / Ti, Ti / Ag / Ti, Ti / Al / Ti or Mo / Al / Mo or other single or multilayer structures.

[0068] In some embodiments, the thin film transistor layer further includes a planar layer located on a side of the first interlayer insulating layer away from the substrate, and the planar layer covers the source electrode and the drain electrode.

[0069] In some embodiments, the anode layer 30 is disposed on the flat layer, and the anode layer 30 includes a plurality of anodes 31; the pixel definition layer 20 is disposed on the flat layer, and a plurality of pixel openings 201 are opened in the pixel definition layer 20, and the plurality of pixel openings 201 are disposed correspondingly to the plurality of anodes 31; for example, the plurality of pixel openings 201 and the plurality of anodes 31 can be disposed one by one in correspondence, and each of the pixel openings 201 exposes the surface of the corresponding anode 31 away from the side of the array substrate 10.

[0070] Furthermore, the hole injection layer 40 is disposed on the pixel definition layer 20 , and the hole injection layer 40 includes a hole injection portion 41 disposed in the pixel opening 201 and located on a side of the anode 31 away from the array substrate 10 .

[0071] The light emitting layer 50 is disposed on the hole injection layer 40 , and the light emitting layer 50 includes a light emitting portion 51 disposed in the pixel opening 201 and located on a side of the hole injection portion 41 away from the anode 31 .

[0072] The functional electrode layer 60 is disposed on the pixel definition layer 20, and the functional electrode layer 60 is further disposed on a side of the light-emitting layer 50 away from the hole injection layer 40, the functional electrode layer 60 extends into the pixel opening 201, and the functional electrode layer 60 located in the pixel opening 201 is located on a side of the light-emitting portion 51 away from the hole injection portion 41.

[0073] In some embodiments, the pixel definition layer 20 includes a retaining wall 21 arranged between adjacent pixel openings 201, and the retaining wall 21 includes a top surface 202 on a side away from the array substrate 10 and a side surface 203 on a side close to the pixel opening 201, and the side surface 203 is connected to the top surface 202; wherein the side surface 203 includes a first sub-surface 2031 and a second sub-surface 2032, the first sub-surface 2031 is located between the second sub-surface 2032 and the array substrate 10, the contact angle of the first sub-surface 2031 is smaller than the contact angle of the second sub-surface 2032, and the contact angle of the first sub-surface 2031 is smaller than the contact angle of the top surface 202.

[0074] In some embodiments, the first sub-surface 2031 may be hydrophilic, and the second sub-surface 2032 and the top surface 202 may be hydrophobic; further, the contact angle of the first sub-surface 2031 may be less than 90°, the contact angle of the second sub-surface 2032 may be greater than 90°, and the contact angle of the top surface 202 may be greater than 90°.

[0075] It should be noted that the hole injection layer 40 and the light-emitting layer 50 in the display panel provided in the embodiment of the present application can be prepared by an inkjet printing process, and in the process of manufacturing the display panel, since the top surface 202 and the second sub-surface 2032 are hydrophobic, the ink will flow into the pixel opening 201 and form a film in the range of the first sub-surface 2031, and the hole injection layer 40 and the light-emitting layer 50 will form a slope at the first sub-surface 2031; since the slope heights of the hole injection layer 40 and the light-emitting layer 50 are not much different, the hole injection layer 40 is easily exposed at the side surface 203 of the retaining wall 21 without being wrapped by the light-emitting layer 50, and the hole injection layer 40 is easily in contact with the functional electrode layer 60 above the light-emitting layer 50, thereby generating leakage, affecting the device performance and display effect.

[0076] In some embodiments, the hydrophilicity and hydrophobicity of the top surface 202 and the side surface 203 can be obtained by forming a hydrophilic or hydrophobic film on the surface of the retaining wall 21; or, a hydrophobic material, such as fluorine element, is added to the material of the retaining wall 21, and the hydrophobic material is mainly distributed on the side of the retaining wall 21 away from the array substrate 10, for example, the concentration of the hydrophobic material on the side of the retaining wall 21 away from the array substrate 10 is greater than the concentration of the hydrophobic material on the side of the retaining wall 21 close to the array substrate 10, so as to achieve that the top surface 202 and the second sub-surface 2032 of the retaining wall 21 away from the array substrate 10 are hydrophobic, while the first sub-surface 2031 of the retaining wall 21 close to the array substrate 10 is hydrophilic.

[0077] In some embodiments, the ratio of the concentration of the hydrophobic material at the second sub-surface 2032 to the concentration of the hydrophobic material at the first sub-surface 2031 is greater than or equal to 3; for example Figure 5 As shown, when the hydrophobic material is fluorine element, the content of fluorine element at the first sub-surface 2031 and the second sub-surface 2032 can be detected.

[0078] In the embodiment of the present application, the first sub-surface 2031 has a first height H1 along the thickness direction of the display panel, and the retaining wall 21 has a second height H2 along the thickness direction of the display panel, and the ratio of the first height H1 to the second height H2 is greater than or equal to 0.5; that is, the embodiment of the present application increases the height of the first sub-surface 2031 to increase the climbing distance of the hole injection portion 41 and the light-emitting portion 51 at the side surface 203. Even if the hole injection portion 41 is connected to the functional electrode layer 60 at the climbing position, the position where the hole injection portion 41 and the functional electrode 60 are connected can be moved in a direction away from the anode 31, so that the short-circuit is farther from the center of the hole injection portion 41, thereby extending the leakage path and increasing the resistance, thereby effectively reducing the leakage current and improving the performance and display effect of the display panel.

[0079] In some embodiments, a ratio of the first height H1 to the second height H2 may be 0.5, 0.55, 0.6, 0.65, 0.7, 0.75, 0.8, 0.85, 0.9, 0.95 or 1.

[0080] In one embodiment of the present application, please refer to Figure 3 and Figure 4 The edge of the hole injection portion 41 extends to the side surface 203 , and the functional electrode layer 60 extends to the side surface 203 and is connected to the hole injection portion 41 .

[0081] Among them, since the contact angle of the first sub-surface 2031 is smaller than the contact angle of the second sub-surface 2032, for example, the first sub-surface 2031 is hydrophilic, and the second sub-surface 2032 is hydrophobic; thus, the ink in the process is restricted to the first sub-surface 2031; therefore, the climbing edges of the hole injection portion 41 and the light-emitting portion 51 should not exceed the range of the first sub-surface 2031.

[0082] In some embodiments, the connection between the hole injection portion 41 and the functional electrode layer 60 is located on the first sub-surface 2031, and on the side of the first sub-surface 2031 close to the second sub-surface 2032; therefore, in the present application, by increasing the height of the first sub-surface 2031, the position where the hole injection portion 41 and the functional electrode 60 are connected can be effectively moved in a direction away from the anode 31, so that the short-circuit is farther from the center of the hole injection portion 41, extending the leakage path, increasing the resistance, and thus effectively reducing the leakage current and improving the performance and display effect of the display panel.

[0083] In some embodiments, within the pixel opening 201 , an edge of at least one side of the light-emitting portion 51 is spaced apart from the side surface 203 , and the functional electrode layer 60 covers the light-emitting portion 51 and extends to the side surface 203 to connect with the hole injection portion 41 .

[0084] In some embodiments, the orthographic projection of the light emitting portion 51 on the array substrate 10 is located within the orthographic projection of the hole injection portion 41 on the array substrate 10 .

[0085] In some embodiments, the display panel also includes a hole transport layer 70 arranged between the hole injection layer 40 and the light-emitting layer 50, and the hole transport layer 70 includes a hole transport portion 71 arranged between the hole injection portion 41 and the light-emitting portion 51 and located within the pixel opening 201; within the pixel opening 201, an edge of at least one side of the hole transport portion 71 is spaced apart from the side surface 203, and the functional electrode layer 60 covers the light-emitting portion 51 and the hole transport portion 71 and extends to the side surface 203 to be connected to the hole injection portion 41.

[0086] In some embodiments, the orthographic projection of the hole transport portion 71 on the array substrate 10 is located within the orthographic projection of the hole injection portion 41 on the array substrate 10 .

[0087] In some embodiments, Figure 3 and Figure 4As shown, the functional electrode layer 60 includes a cathode layer 61 , and the hole injection portion 41 is connected to the cathode layer 61 at the side surface 203 .

[0088] In other embodiments, Figure 6 As shown, the functional electrode layer 60 includes an electron transport layer 62 and the cathode layer 61 , and the electron transport layer 62 is located between the light-emitting portion 51 and the cathode layer 61 , and at the side surface 203 , the hole injection portion 41 is connected to the electron transport layer 62 .

[0089] It can be understood that the embodiment of the present application can reduce the leakage current between the hole injection portion 41 and the cathode layer 61, or reduce the leakage current between the hole injection portion 41 and the electron transport layer 62 by increasing the height of the first sub-surface 2031.

[0090] In some embodiments, please combine Figure 3 as well as Figure 7 The first sub-surface 2031 is connected to the second sub-surface 2032, and the first sub-surface 2031 and the second sub-surface 2032 intersect at a preset angle B at the connection point, and the preset angle B is less than or equal to 180°.

[0091] Further, the first sub-surface 2031 includes a first side close to the array substrate 10 and a second side away from the array substrate 10, the second sub-surface 2032 includes a third side close to the array substrate 10 and a fourth side away from the array substrate 10, a first distance L1 is between the first side and the second side, a second distance L2 is between the third side and the fourth side, and a ratio of the first distance L1 to the second distance L2 is greater than or equal to 1.

[0092] It should be noted that when the preset angle B is equal to 180°, the first sub-surface 2031 and the second sub-surface 2032 are coplanar, and the ratio of the first height H1 to the second height H2 is equal to the ratio of the first distance L1 to the sum of the first distance L1 and the second distance L2.

[0093] In some embodiments, the corner where the second sub-surface 2032 and the top surface 202 are connected may be rounded, such as Figure 8 shown.

[0094] Further, in the embodiments of the present application, please combine Fig. 9 as well as Fig.10 The retaining wall 21 includes a first sub-portion 211 and a second sub-portion 212 which are stacked, and the first sub-portion 211 is located between the second sub-portion 212 and the array substrate 10 .

[0095] In some embodiments, the plurality of pixel openings 201 are arranged in an array along a first direction X and a second direction Y, and the first direction X and the second direction Y intersect; for example, the first direction X and the second direction Y may be perpendicular.

[0096] In some embodiments, the first sub-portion 211 extends along the first direction X and the second direction Y, and is arranged around each of the pixel openings 201; the second sub-portion 212 extends along the second direction Y, and a plurality of second sub-portions 212 are arranged along the first direction X, that is, the second sub-portion 212 is located on a side of the first sub-portion 211 extending along the second direction Y away from the array substrate 10.

[0097] A plurality of the pixel openings 201 arranged along the second direction Y are disposed between two adjacent second sub-portions 212 , and a side of the second sub-portion 212 close to the pixel opening 201 has the first sub-surface 2031 and the second sub-surface 2032 .

[0098] In the embodiment of the present application, the stacked first sub-portion 211 and the second sub-portion 212 are arranged between the two adjacent pixel openings 201 along the first direction X, and the first sub-portion 211 is arranged between the two adjacent pixel openings 201 along the second direction Y, that is, the height of the retaining wall 21 between the two adjacent pixel openings 201 along the first direction X is greater than the height of the retaining wall 21 between the two adjacent pixel openings 201 along the second direction Y; therefore, in the inkjet printing process of the display panel, the hole injection layer 40 and the light-emitting layer 50 are continuously arranged along the second direction Y, and the hole injection layer 40 and the light-emitting layer 50 are arranged at intervals along the first direction X, that is, the hole injection layer 40 and the light-emitting layer 50 along the first direction X will be separated by the second sub-portion 212, and then the hole injection portion 41 and the light-emitting portion 51 will produce a slope at the side surface 203 of the second sub-portion 212.

[0099] As mentioned above, the embodiment of the present application can increase the proportion of the portion with a smaller contact angle in the side surface 203 of the retaining wall 21 by increasing the height of the first sub-surface 2031. Therefore, in the manufacturing process of the display panel, the climbing height of the ink on the side surface 203 becomes larger, and the position where the hole injection portion 41 and the functional electrode layer 60 are connected also becomes higher, thereby extending the leakage path, increasing the resistance, and reducing the leakage current, which is beneficial to improving the performance and display effect of the display panel.

[0100] In other embodiments of the present application, the hole injection portion 41 and the functional electrode layer 60 may also be spaced apart from each other, that is, the hole injection portion 41 and the functional electrode layer 60 are not short-circuited.

[0101] Among them, the orthographic projection of the hole injection portion 41 on the array substrate 10 is located within the orthographic projection of the light-emitting portion 51 on the array substrate 10, and / or the orthographic projection of the hole injection portion 41 on the array substrate 10 is located within the orthographic projection of the hole transport portion 71 on the array substrate 10.

[0102] In addition, the embodiment of the present application further provides a method for manufacturing the display panel described in the above embodiment, and specifically includes how to control the height of the first sub-surface 2031 .

[0103] Please combine Figure 3 , Fig.11 as well as Fig.12 First, the retaining wall intermediate body 23 is formed on the anode layer 30, and the retaining wall intermediate body 23 has a first surface 204 away from the anode layer 30 and a second surface 205 connected to the first surface 204, as shown in FIG. Fig.11 shown.

[0104] In some embodiments, the contact angle of the first surface 204 is greater than the contact angle of the second surface 205; further, the first surface 204 is hydrophobic and the second surface 205 is hydrophilic, that is, the contact angle of the first surface 204 is greater than 90°, and the contact angle of the second surface 205 is less than 90°.

[0105] In some embodiments, the hydrophilicity and hydrophobicity of the first surface 204 and the second surface 205 can be obtained by forming a hydrophilic or hydrophobic film on the surface of the retaining wall intermediate 23; or, a hydrophobic material, such as fluorine element, is added to the material of the retaining wall intermediate 23, and the hydrophobic material is mainly distributed on the side of the retaining wall intermediate 23 away from the anode layer 30, for example, the concentration of the hydrophobic material on the side of the retaining wall intermediate 23 away from the anode layer 30 is greater than the concentration of the hydrophobic material on the side of the retaining wall intermediate 23 close to the anode layer 30, so as to achieve that the first surface 204 of the retaining wall intermediate 23 away from the anode layer 30 is hydrophobic, while the second surface 205 of the retaining wall intermediate 23 close to the anode layer 30 is hydrophilic.

[0106] Next, the retaining wall intermediate 23 is baked and cured, and during the baking process of the retaining wall intermediate 23, the retaining wall intermediate 23 will soften and flow, so that a partial area of ​​the first surface 204 flows to the side of the retaining wall intermediate 23, thereby making the side of the retaining wall intermediate 23 away from the anode layer 30 hydrophobic.

[0107] Then we can get Fig.12 The structure of the pixel definition layer 20 is shown, wherein, in the retaining wall 21 of the pixel definition layer 20, the top surface 202 and the second sub-surface 2032 of the side surface 203 away from the anode layer 30 are hydrophobic, and the first sub-surface 2031 of the side surface 203 close to the anode layer 30 is hydrophilic.

[0108] It should be noted that the area of ​​the first surface 204 flowing to the side of the retaining wall intermediate 23 can be controlled by controlling the baking time of the retaining wall intermediate 23, and then the height or length ratio of the first sub-surface 2031 can be controlled; for example, the shorter the baking time, the smaller the height and length ratio of the second sub-surface 2032, and the larger the height or length ratio of the first sub-surface 2031, the smaller the leakage current generated between the hole injection part 41 and the functional electrode layer 60, and the more beneficial it is to the performance improvement of the display panel.

[0109] In other embodiments of the present application, the height or length ratio of the first sub-surface 2031 can also be controlled by controlling the height of the retaining wall 21. For example, the higher the height of the retaining wall 21, the greater the height or length ratio of the first sub-surface 2031. Specifically, the height of the second retaining wall 212 can be increased, and / or the height of the first retaining wall 211 can be increased.

[0110] In addition, an embodiment of the present application further provides a display device, which includes the display panel described in the above embodiment.

[0111] It can be understood that, since the display device has the same beneficial effects as the display panel, the display device has the same beneficial effects as the display panel, which will not be described in detail herein.

[0112] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more features. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0113] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0114] The embodiments, implementation methods and related technical features of the present application can be combined and replaced with each other without conflict.

[0115] The above are only preferred embodiments of the present application and do not constitute any form of limitation to the present application. However, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present application without departing from the content of the technical solution of the present application are still within the scope of the technical solution of the present application.

Claims

1. A display panel, characterized in that: include: An array substrate; A pixel definition layer is disposed on the array substrate, a plurality of pixel openings are formed in the pixel definition layer, the pixel definition layer comprises a retaining wall disposed between adjacent pixel openings, a side surface of the retaining wall close to the pixel opening comprises a first sub-surface and a second sub-surface, the first sub-surface is located between the array substrate and the second sub-surface, and a contact angle of the first sub-surface is smaller than a contact angle of the second sub-surface; The first sub-surface has a first height along the thickness direction of the display panel, the retaining wall has a second height along the thickness direction of the display panel, and the ratio of the first height to the second height is greater than or equal to 0.

5.

2. The display panel according to claim 1, characterized in that: The display panel further includes: a hole injection layer, comprising a hole injection portion disposed in the pixel opening; a light-emitting layer, comprising a light-emitting portion disposed in the pixel opening and located on a side of the hole injection portion away from the array substrate; A functional electrode layer is disposed on the pixel definition layer and extends into the pixel opening, and the functional electrode layer located in the pixel opening is located on a side of the light emitting portion away from the hole injection portion; The edge of the hole injection portion extends to the side surface, and the functional electrode layer extends to the side surface to be connected to the hole injection portion.

3. The display panel according to claim 2, characterized in that: The connection between the hole injection portion and the functional electrode layer is located on the first sub-surface and on a side of the first sub-surface close to the second sub-surface.

4. The display panel according to claim 2, characterized in that: The orthographic projection of the light emitting portion on the array substrate is located within the orthographic projection of the hole injection portion on the array substrate.

5. The display panel according to claim 2, characterized in that: In the pixel opening, an edge of at least one side of the light-emitting portion is spaced apart from the side surface, and the functional electrode layer covers the light-emitting portion and extends to the side surface to be connected to the hole injection portion.

6. The display panel according to claim 2, characterized in that: The functional electrode layer includes a cathode layer, and the hole injection portion is connected to the cathode layer at the side surface; Alternatively, the functional electrode layer includes an electron transport layer and the cathode layer, and the electron transport layer is located between the light-emitting portion and the cathode layer, and at the side surface, the hole injection portion is connected to the electron transport layer.

7. The display panel according to claim 2, characterized in that: The display panel further includes a hole transport layer disposed between the hole injection layer and the light emitting layer, wherein the hole transport layer includes a hole transport portion disposed between the hole injection portion and the light emitting portion and located within the pixel opening; In the pixel opening, an edge of at least one side of the hole transport portion is spaced apart from the side surface, and the functional electrode layer covers the light emitting portion and the hole transport portion and extends to the side surface to be connected to the hole injection portion.

8. The display panel according to claim 1, characterized in that: The display panel further includes: a hole injection layer, comprising a hole injection portion disposed in the pixel opening; a light-emitting layer, comprising a light-emitting portion disposed in the pixel opening and located on a side of the hole injection portion away from the array substrate; A functional electrode layer is disposed on the pixel definition layer and extends into the pixel opening, and the functional electrode layer located in the pixel opening is located on a side of the light emitting portion away from the hole injection portion; Wherein, the hole injection part and the functional electrode layer are arranged at a distance.

9. The display panel according to any one of claims 1 to 8, characterized in that: The first sub-surface is connected to the second sub-surface, and the first sub-surface and the second sub-surface intersect at a predetermined angle at a connection point, and the predetermined angle is less than or equal to 180°.

10. The display panel according to any one of claims 1 to 8, characterized in that: The first sub-surface includes a first side close to the array substrate and a second side away from the array substrate, the second sub-surface includes a third side close to the array substrate and a fourth side away from the array substrate, a first distance is between the first side and the second side, a second distance is between the third side and the fourth side, and a ratio of the first distance to the second distance is greater than or equal to 1.

11. The display panel according to any one of claims 1 to 8, characterized in that: The first sub-surface is hydrophilic, and the second sub-surface is hydrophobic.

12. The display panel according to any one of claims 1 to 8, characterized in that: The plurality of pixel openings are arranged in an array along a first direction and a second direction, and the first direction and the second direction intersect; The retaining wall comprises a first sub-portion and a plurality of second sub-portions which are stacked, wherein the first sub-portion is located between the array substrate and the second sub-portions, the first sub-portion extends along the first direction and the second direction, and is arranged around each of the pixel openings; The second sub-portion extends along the second direction, a plurality of the second sub-portions are arranged along the first direction, a plurality of the pixel openings arranged along the second direction are arranged between two adjacent second sub-portions, and the second sub-portion has the first sub-surface and the second sub-surface on one side close to the pixel opening.

13. A display device, characterized in that: The display device comprises the display panel according to any one of claims 1 to 12.

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