ODT parameter optimization method and device, electronic equipment and storage medium

Abstract

The invention discloses an ODT parameter optimization method and device, electronic equipment and a storage medium, and relates to the field of circuit simulation, and the method comprises the steps: determining target memory particles from a target memory link, and building an active link simulation model for the target memory link; based on the active link simulation model, respectively performing weight simulation on each memory particle on the target memory link, and determining an influence proportion of each memory particle on the target memory particle eye diagram; and according to the influence ratio, performing optimization simulation on each memory particle in sequence under the ODT parameters with different resistance values, and determining the optimal ODT parameter of each memory particle. According to the systematic optimization process, the ODT setting precision of each particle can be improved, the performance of the whole memory link can be optimized, the problem of determining the optimal parameter combination is solved, and the signal integrity and the system stability of the DDR5 memory are effectively improved.

Description

Technical Field

[0001] The present disclosure relates to the field of circuit simulation, and in particular to an ODT parameter optimization method, device, electronic device and storage medium. Background Art

[0002] With the sharp increase in data processing requirements, the evolution of memory technology has become particularly important, especially DDR (Double Data Rate) technology under high bandwidth requirements. DDR technology has evolved from DDR4 to DDR5, significantly improving the data transmission rate.

[0003] DDR5 adopts a fly-by topology, with multiple memory particles connected in series on the same channel, which makes the adjustment of ODT parameters complicated. Especially for CA / CS signals, the ODT settings of each particle must be optimized to ensure signal integrity. However, the related technology usually sets the ODT parameters of the first 4 particles to OFF, and only adjusts the ODT parameters of the last particle to find a combination that meets the protocol requirements. Although this method can meet the protocol requirements, it may not be able to find the optimal ODT parameter combination. The related technology is limited to the adjustment of a single memory particle and cannot fully optimize the ODT settings of each particle. Therefore, a more scientific ODT optimization method is urgently needed to improve the optimization efficiency and determine more reliable ODT parameters. Summary of the invention

[0004] The embodiments of the present disclosure provide an ODT parameter optimization method, device, electronic device, and storage medium, aiming to solve the problems existing in the above-mentioned background technology.

[0005] In order to solve the above technical problems, the present disclosure is implemented as follows: In a first aspect, an embodiment of the present disclosure provides an ODT parameter optimization method, the method comprising: Determine a target memory particle from a target memory link, and build an active link simulation model for the target memory link, wherein the target memory particle is the memory particle closest to the controller end in the target memory link; Based on the active link simulation model, weight simulation is performed on each memory particle on the target memory link to determine the influence ratio of each memory particle on the eye diagram of the target memory particle; According to the influence proportion, optimization simulation is performed on each memory particle in turn under ODT parameters with different resistance values ​​to determine the optimal ODT parameter of each memory particle.

[0006] Optionally, based on the active link simulation model, weight simulation is performed on each memory particle on the target memory link, including: Setting ODT parameters with different resistance values ​​for each memory chip on the target memory link; Based on the active link simulation model, weighted simulation is performed on each memory particle under different resistance ODT parameters to obtain eye diagram parameters of the target memory particle under different resistance ODT parameters of each memory particle, wherein the eye diagram parameters include eye height, eye width and bit error rate; According to the eye diagram parameters in the weighted simulation result, the influence ratio of each memory cell on the eye diagram of the target memory cell is calculated.

[0007] Optionally, according to the influence proportion, optimization simulation is performed on each memory chip in turn under ODT parameters with different resistance values ​​to determine the optimal ODT parameter of each memory chip, including: Sort the memory particles in the target memory link according to the impact ratio, and select the memory particle with the largest impact ratio as the first current memory particle; For the first current memory particle, set ODT parameters with different resistance values, perform optimization simulation, and obtain eye diagram parameters of the target memory particle under the ODT parameters with different resistance values; Determine the ODT parameter of the resistance value corresponding to the optimal eye diagram parameter as the optimal ODT parameter of the first current memory particle; Save the optimal ODT parameters of the first current memory particle, and select the memory particle with the largest influence as the first current memory particle among the memory particles that have not undergone optimization simulation, and execute the following steps: for the first current memory particle, set ODT parameters with different resistance values, perform optimization simulation, and obtain the eye diagram parameters of the target memory particle under the ODT parameters of each resistance value; until the optimal ODT parameters of all memory particles on the target memory link are determined.

[0008] Optionally, based on the active link simulation model, weighted simulation is performed on each memory particle under different resistance ODT parameters to obtain eye diagram parameters of the target memory particles under different resistance ODT parameters of each memory particle, including: Selecting the target memory cell as the second current memory cell; Setting the memory cells other than the second current memory cell on the target memory link to an OFF state; Performing weight simulation on the second current memory particle under different resistance ODT parameters respectively; Obtain eye diagram parameters of the target memory particle under ODT parameters of different resistance values ​​of the second current memory particle; Among the memory particles that have not undergone weight simulation, select the next memory particle to be subjected to weight simulation as the second current memory particle, and execute the steps of: setting the memory particles on the target memory link except the second current memory particle to the OFF state; until the influence weight of all memory particles on the target memory link on the target memory particle is determined.

[0009] Optionally, determining a target memory particle from the target memory link includes: On the board of the storage system, determine the link with the longest control signal PCB trace as the target memory link; Identify the topology of the target memory link and determine the locations of all memory particles in the target memory link; A memory chip located in the target memory link and closest to the controller end is determined as the target memory chip.

[0010] Optionally, building an active link simulation model for the target memory link includes: On a board of a storage system, obtaining S parameters of a PCB routing of the target memory link, and obtaining package S parameters of a controller chip in the target memory link; Based on the S parameters of the target memory link PCB routing and the package S parameters of the controller chip in the target memory link, the target memory link is passively simulated to obtain a passive link simulation model; Obtaining an AMI simulation model of the controller and each memory particle in the target memory link; Based on the passive link model and the AMI simulation models of the controller and each memory particle, an active link simulation model is built.

[0011] Optionally, after determining the optimal ODT parameter of each memory chip, the method further includes: Based on the active link simulation model and the optimal ODT parameters of each memory particle, performing verification simulation on the target memory particle; Obtaining eye diagram parameters of the target memory particle after verification simulation, and obtaining eye diagram parameters of the target memory particle obtained by actual measurement; Obtaining a comparison result according to the eye diagram parameters of the target memory particle after verification simulation and the eye diagram parameters obtained by actual measurement; The optimal ODT parameter of each memory chip is iteratively adjusted based on the comparison result until the comparison result is within a preset threshold range.

[0012] In a second aspect, an embodiment of the present disclosure provides an ODT parameter optimization device, the device comprising: A model building module, used to determine a target memory particle from a target memory link, and build an active link simulation model for the target memory link, wherein the target memory particle is the memory particle closest to the controller end in the target memory link; A weight simulation module, used to perform weight simulation on each memory particle on the target memory link based on the active link simulation model, and determine the influence ratio of each memory particle on the eye diagram of the target memory particle; The optimization simulation module is used to perform optimization simulation on each memory particle in turn under ODT parameters of different resistance values ​​according to the influence proportion, so as to determine the optimal ODT parameter of each memory particle.

[0013] Optionally, the weight simulation module includes: A setting submodule, used to set ODT parameters with different resistance values ​​for each memory chip on the target memory link; A weight simulation submodule is used to perform weight simulation on each memory particle under different resistance ODT parameters based on the active link simulation model, and obtain eye diagram parameters of the target memory particle under different resistance ODT parameters of each memory particle, wherein the eye diagram parameters include eye height, eye width and bit error rate; The influence ratio calculation submodule is used to calculate the influence ratio of each memory particle on the eye diagram of the target memory particle according to the eye diagram parameters in the weighted simulation result.

[0014] Optionally, the optimization simulation module includes: A sorting submodule, used to sort the memory particles in the target memory link according to the influence ratio, and select the memory particle with the largest influence ratio as the first current memory particle; The optimization simulation submodule is used to set ODT parameters with different resistance values ​​for the first current memory particle, perform optimization simulation, and obtain eye diagram parameters of the target memory particle under the ODT parameters with different resistance values; An optimal ODT parameter determination submodule, used to determine the ODT parameter of the resistance corresponding to the optimal eye diagram parameter as the optimal ODT parameter of the first current memory particle; Repeat the execution of the submodule to save the optimal ODT parameters of the first current memory particle, and select the memory particle with the largest influence as the first current memory particle among the memory particles that have not been subjected to optimization simulation, and execute the following steps: for the first current memory particle, set ODT parameters with different resistance values, perform optimization simulation, and obtain the eye diagram parameters of the target memory particle under the ODT parameters of each resistance value; until the optimal ODT parameters of all memory particles on the target memory link are determined.

[0015] Optionally, the weight simulation submodule includes: A selection unit, configured to select the target memory cell as a second current memory cell; An OFF state setting unit, used to set the memory cells other than the second current memory cell on the target memory link to an OFF state; A weight simulation unit, used for performing weight simulation on the second current memory particle under different resistance ODT parameters; An acquiring unit, configured to acquire eye diagram parameters of the target memory particle under ODT parameters of different resistance values ​​of the second current memory particle; A repeated execution unit is used to select the next memory particle to be weighted simulated as the second current memory particle from the memory particles that have not been weighted simulated, and execute the steps of: setting the memory particles other than the second current memory particle on the target memory link to the OFF state; until the influence weight of all memory particles on the target memory link on the target memory particle is determined.

[0016] Optionally, the model building module includes: The target memory link determination submodule is used to determine the link with the longest control signal PCB routing as the target memory link on the board of the storage system; A topology identification submodule, used to identify the topology of the target memory link and determine the locations of all memory particles in the target memory link; The target memory cell determination submodule is used to determine the memory cell located closest to the controller end in the target memory link as the target memory cell.

[0017] Optionally, the model building module includes: An S parameter acquisition submodule is used to acquire the S parameters of the PCB routing of the target memory link on the board of the storage system, and to acquire the package S parameters of the controller chip in the target memory link; A passive simulation submodule, used for performing passive simulation on the target memory link based on the S parameters of the PCB routing of the target memory link and the package S parameters of the controller chip in the target memory link to obtain a passive link simulation model; A simulation model acquisition submodule, used to acquire the AMI simulation model of the controller and each memory particle in the target memory link; The active link simulation model building submodule is used to build an active link simulation model based on the passive link model and the AMI simulation models of the controller and each memory particle.

[0018] Optionally, the device further comprises: A verification simulation module, used to perform verification simulation on the target memory cell based on the active link simulation model and the optimal ODT parameters of each memory cell; An eye diagram parameter acquisition module, used to acquire eye diagram parameters of the target memory particle after verification simulation, and to acquire eye diagram parameters of the target memory particle actually measured; A comparison result acquisition module, used to obtain a comparison result based on the eye diagram parameters of the target memory particle after verification simulation and the eye diagram parameters obtained by actual measurement; The iterative adjustment module is used to iteratively adjust the optimal ODT parameter of each memory particle based on the comparison result until the comparison result is within a preset threshold range.

[0019] In a third aspect, an embodiment of the present disclosure provides an electronic device, comprising: a processor, a memory, and a computer program stored in the memory and capable of running on the processor, wherein the computer program implements the steps of an ODT parameter optimization method when executed by the processor.

[0020] In a fourth aspect, an embodiment of the present disclosure provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the steps of the ODT parameter optimization method are implemented.

[0021] The technical solution provided by the embodiments of the present disclosure brings at least the following beneficial effects: The present disclosure aims to improve the signal integrity and overall performance of the DDR5 memory system. First, by determining the memory particle closest to the controller end from the target memory link and establishing an active link simulation model, the impact of each memory particle in the link on signal transmission is more accurately evaluated. Then, based on the active link simulation model, a weighted simulation is performed on each memory particle to calculate the proportion of its impact on the eye diagram of the target memory particle, and the impact of all particles is comprehensively considered. Finally, by performing an optimization simulation under ODT parameters with different resistance values, the optimal ODT parameters of each memory particle are accurately determined. The systematic optimization process disclosed in the present disclosure can not only improve the ODT setting accuracy of each particle, but also optimize the performance of the entire memory link, solving the problem of determining the optimal parameter combination, thereby effectively improving the signal integrity and system stability of the DDR5 memory. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0023] Figure 1 It is a flowchart of an ODT parameter optimization method in an embodiment of the present disclosure; Figure 2 is a schematic diagram of a CA signal simulation topology in an embodiment of the present disclosure; Figure 3 This is a schematic diagram of an interface for setting DFE parameters at a memory particle end in an embodiment of the present disclosure; Figure 4 It is a schematic diagram of an ODT parameter assignment and an experimental Case establishment interface in an embodiment of the present disclosure; Figure 5 This is a schematic diagram of a CA signal PCB routing in an embodiment of the present disclosure; Figure 6 is a passive S-parameter insertion loss diagram of a CA signal in an embodiment of the present disclosure; Figure 7 is a schematic diagram of an active link simulation in an embodiment of the present disclosure; Figure 8 This is a schematic diagram of the before and after comparison of eye diagrams under an optimal ODT parameter combination in an embodiment of the present disclosure; Fig. 9 It is a structural block diagram of an ODT parameter optimization device in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0024] The following will describe the embodiments of the present disclosure with reference to the accompanying drawings and preferred embodiments. Those skilled in the art can easily understand other advantages and effects of the present disclosure from the contents disclosed in this specification. The present disclosure can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present disclosure. It should be understood that the preferred embodiments are only for illustrating the present disclosure, not for limiting the scope of protection of the present disclosure.

[0025] It should be noted that the illustrations provided in the following embodiments are only schematic illustrations of the basic concept of the present disclosure, and thus the drawings only show components related to the present disclosure rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0026] To facilitate the following description, some definitions of terms are given first: DDR (Double Data Rate): DDR is a dynamic random access memory (DRAM) technology, mainly used for computer memory. Compared with traditional single data rate (SDR) memory, DDR memory can transfer data twice in each clock cycle, thereby increasing the data transfer rate. For example, DDR4 and DDR5 are different versions of DDR technology, where DDR5 provides higher bandwidth and faster speed. In the disclosed embodiments, the storage system is described for DDR5.

[0027] ODT (On-Die Termination): ODT refers to the termination technology implemented inside the memory chip to reduce the reflection and distortion of the signal during transmission. ODT improves signal integrity by providing an adjustable resistor inside the chip to eliminate signal reflection. In DDR memory, ODT technology helps optimize signal quality at high frequencies, especially in high-speed DDR5 memory, and the ODT configuration of CA / CS signal lines is crucial.

[0028] The ODT parameter optimization method disclosed in the present invention can be widely used in the memory design of high-performance computer systems and servers, especially in scenarios where DDR5 memory systems need to be optimized. Specifically, it is suitable for applications with extremely high requirements for signal integrity, such as large data centers, high-speed computing clusters, and high-frequency trading systems. In the above application scenarios, through the method disclosed in the present invention, the ODT parameters of each memory particle can be accurately adjusted to ensure the best signal integrity under high-speed data transmission conditions, thereby improving the stability of the system and data processing capabilities.

[0029] Figure 1 is a flow chart of an ODT parameter optimization method in an embodiment of the present disclosure, such as Figure 1 As shown, the method includes: Step S101, determining a target memory particle from a target memory link, and building an active link simulation model for the target memory link, wherein the target memory particle is the memory particle closest to the controller end in the target memory link; Step S102, based on the active link simulation model, weight simulation is performed on each memory cell on the target memory link to determine the influence ratio of each memory cell on the eye diagram of the target memory cell; Step S103 , according to the influence proportion, optimization simulation is performed on each memory chip in turn under ODT parameters of different resistance values ​​to determine the optimal ODT parameter of each memory chip.

[0030] Involving step S101, first of all, it is necessary to determine the most representative target memory particles from the target memory link of the DDR5 system. Since the DDR5 CA signal adopts a fly-by topology structure, the signal passes through each memory particle in turn from the controller end. Therefore, during the signal propagation process, the closer the memory particle is to the controller end, the worse the eye diagram quality is usually. To ensure the accuracy and representativeness of the simulation results, the target memory particle should select the memory particle closest to the controller end in the link, and the target memory link is the topological routing of the target simulation determined after combing the CA signal topology. Once the target memory particle is determined, an active link simulation model is built for the target memory link to simulate the propagation of the signal on the entire link. Through simulation, the impact of different memory particle positions on signal quality can be accurately predicted, laying the foundation for subsequent weight simulation and optimization of ODT parameters.

[0031] Involving step S102, in this step, based on the established active link simulation model, a detailed weight simulation analysis is performed on each memory particle in the target memory link to determine the proportion of each memory particle's influence on the target memory particle's eye diagram. Through a series of weight simulation experiments, the degree of influence of each memory particle's ODT parameter on the target memory particle's eye diagram is systematically quantified and ranked, providing data support for the subsequent precise optimization of ODT parameters. The simulation results of this step will directly affect the final ODT parameter tuning process and ultimately determine the quality of signal transmission.

[0032] Involving step S103, based on the proportion of the impact of each memory particle on the eye diagram of the target memory particle determined in step S102, the ODT parameters of each memory particle are optimized in turn, and finally the optimal ODT parameter combination of each particle is determined. Through a systematic ODT parameter optimization method, the ODT configuration of each memory particle is gradually optimized, and finally the goal of optimizing the signal quality of the entire link is achieved. Step S103 provides a process of gradual optimization and global verification, which can effectively improve the performance of the DDR5 memory system, especially to ensure signal integrity and system stability under high-frequency operation. The detailed implementation details of the above steps will be described later, and will not be repeated here.

[0033] The present disclosure aims to improve the signal integrity and overall performance of the DDR5 memory system. First, by determining the memory particle closest to the controller end from the target memory link and establishing an active link simulation model, the impact of each memory particle in the link on signal transmission is more accurately evaluated. Then, based on the active link simulation model, a weighted simulation is performed on each memory particle to calculate the proportion of its impact on the eye diagram of the target memory particle, and the impact of all particles is comprehensively considered. Finally, by performing an optimization simulation under ODT parameters with different resistance values, the optimal ODT parameters of each memory particle are accurately determined. The systematic optimization process disclosed in the present disclosure can not only improve the ODT setting accuracy of each particle, but also optimize the performance of the entire memory link, solving the problem of determining the optimal parameter combination, thereby effectively improving the signal integrity and system stability of the DDR5 memory.

[0034] Exemplarily, based on the active link simulation model, weighted simulation is performed on each memory particle on the target memory link, including: setting ODT parameters with different resistance values ​​for each memory particle on the target memory link; based on the active link simulation model, weighted simulation is performed on each memory particle under ODT parameters with different resistance values ​​to obtain eye diagram parameters of the target memory particles under ODT parameters with different resistance values ​​for each memory particle, the eye diagram parameters including eye height, eye width and bit error rate; according to the eye diagram parameters in the weighted simulation result, the influence ratio of each memory particle on the eye diagram of the target memory particle is calculated.

[0035] Figure 2 is a schematic diagram of a CA signal simulation topology in an embodiment of the present disclosure. For ease of understanding, the present disclosure embodiment will be described as follows: Figure 2 The memory links of the topology shown are explained as examples of target memory links. Figure 2As shown, there are 5 memory particles (respectively recorded as U2, U3, U4, U5, and U6) on the target memory link, and the target memory particle is U2, which is closest to the controller end U1. For each memory particle on the target memory link, set the ODT parameters of different resistance values. For example, the ODT parameters can be set to several common resistance values, such as: OFF, 40 ohm, 9 ohm, 90 ohm, 120 ohm, 240 ohm, and 490ohm. Each memory particle will be simulated under these preset ODT parameter values. Use the active link simulation model that has been built to simulate each memory particle one by one. During the simulation, the eye diagram parameters of the target memory particle are recorded by changing the ODT parameters of a single particle and keeping the ODT parameters of other particles as a fixed value (the fixed value selected in this disclosure is OFF). The specific steps are to extract the simulation data of each particle under different ODT resistance values ​​independently, ensure that other conditions remain unchanged, and focus on the impact of the change of the ODT parameters of the current particle on the eye diagram. After the simulation, the eye diagram parameters of the target memory particle under each ODT parameter with different resistance values ​​are recorded. The eye diagram parameters include the following key indicators: eye height, which reflects the voltage margin of the signal and indicates the noise tolerance of the signal; eye width, which reflects the time margin of the signal and indicates the timing tolerance of the signal. The bit error rate, at a specific eye height and eye width, indicates the transmission reliability of the signal. According to the eye diagram parameters in the weighted simulation results, the influence ratio of each memory particle on the eye diagram of the target memory particle is calculated. Optionally, the influence of the change value of the ODT parameter on statistical indicators such as the standard deviation and variance of the eye height and eye width is calculated to quantify its influence.

[0036] Exemplarily, according to the influence ratio, optimization simulation is performed on each memory particle in turn under ODT parameters of different resistance values ​​to determine the optimal ODT parameters of each memory particle, including: sorting the memory particles in the target memory link according to the influence ratio, and selecting the memory particle with the largest influence ratio as the first current memory particle; setting ODT parameters of different resistance values ​​for the first current memory particle, performing optimization simulation, and obtaining the eye diagram parameters of the target memory particle under the ODT parameters of each resistance value; determining the ODT parameters of the resistance value corresponding to the optimal eye diagram parameters as the optimal ODT parameters of the first current memory particle; saving the optimal ODT parameters of the first current memory particle, and selecting the memory particle with the largest influence ratio as the first current memory particle among the memory particles that have not undergone optimization simulation, and executing the steps: setting ODT parameters of different resistance values ​​for the first current memory particle, performing optimization simulation, and obtaining the eye diagram parameters of the target memory particle under the ODT parameters of each resistance value; until the optimal ODT parameters of all memory particles on the target memory link are determined.

[0037] First, based on the weighted simulation analysis results, the memory particles are ranked according to their influence on the eye diagram parameters of the target memory particles. The memory particles with the largest influence ratio will be the first object to be optimized for ODT parameters, that is, the memory particles with the largest influence on the eye diagram will be processed first, so as to maximize the improvement of the signal quality of the overall link.

[0038] The memory particle with the largest impact after sorting is determined as the first current memory particle, and a series of ODT parameters with different resistance values ​​are set, such as: OFF, 40 ohm, 9 ohm, 90 ohm, 120 ohm, 240 ohm, 490 ohm. Under these ODT parameters with different resistance values, the first current memory particle is optimized in turn. During the optimization simulation process, the eye diagram parameters of the target memory particle under different ODT parameters are obtained. The optimization simulation results will show the specific impact of each resistance value on the signal quality, especially the optimization effect on the entire link signal on the memory particle with the greatest impact. Compare the eye diagram parameters in the simulation results, and select the set of ODT parameters with the best eye diagram quality (such as the largest eye height, the widest eye width, or the lowest bit error rate) as the optimal ODT parameter of the memory particle. Save this optimal ODT parameter so that it can be used as a fixed condition when optimizing other particles later.

[0039] Among the memory particles that have not been optimized, select the particle with the second largest impact as the new first current memory particle. Repeat the above steps (setting ODT parameters with different resistance values, simulating and obtaining eye diagram parameters, and determining the optimal ODT parameters) to optimize the remaining memory particles one by one. Each time a new optimal ODT parameter is determined, it is fixed and the remaining particles are continuously optimized to ensure that the eye diagram quality of the entire link is gradually improved.

[0040] This paper optimizes ODT parameters one by one based on the impact ratio ranking, and finally obtains the optimal ODT parameter combination for the entire memory link, thereby ensuring the best signal transmission quality, effectively improving the quality of CA signals in the DDR5 signal link, making the optimization process more efficient and reliable, and helping DDR5 to work stably at a higher frequency.

[0041] Exemplarily, based on the active link simulation model, weight simulation is performed on each memory particle under ODT parameters with different resistance values, and the eye diagram parameters of the target memory particle of each memory particle under the ODT parameters with different resistance values ​​are obtained, including: selecting the target memory particle as the second current memory particle; setting the memory particles other than the second current memory particle on the target memory link to the OFF state; performing weight simulation on the second current memory particle under ODT parameters with different resistance values; obtaining the eye diagram parameters of the target memory particle under the ODT parameters with different resistance values ​​of the second current memory particle; among the memory particles that have not undergone weight simulation, selecting the next memory particle to be weighted simulated as the second current memory particle, and executing the steps of: setting the memory particles other than the second current memory particle on the target memory link to the OFF state; until the influence weights of all memory particles on the target memory link on the target memory particle are determined.

[0042] During the weighted simulation process, the goal is to determine the impact of each memory particle on the memory link on the signal quality of the target memory particle load link under different ODT parameters. Starting from the target memory particle, it is determined as the second current memory particle. Before starting the weighted simulation, it is necessary to ensure that the ODT parameters of all other memory particles in the link except the second current memory particle are set to "OFF" so that other particles will not affect the signal quality temporarily, and the focus of the current simulation is completely on the second current memory particle. This is equivalent to isolating the individual impact of the current memory particle on the link signal, which facilitates accurate analysis under different resistance ODT parameters.

[0043] Set a series of ODT parameters with different resistance values ​​for the second current memory particle, for example: OFF, 40 ohm, 9 ohm, 90 ohm, 120 ohm, 240 ohm, 490 ohm. Perform weighted simulation for each ODT parameter value, and obtain the corresponding eye diagram parameters from the weighted simulation results. The weighted simulation results will show how the second current memory particle affects the signal quality of the link under different ODT parameter values. Record the weighted simulation results under each resistance ODT parameter in detail until the second current memory particle has traversed all resistance ODT parameters. Select the next memory particle to be simulated on the target memory link and use it as the new second current memory particle. According to the same steps, set the ODT of other unsimulated memory particles to OFF, and then simulate the new second current memory particle. Repeat this process, simulate all memory particles on the target memory link one by one, and determine their influence weights on the target memory particle in turn, that is, determine their influence on the signal quality of the target memory particle load link.

[0044] For the above weight simulation content, the following experimental case can be established (for the convenience of later identification, Figure 2 The ODTs of U2 to U6 are marked as ODT1~ODT5 in sequence): Case 1: Fix ODT2~ODT5 to OFF and traverse the value of ODT1. The specific ODT1 traversal values ​​include: OFF, 40ohm, 9 ohm, 90 ohm, 120 ohm, 240 ohm, 490 ohm.

[0045] Case 2: Fix ODT1, ODT3, ODT4, and ODT5 to OFF, and traverse the value of ODT2. The specific ODT2 traversal values ​​also include: OFF, 40 ohm, 9 ohm, 90 ohm, 120 ohm, 240 ohm, and 490 ohm.

[0046] Case 3: Fix ODT1, ODT2, ODT4, and ODT5 to OFF, and iterate through the values ​​of ODT3. The traversed values ​​are still: OFF, 40ohm, 9 ohm, 90 ohm, 120 ohm, 240 ohm, and 490 ohm.

[0047] Case 4: Fix ODT1, ODT2, ODT3, and ODT5 to OFF, and traverse the value of ODT4. The traversal value is the same as before.

[0048] Case 5: Fix ODT1, ODT2, ODT3, and ODT4 to OFF, and traverse the value of ODT5. The traversed values ​​include: OFF, 40ohm, 9 ohm, 90 ohm, 120 ohm, 240 ohm, and 490 ohm. The above experimental cases are mainly established to systematically traverse the ODT parameters of each memory particle and analyze their impact on the signal quality of the target memory particle load link.

[0049] Figure 3 It is a schematic diagram of an interface for setting DFE parameters at the memory particle end in an embodiment of the present disclosure. Figure 3 In the interface shown, users can choose to parameterize the ODT parameters of a certain memory particle. By selecting a certain memory particle (such as U2) and setting its ODT parameter to "variable" (parameterized), the ODT parameter value of the memory particle can be changed during the simulation, while the ODT parameter values ​​of other memory particles are fixed to "OFF". This interface provides a variety of ODT resistance values, such as OFF, 40 ohm, 9 ohm, 90 ohm, 120 ohm, 240 ohm, 490 ohm, and users can select these values ​​for traversal simulation to determine the optimal ODT parameter value. Figure 4This is a schematic diagram of an ODT parameter assignment and an experimental Case creation interface in an embodiment of the present disclosure. Figure 4 An example of a traversal simulation project established for the first case (Case 1) is shown. In this simulation project, the ODT parameter of U2 is set to be variable, and its ODT parameter value will traverse the seven values ​​of OFF, 40ohm, 9 ohm, 90 ohm, 120 ohm, 240 ohm, and 490 ohm in sequence during the simulation. The ODT parameters of other memory particles are fixed to OFF. The simulation system will automatically run each ODT parameter value in sequence and record the corresponding eye diagram parameters.

[0050] Exemplarily, determining a target memory particle from a target memory link includes: on a board of a storage system, determining a link with the longest control signal PCB routing as a target memory link; identifying a topological structure of the target memory link, and determining locations of all memory particles in the target memory link; and determining a memory particle located closest to a controller end in the target memory link as a target memory particle.

[0051] On the board of the storage system, you first need to identify and determine the link with the longest control signal routing on the PCB (printed circuit board). This link is usually the link with the longest signal transmission path and the link that is most susceptible to signal integrity, so it is selected as the target memory link, because the longer the link, the more obvious the signal reflection and attenuation problems, and the higher the optimization requirements for ODT parameters. Figure 5 FIG. 1 is a schematic diagram of a CA signal PCB routing in an embodiment of the present disclosure. Figure 5 As shown, the highlighted PCB trace is the longest signal link, which is determined to be the target memory link. Once the target memory link is determined, its topology is identified. The topology here refers to the physical arrangement of memory particles in the link. In DDR storage systems, typical topologies include "point-to-point" and "fly-by". In the fly-by topology of the DDR5 system, the control signal CA connects multiple memory particles in sequence through a line. The main task of this step is to identify the position of each memory particle and clarify their arrangement order in the link. After identifying all the memory particles and their positions in the target memory link, the memory particle closest to the controller end needs to be identified as the target memory particle. As mentioned above, the target memory particle is the first particle to receive the signal in the target memory link. Since it is closest to the controller, it is greatly affected by signal reflection, attenuation, etc., so special attention needs to be paid to its signal quality and the optimization of ODT parameters.

[0052] Exemplarily, building an active link simulation model for the target memory link includes: on a board of a storage system, obtaining S parameters of a PCB routing of the target memory link and obtaining packaging S parameters of a controller chip in the target memory link; based on the S parameters of the PCB routing of the target memory link and the packaging S parameters of the controller chip in the target memory link, performing passive simulation on the target memory link to obtain a passive link simulation model; obtaining an AMI simulation model of the controller and each memory particle in the target memory link; and building an active link simulation model based on the passive link model and the AMI simulation model of the controller and each memory particle.

[0053] On the board of the storage system, first obtain the S parameters of the PCB trace of the target memory link, which describes the transmission characteristics of the signal on the PCB trace, such as insertion loss (IL) and reflection coefficient (Return Loss). In addition, obtain the package S parameters of the controller chip in the target memory link. The package S parameters describe the impact of the controller chip package on signal transmission. Based on the obtained S parameters of the PCB trace of the target memory link and the package S parameters of the controller chip, perform passive simulation. Passive simulation does not involve the excitation source or terminal load of the signal, and is mainly used to analyze the propagation characteristics of the signal in the passive components. Through passive simulation, a passive link simulation model can be constructed, which reflects the propagation characteristics of the signal in the entire link, including factors such as loss and reflection. Figure 6 is a CA signal passive S parameter insertion loss (IL) diagram in the embodiment of the present disclosure. The result of passive simulation is as follows Figure 6 shown.

[0054] Next, obtain the AMI (Algorithmic Modeling Interface) simulation model of the controller and each memory particle in the target memory link. The AMI model is a standardized model that describes the behavior of the transmission channel (such as the controller and memory particles) in a high-speed serial link. It contains information about the transmission, reception, and equalization algorithms, and can accurately simulate the actual signal transmission process in the simulation.

[0055] Finally, based on the previously constructed passive link simulation model and the AMI simulation models of the controller and each memory particle, an active link simulation model is built. The active link simulation model not only includes the passive propagation characteristics of the signal, but also combines the dynamic behavior of the controller and memory particles, and can simulate the transmission characteristics of the signal under actual working conditions, such as the signal waveform, timing, bit error rate, etc.

[0056] Figure 7 is a schematic diagram of an active link simulation in an embodiment of the present disclosure, such as Figure 7As shown in the figure, the Controller on the left side of the figure represents the control chip in the storage system, which is used to manage the transmission and reception of data. In the active link simulation, the behavior of the controller chip is represented by its corresponding AMI simulation model, which includes the controller's transmission, reception and balancing algorithms, and can simulate the actual working state of the controller during high-speed data transmission. Figure 7 The middle part of the diagram represents the PCB traces of the target memory link. The DRAM memory particles on the right represent the memory chips in the storage system. Similar to the controller, the behavior of the DRAM particles is also represented by their corresponding AMI simulation models. The AMI model of the DRAM particles can accurately simulate the dynamic behavior of the memory particles under actual working conditions, including the reception and equalization of signals. Figure 7 The simulated signal in is marked as CA control signal, which is used to transmit control commands and address information. Figure 7 In the active link simulation shown, the simulation rate is set to 4900MHz, which corresponds to high-speed storage systems such as DDR5. The simulation mode is "bit by bit", which means bit-by-bit simulation, which means that the signal is analyzed bit by bit, and the problems that may be encountered during the transmission of each bit signal can be accurately captured, such as bit errors, timing deviations, etc. The number of simulations is 1,000,000 bits. During the active link simulation process, 1 million bits of data transmission will be simulated.

[0057] Exemplarily, after determining the optimal ODT parameters of each memory particle, the method further includes: performing verification simulation on the target memory particle based on the active link simulation model and the optimal ODT parameters of each memory particle; obtaining the eye diagram parameters of the target memory particle after verification simulation, and obtaining the eye diagram parameters actually measured for the target memory particle; obtaining a comparison result based on the eye diagram parameters of the target memory particle after verification simulation and the eye diagram parameters actually measured; and iteratively adjusting the optimal ODT parameters of each memory particle based on the comparison result until the comparison result is within a preset threshold range.

[0058] In order to verify the optimization results of the ODT parameters, a verification simulation is performed based on the previously built active link simulation model and using the optimal ODT parameters of each memory particle. The signal transmission state of each memory particle is simulated under actual working conditions to further confirm the effectiveness and reliability of the optimal ODT parameters. After the verification simulation is completed, the eye diagram parameters of the target memory particle obtained by simulation are obtained, which reflects the actual performance of the signal at the target memory particle after the specific ODT parameter setting. At the same time, actual measurements are also required to measure the eye diagram parameters of the memory particles on actual hardware through experimental means, providing the signal performance in a real working environment.

[0059] Compare the eye diagram parameters obtained by the verification simulation with the eye diagram parameters actually measured to ensure the accuracy of the simulation model and the effectiveness of the selected ODT parameters. If there is a large deviation between the simulation results and the measured results, it means that the simulation model needs to be adjusted, or the performance of the ODT parameters in the actual application does not meet expectations. Based on the comparison of the simulation and measured results, the optimal ODT parameters of each memory particle need to be iteratively adjusted. If the comparison result is not within the preset threshold range, that is, the difference between the simulation and measured results exceeds the allowable range, it is necessary to readjust the ODT parameters and perform simulation and measurement again until the comparison result meets the preset requirements. This iterative process ensures that the final ODT parameters can provide the best signal quality in actual applications.

[0060] Figure 8 is a schematic diagram of the before and after comparison of eye diagrams under an optimal ODT parameter combination in an embodiment of the present disclosure, Figure 8 As shown, Figure 2 Taking U2 in the example as an example of the load, the eye diagrams of the signal entering and exiting the load are shown respectively, focusing on the eye diagram parameters under the condition of a bit error rate BER of 1e-16, including eye width (EW) and eye height (EH), as well as the slewrate (slope of the rising and falling edges) of the signal. Both eye diagrams show a clear "eye opening" phenomenon, which indicates that the signal still maintains a high degree of integrity during transmission, without obvious signal distortion or interference. Before the signal is transmitted into the load, both the eye width and eye height show a large margin, indicating that the signal has low loss and reflection in the transmission path and has good transmission conditions. After the signal passes through the load, the eye diagram still maintains a good shape, and the margins of the eye width and eye height are sufficient. Even after being affected by the load, the signal quality can still meet the requirements of the design specifications. And the simulation results under this load show that the slewrate is maintained within a moderate range, which avoids both overshoot and ringing caused by an overly fast edge and signal delay and ambiguity caused by an overly slow edge, indicating that the ODT parameter optimization strategy disclosed in the present invention effectively controls the slewrate of the signal and ensures the stability of the signal.

[0061] Fig. 9 is a structural block diagram of an ODT parameter optimization device in an embodiment of the present disclosure, such as Fig. 9 As shown, the device comprises: The model building module 201 is used to determine a target memory particle from a target memory link and build an active link simulation model for the target memory link, wherein the target memory particle is the memory particle closest to the controller end in the target memory link; The weight simulation module 202 is used to perform weight simulation on each memory cell on the target memory link based on the active link simulation model, and determine the influence ratio of each memory cell on the eye diagram of the target memory cell; The optimization simulation module 203 is used to perform optimization simulation on each memory chip in turn under ODT parameters of different resistance values ​​according to the influence proportion, so as to determine the optimal ODT parameter of each memory chip.

[0062] Exemplarily, the weight simulation module includes: A setting submodule, used to set ODT parameters with different resistance values ​​for each memory chip on the target memory link; A weight simulation submodule is used to perform weight simulation on each memory particle under different resistance ODT parameters based on the active link simulation model, and obtain eye diagram parameters of the target memory particle under different resistance ODT parameters of each memory particle, wherein the eye diagram parameters include eye height, eye width and bit error rate; The influence ratio calculation submodule is used to calculate the influence ratio of each memory particle on the eye diagram of the target memory particle according to the eye diagram parameters in the weighted simulation result.

[0063] Exemplarily, the optimization simulation module includes: A sorting submodule, used to sort the memory particles in the target memory link according to the influence ratio, and select the memory particle with the largest influence ratio as the first current memory particle; The optimization simulation submodule is used to set ODT parameters with different resistance values ​​for the first current memory particle, perform optimization simulation, and obtain eye diagram parameters of the target memory particle under the ODT parameters with different resistance values; An optimal ODT parameter determination submodule, used to determine the ODT parameter of the resistance corresponding to the optimal eye diagram parameter as the optimal ODT parameter of the first current memory particle; Repeat the execution of the submodule to save the optimal ODT parameters of the first current memory particle, and select the memory particle with the largest influence as the first current memory particle among the memory particles that have not been subjected to optimization simulation, and execute the following steps: for the first current memory particle, set ODT parameters with different resistance values, perform optimization simulation, and obtain the eye diagram parameters of the target memory particle under the ODT parameters of each resistance value; until the optimal ODT parameters of all memory particles on the target memory link are determined.

[0064] Exemplarily, the weight simulation submodule includes: A selection unit, configured to select the target memory cell as a second current memory cell; An OFF state setting unit, used to set the memory cells other than the second current memory cell on the target memory link to an OFF state; A weight simulation unit, used for performing weight simulation on the second current memory particle under different resistance ODT parameters; An acquiring unit, configured to acquire eye diagram parameters of the target memory particle under ODT parameters of different resistance values ​​of the second current memory particle; A repeated execution unit is used to select the next memory particle to be weighted simulated as the second current memory particle from the memory particles that have not been weighted simulated, and execute the steps of: setting the memory particles other than the second current memory particle on the target memory link to the OFF state; until the influence weight of all memory particles on the target memory link on the target memory particle is determined.

[0065] Exemplarily, the model building module includes: The target memory link determination submodule is used to determine the link with the longest control signal PCB routing as the target memory link on the board of the storage system; A topology identification submodule, used to identify the topology of the target memory link and determine the locations of all memory particles in the target memory link; The target memory cell determination submodule is used to determine the memory cell located closest to the controller end in the target memory link as the target memory cell.

[0066] Exemplarily, the model building module includes: An S parameter acquisition submodule is used to acquire the S parameters of the PCB routing of the target memory link on the board of the storage system, and to acquire the package S parameters of the controller chip in the target memory link; A passive simulation submodule, used for performing passive simulation on the target memory link based on the S parameters of the PCB routing of the target memory link and the package S parameters of the controller chip in the target memory link to obtain a passive link simulation model; A simulation model acquisition submodule, used to acquire the AMI simulation model of the controller and each memory particle in the target memory link; The active link simulation model building submodule is used to build an active link simulation model based on the passive link model and the AMI simulation models of the controller and each memory particle.

[0067] Exemplarily, the device further includes: A verification simulation module, used to perform verification simulation on the target memory cell based on the active link simulation model and the optimal ODT parameters of each memory cell; An eye diagram parameter acquisition module, used to acquire eye diagram parameters of the target memory particle after verification simulation, and to acquire eye diagram parameters of the target memory particle actually measured; A comparison result acquisition module, used to obtain a comparison result based on the eye diagram parameters of the target memory particle after verification simulation and the eye diagram parameters obtained by actual measurement; The iterative adjustment module is used to iteratively adjust the optimal ODT parameter of each memory particle based on the comparison result until the comparison result is within a preset threshold range.

[0068] An embodiment of the present disclosure also provides an electronic device, including a processor, a memory, and a computer program stored in the memory and capable of running on the processor. When the computer program is executed by the processor, the various processes in the above-mentioned ODT parameter optimization method embodiment are implemented, and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.

[0069] The disclosed embodiment also provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, each process in the above-mentioned ODT parameter optimization method embodiment is implemented, and the same technical effect can be achieved. To avoid repetition, it is not repeated here. Each embodiment in this specification is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same and similar parts between the embodiments can be referred to each other.

[0070] It should be understood by those skilled in the art that the embodiments of the present disclosure may be provided as methods, devices, equipment and media. Therefore, the embodiments of the present disclosure may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the embodiments of the present disclosure may take the form of a computer program product implemented on one or more computer-readable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0071] The embodiments of the present disclosure are described with reference to the flowcharts and / or block diagrams of the methods and devices according to the embodiments of the present disclosure. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of the processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing terminal device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing terminal device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1These computer program instructions can also be stored in a computer-readable memory that can guide a computer or other programmable data processing terminal device to work in a specific way, so that the instructions stored in the computer-readable memory produce a product including an instruction device, which implements the functions specified in the process. Figure 1 A process or multiple processes and / or boxes Figure 1 These computer program instructions can also be loaded onto a computer or other programmable data processing terminal device, so that a series of operation steps are executed on the computer or other programmable terminal device to produce a computer-implemented process, so that the instructions executed on the computer or other programmable terminal device provide for implementing the process in the process. Figure 1 A process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0072] Although the preferred embodiments of the present disclosure have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present disclosure.

[0073] Finally, it should be noted that, in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the term "include" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or terminal device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or terminal device. In the absence of further restrictions, the elements defined by the sentence "include..." do not exclude the existence of other identical elements in the process, method, article or terminal device including the elements. The above is a detailed introduction to an ODT parameter optimization method, device, electronic device and storage medium provided by the present disclosure. Specific examples are used in this article to illustrate the principles and implementation methods of the present disclosure. The description of the above embodiments is only used to help understand the method and its core idea of ​​the present disclosure; at the same time, for those of ordinary skill in the art, according to the idea of ​​the present disclosure, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present disclosure.

Claims

1. An ODT parameter optimization method, characterized in that: The method comprises: Determine a target memory particle from a target memory link, and build an active link simulation model for the target memory link, wherein the target memory particle is the memory particle closest to the controller end in the target memory link; Based on the active link simulation model, weight simulation is performed on each memory particle on the target memory link to determine the influence ratio of each memory particle on the eye diagram of the target memory particle; According to the influence proportion, optimization simulation is performed on each memory particle in turn under ODT parameters with different resistance values ​​to determine the optimal ODT parameter of each memory particle.

2. The method according to claim 1, characterized in that Based on the active link simulation model, weight simulation is performed on each memory particle on the target memory link, including: Setting ODT parameters with different resistance values ​​for each memory chip on the target memory link; Based on the active link simulation model, weighted simulation is performed on each memory particle under different resistance ODT parameters to obtain eye diagram parameters of the target memory particle under different resistance ODT parameters of each memory particle, wherein the eye diagram parameters include eye height, eye width and bit error rate; According to the eye diagram parameters in the weighted simulation result, the influence ratio of each memory cell on the eye diagram of the target memory cell is calculated.

3. The method according to claim 1, characterized in that According to the influence ratio, each memory chip is optimized and simulated in turn under different resistance ODT parameters to determine the optimal ODT parameters of each memory chip, including: Sort the memory particles in the target memory link according to the impact ratio, and select the memory particle with the largest impact ratio as the first current memory particle; For the first current memory particle, set ODT parameters with different resistance values, perform optimization simulation, and obtain eye diagram parameters of the target memory particle under the ODT parameters with different resistance values; Determine the ODT parameter of the resistance value corresponding to the optimal eye diagram parameter as the optimal ODT parameter of the first current memory particle; Save the optimal ODT parameters of the first current memory particle, and select the memory particle with the largest influence as the first current memory particle among the memory particles that have not undergone optimization simulation, and execute the following steps: for the first current memory particle, set ODT parameters with different resistance values, perform optimization simulation, and obtain the eye diagram parameters of the target memory particle under the ODT parameters of each resistance value; until the optimal ODT parameters of all memory particles on the target memory link are determined.

4. The method according to claim 2, characterized in that: Based on the active link simulation model, weighted simulation is performed on each memory particle under different resistance ODT parameters to obtain eye diagram parameters of the target memory particles under different resistance ODT parameters of each memory particle, including: Selecting the target memory cell as the second current memory cell; Setting the memory cells other than the second current memory cell on the target memory link to an OFF state; Performing weight simulation on the second current memory particle under different resistance ODT parameters respectively; Obtain eye diagram parameters of the target memory particle under ODT parameters of different resistance values ​​of the second current memory particle; Among the memory particles that have not undergone weight simulation, select the next memory particle to be subjected to weight simulation as the second current memory particle, and execute the steps of: setting the memory particles on the target memory link except the second current memory particle to the OFF state; until the influence weight of all memory particles on the target memory link on the target memory particle is determined.

5. The method according to claim 1, characterized in that Determine the target memory granule from the target memory link, including: On the board of the storage system, determine the link with the longest control signal PCB trace as the target memory link; Identify the topology of the target memory link and determine the locations of all memory particles in the target memory link; A memory chip located in the target memory link and closest to the controller end is determined as the target memory chip.

6. The method according to claim 1, characterized in that The active link simulation model is constructed for the target memory link, including: On a board of a storage system, obtaining S parameters of a PCB routing of the target memory link, and obtaining package S parameters of a controller chip in the target memory link; Based on the S parameters of the target memory link PCB routing and the package S parameters of the controller chip in the target memory link, the target memory link is passively simulated to obtain a passive link simulation model; Obtaining an AMI simulation model of the controller and each memory particle in the target memory link; Based on the passive link model and the AMI simulation models of the controller and each memory particle, an active link simulation model is built.

7. The method according to claim 1, characterized in that After determining the optimal ODT parameter of each memory chip, the method further includes: Based on the active link simulation model and the optimal ODT parameters of each memory particle, performing verification simulation on the target memory particle; Obtaining eye diagram parameters of the target memory particle after verification simulation, and obtaining eye diagram parameters of the target memory particle obtained by actual measurement; Obtaining a comparison result according to the eye diagram parameters of the target memory particle after verification simulation and the eye diagram parameters obtained by actual measurement; The optimal ODT parameter of each memory chip is iteratively adjusted based on the comparison result until the comparison result is within a preset threshold range.

8. An ODT parameter optimization device, characterized in that: The device comprises: A model building module, used to determine a target memory particle from a target memory link, and build an active link simulation model for the target memory link, wherein the target memory particle is the memory particle closest to the controller end in the target memory link; A weight simulation module, used to perform weight simulation on each memory particle on the target memory link based on the active link simulation model, and determine the influence ratio of each memory particle on the eye diagram of the target memory particle; The optimization simulation module is used to perform optimization simulation on each memory particle in turn under ODT parameters of different resistance values ​​according to the influence proportion, so as to determine the optimal ODT parameter of each memory particle.

9. An electronic device, characterized in that: include: A processor, a memory, and a computer program stored in the memory and capable of running on the processor, wherein when the computer program is executed by the processor, the steps of the method according to any one of claims 1 to 7 are implemented.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 7 are implemented.

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