Display device and driving method thereof

Abstract

The embodiment of the invention provides a display device and a driving method thereof. The display device comprises a plurality of pixel circuits arranged in an array, each pixel circuit is connected with a corresponding voltage line, and the voltage lines are used for writing voltage into the connected pixel circuits; the refresh cycle of the pixel circuit comprises a first time period and a second time period; the plurality of pixel circuits comprise a first pixel circuit and a second pixel circuit, the first pixel circuit is connected with a first voltage line, and the second pixel circuit is connected with a second voltage line; and when the refresh rates corresponding to the first pixel circuit and the second pixel circuit are different, the voltage of the first voltage line in the second time period is different from the voltage of the second voltage line in the second time period.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of display technology, and in particular, to a display device and a driving method thereof. Background Art

[0002] Organic Light Emitting Diode (OLED) and flat panel display devices based on technologies such as Light Emitting Diode (LED) have been widely used in various consumer electronic products such as mobile phones, televisions, laptops, desktop computers, etc. due to their advantages such as high image quality, power saving, thin body and wide application range, becoming the mainstream in display devices.

[0003] However, the performance of current OLED display products still needs to be optimized. Summary of the invention

[0004] In view of this, embodiments of the present application provide a new display device and a driving method thereof to at least partially solve the above problems.

[0005] According to a first aspect of an embodiment of the present application, a display device is provided, comprising: a plurality of pixel circuits arranged in an array, each of the pixel circuits being connected to a corresponding voltage line, the voltage line being used to write a voltage into the connected pixel circuit; a refresh cycle of the pixel circuit comprising a first time period and a second time period; the plurality of pixel circuits comprising a first pixel circuit and a second pixel circuit, the first pixel circuit being connected to a first voltage line, and the second pixel circuit being connected to a second voltage line; when the refresh rates corresponding to the first pixel circuit and the second pixel circuit are different, the voltage of the first voltage line in the second time period is different from the voltage of the second voltage line in the second time period.

[0006] In some optional embodiments, the pixel circuit includes a write control module, a drive module, a light emitting module and a holding module; the voltage line is connected to the write control module, the write control module is connected to the first end of the drive module, the first end of the drive module is connected to the first power line, the second end of the drive module is connected to the first end of the light emitting module, and the second end of the light emitting module is connected to the second power line; the first end of the holding module is connected to the first power line, and the second end of the holding module is connected to the control end of the drive module;

[0007] Preferably, the write control module is turned on in the first time period and turned off in the second time period.

[0008] In some optional embodiments, the pixel circuit includes a refresh control module; the holding module is connected to the refresh control module, and the refresh control module is connected to the second end of the driving module;

[0009] Preferably, the refresh control module is turned on in the first time period and turned off in the second time period.

[0010] In some optional embodiments, the pixel circuit includes a first light emitting control module and a second light emitting control module; the first end of the driving module is connected to the first power line through the first light emitting control module, and the second end of the driving module is connected to the light emitting module through the second light emitting control module;

[0011] Preferably, the first light emitting control module is turned off in the first time period and turned on in the second time period; the second light emitting control module is turned off in the first time period and turned on in the second time period.

[0012] In some optional embodiments, the display device also includes a voltage adjustment module; the voltage adjustment module is used to determine the voltage of the first voltage line in the second time period according to the refresh rate corresponding to the first pixel circuit and the target brightness displayed by the first pixel circuit when the refresh rate corresponding to the first pixel circuit is less than that of the second pixel circuit.

[0013] In some optional embodiments, the voltage adjustment module is used to determine the voltage of the first voltage line in the second time period based on the refresh rate corresponding to the first pixel circuit, the target brightness displayed by the first pixel circuit and the refresh rate corresponding to the second pixel circuit.

[0014] In some optional embodiments, when the refresh rate corresponding to the first pixel circuit is smaller than that of the second pixel circuit, the voltage of the first voltage line in the first time period is different from the voltage of the first voltage line in the second time period;

[0015] Preferably, the voltage of the second voltage line in the first time period is the same as the voltage of the second voltage line in the second time period.

[0016] In some optional embodiments, when the refresh rate corresponding to the first pixel circuit is smaller than that of the second pixel circuit, the voltage of the first voltage line in the second time period is greater than the voltage of the second voltage line in the second time period.

[0017] An embodiment of the present application also provides a driving method for a display device, wherein the display device comprises: a plurality of pixel circuits arranged in an array, each of the pixel circuits being connected to a corresponding voltage line, the voltage line being used to write a voltage into the connected pixel circuit; a refresh cycle of the pixel circuit comprising a first time period and a second time period; the plurality of pixel circuits comprising a first pixel circuit and a second pixel circuit, the first pixel circuit being connected to a first voltage line, and the second pixel circuit being connected to a second voltage line; the driving method comprises: outputting a voltage to the first pixel circuit via the first voltage line during a refresh cycle of the first pixel circuit, and outputting a voltage to the first pixel circuit via the second voltage line during a refresh cycle of the second pixel circuit; wherein, when the refresh rates corresponding to the first pixel circuit and the second pixel circuit are different, the voltage of the first voltage line in the second time period is different from the voltage of the second voltage line in the second time period.

[0018] In some optional embodiments, the driving method also includes: when the refresh rate corresponding to the first pixel circuit is less than that of the second pixel circuit, determining the voltage of the first voltage line in the second time period according to the refresh rate corresponding to the first pixel circuit and the target brightness displayed by the first pixel circuit.

[0019] In some optional embodiments, determining the voltage of the first voltage line in the second time period according to the refresh rate corresponding to the first pixel circuit and the target brightness displayed by the first pixel circuit includes: determining the voltage of the first voltage line in the second time period according to the refresh rate corresponding to the first pixel circuit, the target brightness displayed by the first pixel circuit and the refresh rate corresponding to the second pixel circuit.

[0020] In some optional embodiments, when the refresh rate corresponding to the first pixel circuit is smaller than that of the second pixel circuit, the voltage of the first voltage line in the first time period is different from the voltage of the first voltage line in the second time period; preferably, the voltage of the second voltage line in the first time period is the same as the voltage of the second voltage line in the second time period.

[0021] In an embodiment of the present application, by setting the refresh rates corresponding to the first pixel circuit and the second pixel circuit to be different, the voltage of the first voltage line, the second voltage line, and the first voltage line in the second time period is different from the voltage of the second voltage line in the second time period. When there are multiple display areas with different refresh rates on the display device, the voltages of the voltage lines connected to the pixel circuits with different refresh rates in the corresponding second time period can be set separately, and the brightness displayed by the display area with a lower refresh rate and the display area with a higher refresh rate can be pre-adjusted to be the same, so as to obtain the adjusted voltage of the voltage line connected to the pixel circuit of the display area with a lower refresh rate in the corresponding second time period. In an embodiment of the present application, the voltage of the voltage line connected to the pixel circuit with a lower refresh rate in the first pixel circuit and the second pixel circuit can be separately set to the pre-obtained adjusted voltage in the corresponding second time period, thereby solving the influence of the parasitic capacitance generated by the voltage line, and can reduce the brightness difference of each display area when there are multiple display areas with different refresh rates on the display device. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the embodiments of the present application. For ordinary technicians in this field, other drawings can also be obtained based on these drawings.

[0023] Figure 1 This is a schematic diagram of an exemplary structure of a display device according to an embodiment of the present application;

[0024] Figure 2 This is a schematic diagram of an exemplary structure of a display panel according to an embodiment of the present application;

[0025] Figure 3 A schematic diagram of a pixel circuit according to an embodiment of the present application;

[0026] Figure 4 A schematic diagram of another pixel circuit according to an embodiment of the present application;

[0027] Figure 5 is a schematic diagram of an exemplary structure of another display device according to an embodiment of the present application;

[0028] Figure 6 A comparison diagram of refresh cycles of a first pixel circuit and a second pixel circuit according to an embodiment of the present application;

[0029] Figure 7 The present invention is a flowchart of a method for driving a display device according to an embodiment of the present application.

[0030] Reference numerals:

[0031] 1. Display device; 10. Display panel;

[0032] 100, pixel circuit; 110, write control module; 120, drive module; 130, light emitting module; 140, hold module; 150, refresh control module; 161, first light emitting control module; 162, second light emitting control module; 171, first initialization module; 172, second initialization module; 173, third initialization module;

[0033] L1, first scan line; L2, second scan line; L3, third scan line; L4, fourth scan line; L5, fifth scan line; Vref1, first reference voltage; Vref2, second reference voltage; Vref3, third reference voltage;

[0034] T1, first transistor; T2, second transistor; T3, third transistor; T4, fourth transistor; T5, fifth transistor; T6, sixth transistor; T7, seventh transistor; T8, eighth transistor; C, holding capacitor;

[0035] ELVDD, first power line; ELVSS, second power line; Vdata, voltage line;

[0036] AA, display area; SA, non-display area. DETAILED DESCRIPTION

[0037] In order to enable those skilled in the art to better understand the technical solutions in the embodiments of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments in the embodiments of the present application should fall within the scope of protection of the embodiments of the present application.

[0038] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present application. The singular forms of "a", "said" and "the" used in the embodiments of the present application and the appended claims are also intended to include plural forms, unless the context clearly indicates other meanings. It should also be understood that the term "and / or" used in the embodiments of the present application refers to and includes any or all possible combinations of one or more associated listed items.

[0039] It should be understood that in the description of the embodiments of the present application, the terms "length", "width", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the schemes of the embodiments of the present application and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the embodiments of the present application.

[0040] In addition, when an element or layer is referred to as being “on,” “connected to,” or “coupled to” another element or layer, the element or layer may be directly on, directly connected to, or directly coupled to the other element or layer, or intervening elements or layers may be present. However, when an element or layer is referred to as being “directly on,” “directly connected to,” or “directly coupled to” another element or layer, there are no intervening elements or layers present.

[0041] The terms first, second, etc. are used to describe various elements, components, regions, layers and / or parts, but these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are used to distinguish one element, component, region, layer and / or part from another element, component, region, layer and / or part.

[0042] Unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For those skilled in the art, the specific meanings of the above terms in this application can be understood according to the specific circumstances.

[0043] The specific implementation of the embodiment of the present application is further explained below in conjunction with the accompanying drawings of the embodiment of the present application.

[0044] The contents of the circuit parts mentioned below are further described in patents CN118251982A, 202311324257.8, 202310731471.9, 202311686416.9, 202310707183.X, 202310479495.X, 202310445544.8, CN117580403A, CN116669477B, and CN116936581B for reference.

[0045] Figure 1It is a schematic diagram of an exemplary structure of a display device 1 according to an embodiment of the present application.

[0046] See also Figure 1 , an embodiment of the present application provides a display device 1. The display device 1 is an electronic device having an image (including: static image or dynamic image, wherein the dynamic image may be a video) display function. For example, the display device 1 may be any one of a display, a television, a billboard, a digital photo frame, a laser printer with a display function, a telephone, a mobile phone, a personal digital assistant (PDA), a digital camera, a portable camcorder, a viewfinder, a navigator, a large-area wall, a home appliance, an information query device (such as business query devices for e-government, banks, hospitals, power and other departments), a monitor, an electronic painting screen, a virtual reality (VR) display device, an augmented reality (AR) display device and a vehicle-mounted display, but is not limited thereto.

[0047] In some embodiments, see Figure 1 The display device 1 may include a display panel 10. For example, the display panel 10 may be a self-luminous display panel 10. For example, the display panel 10 may be any one of an organic light emitting diode (OLED) display panel 10, a quantum dot light emitting diode (QLED) display panel 10, and a micro light emitting diode (Mini LED or Micro LED) display panel 10. In an optional embodiment of the present application, the display panel 10 included in the display device 1 may be a display panel 10 described in any of the following embodiments.

[0048] See also Figure 2 The display panel 10 has a display area AA and a non-display area SA, wherein the display area AA is an area on the display panel 10 for displaying images, and the non-display area SA is an area on the display panel 10 other than the display area AA. The non-display area SA may be located on at least one side (e.g., one side, or multiple sides) of the display area AA, for example, the non-display area SA may be arranged around the display area AA.

[0049] A plurality of pixel circuits are arranged in the display area AA. A plurality of pixel circuit arrays are arranged in the display area AA, and each pixel circuit can display a single color. For example, the pixel circuits arranged in the display area AA may include a red pixel circuit R, a green pixel circuit G, and a blue pixel circuit B, which are used to display red, green, and blue, respectively. A plurality of pixel circuits may be arranged in the display area AA according to a specified rule. For example, a plurality of sub-pixels are arranged in a plurality of rows and columns. Since each pixel circuit includes a pixel driving circuit, the pixel driving circuits are also arranged in a plurality of rows and columns.

[0050] It should be noted that the above-mentioned pixel circuit is the smallest unit for displaying a picture in the display panel 10 . Figure 3 for Figure 2 Schematic diagram of the pixel circuit in the middle display area AA. The pixel circuit can be configured to respond to the received scan signal, write the data signal of the voltage line, and drive the light-emitting module in the pixel circuit to emit light through the data signal. The brightness of the light-emitting module can be related to the voltage value of the written data signal. By adjusting the brightness displayed by different pixel circuits, color superposition can achieve the display of multiple colors.

[0051] The display device 1 provided in the embodiment of the present application is described in detail below.

[0052] The display device 1 may include a plurality of pixel circuits arranged in an array, each pixel circuit is connected to a corresponding voltage line, and the voltage line is used to write a voltage into the connected pixel circuit, and may provide a data voltage for the pixel circuit.

[0053] The refresh cycle of the pixel circuit includes a first time period and a second time period. The first time period and the second time period are two different time periods in the refresh cycle, the first time period may be before the second time period, the first time period may be a time period when the voltage line writes a voltage to the pixel circuit, and the second time period may be a time period when the pixel circuit emits light.

[0054] like Figure 3 As shown, in some optional embodiments, the pixel circuit 100 may include a write control module 110, a driving module 120, a light-emitting module 130 and a holding module 140; the voltage line Vdata is connected to the write control module 110, the write control module 110 is connected to the first end of the driving module 120, the first end of the driving module 120 is connected to the first power line ELVDD, the second end of the driving module 120 is connected to the first end of the light-emitting module 130, and the second end of the light-emitting module 130 is connected to the second power line ELVSS; the first end of the holding module 140 is connected to the first power line ELVDD, and the second end of the holding module 140 is connected to the control end of the driving module 120.

[0055] like Figure 4As shown, the write control module 110 may include a first transistor T1, the driving module 120 may include a second transistor T2, and the holding module 140 may include a holding capacitor C. The light emitting module 130 is used to emit light and may be a suitable light emitting device suitable for OLED. Exemplarily, the voltage line Vdata may be connected to the first end of the first transistor T1, the second end of the first transistor T1 may be connected to the first end of the second transistor T2, and the control end of the first transistor T1 may be connected to the first scan line L1, so as to control the first transistor T1 to write the voltage of the voltage line Vdata connected thereto into the pixel circuit 100 through the first scan signal output by the first scan line L1. The first end of the second transistor T2 may also be connected to the first power line ELVDD, the second end of the second transistor T2 may be connected to the first end of the light emitting module 130, and the second end of the light emitting module 130 may be connected to the second power line ELVSS. The first end of the holding capacitor C may be connected to the first power line ELVDD, and the second end of the holding capacitor C may be connected to the control end of the second transistor T2.

[0056] As a feasible implementation method, the write control module 110 can be turned on in the first time period and turned off in the second time period, thereby controlling the voltage line Vdata to write the voltage into the pixel circuit 100 in the first time period, and interrupting the process of writing the voltage of the voltage line Vdata into the maintenance module 140 in the second time period.

[0057] In the embodiment of the present application, the connection between the voltage line Vdata and the maintaining module 140 can be controlled by the write control module 110. By turning on the write control module 110 in a first time period, the voltage of the voltage line Vdata can be written into the maintaining module 140 in the first time period. By turning off the write control module 110 in the first time period, the voltage of the voltage line Vdata can be stopped from being written into the maintaining module 140 in the second time period, so as to prevent the voltage of the voltage line Vdata from affecting the driving module 120 driving the light-emitting module 130.

[0058] The plurality of pixel circuits 100 include a first pixel circuit and a second pixel circuit, wherein the first pixel circuit is connected to a first voltage line, and the second pixel circuit is connected to a second voltage line. When the refresh rates corresponding to the first pixel circuit and the second pixel circuit are different, the voltage of the first voltage line in the second time period is different from the voltage of the second voltage line in the second time period. The voltage of the first voltage line in the first time period may be the same as or different from the voltage of the second voltage line in the first time period.

[0059] The first pixel circuit and the second pixel circuit may be pixel circuits of the same color, for example, both are red pixel circuits, both are green pixel circuits, or both are blue pixel circuits, etc., that is, when the refresh rates corresponding to the first pixel circuit and the second pixel circuit of the same color are different, the voltage of the first voltage line in the second time period is different from the voltage of the second voltage line in the second time period. The first pixel circuit and the second pixel circuit may also have the same color, and the present application does not limit this.

[0060] For example Figure 5 As shown, at the same moment, the refresh rates of the three display areas A, B, and C on the display device 1 can be 1 Hz, 120 Hz, and 1 Hz, respectively. The refresh rates of different display areas on the display device 1 provided in the embodiment of the present application can be different. The first pixel circuit and the second pixel circuit can be pixel circuits 100 in areas A and B, respectively.

[0061] It should be understood that the refresh rate corresponding to the pixel circuit 100 is the refresh rate of the display area where the pixel circuit 100 is located. When the refresh rates corresponding to the first pixel circuit and the second pixel circuit are different, there will be differences in the refresh cycles of the first pixel circuit and the second pixel circuit. As a feasible implementation method, if the refresh rate of the first pixel circuit is less than the refresh rate of the second pixel circuit, the first time period corresponding to the first pixel circuit may coincide with / occur simultaneously with the first time period corresponding to the second pixel circuit, and the duration of the second time period corresponding to the first pixel circuit may be greater than the duration of the second time period corresponding to the second pixel circuit. By way of example, if the refresh rate corresponding to the first pixel circuit is 1 Hz, the first time period corresponding to the first pixel circuit is a1, and the second time period is a2, the refresh rate corresponding to the second pixel circuit is 120 Hz, the first time period corresponding to the second pixel circuit is b1, and the second time period is b2, then Figure 6 As shown, a1 can be equal to b1, and a2 can be equal to b2+119*(b1+b2).

[0062] The inventor of the present application has found through research that a parasitic capacitance is generated between the driving module 120 of the pixel circuit 100 and the voltage line Vdata connected to the pixel circuit 100. A parasitic capacitance exists between the gate of the second transistor T2 of the pixel circuit 100 and the voltage line Vdata connected to the pixel circuit 100. When the refresh rate corresponding to the pixel circuit 100 is relatively low, the duration of the second time period of the pixel circuit 100 will be relatively long compared to when the refresh rate is relatively high. At this time, the parasitic capacitance will have a greater impact on the gate voltage of the second transistor T2, thereby affecting the brightness of the light-emitting module 130 driven by the second transistor T2, so that when there are display areas with different refresh rates on the display device 1, even if the display device 1 only sets one target brightness, due to the influence of the parasitic capacitance, the brightness displayed by the display area with a lower refresh rate will also be different from that of the display area with a higher refresh rate.

[0063] In an embodiment of the present application, by setting the refresh rates corresponding to the first pixel circuit and the second pixel circuit to be different, the voltage of the first voltage line, the second voltage line, and the first voltage line in the second time period is different from the voltage of the second voltage line in the second time period. When there are multiple display areas with different refresh rates on the display device 1, the voltage of the voltage line Vdata connected to the pixel circuits 100 with different refresh rates in the corresponding second time period can be set separately, and the brightness displayed by the display area with a lower refresh rate and the display area with a higher refresh rate can be pre-adjusted to be the same, so as to obtain the adjusted voltage of the voltage line Vdata connected to the pixel circuit 100 in the display area with a lower refresh rate in the corresponding second time period. In an embodiment of the present application, the voltage of the voltage line Vdata connected to the pixel circuit 100 with a lower refresh rate in the first pixel circuit and the second pixel circuit can be separately set to the pre-obtained adjusted voltage in the corresponding second time period, thereby solving the influence of the parasitic capacitance generated by the voltage line Vdata, and can reduce the brightness difference of each display area when there are multiple display areas with different refresh rates on the display device 1.

[0064] like Figure 3 As shown, in some optional embodiments, the pixel circuit 100 includes a refresh control module 150 ; the holding module 140 is connected to the refresh control module 150 , and the refresh control module 150 is connected to the second end of the driving module 120 .

[0065] like Figure 4As shown, the refresh control module 150 may include a third transistor T3. The second end of the above-mentioned holding capacitor C may be connected to the first end of the third transistor T3, the second end of the above-mentioned second transistor T2 may be connected to the second end of the third transistor T3, and the control end of the third transistor T3 may be connected to the second scan line L2, and the second scan line L2 is used to output a second scan signal for controlling the conduction and disconnection of the third transistor T3. Whether to write a voltage to the holding capacitor C can be controlled by turning on and off the third transistor T3, so that the frequency of writing a voltage to the holding capacitor C can be controlled by using the third transistor T3, thereby controlling the refresh rate of the pixel circuit 100.

[0066] As a feasible implementation, the refresh control module 150 is turned on in the first time period and turned off in the second time period. Correspondingly, the third transistor T3 can be turned on in the first time period and turned off in the second time period. Thus, the voltage of the voltage line Vdata can be written into the holding module 140 in the first time period, and the process of writing the voltage of the voltage line Vdata into the holding module 140 is interrupted in the second time period.

[0067] In the embodiment of the present application, the refresh control module 150 can be used to control the frequency of writing voltage to the holding capacitor C, thereby controlling the refresh rate of the pixel circuit 100. The refresh control module 150 can be used to make the refresh rates of the pixel circuits 100 in different display areas on the display device 1 different, so that different display areas on the display device can have different refresh rates at the same time, thereby realizing partitioned refresh of the display device.

[0068] like Figure 3 As shown, in some optional embodiments, the pixel circuit 100 includes a first light emitting control module 161 and a second light emitting control module 162. The first end of the driving module 120 is connected to the first power line ELVDD through the first light emitting control module 161, and the second end of the driving module 120 is connected to the light emitting module 130 through the second light emitting control module 162. After the first light emitting control module 161 is turned on, the first power line ELVDD can be electrically connected to the driving module 120 through the first light emitting control module 161, and after the second light emitting control module 162 is turned on, the second power line ELVSS can be electrically connected to the driving module 120 through the second light emitting control module 162. The first light emitting control module 161 and the second light emitting control module 162 can be controlled by the same signal.

[0069] like Figure 4As shown, the first light emitting control module 161 may include a fourth transistor T4, and the second light emitting control module 162 may include a fifth transistor T5. The first end of the second transistor T2 included in the driving module 120 may be connected to the first power line ELVDD through the fourth transistor T4, and the second end of the second transistor T2 may be connected to the light emitting module 130 through the fifth transistor T5. The control end of the fourth transistor T4 and the control end of the fifth transistor T5 may be connected to the third scan line L3, and the third scan line L3 is used to output a third scan signal for controlling the fourth transistor T4 and the fifth transistor T5 to be turned on and off.

[0070] Preferably, the first light emitting control module 161 is turned off in the first time period and turned on in the second time period; the second light emitting control module 162 is turned off in the first time period and turned on in the second time period. This can prevent the first power line ELVDD and the second power line ELVSS from affecting the voltage line Vdata from writing voltage to the pixel circuit 100 in the first time period.

[0071] In the embodiment of the present application, the pixel circuit 100 may include a first light emitting control module 161 and a second light emitting control module 162. The first end of the driving module 120 is connected to the first power line ELVDD through the first light emitting control module 161, and the second end of the driving module 120 is connected to the light emitting module 130 through the second light emitting control module 162, so that the power-on of the driving module 120 can be controlled by the first light emitting control module 161 and the second light emitting control module 162, so that the driving module 120 can be conveniently controlled to drive the light emitting module 130.

[0072] As a feasible implementation, the pixel circuit 100 may further include an initialization module, such as Figure 3 As shown, the initialization module may include a first initialization module 171, a second initialization module 172, and a third initialization module 173. The first initialization module 171 may be connected to the second end of the refresh control module 150, the second initialization module 172 may be connected to the second end of the driving module 120, and one end of the third initialization module 173 may be respectively connected to the second light emitting control module 162 and the light emitting module 130. The second initialization module 172 and the third initialization module 173 may be controlled by the same signal.

[0073] like Figure 4As shown, the first initialization module 171 may include a sixth transistor T6, the second initialization module 172 may include a seventh transistor T7, and the third initialization module 173 may include an eighth transistor T8. Specifically, the first end of the sixth transistor T6 may be connected to the second end of the refresh control module 150, the second end of the sixth transistor T6 may be connected to the first reference voltage Vref1, and the control end of the sixth transistor T6 is connected to the fourth scan line L4, wherein the first reference voltage Vref1 is used to initialize the voltage of the second end of the holding module 140, and the fourth scan line L4 is used to output a second scan signal for controlling the sixth transistor T6 to be turned on and off. The first end of the seventh transistor T7 can be connected to the second end of the driving module 120, the second end of the seventh transistor T7 can be connected to the second reference voltage Vref2, the control end of the seventh transistor T7 is connected to the fifth scan line L5, the first end of the eighth transistor T8 can be connected to the first end of the light emitting module 130, the second end of the eighth transistor T8 can be connected to the third reference voltage Vref3, and the control end of the eighth transistor T8 is connected to the fifth scan line L5, wherein the second reference voltage Vref2 is used to initialize the voltage of the second end of the driving module 120, the third reference voltage Vref3 is used to initialize the voltage of the first end of the light emitting module 130, and the fifth scan line L5 is used to output the second scan signal for controlling the seventh transistor T7 and the eighth transistor T8 to be turned on and off. It should be understood that the above initialization of the voltage at the second end of the holding module 140, the second end of the driving module 120, etc. can be understood as resetting the voltage at the second end of the holding module 140, the second end of the driving module 120, etc. to the corresponding predetermined potential.

[0074] The first initialization module 171, the second initialization module 172, and the third initialization module 173 can respectively initialize the modules connected thereto, so as to refresh the pixel circuit 100. Optionally, the refresh cycle of the pixel circuit can also include an initialization time period, for example, the initialization time period can be between the first time period and the second time period, and the first initialization module 171, the second initialization module 172, and the third initialization module 173 can initialize the corresponding modules or voltages during the initialization time period.

[0075] In some optional embodiments, the display device 1 also includes a voltage adjustment module; the voltage adjustment module is used to determine the voltage of the first voltage line in the second time period according to the refresh rate corresponding to the first pixel circuit and the target brightness displayed by the first pixel circuit when the refresh rate corresponding to the first pixel circuit is less than that of the second pixel circuit.

[0076] It should be noted that the voltage line Vdata can be connected to a corresponding voltage source, so that the voltage line Vdata can obtain a voltage from the corresponding voltage source. After the voltage of the first voltage line in the second time period is determined, the voltage source connected to the first voltage line can provide the determined voltage to the voltage line Vdata. The target brightness displayed by the first pixel circuit or the second pixel circuit is the target brightness of the display area where the first pixel circuit or the second pixel circuit is located, or the set brightness of the display area where the first pixel circuit or the second pixel circuit is located.

[0077] As an optional implementation method, a mapping information can be preset to indicate the mapping relationship between the refresh rate corresponding to the pixel circuit 100, the target brightness displayed by the pixel circuit 100, and the voltage line Vdata connected to the pixel circuit 100 to the voltage of the pixel circuit 100 during the second time period. The mapping information can be a mapping table or a mapping curve, etc.

[0078] According to the refresh rate corresponding to the first pixel circuit and the target brightness displayed by the first pixel circuit, the voltage of the first voltage line in the second time period can be mapped using the mapping information. For example, according to the mapping information, when the refresh rate corresponding to the pixel circuit 100 is 1Hz and the target brightness displayed by the pixel circuit 100 is greater than 90nit, the voltage of the mapped voltage line Vdata connected to the pixel circuit 100 in the second time period can be 5.05V; when the refresh rate corresponding to the pixel circuit 100 is 1Hz and the target brightness displayed by the pixel circuit 100 is less than or equal to 90nit, the voltage of the mapped voltage line Vdata connected to the pixel circuit 100 in the second time period can be 4.7V.

[0079] When setting the mapping information, two display areas with the same target brightness and different refresh rates can be set on the display device 1 through experiments, and the difference in the brightness displayed by the two display areas can be made as small as possible. In this case, the voltage of the voltage line Vdata connected to a certain pixel circuit 100 in the display area with a lower refresh rate in the second time period is determined as the voltage mapped to the refresh rate corresponding to the pixel circuit 100 and the target brightness displayed by the pixel circuit 100 in the first mapping information, thereby determining the refresh rate corresponding to a group of mapped pixel circuits 100, the target brightness displayed by the pixel circuit 100, and the voltage of the voltage line Vdata connected to the pixel circuit 100 in the second time period. By analogy, the complete mapping information can be determined.

[0080] In the embodiment of the present application, the display device 1 further includes a voltage adjustment module, through which the voltage adjustment module can determine the voltage of the first voltage line in the second time period according to the refresh rate corresponding to the first pixel circuit and the target brightness displayed by the first pixel circuit when the refresh rate corresponding to the first pixel circuit is lower than that of the second pixel circuit. The voltage is written to the first pixel circuit through the first voltage line in the second time period to reduce the difference in brightness displayed by the first pixel circuit and the second pixel circuit.

[0081] In some optional embodiments, the voltage adjustment module is used to determine the voltage of the first voltage line in the second time period according to the refresh rate corresponding to the first pixel circuit, the target brightness displayed by the first pixel circuit and the refresh rate corresponding to the second pixel circuit.

[0082] As a feasible implementation method, mapping information indicating the mapping relationship between the refresh rate corresponding to the first pixel circuit, the target brightness displayed by the first pixel circuit, and the refresh rate corresponding to the second pixel circuit, and the voltage of the first voltage line in the second time period can be preset, so that the voltage of the first voltage line in the second time period can be mapped out through the mapping information according to the refresh rate corresponding to the first pixel circuit, the target brightness displayed by the first pixel circuit, and the refresh rate corresponding to the second pixel circuit. The setting method of the mapping information can refer to the above embodiment and will not be repeated here.

[0083] In some embodiments, in addition to the first pixel circuit and the second pixel circuit, the pixel circuit 100 may further include at least one pixel circuit having a corresponding refresh rate different from that of the first pixel circuit and the second pixel circuit, for example, a third pixel circuit having a corresponding refresh rate different from that of the first pixel circuit and the second pixel circuit, and the voltage line connected to the third pixel circuit is a third voltage line. Then, the second pixel circuit may be a pixel circuit having the largest corresponding refresh rate among all pixel circuits having different corresponding refresh rates.

[0084] The voltage adjustment module can be used to map the voltage of the third voltage line in the second time period through mapping information according to the refresh rate corresponding to the third pixel circuit, the target brightness displayed by the third pixel circuit and the refresh rate corresponding to the second pixel circuit.

[0085] In an embodiment of the present application, the voltage adjustment module can determine the voltage of the first voltage line in the second time period based on the refresh rate corresponding to the first pixel circuit, the target brightness displayed by the first pixel circuit, and the refresh rate corresponding to the second pixel circuit. The reference factors are more comprehensive, and the voltage of the first voltage line in the second time period can be determined more accurately.

[0086] In some optional embodiments, when the refresh rate corresponding to the first pixel circuit is smaller than that corresponding to the second pixel circuit, the voltage of the first voltage line in the first time period is different from the voltage of the first voltage line in the second time period. Optionally, the voltage of the second voltage line in the first time period is the same as the voltage of the second voltage line in the second time period.

[0087] The embodiment of the present application can specifically set the voltage of the first voltage line in the second time period for the first pixel circuit with a lower refresh rate, so as to reduce the adverse effect of the parasitic capacitance generated by the first voltage line in the second time period.

[0088] In some optional embodiments, when the refresh rate corresponding to the first pixel circuit is smaller than that of the second pixel circuit, the voltage of the first voltage line in the second time period may be greater than the voltage of the second voltage line in the second time period.

[0089] The inventor of the present application has found that if the pixel colors (for example, red, green or blue) corresponding to the first pixel circuit and the second pixel circuit are the same, when the refresh rate corresponding to the first pixel circuit is lower than that of the second pixel circuit, the brightness displayed by the first pixel circuit will be greater than the brightness displayed by the second pixel circuit. In the embodiment of the present application, by setting the voltage of the first voltage line in the second time period to be greater than the voltage of the second voltage line in the second time period, the brightness displayed by the first pixel circuit can be reduced, thereby reducing the difference between the brightness displayed by the first pixel circuit and the brightness displayed by the second pixel circuit.

[0090] The embodiment of the present application also provides a driving method of a display device. The display device includes: a plurality of pixel circuits 100 arranged in an array, each pixel circuit 100 is connected to a corresponding voltage line Vdata, and the voltage line Vdata is used to write a voltage into the connected pixel circuit 100.

[0091] The refresh cycle of the pixel circuit 100 includes a first time period and a second time period. The plurality of pixel circuits 100 include a first pixel circuit and a second pixel circuit, the first pixel circuit is connected to the first voltage line, and the second pixel circuit is connected to the second voltage line.

[0092] like Figure 7 As shown, the driving method includes: S700, outputting a voltage to the first pixel circuit through the first voltage line during the refresh period of the first pixel circuit, and outputting a voltage to the first pixel circuit through the second voltage line during the refresh period of the second pixel circuit. When the refresh rates corresponding to the first pixel circuit and the second pixel circuit are different, the voltage of the first voltage line in the second time period is different from the voltage of the second voltage line in the second time period.

[0093] like Figure 7As shown, in some optional embodiments, the driving method also includes: S701, when the refresh rate corresponding to the first pixel circuit is less than that of the second pixel circuit, determining the voltage of the first voltage line in the second time period according to the refresh rate corresponding to the first pixel circuit and the target brightness displayed by the first pixel circuit.

[0094] In some optional embodiments, the voltage of the first voltage line in the second time period is determined according to the refresh rate corresponding to the first pixel circuit and the target brightness displayed by the first pixel circuit, including: determining the voltage of the first voltage line in the second time period according to the refresh rate corresponding to the first pixel circuit, the target brightness displayed by the first pixel circuit and the refresh rate corresponding to the second pixel circuit.

[0095] In some optional embodiments, when the refresh rate corresponding to the first pixel circuit is smaller than that corresponding to the second pixel circuit, the voltage of the first voltage line in the first time period is different from the voltage of the first voltage line in the second time period.

[0096] In some optional embodiments, the voltage of the second voltage line in the first time period is the same as the voltage of the second voltage line in the second time period.

[0097] It should be understood that the driving method of the display device provided in the embodiment of the present application is based on the same inventive concept as the embodiment of the aforementioned display device and can achieve the same effect. The structure and operation involved in the driving method of the display device can be found in the description in the embodiment of the aforementioned display device and will not be repeated here.

[0098] It should be pointed out that, according to the needs of implementation, the various components / steps described in the embodiments of the present application can be split into more components / steps, or two or more components / steps or partial operations of components / steps can be combined into new components / steps to achieve the purpose of the embodiments of the present application.

[0099] The above-mentioned method according to the embodiment of the present application can be implemented in hardware, firmware, or implemented as software or computer code that can be stored in a recording medium (such as a CD-ROM, RAM, floppy disk, hard disk or magneto-optical disk), or implemented as a computer code originally stored in a remote recording medium or a non-temporary machine-readable medium downloaded through a network and stored in a local recording medium, so that the method described herein can be stored in such software processing on a recording medium using a general-purpose computer, a dedicated processor or programmable or dedicated hardware (such as an application-specific integrated circuit (ASIC) or a field programmable gate array (FPGA)). It can be understood that a computer, a processor, a microprocessor controller or programmable hardware includes a storage component (e.g., a random access memory (RAM), a read-only memory (ROM), a flash memory, etc.) that can store or receive software or computer code, and when the software or computer code is accessed and executed by a computer, a processor or hardware, the method described herein is implemented. In addition, when a general-purpose computer accesses the code for implementing the method shown here, the execution of the code converts the general-purpose computer into a dedicated computer for executing the method shown here.

[0100] Those of ordinary skill in the art will appreciate that the units and method steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the embodiments of the present application.

[0101] The above implementation methods are only used to illustrate the embodiments of the present application, and are not limitations on the embodiments of the present application. Ordinary technicians in the relevant technical field can make various changes and modifications without departing from the spirit and scope of the embodiments of the present application. Therefore, all equivalent technical solutions also belong to the scope of the embodiments of the present application. The scope of patent protection of the embodiments of the present application should be limited by the claims.

Claims

1. A display device, characterized in that: include: A plurality of pixel circuits arranged in an array, each of the pixel circuits being connected to a corresponding voltage line, the voltage line being used to write a voltage into the connected pixel circuit; The refresh period of the pixel circuit includes a first time period and a second time period; The plurality of pixel circuits include a first pixel circuit and a second pixel circuit, the first pixel circuit is connected to a first voltage line, and the second pixel circuit is connected to a second voltage line; When the refresh rates corresponding to the first pixel circuit and the second pixel circuit are different, the voltage of the first voltage line in the second time period is different from the voltage of the second voltage line in the second time period.

2. The display device according to claim 1, characterized in that The pixel circuit comprises a write control module, a drive module, a light emitting module and a holding module; the voltage line is connected to the write control module, the write control module is connected to a first end of the drive module, the first end of the drive module is connected to a first power line, the second end of the drive module is connected to a first end of the light emitting module, and the second end of the light emitting module is connected to a second power line; the first end of the holding module is connected to the first power line, and the second end of the holding module is connected to a control end of the drive module; Preferably, the write control module is turned on in the first time period and turned off in the second time period.

3. The display device according to claim 2, characterized in that The pixel circuit includes a refresh control module; the holding module is connected to the refresh control module, and the refresh control module is connected to the second end of the driving module; Preferably, the refresh control module is turned on in the first time period and turned off in the second time period.

4. The display device according to claim 3, characterized in that: The pixel circuit includes a first light emitting control module and a second light emitting control module; The first end of the driving module is connected to the first power line through the first light control module, and the second end of the driving module is connected to the light emitting module through the second light control module; Preferably, the first light emitting control module is turned off in the first time period and turned on in the second time period; the second light emitting control module is turned off in the first time period and turned on in the second time period.

5. The display device according to any one of claims 1 to 4, characterized in that: The display device also includes a voltage adjustment module; the voltage adjustment module is used to determine the voltage of the first voltage line in the second time period according to the refresh rate corresponding to the first pixel circuit and the target brightness displayed by the first pixel circuit when the refresh rate corresponding to the first pixel circuit is less than that of the second pixel circuit.

6. The display device according to claim 5, characterized in that: The voltage adjustment module is used to determine the voltage of the first voltage line in the second time period according to the refresh rate corresponding to the first pixel circuit, the target brightness displayed by the first pixel circuit and the refresh rate corresponding to the second pixel circuit.

7. The display device according to any one of claims 1 to 4, characterized in that: When the refresh rate corresponding to the first pixel circuit is lower than that of the second pixel circuit, the voltage of the first voltage line in the first time period is different from the voltage of the first voltage line in the second time period; Preferably, the voltage of the second voltage line in the first time period is the same as the voltage of the second voltage line in the second time period.

8. The display device according to any one of claims 1 to 4, characterized in that: When the refresh rate corresponding to the first pixel circuit is smaller than that of the second pixel circuit, the voltage of the first voltage line in the second time period is greater than the voltage of the second voltage line in the second time period.

9. A method for driving a display device, characterized in that: The display device comprises: A plurality of pixel circuits arranged in an array, each of the pixel circuits being connected to a corresponding voltage line, the voltage line being used to write a voltage into the connected pixel circuit; The refresh period of the pixel circuit includes a first time period and a second time period; The plurality of pixel circuits include a first pixel circuit and a second pixel circuit, the first pixel circuit is connected to a first voltage line, and the second pixel circuit is connected to a second voltage line; The driving method comprises: outputting a voltage to the first pixel circuit via the first voltage line during a refresh period of the first pixel circuit, and outputting a voltage to the first pixel circuit via the second voltage line during a refresh period of the second pixel circuit; When the refresh rates corresponding to the first pixel circuit and the second pixel circuit are different, the voltage of the first voltage line in the second time period is different from the voltage of the second voltage line in the second time period.

10. The driving method according to claim 9, characterized in that: The driving method also includes: when the refresh rate corresponding to the first pixel circuit is smaller than that of the second pixel circuit, determining the voltage of the first voltage line in the second time period according to the refresh rate corresponding to the first pixel circuit and the target brightness displayed by the first pixel circuit.

11. The driving method according to claim 10, characterized in that: The method of determining the voltage of the first voltage line in the second time period according to the refresh rate corresponding to the first pixel circuit and the target brightness displayed by the first pixel circuit includes: determining the voltage of the first voltage line in the second time period according to the refresh rate corresponding to the first pixel circuit, the target brightness displayed by the first pixel circuit and the refresh rate corresponding to the second pixel circuit.

12. The driving method according to any one of claims 9 to 11, characterized in that: When the refresh rate corresponding to the first pixel circuit is lower than that of the second pixel circuit, the voltage of the first voltage line in the first time period is different from the voltage of the first voltage line in the second time period; Preferably, the voltage of the second voltage line in the first time period is the same as the voltage of the second voltage line in the second time period.

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